[PATCH] ARM: socfpga: fix broken function call for arria10
Remove obsolete arguments in the function call. The call's argument list differs from its more recent definition. This breaks compilation of the 'socfpga_arria10_defconfig' target, with additionally enabled:
CONFIG_CADENCE_QSPI=y'
The removed arguments are obtained from device-tree declaration.
Signed-off-by: Lothar Rubusch l.rubusch@gmail.com --- The patch makes the problem disappear. While messing with some old Intels, it looked to me as if this usually turned off code region of the misc_arria10.c still contains legacy arguments in the call. Thus broke my compilation. I'm unsure. Please verify. --- arch/arm/mach-socfpga/misc_arria10.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 93c9e8b0..5c782f6b 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -211,11 +211,9 @@ int qspi_flash_software_reset(void) struct udevice *flash; int ret;
- /* Get the flash info */ + /* Get the flash info, speed and mode will be read from DT */ ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, - CONFIG_SF_DEFAULT_SPEED, - CONFIG_SF_DEFAULT_MODE, &flash);
if (ret) {
On 7/1/24 11:59 PM, Lothar Rubusch wrote:
Remove obsolete arguments in the function call. The call's argument list differs from its more recent definition. This breaks compilation of the 'socfpga_arria10_defconfig' target, with additionally enabled:
CONFIG_CADENCE_QSPI=y'
The removed arguments are obtained from device-tree declaration.
Signed-off-by: Lothar Rubusch l.rubusch@gmail.com
The patch makes the problem disappear. While messing with some old Intels, it looked to me as if this usually turned off code region of the misc_arria10.c still contains legacy arguments in the call. Thus broke my compilation. I'm unsure. Please verify.
arch/arm/mach-socfpga/misc_arria10.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 93c9e8b0..5c782f6b 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -211,11 +211,9 @@ int qspi_flash_software_reset(void) struct udevice *flash; int ret;
- /* Get the flash info */
- /* Get the flash info, speed and mode will be read from DT */ ret = spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS,
CONFIG_SF_DEFAULT_SPEED,CONFIG_SF_DEFAULT_MODE, &flash);
Reviewed-by: Marek Vasut marex@denx.de
Could you by any chance also send a patch to enable this QSPI NOR support on one of the A10 targets, so the CI would compile this code and this code wouldn't bitrot again ?
Thanks
Hi U-boot-teers!
(...)
Reviewed-by: Marek Vasut marex@denx.de
Could you by any chance also send a patch to enable this QSPI NOR support on one of the A10 targets, so the CI would compile this code and this code wouldn't bitrot again ?
Thanks
I've sent you now a series of one patch showing the error for me. And another one with the above fix. NB: I did not apply reviewed-by tags, so far. Also note, it is not supposed to turn on the (bloody) cadence QSPI flash permanently. We have this piece and having turned on, it can lead into situations due to ...interesting hardware behavior.
Best, L
participants (2)
-
Lothar Rubusch -
Marek Vasut