[U-Boot] [PATCH 0/4] rockchip: dts: rk3399-puma: update DTS

For the RK3399-Q7, there's been a number of changes to the DTS from the ongoing Linux development and from recently enabled functionality within U-Boot.
Klaus Goger (1): rockchip: dts: rk3399-puma: set spl-payload-offset
Philipp Tomsich (3): rockchip: dts: rk3399-puma: make the debug serial dm-pre-reloc rockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpio rockchip: dts: rk3399-puma: sync DTS with Linux tree
arch/arm/dts/rk3399-puma.dts | 543 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 498 insertions(+), 45 deletions(-)

Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/rk3399-puma.dts | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index a234db8..5d9dfb5 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -107,6 +107,7 @@ };
&uart0 { + u-boot,dm-pre-reloc; status = "okay"; };

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!

On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3.
Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/rk3399-puma.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index 5d9dfb5..7009fde 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -124,7 +124,7 @@ };
&dwc3_typec0 { - status = "okay"; + status = "disabled"; };
&usb_host1_ehci { @@ -136,6 +136,7 @@ };
&dwc3_typec1 { + rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>; status = "okay"; };
@@ -182,7 +183,7 @@
compatible = "spi-flash"; reg = <0>; - spi-max-frequency = <5000000>; + spi-max-frequency = <49500000>; spi-cpol; spi-cpha; };

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3.
Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3.
Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!

From: Klaus Goger klaus.goger@theobroma-systems.com
defines the spl-payload to 256k (0x40000)
Signed-off-by: Klaus Goger klaus.goger@theobroma-systems.com Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/rk3399-puma.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index 7009fde..c04a853 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -14,7 +14,8 @@ compatible = "tsd,puma", "rockchip,rk3399";
config { - u-boot,spl-payload-offset = <204800>; + u-boot,spl-payload-offset = <0x40000>; // 256kbyte + u-boot,boot-led = "puma:orange:power"; };
chosen {

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
From: Klaus Goger klaus.goger@theobroma-systems.com
defines the spl-payload to 256k (0x40000)
Signed-off-by: Klaus Goger klaus.goger@theobroma-systems.com Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org

On 31 May 2017 at 10:17, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
From: Klaus Goger klaus.goger@theobroma-systems.com
defines the spl-payload to 256k (0x40000)
Signed-off-by: Klaus Goger klaus.goger@theobroma-systems.com Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!

The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/rk3399-puma.dts | 540 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 495 insertions(+), 45 deletions(-)
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index c04a853..fca14d3 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -5,17 +5,18 @@ */
/dts-v1/; + #include <dt-bindings/pwm/pwm.h> #include "rk3399.dtsi" #include "rk3399-sdram-ddr3-1600.dtsi"
/ { model = "Theobroma Systems RK3399-Q7 SoM"; - compatible = "tsd,puma", "rockchip,rk3399"; + compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
config { - u-boot,spl-payload-offset = <0x40000>; // 256kbyte - u-boot,boot-led = "puma:orange:power"; + u-boot,spl-payload-offset = <0x40000>; /* 256kbyte */ + u-boot,boot-led = "module_led"; };
chosen { @@ -28,16 +29,74 @@ spi1 = &spi5; };
- vdd_center: vdd-center { - compatible = "pwm-regulator"; - pwms = <&pwm3 0 25000 0>; - regulator-name = "vdd_center"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-init-microvolt = <950000>; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins_puma>; + + module_led { + label = "module_led"; + gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + sd_card_led { + label = "sd_card_led"; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + dw_hdmi_audio: dw-hdmi-audio { + status = "enabled"; + compatible = "rockchip,dw-hdmi-audio"; + #sound-dai-cells = <0>; + }; + + hdmi_codec: hdmi-codec { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "HDMI-CODEC"; + + simple-audio-card,cpu { + sound-dai = <&i2s2>; + }; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + }; + + hdmi_sound: hdmi-sound { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "rockchip,hdmi"; + + simple-audio-card,cpu { + sound-dai = <&i2s2>; + }; + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + }; + + vccadc_ref: vccadc-ref { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_sys"; regulator-always-on; regulator-boot-on; - status = "okay"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; };
vcc3v3_sys: vcc3v3-sys { @@ -49,24 +108,33 @@ regulator-max-microvolt = <3300000>; };
- vcc_phy: vcc-phy-regulator { + vcc5v0_otg: vcc5v0-otg-regulator { compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; + enable-active-high; + gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_drv>; + regulator-name = "vcc5v0_otg"; regulator-always-on; - regulator-boot-on; };
- vcc5v0_host: vcc5v0-host-en { + vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; + enable-active-low; + gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; regulator-name = "vcc5v0_host"; - gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + regulator-always-on; };
- clkin_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "clkin_gmac"; - #clock-cells = <0>; + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; };
vcc_phy: vcc-phy-regulator { @@ -75,40 +143,350 @@ regulator-always-on; regulator-boot-on; }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + /* for rockchip boot on */ + rockchip,pwm_id= <2>; + rockchip,pwm_voltage = <1000000>; + }; };
&emmc_phy { status = "okay"; };
-&pwm0 { +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <2 10000 50000>; + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x10>; + rx_delay = <0x10>; status = "okay"; };
-&pwm2 { +&hdmi { + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <0>; status = "okay"; };
-&pwm3 { +&i2c0 { status = "okay"; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + clock-frequency = <400000>; + + vdd_gpu: fan535555@60 { + compatible = "fcs,fan53555"; + reg = <0x60>; + vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "fan53555-reg"; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1230000>; + regulator-ramp-delay = <1000>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt? + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc5v0_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc1v8_pmu>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-name = "vdd_center"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-name = "vdd_cpu_l"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_ldo1: LDO_REG1 { + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_ldo1"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_hdmi: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_hdmi"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sd: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_ldo5: LDO_REG5 { + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_ldo5"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ldo6: LDO_REG6 { + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc_ldo6"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc0v9_hdmi: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vcc0v9_hdmi"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_efuse: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_efuse"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_s3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; };
-&sdmmc { - u-boot,dm-pre-reloc; - bus-width = <4>; +&i2c8 { + status = "okay"; + clock-frequency = <400000>; + + vdd_cpu_b: fan53555@60 { + compatible = "fcs,fan53555"; + reg = <0x60>; + vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "fan53555-reg"; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1230000>; + regulator-ramp-delay = <1000>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2s0 { + status = "okay"; + rockchip,i2s-broken-burst-len; + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + #sound-dai-cells = <0>; +}; + +&i2s2 { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */ + audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */ + sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ + gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */ +}; + +&pcie0 { + assigned-clocks = <&cru SCLK_PCIEPHY_REF>; + assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; + assigned-clock-rates = <100000000>; + ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pmu_io_domains { + status = "okay"; + pmu1830-supply = <&vcc_1v8>; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { status = "okay"; };
&sdhci { bus-width = <8>; mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; + supports-emmc; non-removable; + keep-power-in-suspend; + mmc-hs400-enhanced-strobe; status = "okay"; };
-&uart0 { - u-boot,dm-pre-reloc; +&sdmmc { + u-boot,dm-pre-reloc; + clock-frequency = <150000000>; + clock-freq-min-max = <100000 150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; + vqmmc-supply = <&vcc_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; status = "okay"; };
@@ -141,36 +519,107 @@ status = "okay"; };
+&vopb { + status = "okay"; +}; + &pinctrl { + /* Pins that are not explicitely used by any devices */ + pinctrl-names = "default"; + pinctrl-0 = <&puma_pin_hog>; + hog { + puma_pin_hog: puma_pin_hog { + rockchip,pins = + /* We need pull-ups on Q7 buttons */ + <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ + <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ + <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ + <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = - <1 21 RK_FUNC_GPIO &pcfg_pull_up>; + <1 22 RK_FUNC_GPIO &pcfg_pull_up>; }; + }; + + leds_pins_puma: led_pins@0 { + rockchip,pins = + <2 25 RK_FUNC_GPIO &pcfg_pull_none>, + <1 2 RK_FUNC_GPIO &pcfg_pull_none>; + };
- pmic_dvs2: pmic-dvs2 { + usb2 { + otg_vbus_drv: otg-vbus-drv { rockchip,pins = - <1 18 RK_FUNC_GPIO &pcfg_pull_down>; + <0 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + host_vbus_drv: host-vbus-drv { + rockchip,pins = + <0 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + i2c8 { + i2c8_xfer_a: i2c8-xfer { + rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>, + <1 20 RK_FUNC_1 &pcfg_pull_up>; }; }; };
-&gmac { - phy-supply = <&vcc_phy>; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - assigned-clocks = <&cru SCLK_RMII_SRC>; - assigned-clock-parents = <&clkin_gmac>; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; +}; +&i2c2 { + status = "okay"; + clock-frequency = <400000>; +}; +&i2c4 { + status = "okay"; + clock-frequency = <400000>; +}; +&i2c6 { + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c6_xfer { + /* Enable pull-ups, the pins would float otherwise. */ + rockchip,pins = + <2 10 RK_FUNC_2 &pcfg_pull_up>, + <2 9 RK_FUNC_2 &pcfg_pull_up>; +}; + +&i2c7 { + status = "okay"; + clock-frequency = <400000>; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + fan: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + cooling-min-state = <0>; + cooling-max-state = <9>; + #cooling-cells = <2>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - tx_delay = <0x10>; - rx_delay = <0x10>; + pinctrl-0 = <&uart0_xfer &uart0_cts>; status = "okay"; };
+ &spi1 { u-boot,dm-pre-reloc;
@@ -193,3 +642,4 @@ &spi5 { status = "okay"; }; +

On 31 May 2017 at 10:18, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 540 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 495 insertions(+), 45 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

Hi Philipp,
On 1 June 2017 at 20:55, Simon Glass sjg@chromium.org wrote:
On 31 May 2017 at 10:18, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 540 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 495 insertions(+), 45 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
This appears to break all rockchip boards. Did you run 'buildman rockchip' on it? That helps to figure out problems. Perhaps there is a dependency?
Regards, Simon

On 05 Jun 2017, at 23:33, Simon Glass sjg@chromium.org wrote:
Hi Philipp,
On 1 June 2017 at 20:55, Simon Glass sjg@chromium.org wrote:
On 31 May 2017 at 10:18, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-puma.dts | 540 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 495 insertions(+), 45 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
This appears to break all rockchip boards. Did you run 'buildman rockchip' on it? That helps to figure out problems. Perhaps there is a dependency?
Regards, Simon
Took me a bit to figure out why buildman didn’t show this for me… which was due to the dependency being part of the RK3399 HDMI enablement.
Either way, this change has now been superseded by a series that ensures a clean buildman run on to of u-boot-rockchip@2b19b2f.
Thanks for the patience, Philipp.
participants (4)
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Dr. Philipp Tomsich
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Philipp Tomsich
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Simon Glass
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sjg@google.com