[U-Boot] [PATCH v3 00/13] imx6: icorem6: Add dm-eth, framebuffer and I2C support
From: Jagan Teki jagan@amarulasolutions.com
This series support framebuffer and I2C on top of u-boot-imx.git with latest u-boot.git merge.
fec_mxc dm driver on previous version series trigger an issues with when DM_ETH not-defined so, this series have fixes for non-dm builds as well.
Changes for v3: - Fix fec_mxc driver to build for non-dm configs as well. - Fix VIDEO_IPV3 Kconfig entry not to make default.
Changes for v2: - Rebase on u-boot-imx.git and u-boot.git
Jagan Teki (13): net: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr net: fec_mxc: Convert into driver model net: fec_mxc: Driver cleanups dm: net: fec: Add .read_rom_hwaddr ARM: dts: imx6qdl-icore: Add FEC support icorem6: Use CONFIG_DM_ETH support video: Kconfig: Add VIDEO_IPV3 entry imx6: icorem6: Add framebuffer support imx6: icorem6: Add custom splashscreen support i2c: Kconfig: Add SYS_I2C_MXC entry i2c: mxc: Print hex instead of decimal for bus address i2c: mxc: Make 'no gpio pinctrl state' print as debug imx6: icorem6: Add I2C support
arch/arm/cpu/armv7/mx6/Kconfig | 2 + arch/arm/dts/imx6qdl-icore.dtsi | 24 ++ board/engicam/icorem6/icorem6.c | 184 ++++++++------ configs/imx6qdl_icore_mmc_defconfig | 7 +- configs/imx6qdl_icore_nand_defconfig | 7 +- drivers/i2c/Kconfig | 8 + drivers/i2c/mxc_i2c.c | 2 +- drivers/net/fec_mxc.c | 473 +++++++++++++++++++++++------------ drivers/net/fec_mxc.h | 31 +-- drivers/video/Kconfig | 7 + include/configs/imx6qdl_icore.h | 14 ++ tools/logos/engicam.bmp | Bin 0 -> 60214 bytes 12 files changed, 509 insertions(+), 250 deletions(-) create mode 100755 tools/logos/engicam.bmp
From: Jagan Teki jagan@amarulasolutions.com
fec_get_hwaddr never used eth_device argument, hence removed.
Cc: Simon Glass sjg@chromium.org Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Acked-by: Joe Hershberger joe.hershberger@ni.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/net/fec_mxc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 84021ea..b642770 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -362,8 +362,7 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd) writew(0, &pRbd->data_length); }
-static int fec_get_hwaddr(struct eth_device *dev, int dev_id, - unsigned char *mac) +static int fec_get_hwaddr(int dev_id, unsigned char *mac) { imx_get_mac_from_fuse(dev_id, mac); return !is_valid_ethaddr(mac); @@ -1045,7 +1044,7 @@ static int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, #endif eth_register(edev);
- if (fec_get_hwaddr(edev, dev_id, ethaddr) == 0) { + if (fec_get_hwaddr(dev_id, ethaddr) == 0) { debug("got MAC%d address from fuse: %pM\n", dev_id, ethaddr); memcpy(edev->enetaddr, ethaddr, 6); if (!getenv("ethaddr"))
From: Jagan Teki jagan@amarulasolutions.com
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass sjg@chromium.org Cc: Joe Hershberger joe.hershberger@ni.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Changes for v3: - Removed the stub functions[1] and revert back to previous changes where #ifdef on each function call. We can't use the stub functions to minimize the #ifdef's as the driver is organize the code in such a way that it can't modularized the code. So better to use #ifdef to not to break the non-dm.
[1] http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=fa2ce02b73fa59fe9...
drivers/net/fec_mxc.c | 268 +++++++++++++++++++++++++++++++++++++++++++++----- drivers/net/fec_mxc.h | 4 + 2 files changed, 246 insertions(+), 26 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index b642770..fd96c43 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -9,6 +9,7 @@ */
#include <common.h> +#include <dm.h> #include <malloc.h> #include <memalign.h> #include <net.h> @@ -368,10 +369,20 @@ static int fec_get_hwaddr(int dev_id, unsigned char *mac) return !is_valid_ethaddr(mac); }
+#ifdef CONFIG_DM_ETH +static int fecmxc_set_hwaddr(struct udevice *dev) +#else static int fec_set_hwaddr(struct eth_device *dev) +#endif { +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + uchar *mac = pdata->enetaddr; +#else uchar *mac = dev->enetaddr; struct fec_priv *fec = (struct fec_priv *)dev->priv; +#endif
writel(0, &fec->eth->iaddr1); writel(0, &fec->eth->iaddr2); @@ -426,9 +437,17 @@ static void fec_reg_setup(struct fec_priv *fec) * Start the FEC engine * @param[in] dev Our device to handle */ +#ifdef CONFIG_DM_ETH +static int fec_open(struct udevice *dev) +#else static int fec_open(struct eth_device *edev) +#endif { +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); +#else struct fec_priv *fec = (struct fec_priv *)edev->priv; +#endif int speed; uint32_t addr, size; int i; @@ -534,14 +553,26 @@ static int fec_open(struct eth_device *edev) return 0; }
+#ifdef CONFIG_DM_ETH +static int fecmxc_init(struct udevice *dev) +#else static int fec_init(struct eth_device *dev, bd_t* bd) +#endif { +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); +#else struct fec_priv *fec = (struct fec_priv *)dev->priv; +#endif uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop; int i;
/* Initialize MAC address */ +#ifdef CONFIG_DM_ETH + fecmxc_set_hwaddr(dev); +#else fec_set_hwaddr(dev); +#endif
/* * Setup transmit descriptors, there are two in total. @@ -595,9 +626,17 @@ static int fec_init(struct eth_device *dev, bd_t* bd) * Halt the FEC engine * @param[in] dev Our device to handle */ +#ifdef CONFIG_DM_ETH +static void fecmxc_halt(struct udevice *dev) +#else static void fec_halt(struct eth_device *dev) +#endif { +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); +#else struct fec_priv *fec = (struct fec_priv *)dev->priv; +#endif int counter = 0xffff;
/* @@ -637,7 +676,11 @@ static void fec_halt(struct eth_device *dev) * @param[in] length Data count in bytes * @return 0 on success */ +#ifdef CONFIG_DM_ETH +static int fecmxc_send(struct udevice *dev, void *packet, int length) +#else static int fec_send(struct eth_device *dev, void *packet, int length) +#endif { unsigned int status; uint32_t size, end; @@ -649,7 +692,11 @@ static int fec_send(struct eth_device *dev, void *packet, int length) * This routine transmits one frame. This routine only accepts * 6-byte Ethernet addresses. */ +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); +#else struct fec_priv *fec = (struct fec_priv *)dev->priv; +#endif
/* * Check for valid length of data. @@ -782,9 +829,17 @@ out: * @param[in] dev Our ethernet device to handle * @return Length of packet read */ +#ifdef CONFIG_DM_ETH +static int fecmxc_recv(struct udevice *dev, int flags, uchar **packetp) +#else static int fec_recv(struct eth_device *dev) +#endif { +#ifdef CONFIG_DM_ETH + struct fec_priv *fec = dev_get_priv(dev); +#else struct fec_priv *fec = (struct fec_priv *)dev->priv; +#endif struct fec_bd *rbd = &fec->rbd_base[fec->rbd_index]; unsigned long ievent; int frame_length, len = 0; @@ -800,8 +855,13 @@ static int fec_recv(struct eth_device *dev) writel(ievent, &fec->eth->ievent); debug("fec_recv: ievent 0x%lx\n", ievent); if (ievent & FEC_IEVENT_BABR) { +#ifdef CONFIG_DM_ETH + fecmxc_halt(dev); + fecmxc_init(dev); +#else fec_halt(dev); fec_init(dev, fec->bd); +#endif printf("some error: 0x%08lx\n", ievent); return 0; } @@ -813,10 +873,18 @@ static int fec_recv(struct eth_device *dev) if (ievent & FEC_IEVENT_GRA) { /* Graceful stop complete */ if (readl(&fec->eth->x_cntrl) & 0x00000001) { +#ifdef CONFIG_DM_ETH + fecmxc_halt(dev); +#else fec_halt(dev); +#endif writel(~0x00000001 & readl(&fec->eth->x_cntrl), &fec->eth->x_cntrl); +#ifdef CONFIG_DM_ETH + fecmxc_init(dev); +#else fec_init(dev, fec->bd); +#endif } }
@@ -970,6 +1038,33 @@ static void fec_free_descs(struct fec_priv *fec) free(fec->tbd_base); }
+struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id) +{ + struct ethernet_regs *eth = (struct ethernet_regs *)base_addr; + struct mii_dev *bus; + int ret; + + bus = mdio_alloc(); + if (!bus) { + printf("mdio_alloc failed\n"); + return NULL; + } + bus->read = fec_phy_read; + bus->write = fec_phy_write; + bus->priv = eth; + fec_set_dev_name(bus->name, dev_id); + + ret = mdio_register(bus); + if (ret) { + printf("mdio_register failed\n"); + free(bus); + return NULL; + } + fec_mii_setspeed(eth); + return bus; +} + +#ifndef CONFIG_DM_ETH #ifdef CONFIG_PHYLIB int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, struct mii_dev *bus, struct phy_device *phydev) @@ -1061,32 +1156,6 @@ err1: return ret; }
-struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id) -{ - struct ethernet_regs *eth = (struct ethernet_regs *)base_addr; - struct mii_dev *bus; - int ret; - - bus = mdio_alloc(); - if (!bus) { - printf("mdio_alloc failed\n"); - return NULL; - } - bus->read = fec_phy_read; - bus->write = fec_phy_write; - bus->priv = eth; - fec_set_dev_name(bus->name, dev_id); - - ret = mdio_register(bus); - if (ret) { - printf("mdio_register failed\n"); - free(bus); - return NULL; - } - fec_mii_setspeed(eth); - return bus; -} - int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr) { uint32_t base_mii; @@ -1146,3 +1215,150 @@ int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)) return 0; } #endif + +#else + +static const struct eth_ops fecmxc_ops = { + .start = fecmxc_init, + .send = fecmxc_send, + .recv = fecmxc_recv, + .stop = fecmxc_halt, + .write_hwaddr = fecmxc_set_hwaddr, +}; + +static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) +{ + struct phy_device *phydev; + int mask = 0xffffffff; + +#ifdef CONFIG_PHYLIB + mask = 1 << CONFIG_FEC_MXC_PHYADDR; +#endif + + phydev = phy_find_by_mask(priv->bus, mask, priv->interface); + if (!phydev) + return -ENODEV; + + phy_connect_dev(phydev, dev); + + priv->phydev = phydev; + phy_config(phydev); + + return 0; +} + +static int fecmxc_probe(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fec_priv *priv = dev_get_priv(dev); + struct mii_dev *bus = NULL; + int dev_id = -1; + unsigned char ethaddr[6]; + uint32_t start; + int ret; + + ret = fec_alloc_descs(priv); + if (ret) + return ret; + + bus = fec_get_miibus((uint32_t)priv->eth, dev_id); + if (!bus) + goto err_mii; + + priv->bus = bus; + priv->xcv_type = CONFIG_FEC_XCV_TYPE; + priv->interface = pdata->phy_interface; + ret = fec_phy_init(priv, dev); + if (ret) + goto err_phy; + + /* Reset chip. */ + writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET, &priv->eth->ecntrl); + start = get_timer(0); + while (readl(&priv->eth->ecntrl) & FEC_ECNTRL_RESET) { + if (get_timer(start) > (CONFIG_SYS_HZ * 5)) { + printf("FEC MXC: Timeout reseting chip\n"); + goto err_timeout; + } + udelay(10); + } + + fec_reg_setup(priv); + fec_set_dev_name((char *)dev->name, dev_id); + priv->dev_id = (dev_id == -1) ? 0 : dev_id; + + ret = fec_get_hwaddr(dev_id, ethaddr); + if (!ret) { + debug("got MAC%d address from fuse: %pM\n", dev_id, ethaddr); + memcpy(pdata->enetaddr, ethaddr, 6); + if (!getenv("ethaddr")) + eth_setenv_enetaddr("ethaddr", ethaddr); + } + + return 0; + +err_timeout: + free(priv->phydev); +err_phy: + mdio_unregister(bus); + free(bus); +err_mii: + fec_free_descs(priv); + return ret; +} + +static int fecmxc_remove(struct udevice *dev) +{ + struct fec_priv *priv = dev_get_priv(dev); + + free(priv->phydev); + fec_free_descs(priv); + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +static int fecmxc_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fec_priv *priv = dev_get_priv(dev); + const char *phy_mode; + + pdata->iobase = (phys_addr_t)dev_get_addr(dev); + priv->eth = (struct ethernet_regs *)pdata->iobase; + + pdata->phy_interface = -1; + phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + + /* TODO + * Need to get the reset-gpio and related properties from DT + * and implemet the enet reset code on .probe call + */ + + return 0; +} + +static const struct udevice_id fecmxc_ids[] = { + { .compatible = "fsl,imx6q-fec" }, + { } +}; + +U_BOOT_DRIVER(fecmxc_gem) = { + .name = "fecmxc", + .id = UCLASS_ETH, + .of_match = fecmxc_ids, + .ofdata_to_platdata = fecmxc_ofdata_to_platdata, + .probe = fecmxc_probe, + .remove = fecmxc_remove, + .ops = &fecmxc_ops, + .priv_auto_alloc_size = sizeof(struct fec_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; +#endif diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 0717cc6..9fc6153 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -264,6 +264,10 @@ struct fec_priv { int phy_id; int (*mii_postcall)(int); #endif + +#ifdef CONFIG_DM_ETH + u32 interface; +#endif };
/**
Hi Jagan,
On Mon, Dec 5, 2016 at 5:00 PM, Jagan Teki jagan@openedev.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass sjg@chromium.org Cc: Joe Hershberger joe.hershberger@ni.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Changes for v3:
- Removed the stub functions[1] and revert back to previous changes where #ifdef on each function call. We can't use the stub functions to minimize the #ifdef's as the driver is organize the code in such a way that it can't modularized the code. So better to use #ifdef to not to break the non-dm.
[1] http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=fa2ce02b73fa59fe9...
So the plan is to drop that from u-boot-imx and use this instead? If so,
Acked-by: Joe Hershberger joe.hershberger@ni.com
drivers/net/fec_mxc.c | 268 +++++++++++++++++++++++++++++++++++++++++++++----- drivers/net/fec_mxc.h | 4 + 2 files changed, 246 insertions(+), 26 deletions(-)
On Dec 9, 2016 7:22 PM, "Joe Hershberger" joe.hershberger@gmail.com wrote:
Hi Jagan,
On Mon, Dec 5, 2016 at 5:00 PM, Jagan Teki jagan@openedev.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass sjg@chromium.org Cc: Joe Hershberger joe.hershberger@ni.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Changes for v3:
- Removed the stub functions[1] and revert back to previous changes where
#ifdef on
each function call. We can't use the stub functions to minimize the
#ifdef's as the
driver is organize the code in such a way that it can't modularized the
code. So better
to use #ifdef to not to break the non-dm.
[1] http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=
fa2ce02b73fa59fe91d2d0ad61bf837392e03ab9
So the plan is to drop that from u-boot-imx and use this instead? If so,
Yes.
From: Jagan Teki jagan@amarulasolutions.com
- Remove exctra space - Add space - Add tab space - Fix single line comments quotes - Fix 'CHECK: Avoid CamelCase' - Fix 'CHECK: Alignment should match open parenthesis' - Fix 'WARNING: line over 80 characters' - Re-arrage header include files
Cc: Simon Glass sjg@chromium.org Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Acked-by: Joe Hershberger joe.hershberger@ni.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/net/fec_mxc.c | 202 +++++++++++++++++++------------------------------- drivers/net/fec_mxc.h | 27 ++----- 2 files changed, 83 insertions(+), 146 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index fd96c43..2c4be96 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -12,18 +12,19 @@ #include <dm.h> #include <malloc.h> #include <memalign.h> +#include <miiphy.h> #include <net.h> #include <netdev.h> -#include <miiphy.h> #include "fec_mxc.h"
-#include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> -#include <asm/imx-common/sys_proto.h> #include <asm/io.h> #include <linux/errno.h> #include <linux/compiler.h>
+#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/imx-common/sys_proto.h> + DECLARE_GLOBAL_DATA_PTR;
/* @@ -80,11 +81,9 @@ static void swap_packet(uint32_t *packet, int length) } #endif
-/* - * MII-interface related functions - */ -static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, - uint8_t regAddr) +/* MII-interface related functions */ +static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyaddr, + uint8_t regaddr) { uint32_t reg; /* convenient holder for the PHY register */ uint32_t phy; /* convenient holder for the PHY */ @@ -96,15 +95,13 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, * programming the FEC's MII data register. */ writel(FEC_IEVENT_MII, ð->ievent); - reg = regAddr << FEC_MII_DATA_RA_SHIFT; - phy = phyAddr << FEC_MII_DATA_PA_SHIFT; + reg = regaddr << FEC_MII_DATA_RA_SHIFT; + phy = phyaddr << FEC_MII_DATA_PA_SHIFT;
writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA | phy | reg, ð->mii_data);
- /* - * wait for the related interrupt - */ + /* wait for the related interrupt */ start = get_timer(0); while (!(readl(ð->ievent) & FEC_IEVENT_MII)) { if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { @@ -113,17 +110,13 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, } }
- /* - * clear mii interrupt bit - */ + /* clear mii interrupt bit */ writel(FEC_IEVENT_MII, ð->ievent);
- /* - * it's now safe to read the PHY's register - */ + /* it's now safe to read the PHY's register */ val = (unsigned short)readl(ð->mii_data); - debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyAddr, - regAddr, val); + debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, + regaddr, val); return val; }
@@ -154,22 +147,20 @@ static void fec_mii_setspeed(struct ethernet_regs *eth) debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); }
-static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, - uint8_t regAddr, uint16_t data) +static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyaddr, + uint8_t regaddr, uint16_t data) { uint32_t reg; /* convenient holder for the PHY register */ uint32_t phy; /* convenient holder for the PHY */ uint32_t start;
- reg = regAddr << FEC_MII_DATA_RA_SHIFT; - phy = phyAddr << FEC_MII_DATA_PA_SHIFT; + reg = regaddr << FEC_MII_DATA_RA_SHIFT; + phy = phyaddr << FEC_MII_DATA_PA_SHIFT;
writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | FEC_MII_DATA_TA | phy | reg | data, ð->mii_data);
- /* - * wait for the MII interrupt - */ + /* wait for the MII interrupt */ start = get_timer(0); while (!(readl(ð->ievent) & FEC_IEVENT_MII)) { if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { @@ -178,26 +169,24 @@ static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, } }
- /* - * clear MII interrupt bit - */ + /* clear MII interrupt bit */ writel(FEC_IEVENT_MII, ð->ievent); - debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyAddr, - regAddr, data); + debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, + regaddr, data);
return 0; }
-static int fec_phy_read(struct mii_dev *bus, int phyAddr, int dev_addr, - int regAddr) +static int fec_phy_read(struct mii_dev *bus, int phyaddr, int dev_addr, + int regaddr) { - return fec_mdio_read(bus->priv, phyAddr, regAddr); + return fec_mdio_read(bus->priv, phyaddr, regaddr); }
-static int fec_phy_write(struct mii_dev *bus, int phyAddr, int dev_addr, - int regAddr, u16 data) +static int fec_phy_write(struct mii_dev *bus, int phyaddr, int dev_addr, + int regaddr, u16 data) { - return fec_mdio_write(bus->priv, phyAddr, regAddr, data); + return fec_mdio_write(bus->priv, phyaddr, regaddr, data); }
#ifndef CONFIG_PHYLIB @@ -218,14 +207,12 @@ static int miiphy_restart_aneg(struct eth_device *dev) fec_mdio_write(eth, fec->phy_id, MII_BMCR, BMCR_RESET); udelay(1000);
- /* - * Set the auto-negotiation advertisement register bits - */ + /* Set the auto-negotiation advertisement register bits */ fec_mdio_write(eth, fec->phy_id, MII_ADVERTISE, - LPA_100FULL | LPA_100HALF | LPA_10FULL | - LPA_10HALF | PHY_ANLPAR_PSB_802_3); + LPA_100FULL | LPA_100HALF | LPA_10FULL | + LPA_10HALF | PHY_ANLPAR_PSB_802_3); fec_mdio_write(eth, fec->phy_id, MII_BMCR, - BMCR_ANENABLE | BMCR_ANRESTART); + BMCR_ANENABLE | BMCR_ANRESTART);
if (fec->mii_postcall) ret = fec->mii_postcall(fec->phy_id); @@ -242,9 +229,7 @@ static int miiphy_wait_aneg(struct eth_device *dev) struct fec_priv *fec = (struct fec_priv *)dev->priv; struct ethernet_regs *eth = fec->bus->priv;
- /* - * Wait for AN completion - */ + /* Wait for AN completion */ start = get_timer(0); do { if (get_timer(start) > (CONFIG_SYS_HZ * 5)) { @@ -255,7 +240,7 @@ static int miiphy_wait_aneg(struct eth_device *dev) status = fec_mdio_read(eth, fec->phy_id, MII_BMSR); if (status < 0) { printf("%s: Autonegotiation failed. status: %d\n", - dev->name, status); + dev->name, status); return -1; } } while (!(status & BMSR_LSTATUS)); @@ -352,15 +337,15 @@ static void fec_tbd_init(struct fec_priv *fec) /** * Mark the given read buffer descriptor as free * @param[in] last 1 if this is the last buffer descriptor in the chain, else 0 - * @param[in] pRbd buffer descriptor to mark free again + * @param[in] prbd buffer descriptor to mark free again */ -static void fec_rbd_clean(int last, struct fec_bd *pRbd) +static void fec_rbd_clean(int last, struct fec_bd *prbd) { unsigned short flags = FEC_RBD_EMPTY; if (last) flags |= FEC_RBD_WRAP; - writew(flags, &pRbd->status); - writew(0, &pRbd->data_length); + writew(flags, &prbd->status); + writew(0, &prbd->data_length); }
static int fec_get_hwaddr(int dev_id, unsigned char *mac) @@ -389,37 +374,26 @@ static int fec_set_hwaddr(struct eth_device *dev) writel(0, &fec->eth->gaddr1); writel(0, &fec->eth->gaddr2);
- /* - * Set physical address - */ + /* Set physical address */ writel((mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3], - &fec->eth->paddr1); + &fec->eth->paddr1); writel((mac[4] << 24) + (mac[5] << 16) + 0x8808, &fec->eth->paddr2);
return 0; }
-/* - * Do initial configuration of the FEC registers - */ +/* Do initial configuration of the FEC registers */ static void fec_reg_setup(struct fec_priv *fec) { uint32_t rcntrl;
- /* - * Set interrupt mask register - */ + /* Set interrupt mask register */ writel(0x00000000, &fec->eth->imask);
- /* - * Clear FEC-Lite interrupt event register(IEVENT) - */ + /* Clear FEC-Lite interrupt event register(IEVENT) */ writel(0xffffffff, &fec->eth->ievent);
- - /* - * Set FEC-Lite receive control register(R_CNTRL): - */ + /* Set FEC-Lite receive control register(R_CNTRL): */
/* Start with frame length = 1518, common for all modes. */ rcntrl = PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT; @@ -471,22 +445,19 @@ static int fec_open(struct eth_device *edev) #ifdef FEC_QUIRK_ENET_MAC /* Enable ENET HW endian SWAP */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_DBSWAP, - &fec->eth->ecntrl); + &fec->eth->ecntrl); /* Enable ENET store and forward mode */ writel(readl(&fec->eth->x_wmrk) | FEC_X_WMRK_STRFWD, - &fec->eth->x_wmrk); + &fec->eth->x_wmrk); #endif - /* - * Enable FEC-Lite controller - */ + /* Enable FEC-Lite controller */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, - &fec->eth->ecntrl); + &fec->eth->ecntrl); + #if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) udelay(100); - /* - * setup the MII gasket for RMII mode - */
+ /* setup the MII gasket for RMII mode */ /* disable the gasket */ writew(0, &fec->eth->miigsk_enr);
@@ -544,9 +515,7 @@ static int fec_open(struct eth_device *edev) #endif debug("%s:Speed=%i\n", __func__, speed);
- /* - * Enable SmartDMA receive task - */ + /* Enable SmartDMA receive task */ fec_rx_task_enable(fec);
udelay(100000); @@ -556,7 +525,7 @@ static int fec_open(struct eth_device *edev) #ifdef CONFIG_DM_ETH static int fecmxc_init(struct udevice *dev) #else -static int fec_init(struct eth_device *dev, bd_t* bd) +static int fec_init(struct eth_device *dev, bd_t *bd) #endif { #ifdef CONFIG_DM_ETH @@ -574,9 +543,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd) fec_set_hwaddr(dev); #endif
- /* - * Setup transmit descriptors, there are two in total. - */ + /* Setup transmit descriptors, there are two in total. */ fec_tbd_init(fec);
/* Setup receive descriptors. */ @@ -587,18 +554,14 @@ static int fec_init(struct eth_device *dev, bd_t* bd) if (fec->xcv_type != SEVENWIRE) fec_mii_setspeed(fec->bus->priv);
- /* - * Set Opcode/Pause Duration Register - */ + /* Set Opcode/Pause Duration Register */ writel(0x00010020, &fec->eth->op_pause); /* FIXME 0xffff0020; */ writel(0x2, &fec->eth->x_wmrk); - /* - * Set multicast address filter - */ + + /* Set multicast address filter */ writel(0x00000000, &fec->eth->gaddr1); writel(0x00000000, &fec->eth->gaddr2);
- /* Do not access reserved register for i.MX6UL */ if (!is_mx6ul()) { /* clear MIB RAM */ @@ -639,22 +602,16 @@ static void fec_halt(struct eth_device *dev) #endif int counter = 0xffff;
- /* - * issue graceful stop command to the FEC transmitter if necessary - */ + /* issue graceful stop command to the FEC transmitter if necessary */ writel(FEC_TCNTRL_GTS | readl(&fec->eth->x_cntrl), - &fec->eth->x_cntrl); + &fec->eth->x_cntrl);
debug("eth_halt: wait for stop regs\n"); - /* - * wait for graceful stop to register - */ + /* wait for graceful stop to register */ while ((counter--) && (!(readl(&fec->eth->ievent) & FEC_IEVENT_GRA))) udelay(1);
- /* - * Disable SmartDMA tasks - */ + /* Disable SmartDMA tasks */ fec_tx_task_disable(fec); fec_rx_task_disable(fec);
@@ -663,7 +620,7 @@ static void fec_halt(struct eth_device *dev) * Note: this will also reset the BD index counter! */ writel(readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_ETHER_EN, - &fec->eth->ecntrl); + &fec->eth->ecntrl); fec->rbd_index = 0; fec->tbd_index = 0; debug("eth_halt: done\n"); @@ -766,9 +723,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length) */ readl(addr + size - 4);
- /* - * Enable SmartDMA transmit task - */ + /* Enable SmartDMA transmit task */ fec_tx_task_enable(fec);
/* @@ -813,8 +768,8 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
out: debug("fec_send: status 0x%x index %d ret %i\n", - readw(&fec->tbd_base[fec->tbd_index].status), - fec->tbd_index, ret); + readw(&fec->tbd_base[fec->tbd_index].status), + fec->tbd_index, ret); /* for next transmission use the other buffer */ if (fec->tbd_index) fec->tbd_index = 0; @@ -848,9 +803,7 @@ static int fec_recv(struct eth_device *dev) int i; ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE);
- /* - * Check if any critical events have happened - */ + /* Check if any critical events have happened */ ievent = readl(&fec->eth->ievent); writel(ievent, &fec->eth->ievent); debug("fec_recv: ievent 0x%lx\n", ievent); @@ -868,7 +821,7 @@ static int fec_recv(struct eth_device *dev) if (ievent & FEC_IEVENT_HBERR) { /* Heartbeat error */ writel(0x00000001 | readl(&fec->eth->x_cntrl), - &fec->eth->x_cntrl); + &fec->eth->x_cntrl); } if (ievent & FEC_IEVENT_GRA) { /* Graceful stop complete */ @@ -879,7 +832,7 @@ static int fec_recv(struct eth_device *dev) fec_halt(dev); #endif writel(~0x00000001 & readl(&fec->eth->x_cntrl), - &fec->eth->x_cntrl); + &fec->eth->x_cntrl); #ifdef CONFIG_DM_ETH fecmxc_init(dev); #else @@ -911,22 +864,16 @@ static int fec_recv(struct eth_device *dev)
if (!(bd_status & FEC_RBD_EMPTY)) { if ((bd_status & FEC_RBD_LAST) && !(bd_status & FEC_RBD_ERR) && - ((readw(&rbd->data_length) - 4) > 14)) { - /* - * Get buffer address and size - */ + ((readw(&rbd->data_length) - 4) > 14)) { + /* Get buffer address and size */ addr = readl(&rbd->data_pointer); frame_length = readw(&rbd->data_length) - 4; - /* - * Invalidate data cache over the buffer - */ + /* Invalidate data cache over the buffer */ end = roundup(addr + frame_length, ARCH_DMA_MINALIGN); addr &= ~(ARCH_DMA_MINALIGN - 1); invalidate_dcache_range(addr, end);
- /* - * Fill the buffer and pass it to upper layers - */ + /* Fill the buffer and pass it to upper layers */ #ifdef CONFIG_FEC_MXC_SWAP_PACKET swap_packet((uint32_t *)addr, frame_length); #endif @@ -954,7 +901,7 @@ static int fec_recv(struct eth_device *dev) &fec->rbd_base[i]); } flush_dcache_range(addr, - addr + ARCH_DMA_MINALIGN); + addr + ARCH_DMA_MINALIGN); }
fec_rx_task_enable(fec); @@ -1273,7 +1220,8 @@ static int fecmxc_probe(struct udevice *dev) goto err_phy;
/* Reset chip. */ - writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET, &priv->eth->ecntrl); + writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET, + &priv->eth->ecntrl); start = get_timer(0); while (readl(&priv->eth->ecntrl) & FEC_ECNTRL_RESET) { if (get_timer(start) > (CONFIG_SYS_HZ * 5)) { diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 9fc6153..43a7d7b 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -14,21 +14,14 @@ * SPDX-License-Identifier: GPL-2.0+ */
- #ifndef __FEC_MXC_H #define __FEC_MXC_H
-void imx_get_mac_from_fuse(int dev_id, unsigned char *mac); - -/** - * Layout description of the FEC - */ +/* Layout description of the FEC */ struct ethernet_regs { + /* [10:2]addr = 00 */
-/* [10:2]addr = 00 */ - -/* Control and status Registers (offset 000-1FF) */ - + /* Control and status Registers (offset 000-1FF) */ uint32_t res0[1]; /* MBAR_ETH + 0x000 */ uint32_t ievent; /* MBAR_ETH + 0x004 */ uint32_t imask; /* MBAR_ETH + 0x008 */ @@ -71,8 +64,7 @@ struct ethernet_regs { uint32_t emrbr; /* MBAR_ETH + 0x188 */ uint32_t res12[29]; /* MBAR_ETH + 0x18C-1FC */
-/* MIB COUNTERS (Offset 200-2FF) */ - + /* MIB COUNTERS (Offset 200-2FF) */ uint32_t rmon_t_drop; /* MBAR_ETH + 0x200 */ uint32_t rmon_t_packets; /* MBAR_ETH + 0x204 */ uint32_t rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */ @@ -174,7 +166,6 @@ struct ethernet_regs { #define FEC_IMASKT_RL 0x00100000 #define FEC_IMASK_UN 0x00080000
- #define FEC_RCNTRL_MAX_FL_SHIFT 16 #define FEC_RCNTRL_LOOP 0x00000001 #define FEC_RCNTRL_DRT 0x00000002 @@ -233,9 +224,7 @@ struct fec_bd { uint32_t data_pointer; /* payload's buffer address */ };
-/** - * Supported phy types on this platform - */ +/* Supported phy types on this platform */ enum xceiver_type { SEVENWIRE, /* 7-wire */ MII10, /* MII 10Mbps */ @@ -244,9 +233,7 @@ enum xceiver_type { RGMII, /* RGMII */ };
-/** - * @brief i.MX27-FEC private structure - */ +/* @brief i.MX27-FEC private structure */ struct fec_priv { struct ethernet_regs *eth; /* pointer to register'S base */ enum xceiver_type xcv_type; /* transceiver type */ @@ -270,6 +257,8 @@ struct fec_priv { #endif };
+void imx_get_mac_from_fuse(int dev_id, unsigned char *mac); + /** * @brief Numbers of buffer descriptors for receiving *
From: Jagan Teki jagan@amarulasolutions.com
Add .read_rom_hwaddr on dm eth_ops.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Acked-by: Joe Hershberger joe.hershberger@ni.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/net/fec_mxc.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 2c4be96..3304fddc 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1165,12 +1165,21 @@ int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int))
#else
+static int fecmxc_read_rom_hwaddr(struct udevice *dev) +{ + struct fec_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + + return fec_get_hwaddr(priv->dev_id, pdata->enetaddr); +} + static const struct eth_ops fecmxc_ops = { .start = fecmxc_init, .send = fecmxc_send, .recv = fecmxc_recv, .stop = fecmxc_halt, .write_hwaddr = fecmxc_set_hwaddr, + .read_rom_hwaddr = fecmxc_read_rom_hwaddr, };
static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) @@ -1200,7 +1209,6 @@ static int fecmxc_probe(struct udevice *dev) struct fec_priv *priv = dev_get_priv(dev); struct mii_dev *bus = NULL; int dev_id = -1; - unsigned char ethaddr[6]; uint32_t start; int ret;
@@ -1235,14 +1243,6 @@ static int fecmxc_probe(struct udevice *dev) fec_set_dev_name((char *)dev->name, dev_id); priv->dev_id = (dev_id == -1) ? 0 : dev_id;
- ret = fec_get_hwaddr(dev_id, ethaddr); - if (!ret) { - debug("got MAC%d address from fuse: %pM\n", dev_id, ethaddr); - memcpy(pdata->enetaddr, ethaddr, 6); - if (!getenv("ethaddr")) - eth_setenv_enetaddr("ethaddr", ethaddr); - } - return 0;
err_timeout:
From: Jagan Teki jagan@amarulasolutions.com
Add FEC dts support for Engicam i.CoreM6 dql modules.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Acked-by: Joe Hershberger joe.hershberger@ni.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-icore.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi index f424cd5..a485c3e 100644 --- a/arch/arm/dts/imx6qdl-icore.dtsi +++ b/arch/arm/dts/imx6qdl-icore.dtsi @@ -75,6 +75,14 @@ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; };
+&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + phy-mode = "rmii"; + status = "okay"; +}; + &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -118,6 +126,22 @@ };
&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b1 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 + >; + }; + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020
From: Jagan Teki jagan@amarulasolutions.com
Use CONFIG_DM_ETH and remove board_eth_init code from board files.
Cc: Joe Hershberger joe.hershberger@ni.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de Cc: Michael Trimarchi michael@amarulasolutions.com Acked-by: Joe Hershberger joe.hershberger@ni.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/cpu/armv7/mx6/Kconfig | 1 + board/engicam/icorem6/icorem6.c | 71 ------------------------------------ configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_nand_defconfig | 1 - 4 files changed, 1 insertion(+), 73 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 8c96ba3..f1ec75d 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -108,6 +108,7 @@ config TARGET_MX6Q_ICORE select MX6QDL select OF_CONTROL select DM + select DM_ETH select DM_GPIO select DM_MMC select DM_THERMAL diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index c152007..587775e 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -7,8 +7,6 @@ */
#include <common.h> -#include <miiphy.h> -#include <netdev.h>
#include <asm/io.h> #include <asm/gpio.h> @@ -27,80 +25,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - static iomux_v3_cfg_t const uart4_pads[] = { IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), };
-static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL | PAD_CTL_SRE_FAST)), - IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -#ifdef CONFIG_FEC_MXC -#define ENET_PHY_RST IMX_GPIO_NR(7, 12) -static int setup_fec(void) -{ - struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; - s32 timeout = 100000; - u32 reg = 0; - int ret; - - /* Enable fec clock */ - setbits_le32(&ccm->CCGR1, MXC_CCM_CCGR1_ENET_MASK); - - /* use 50MHz */ - ret = enable_fec_anatop_clock(0, ENET_50MHZ); - if (ret) - return ret; - - /* Enable PLLs */ - reg = readl(&anatop->pll_enet); - reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN; - writel(reg, &anatop->pll_enet); - reg = readl(&anatop->pll_enet); - reg |= BM_ANADIG_PLL_SYS_ENABLE; - while (timeout--) { - if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_SYS_LOCK) - break; - } - if (timeout <= 0) - return -EIO; - reg &= ~BM_ANADIG_PLL_SYS_BYPASS; - writel(reg, &anatop->pll_enet); - - /* reset the phy */ - gpio_direction_output(ENET_PHY_RST, 0); - udelay(10000); - gpio_set_value(ENET_PHY_RST, 1); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - int ret; - - SETUP_IOMUX_PADS(enet_pads); - setup_fec(); - - return ret = cpu_eth_init(bis); -} -#endif - #ifdef CONFIG_NAND_MXS
#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index fcf4934..31f40b4 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -30,7 +30,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_LIBFDT=y CONFIG_FEC_MXC=y CONFIG_MXC_UART=y -CONFIG_NETDEVICES=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 4919d44..3410e4c 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -24,7 +24,6 @@ CONFIG_OF_LIBFDT=y CONFIG_FEC_MXC=y CONFIG_MXC_UART=y CONFIG_NAND_MXS=y -CONFIG_NETDEVICES=y CONFIG_IMX_THERMAL=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set
From: Jagan Teki jagan@amarulasolutions.com
Added kconfig entry for CONFIG_VIDEO_IPV3 driver.
Cc: Anatolij Gustschin agust@denx.de Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/video/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 577e6d7..2069576 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -443,6 +443,13 @@ config VIDEO model. Video drivers typically provide a colour text console and cursor.
+config VIDEO_IPUV3 + bool "i.MX IPUv3 Core video support" + depends on VIDEO && MX6 + help + This enables framebuffer driver for i.MX processors working + on the IPUv3(Image Processing Unit) internal graphic processor. + config CFB_CONSOLE bool "Enable colour frame buffer console" depends on VIDEO
From: Jagan Teki jagan@amarulasolutions.com
Add IPUv3 framebuffer support for Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin agust@denx.de Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6/icorem6.c | 113 +++++++++++++++++++++++++++++++++++ configs/imx6qdl_icore_mmc_defconfig | 3 + configs/imx6qdl_icore_nand_defconfig | 3 + include/configs/imx6qdl_icore.h | 12 ++++ 4 files changed, 131 insertions(+)
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index 587775e..171ec45 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -18,6 +18,7 @@ #include <asm/arch/mx6-pins.h> #include <asm/arch/sys_proto.h> #include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/video.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -90,6 +91,113 @@ static void setup_gpmi_nand(void) } #endif
+#if defined(CONFIG_VIDEO_IPUV3) +static iomux_v3_cfg_t const rgb_pads[] = { + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), + IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), + IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), + IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), + IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), + IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), + IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), + IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), + IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), + IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), + IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), + IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), + IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), + IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), + IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), + IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), + IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), + IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), + IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), +}; + +static void enable_rgb(struct display_info_t const *dev) +{ + SETUP_IOMUX_PADS(rgb_pads); +} + +struct display_info_t const displays[] = { + { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = enable_rgb, + .mode = { + .name = "Amp-WD", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 30000, + .left_margin = 30, + .right_margin = 30, + .upper_margin = 5, + .lower_margin = 5, + .hsync_len = 64, + .vsync_len = 20, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + } + }, +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + + /* Turn on LDB0,IPU,IPU DI0 clocks */ + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= (MXC_CCM_CCGR3_LDB_DI0_MASK | 0xffff); + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | + IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | + IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | + IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); + writel(reg, &iomux->gpr[3]); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + int board_early_init_f(void) { SETUP_IOMUX_PADS(uart4_pads); @@ -105,6 +213,11 @@ int board_init(void) #ifdef CONFIG_NAND_MXS setup_gpmi_nand(); #endif + +#ifdef CONFIG_VIDEO_IPUV3 + setup_display(); +#endif + return 0; }
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 31f40b4..6fa85de 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -33,6 +33,9 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y +CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 3410e4c..b32eea9 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -29,6 +29,9 @@ CONFIG_IMX_THERMAL=y # CONFIG_DM_MMC_OPS is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y +CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index f8a1263..70e74ba 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -149,6 +149,18 @@ # define CONFIG_PHY_SMSC #endif
+/* Framebuffer */ +#ifdef CONFIG_VIDEO_IPUV3 +# define CONFIG_IPUV3_CLK 260000000 +# define CONFIG_IMX_VIDEO_SKIP + +# define CONFIG_SPLASH_SCREEN +# define CONFIG_BMP_16BPP +# define CONFIG_VIDEO_BMP_RLE8 +# define CONFIG_VIDEO_LOGO +# define CONFIG_VIDEO_BMP_LOGO +#endif + /* SPL */ #ifdef CONFIG_SPL # ifdef CONFIG_NAND_MXS
From: Jagan Teki jagan@amarulasolutions.com
Add custom splashscreen, engicam.bmp support for Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin agust@denx.de Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- include/configs/imx6qdl_icore.h | 2 ++ tools/logos/engicam.bmp | Bin 0 -> 60214 bytes 2 files changed, 2 insertions(+) create mode 100755 tools/logos/engicam.bmp
diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 70e74ba..204e96e 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -37,6 +37,7 @@ /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ + "splashpos=m,m\0" \ "image=zImage\0" \ "console=ttymxc3\0" \ "fdt_high=0xffffffff\0" \ @@ -155,6 +156,7 @@ # define CONFIG_IMX_VIDEO_SKIP
# define CONFIG_SPLASH_SCREEN +# define CONFIG_SPLASH_SCREEN_ALIGN # define CONFIG_BMP_16BPP # define CONFIG_VIDEO_BMP_RLE8 # define CONFIG_VIDEO_LOGO diff --git a/tools/logos/engicam.bmp b/tools/logos/engicam.bmp new file mode 100755 index 0000000000000000000000000000000000000000..f6c60fb810d29830941e18d6725ef95785d95967 GIT binary patch literal 60214 zcmeHQy{;oUb}kzN)XMw_3jG8d3(oxxdV~$;0V-UDRydJ>F&s^}4^XkQQP^@I>=H2G zwt(#(j1mX!k7V)ie21)3Rd-+A*}hfX=aMWQp5KpTiPF{mmw)}khbCNqST)T*qxMh# z*ff7c`47#z*zw=7D1Ww1ga1w2#sWW4ZMv>&y8r5$zy0TbG|hGg+Jn%sJ%KvVwP|(@ zXbVDRw+FSL6Q~1Sn`YmDwxAsdjeQF`fjZE&*Skfz1MNXA=mhFO*QP<WIc-5Z&>qx+ zPM{8Sg^>+t3)+G9pcZrjb)ak0;D2-7f_9)is0E!s9q8KZ8kpH^LH^$!)Phc+4s?yK zZMP_QpgpJsoj@Jv8r|M)QSLx{PzySNI?y$SWWPnZ1MNXA=mhFO*BGvLi*g6rgIdrD z)Pb%sl&3Aq9cT|~K_^fLy2dbfTa-J{9@K(Ppbm5mDcD`ND0iSes0E!s9q8J$@V{-g zAn*Ae<o}&O9q8J$+Xl1+?Ld1_3p#;1&^4xQw?(-F?LjT*1nNN7n9}_g<qot5wV)HI z16^afp`>khpgpJsoj@Jv8liC7qTGS@pcZrjb)aj6Nw-D01MNXA=mhFO*8rjRx<$DI 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literal 0 HcmV?d00001
From: Jagan Teki jteki@openedev.com
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/i2c/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 1537b67..051f911 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -109,6 +109,14 @@ config SYS_I2C_INTEL the I2C API meaning that any I2C operations will immediately fail for now.
+config SYS_I2C_MXC + bool "NXP i.MX I2C driver" + depends on MX6 + help + Add support for the NXP i.MX I2C driver. This supports upto for bus + channels and operating on standard mode upto 100 kbits/s and fast + mode upto 400 kbits/s. + config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" depends on DM_I2C
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki jteki@openedev.com
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
drivers/i2c/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 1537b67..051f911 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -109,6 +109,14 @@ config SYS_I2C_INTEL the I2C API meaning that any I2C operations will immediately fail for now.
+config SYS_I2C_MXC
- bool "NXP i.MX I2C driver"
- depends on MX6
- help
Add support for the NXP i.MX I2C driver. This supports upto for buschannels and operating on standard mode upto 100 kbits/s and fastmode upto 400 kbits/s.- config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" depends on DM_I2C
I miss here junks, which move this symbol from the board config file into their defconfig file ... Can you add this please?
You can use the great script from Masahiro for this task:
tools/moveconfig.py
bye, Heiko
On Tue, Dec 6, 2016 at 3:06 PM, Heiko Schocher hs@denx.de wrote:
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki jteki@openedev.com
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
drivers/i2c/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 1537b67..051f911 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -109,6 +109,14 @@ config SYS_I2C_INTEL the I2C API meaning that any I2C operations will immediately fail for now.
+config SYS_I2C_MXC
bool "NXP i.MX I2C driver"depends on MX6helpAdd support for the NXP i.MX I2C driver. This supports upto forbus
channels and operating on standard mode upto 100 kbits/s andfast
mode upto 400 kbits/s.- config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" depends on DM_I2C
I miss here junks, which move this symbol from the board config file into their defconfig file ... Can you add this please?
Yes I will add them in separate patch.
thanks!
On Mon, Dec 5, 2016 at 9:00 PM, Jagan Teki jagan@openedev.com wrote:
+config SYS_I2C_MXC
bool "NXP i.MX I2C driver"depends on MX6
This driver is used among several i.MX SoC, so it would be better not to restrict it to MX6 only.
On Tue, Dec 6, 2016 at 3:47 PM, Fabio Estevam festevam@gmail.com wrote:
On Mon, Dec 5, 2016 at 9:00 PM, Jagan Teki jagan@openedev.com wrote:
+config SYS_I2C_MXC
bool "NXP i.MX I2C driver"depends on MX6This driver is used among several i.MX SoC, so it would be better not to restrict it to MX6 only.
True, but the icorem6 is MX6 only so, the rest will ||ed while moving respective CONFIG_ to defconfig files
thanks!
From: Jagan Teki jagan@amarulasolutions.com
Better to print the hex value for bus address instead of decimal, for more readbility on bus addressing.
Before: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 35274752, no gpio pinctrl state.
After: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state.
Cc: Simon Glass sjg@chromium.org Cc: Heiko Schocher hs@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/i2c/mxc_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 6247d33..03a5ce9 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -775,7 +775,7 @@ static int mxc_i2c_probe(struct udevice *bus) */ ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); if (ret < 0) { - dev_info(dev, "i2c bus %d at %lu, no gpio pinctrl state.\n", bus->seq, i2c_bus->base); + dev_info(dev, "i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base); } else { ret = gpio_request_by_name_nodev(fdt, node, "scl-gpios", 0, &i2c_bus->scl_gpio,
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki jagan@amarulasolutions.com
Better to print the hex value for bus address instead of decimal, for more readbility on bus addressing.
Before:
U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 35274752, no gpio pinctrl state.
After:
U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state.
Cc: Simon Glass sjg@chromium.org Cc: Heiko Schocher hs@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
drivers/i2c/mxc_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Heiko Schocher hs@denx.de
bye, Heiko
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 6247d33..03a5ce9 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -775,7 +775,7 @@ static int mxc_i2c_probe(struct udevice *bus) */ ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); if (ret < 0) {
dev_info(dev, "i2c bus %d at %lu, no gpio pinctrl state.\n", bus->seq, i2c_bus->base);
dev_info(dev, "i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base);
From: Jagan Teki jagan@amarulasolutions.com
Some I2C bus devicetree nodes, doesn't require to have gpio pinctrl so replace the dev_info to debug so the print never comes on the console and for bus that uses gpio pinctrl anyway have dev_err.
Before: ------ U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state.
After: ------ U-Boot> i2c dev 1 Setting bus to 1
Cc: Simon Glass sjg@chromium.org Cc: Heiko Schocher hs@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/i2c/mxc_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 03a5ce9..94d9027 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -775,7 +775,7 @@ static int mxc_i2c_probe(struct udevice *bus) */ ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); if (ret < 0) { - dev_info(dev, "i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base); + debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base); } else { ret = gpio_request_by_name_nodev(fdt, node, "scl-gpios", 0, &i2c_bus->scl_gpio,
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki jagan@amarulasolutions.com
Some I2C bus devicetree nodes, doesn't require to have gpio pinctrl so replace the dev_info to debug so the print never comes on the console and for bus that uses gpio pinctrl anyway have dev_err.
Before:
U-Boot> i2c dev 1 Setting bus to 1 i2c bus 1 at 0x21a4000, no gpio pinctrl state.
After:
U-Boot> i2c dev 1 Setting bus to 1
Cc: Simon Glass sjg@chromium.org Cc: Heiko Schocher hs@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
drivers/i2c/mxc_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Heiko Schocher hs@denx.de
bye, Heiko
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 03a5ce9..94d9027 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -775,7 +775,7 @@ static int mxc_i2c_probe(struct udevice *bus) */ ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); if (ret < 0) {
dev_info(dev, "i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base);
debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base);
From: Jagan Teki jagan@amarulasolutions.com
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 icorem6qdl> i2c dev 2 Setting bus to 2 icorem6qdl> i2c speed 100000 Setting bus speed to 100000 Hz icorem6qdl> i2c probe Valid chip addresses: 2C icorem6qdl> i2c md 2C 0xff 00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 3 ++- configs/imx6qdl_icore_nand_defconfig | 3 ++- 3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index f1ec75d..b686476 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -110,6 +110,7 @@ config TARGET_MX6Q_ICORE select DM select DM_ETH select DM_GPIO + select DM_I2C select DM_MMC select DM_THERMAL select SUPPORT_SPL diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6fa85de..5f09425 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_DM_MMC_OPS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y @@ -33,6 +34,7 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -40,7 +42,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index b32eea9..af3a9f8 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMLS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y @@ -29,13 +30,13 @@ CONFIG_IMX_THERMAL=y # CONFIG_DM_MMC_OPS is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_DMA_SUPPORT=y
Hello Jagan,
Am 06.12.2016 um 00:01 schrieb Jagan Teki:
From: Jagan Teki jagan@amarulasolutions.com
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 icorem6qdl> i2c dev 2 Setting bus to 2 icorem6qdl> i2c speed 100000 Setting bus speed to 100000 Hz icorem6qdl> i2c probe Valid chip addresses: 2C icorem6qdl> i2c md 2C 0xff 00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 3 ++- configs/imx6qdl_icore_nand_defconfig | 3 ++- 3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index f1ec75d..b686476 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -110,6 +110,7 @@ config TARGET_MX6Q_ICORE select DM select DM_ETH select DM_GPIO
- select DM_I2C select DM_MMC select DM_THERMAL select SUPPORT_SPL
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6fa85de..5f09425 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_DM_MMC_OPS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y @@ -33,6 +34,7 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -40,7 +42,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y
You remove here SPL I2C support ... is this intented ?
If so, you can add my:
Acked-by: Heiko Schocher hs@denx.de
bye, Heiko
CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index b32eea9..af3a9f8 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMLS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y @@ -29,13 +30,13 @@ CONFIG_IMX_THERMAL=y # CONFIG_DM_MMC_OPS is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_DMA_SUPPORT=y
On Tue, Dec 6, 2016 at 3:10 PM, Heiko Schocher hs@denx.de wrote:
Hello Jagan,
Am 06.12.2016 um 00:01 schrieb Jagan Teki:
From: Jagan Teki jagan@amarulasolutions.com
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus Bus 0: i2c@021a0000 Bus 1: i2c@021a4000 Bus 2: i2c@021a8000 icorem6qdl> i2c dev 2 Setting bus to 2 icorem6qdl> i2c speed 100000 Setting bus speed to 100000 Hz icorem6qdl> i2c probe Valid chip addresses: 2C icorem6qdl> i2c md 2C 0xff 00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Stefano Babic sbabic@denx.de Cc: Heiko Schocher hs@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/cpu/armv7/mx6/Kconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 3 ++- configs/imx6qdl_icore_nand_defconfig | 3 ++- 3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index f1ec75d..b686476 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -110,6 +110,7 @@ config TARGET_MX6Q_ICORE select DM select DM_ETH select DM_GPIO
select DM_I2C select DM_MMC select DM_THERMAL select SUPPORT_SPLdiff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6fa85de..5f09425 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_DM_MMC_OPS is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MEMTEST=y @@ -33,6 +34,7 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_I2C_MXC=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -40,7 +42,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y
You remove here SPL I2C support ... is this intented ?
Yes.
thanks!
Hi Stefano,
On Tue, Dec 6, 2016 at 12:00 AM, Jagan Teki jagan@openedev.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
This series support framebuffer and I2C on top of u-boot-imx.git with latest u-boot.git merge.
fec_mxc dm driver on previous version series trigger an issues with when DM_ETH not-defined so, this series have fixes for non-dm builds as well.
Changes for v3:
- Fix fec_mxc driver to build for non-dm configs as well.
- Fix VIDEO_IPV3 Kconfig entry not to make default.
Changes for v2:
- Rebase on u-boot-imx.git and u-boot.git
Jagan Teki (13): net: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr net: fec_mxc: Convert into driver model net: fec_mxc: Driver cleanups dm: net: fec: Add .read_rom_hwaddr ARM: dts: imx6qdl-icore: Add FEC support icorem6: Use CONFIG_DM_ETH support video: Kconfig: Add VIDEO_IPV3 entry imx6: icorem6: Add framebuffer support imx6: icorem6: Add custom splashscreen support i2c: Kconfig: Add SYS_I2C_MXC entry i2c: mxc: Print hex instead of decimal for bus address i2c: mxc: Make 'no gpio pinctrl state' print as debug imx6: icorem6: Add I2C support
Can you apply these, if it's OK?
thanks!
On Wed, Dec 7, 2016 at 5:01 PM, Jagan Teki jagan@openedev.com wrote:
Hi Stefano,
On Tue, Dec 6, 2016 at 12:00 AM, Jagan Teki jagan@openedev.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
This series support framebuffer and I2C on top of u-boot-imx.git with latest u-boot.git merge.
fec_mxc dm driver on previous version series trigger an issues with when DM_ETH not-defined so, this series have fixes for non-dm builds as well.
Changes for v3:
- Fix fec_mxc driver to build for non-dm configs as well.
- Fix VIDEO_IPV3 Kconfig entry not to make default.
Changes for v2:
- Rebase on u-boot-imx.git and u-boot.git
Jagan Teki (13): net: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr net: fec_mxc: Convert into driver model net: fec_mxc: Driver cleanups dm: net: fec: Add .read_rom_hwaddr ARM: dts: imx6qdl-icore: Add FEC support icorem6: Use CONFIG_DM_ETH support video: Kconfig: Add VIDEO_IPV3 entry imx6: icorem6: Add framebuffer support imx6: icorem6: Add custom splashscreen support i2c: Kconfig: Add SYS_I2C_MXC entry i2c: mxc: Print hex instead of decimal for bus address i2c: mxc: Make 'no gpio pinctrl state' print as debug imx6: icorem6: Add I2C support
Can you apply these, if it's OK?
Any help?
participants (5)
-
Fabio Estevam -
Heiko Schocher -
Jagan Teki -
Jagan Teki -
Joe Hershberger