Move MTRR-listing code into a common file so it can be used from SPL. Update the 'mtrr' command to call it.

Use this in SPL just before adjusting the MTRRs, so we can see the state set up by the board. Only show it when debug is enabled.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/x86/cpu/mtrr.c | 61 +++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/mtrr.h | 20 ++++++++++++ arch/x86/lib/spl.c | 7 +++++ cmd/x86/mtrr.c | 60 +++--------------------------------- 4 files changed, 92 insertions(+), 56 deletions(-)

diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index c174dd9b3ad..40d24e6fb9b 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -30,6 +30,16 @@

DECLARE_GLOBAL_DATA_PTR;

+const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { + "Uncacheable", + "Combine", + "2", + "3", + "Through", + "Protect", + "Back", +}; + /* Prepare to adjust MTRRs */ void mtrr_open(struct mtrr_state *state, bool do_caches) { @@ -324,3 +334,54 @@ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask)

return mtrr_start_op(cpu_select, &oper); } + +static void read_mtrrs_(void *arg) +{ + struct mtrr_info *info = arg; + + mtrr_read_all(info); +} + +int mtrr_list(int reg_count, int cpu_select) +{ + struct mtrr_info info; + int ret; + int i; + + printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", + "Mask ||", "Size ||"); + memset(&info, '\0', sizeof(info)); + ret = mp_run_on_cpus(cpu_select, read_mtrrs_, &info); + if (ret) + return log_msg_ret("run", ret); + for (i = 0; i < reg_count; i++) { + const char *type = "Invalid"; + u64 base, mask, size; + bool valid; + + base = info.mtrr[i].base; + mask = info.mtrr[i].mask; + size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); + size |= (1 << 12) - 1; + size += 1; + valid = mask & MTRR_PHYS_MASK_VALID; + type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; + printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, + valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, + mask & ~MTRR_PHYS_MASK_VALID, size); + } + + return 0; +} + +int mtrr_get_type_by_name(const char *typename) +{ + int i; + + for (i = 0; i < MTRR_TYPE_COUNT; i++) { + if (*typename == *mtrr_type_name[i]) + return i; + } + + return -EINVAL; +}; diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index ca2edc7878f..2e995f54061 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -190,6 +190,26 @@ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask); */ int mtrr_get_var_count(void);

+/** + * mtrr_list() - List the MTRRs + * + * Shows a list of all the MTRRs including their values + * + * @reg_count: Number of registers to show. You can use mtrr_get_var_count() for + * this + * @cpu_select: CPU to use. Use MP_SELECT_BSP for the boot CPU + * Returns: 0 if OK, -ve if the CPU was not found + */ +int mtrr_list(int reg_count, int cpu_select); + +/** + * mtrr_get_type_by_name() - Get the type of an MTRR given its type name + * + * @typename: Name to check + * Returns: MTRR type (MTRR_TYPE_...) or -EINVAL if invalid + */ +int mtrr_get_type_by_name(const char *typename); + #endif

#if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index ca1645f9d68..b9d23e6bfe1 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -19,6 +19,7 @@ #include <asm/cpu_common.h> #include <asm/fsp2/fsp_api.h> #include <asm/global_data.h> +#include <asm/mp.h> #include <asm/mrccache.h> #include <asm/mtrr.h> #include <asm/pci.h> @@ -139,6 +140,12 @@ static int x86_spl_init(void) arch_setup_gd(gd->new_gd); gd->start_addr_sp = (ulong)ptr;

+ if (_LOG_DEBUG) { + ret = mtrr_list(mtrr_get_var_count(), MP_SELECT_BSP); + if (ret) + printf("mtrr_list failed\n"); + } + /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ ret = mtrr_add_request(MTRR_TYPE_WRBACK, (1ULL << 32) - CONFIG_XIP_ROM_SIZE, diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c index b1691d8b65a..6ad7a123a44 100644 --- a/cmd/x86/mtrr.c +++ b/cmd/x86/mtrr.c @@ -10,71 +10,19 @@ #include <asm/mp.h> #include <asm/mtrr.h>

-static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { - "Uncacheable", - "Combine", - "2", - "3", - "Through", - "Protect", - "Back", -}; - -static void read_mtrrs(void *arg) -{ - struct mtrr_info *info = arg; - - mtrr_read_all(info); -} - -static int do_mtrr_list(int reg_count, int cpu_select) -{ - struct mtrr_info info; - int ret; - int i; - - printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", - "Mask ||", "Size ||"); - memset(&info, '\0', sizeof(info)); - ret = mp_run_on_cpus(cpu_select, read_mtrrs, &info); - if (ret) - return log_msg_ret("run", ret); - for (i = 0; i < reg_count; i++) { - const char *type = "Invalid"; - uint64_t base, mask, size; - bool valid; - - base = info.mtrr[i].base; - mask = info.mtrr[i].mask; - size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); - size |= (1 << 12) - 1; - size += 1; - valid = mask & MTRR_PHYS_MASK_VALID; - type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; - printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, - valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, - mask & ~MTRR_PHYS_MASK_VALID, size); - } - - return 0; -} - static int do_mtrr_set(int cpu_select, uint reg, int argc, char *const argv[]) { const char *typename = argv[0]; uint32_t start, size; uint64_t base, mask; - int i, type = -1; + int type = -1; bool valid; int ret;

if (argc < 3) return CMD_RET_USAGE; - for (i = 0; i < MTRR_TYPE_COUNT; i++) { - if (*typename == *mtrr_type_name[i]) - type = i; - } - if (type == -1) { + type = mtrr_get_type_by_name(typename); + if (type < 0) { printf("Invalid type name %s\n", typename); return CMD_RET_USAGE; } @@ -146,7 +94,7 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc, if (!first) printf("\n"); printf("CPU %d:\n", i); - ret = do_mtrr_list(reg_count, i); + ret = mtrr_list(reg_count, i); if (ret) { printf("Failed to read CPU %s (err=%d)\n", i < MP_SELECT_ALL ? simple_itoa(i) : "",

The Kconfig for this is currently inside a particular board. Move it into the correct place and allow use in SPL, so that video can be used there if needed.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/google/Kconfig | 7 ------- drivers/Kconfig | 2 ++ drivers/Makefile | 2 +- drivers/bios_emulator/Kconfig | 10 ++++++++++ 4 files changed, 13 insertions(+), 8 deletions(-) create mode 100644 drivers/bios_emulator/Kconfig

diff --git a/board/google/Kconfig b/board/google/Kconfig index a0f1a609764..e4f9b5b68aa 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -4,13 +4,6 @@

if VENDOR_GOOGLE

-config BIOSEMU - bool - select X86EMU_RAW_IO - -config X86EMU_RAW_IO - bool - choice prompt "Mainboard model" optional diff --git a/drivers/Kconfig b/drivers/Kconfig index 75937fbb6d9..a25f6ae02fd 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -10,6 +10,8 @@ source "drivers/ata/Kconfig"

source "drivers/axi/Kconfig"

+source "drivers/bios_emulator/Kconfig" + source "drivers/bus/Kconfig"

source "drivers/block/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 29be78a3f28..c70466dbcbe 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+

+obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/ obj-$(CONFIG_$(SPL_TPL_)BLK) += block/ obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/ obj-$(CONFIG_$(SPL_TPL_)BUTTON) += button/ @@ -79,7 +80,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-y += adc/ obj-y += ata/ obj-$(CONFIG_DM_DEMO) += demo/ -obj-$(CONFIG_BIOSEMU) += bios_emulator/ obj-y += block/ obj-y += cache/ obj-$(CONFIG_CPU) += cpu/ diff --git a/drivers/bios_emulator/Kconfig b/drivers/bios_emulator/Kconfig new file mode 100644 index 00000000000..3660576772d --- /dev/null +++ b/drivers/bios_emulator/Kconfig @@ -0,0 +1,10 @@ +config BIOSEMU + bool + select X86EMU_RAW_IO + +config SPL_BIOSEMU + bool + select X86EMU_RAW_IO + +config X86EMU_RAW_IO + bool

The ll_boot_init() check handles the EFI case so we don't need the rest of the code. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/x86/cpu/i386/interrupt.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c index fae2544c456..f3f3527237f 100644 --- a/arch/x86/cpu/i386/interrupt.c +++ b/arch/x86/cpu/i386/interrupt.c @@ -266,6 +266,10 @@ int interrupt_init(void) struct udevice *dev; int ret;

+ /* + * When running as an EFI application we are not in control of + * interrupts and should leave them alone. + */ if (!ll_boot_init()) return 0;

@@ -274,11 +278,6 @@ int interrupt_init(void) if (ret && ret != -ENODEV) return ret;

- /* - * When running as an EFI application we are not in control of - * interrupts and should leave them alone. - */ -#ifndef CONFIG_EFI_APP /* Just in case... */ disable_interrupts();

@@ -294,14 +293,8 @@ int interrupt_init(void) /* Initialize core interrupt and exception functionality of CPU */ cpu_init_interrupts();

- /* - * It is now safe to enable interrupts. - * - * TODO(sjg@chromium.org): But we don't handle these correctly when - * booted from EFI. - */ + /* It is now safe to enable interrupts */ enable_interrupts(); -#endif

return 0; }

This is useful information so show it with the bdinfo command.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/x86/lib/bdinfo.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 15390070fe8..0970efa4726 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -22,6 +22,7 @@ void arch_print_bdinfo(void) bdinfo_print_num_l("vendor", gd->arch.x86_vendor); bdinfo_print_str(" name", cpu_vendor_name(gd->arch.x86_vendor)); bdinfo_print_num_l("model", gd->arch.x86_model); + bdinfo_print_num_l("phys_addr", cpu_phys_address_size());

if (IS_ENABLED(CONFIG_EFI_STUB)) efi_show_bdinfo();

Rather than silently hanging, show an error first. This can happen when there is something wrong with the video BIOS.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Fix BINS typo - Drop the Ooops string

arch/x86/lib/bios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c index 94349ba8073..8cc686fd146 100644 --- a/arch/x86/lib/bios.c +++ b/arch/x86/lib/bios.c @@ -78,7 +78,7 @@ static int int_exception_handler(void) }; struct eregs *regs = &reg_info;

- debug("Oops, exception %d while executing option rom\n", regs->vector); + log_err("Exception %d while executing option rom\n", regs->vector); cpu_hlt();

return 0;

These are useful pieces of information when debugging. The RAM top shows where U-Boot started allocating memory from, before it relocated. The stack pointer can be checked to ensure it is in the correct region.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

cmd/Kconfig | 8 ++++++++ cmd/bdinfo.c | 5 +++++ 2 files changed, 13 insertions(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig index 56f5ab02239..26ad696c6a6 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -135,6 +135,14 @@ config CMD_BDI help Print board info

+config CMD_BDINFO_EXTRA + bool "bdinfo extra features" + default y if SANDBOX || X86 + help + Show additional information about the board. This uses a little more + code space but provides more options, particularly those useful for + bringup, development and debugging. + config CMD_CONFIG bool "config" default SANDBOX diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index f709904c516..4e0c763a709 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -145,6 +145,11 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) printf("devicetree = %s\n", fdtdec_get_srcname()); }

+ if (IS_ENABLED(CONFIG_CMD_BDINFO_EXTRA)) { + bdinfo_print_num_ll("stack ptr", (ulong)&bd); + bdinfo_print_num_ll("ram_top ptr", (ulong)gd->ram_top); + } + arch_print_bdinfo();

return 0;

Some devices have multiple partition types available on the same media. It is sometimes useful to see these to check that everything is working correctly.

Provide a way to manually set the partition-table type, avoiding the auto-detection process.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

cmd/part.c | 34 +++++++++++++++++++ disk/part.c | 16 +++++++++ doc/usage/cmd/part.rst | 74 ++++++++++++++++++++++++++++++++++++++++++ include/part.h | 9 +++++ 4 files changed, 133 insertions(+)

diff --git a/cmd/part.c b/cmd/part.c index 28f2b7ff9bb..0ce190005d3 100644 --- a/cmd/part.c +++ b/cmd/part.c @@ -182,6 +182,36 @@ static int do_part_number(int argc, char *const argv[]) return do_part_info(argc, argv, CMD_PART_INFO_NUMBER); }

+static int do_part_set(int argc, char *const argv[]) +{ + const char *devname, *partstr, *typestr; + struct blk_desc *desc; + int dev; + + if (argc < 3) + return CMD_RET_USAGE; + + /* Look up the device */ + devname = argv[0]; + partstr = argv[1]; + typestr = argv[2]; + dev = blk_get_device_by_str(devname, partstr, &desc); + if (dev < 0) { + printf("** Bad device specification %s %s **\n", devname, + partstr); + return CMD_RET_FAILURE; + } + + desc->part_type = part_get_type_by_name(typestr); + if (!desc->part_type) { + printf("Unknown partition type '%s'\n", typestr); + return CMD_RET_FAILURE; + } + part_print(desc); + + return 0; +} + #ifdef CONFIG_PARTITION_TYPE_GUID static int do_part_type(int argc, char *const argv[]) { @@ -245,6 +275,8 @@ static int do_part(struct cmd_tbl *cmdtp, int flag, int argc, return do_part_number(argc - 2, argv + 2); else if (!strcmp(argv[1], "types")) return do_part_types(argc - 2, argv + 2); + else if (!strcmp(argv[1], "set")) + return do_part_set(argc - 2, argv + 2); #ifdef CONFIG_PARTITION_TYPE_GUID else if (!strcmp(argv[1], "type")) return do_part_type(argc - 2, argv + 2); @@ -279,6 +311,8 @@ U_BOOT_CMD( #endif "part type <interface> <dev>:<part> <varname>\n" " - set environment variable to partition type\n" + "part set <interface> <dev> type\n" + " - set partition type for a device\n" "part types\n" " - list supported partition table types" ); diff --git a/disk/part.c b/disk/part.c index 35300df5903..1d2117ab71e 100644 --- a/disk/part.c +++ b/disk/part.c @@ -54,6 +54,22 @@ static struct part_driver *part_driver_lookup_type(struct blk_desc *dev_desc) return NULL; }

+int part_get_type_by_name(const char *name) +{ + struct part_driver *drv = + ll_entry_start(struct part_driver, part_driver); + const int n_ents = ll_entry_count(struct part_driver, part_driver); + struct part_driver *entry; + + for (entry = drv; entry != drv + n_ents; entry++) { + if (!strcasecmp(name, entry->name)) + return entry->part_type; + } + + /* Not found */ + return PART_TYPE_UNKNOWN; +} + static struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart) { struct blk_desc *dev_desc; diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst index 8d2a2803912..8a594aaff27 100644 --- a/doc/usage/cmd/part.rst +++ b/doc/usage/cmd/part.rst @@ -13,6 +13,7 @@ Synopis part start <interface> <dev> <part> <varname> part size <interface> <dev> <part> <varname> part number <interface> <dev> <part> <varname> + part set <interface> <dev> <part> <type> part type <interface> <dev>:<part> [varname] part types

@@ -82,6 +83,18 @@ part must be specified as partition name. varname a variable to store the current partition number value into

+The 'part set' command sets the type of a partition. This is useful when +autodetection fails or does not do the correct thing: + + interface + interface for accessing the block device (mmc, sata, scsi, usb, ....) + dev + device number + part + partition number + type + partition type to use (see 'part types') to check available types + The 'part type' command prints or sets an environment variable to the partition type UUID.

interface @@ -147,6 +160,67 @@ Examples => part types Supported partition tables: EFI, AMIGA, DOS, ISO, MAC

+This shows looking at a device with multiple partition tables:: + + => virtio scan + => part list virtio 0 + + Partition Map for VirtIO device 0 -- Partition Type: EFI + + Part Start LBA End LBA Name + Attributes + Type GUID + Partition GUID + 1 0x00000040 0x0092b093 "ISO9660" + attrs: 0x1000000000000001 + type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 + guid: a0891d7e-b930-4513-94d8-f629dbd637b2 + 2 0x0092b094 0x0092d7e7 "Appended2" + attrs: 0x0000000000000000 + type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b + guid: a0891d7e-b930-4513-94db-f629dbd637b2 + 3 0x0092d7e8 0x0092da3f "Gap1" + attrs: 0x1000000000000001 + type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 + guid: a0891d7e-b930-4513-94da-f629dbd637b2 + => ls virtio 0:3 + => part types + Supported partition tables: EFI, DOS, ISO + => part set virtio 0 dos + + Partition Map for VirtIO device 0 -- Partition Type: DOS + + Part Start Sector Num Sectors UUID Type + 1 1 9624191 00000000-01 ee + => part set virtio 0 iso + + Partition Map for VirtIO device 0 -- Partition Type: ISO + + Part Start Sect x Size Type + 1 3020 4 512 U-Boot + 2 9613460 10068 512 U-Boot + => part set virtio 0 efi + + Partition Map for VirtIO device 0 -- Partition Type: EFI + + Part Start LBA End LBA Name + Attributes + Type GUID + Partition GUID + 1 0x00000040 0x0092b093 "ISO9660" + attrs: 0x1000000000000001 + type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 + guid: a0891d7e-b930-4513-94d8-f629dbd637b2 + 2 0x0092b094 0x0092d7e7 "Appended2" + attrs: 0x0000000000000000 + type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b + guid: a0891d7e-b930-4513-94db-f629dbd637b2 + 3 0x0092d7e8 0x0092da3f "Gap1" + attrs: 0x1000000000000001 + type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 + guid: a0891d7e-b930-4513-94da-f629dbd637b2 + => + Return value ------------

diff --git a/include/part.h b/include/part.h index be75c735495..3b1b5398699 100644 --- a/include/part.h +++ b/include/part.h @@ -598,6 +598,15 @@ static inline struct part_driver *part_driver_get_first(void) return ll_entry_start(struct part_driver, part_driver); }

+/** + * part_get_type_by_name() - Get partition type by name + * + * @name: Name of partition type to look up (not case-sensitive) + * Returns: Corresponding partition type (PART_TYPE_...) or PART_TYPE_UNKNOWN if + * not known + */ +int part_get_type_by_name(const char *name); + #else static inline int part_driver_get_count(void) { return 0; }

Add a a bit more detail so it is clear that multiple devices are supported, but only one per driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

common/log.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/log.c b/common/log.c index 7cfc49bc28a..ec33b62e8a6 100644 --- a/common/log.c +++ b/common/log.c @@ -436,7 +436,7 @@ int log_init(void) /* * We cannot add runtime data to the driver since it is likely stored * in rodata. Instead, set up a 'device' corresponding to each driver. - * We only support having a single device. + * We only support having a single device for each driver. */ INIT_LIST_HEAD((struct list_head *)&gd->log_head); while (drv < end) {

The CMD_EFIDEBUG option enables debugging so it is reasonable to assume that all effects should be made to decode the dreaded UUIDs favoured by UEFI.

Update the table to show them all when CONFIG_CMD_EFIDEBUG is enabled.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

lib/uuid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/uuid.c b/lib/uuid.c index 96e1af3c8b0..ab30fbf9152 100644 --- a/lib/uuid.c +++ b/lib/uuid.c @@ -255,7 +255,7 @@ static const struct { EFI_CERT_TYPE_PKCS7_GUID, }, #endif -#ifdef CONFIG_EFI +#if defined(CONFIG_CMD_EFIDEBUG) || defined(CONFIG_EFI) { "EFI_LZMA_COMPRESSED", EFI_LZMA_COMPRESSED }, { "EFI_DXE_SERVICES", EFI_DXE_SERVICES }, { "EFI_HOB_LIST", EFI_HOB_LIST },

It is useful to see the base of the malloc region. This is visible when debugging but not in normal usage.

Add it to the global data so that it can be shown.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

cmd/bdinfo.c | 1 + common/board_r.c | 7 ++++--- include/asm-generic/global_data.h | 11 +++++++++++ 3 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 4e0c763a709..f1f8d59673f 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -148,6 +148,7 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (IS_ENABLED(CONFIG_CMD_BDINFO_EXTRA)) { bdinfo_print_num_ll("stack ptr", (ulong)&bd); bdinfo_print_num_ll("ram_top ptr", (ulong)gd->ram_top); + bdinfo_print_num_l("malloc base", gd_malloc_start()); }

arch_print_bdinfo(); diff --git a/common/board_r.c b/common/board_r.c index d798c00a80a..4aaa8940311 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -196,7 +196,7 @@ static int initr_barrier(void)

static int initr_malloc(void) { - ulong malloc_start; + ulong start;

#if CONFIG_VAL(SYS_MALLOC_F_LEN) debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, @@ -207,8 +207,9 @@ static int initr_malloc(void) * This value MUST match the value of gd->start_addr_sp in board_f.c: * reserve_noncached(). */ - malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN; - mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN), + start = gd->relocaddr - TOTAL_MALLOC_LEN; + gd_set_malloc_start(start); + mem_malloc_init((ulong)map_sysmem(start, TOTAL_MALLOC_LEN), TOTAL_MALLOC_LEN); return 0; } diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index a1e1b9d6400..a5cf87f86b3 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -301,6 +301,10 @@ struct global_data { * @timebase_l: low 32 bits of timer */ unsigned int timebase_l; + /** + * @malloc_start: start of malloc() region + */ + CONFIG_IS_ENABLED(CMD_BDINFO_EXTRA, (ulong malloc_start;)) #if CONFIG_VAL(SYS_MALLOC_F_LEN) /** * @malloc_base: base address of early malloc() @@ -560,6 +564,13 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_event_state() NULL #endif

+#if CONFIG_IS_ENABLED(CMD_BDINFO_EXTRA) +#define gd_malloc_start() gd->malloc_start +#define gd_set_malloc_start(_val) gd->malloc_start = (_val) +#else +#define gd_malloc_start() 0 +#define gd_set_malloc_start(val) +#endif /** * enum gd_flags - global data flags *

When scanning fails it is useful to be able to decode what went wrong. Add some debugging for this.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/nvme/nvme.c | 36 ++++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 74e7a5b0110..a7add66ab4d 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -578,17 +578,22 @@ static int nvme_set_queue_count(struct nvme_dev *dev, int count) return min(result & 0xffff, result >> 16) + 1; }

-static void nvme_create_io_queues(struct nvme_dev *dev) +static int nvme_create_io_queues(struct nvme_dev *dev) { unsigned int i; + int ret;

for (i = dev->queue_count; i <= dev->max_qid; i++) if (!nvme_alloc_queue(dev, i, dev->q_depth)) - break; + return log_msg_ret("all", -ENOMEM);

- for (i = dev->online_queues; i <= dev->queue_count - 1; i++) - if (nvme_create_queue(dev->queues[i], i)) - break; + for (i = dev->online_queues; i <= dev->queue_count - 1; i++) { + ret = nvme_create_queue(dev->queues[i], i); + if (ret) + return log_msg_ret("cre", ret); + } + + return 0; }

static int nvme_setup_io_queues(struct nvme_dev *dev) @@ -598,14 +603,18 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)

nr_io_queues = 1; result = nvme_set_queue_count(dev, nr_io_queues); - if (result <= 0) + if (result <= 0) { + log_debug("Cannot set queue count (err=%dE)\n", result); return result; + }

dev->max_qid = nr_io_queues;

/* Free previously allocated queues */ nvme_free_queues(dev, nr_io_queues + 1); - nvme_create_io_queues(dev); + result = nvme_create_io_queues(dev); + if (result) + return result;

return 0; } @@ -683,8 +692,11 @@ int nvme_scan_namespace(void)

uclass_foreach_dev(dev, uc) { ret = device_probe(dev); - if (ret) + if (ret) { + log_err("Failed to probe '%s': err=%dE\n", dev->name, + ret); return ret; + } }

return 0; @@ -842,8 +854,10 @@ int nvme_init(struct udevice *udev) ndev->dbs = ((void __iomem *)ndev->bar) + 4096;

ret = nvme_configure_admin_queue(ndev); - if (ret) + if (ret) { + log_debug("Unable to configure admin queue (err=%dE)\n", ret); goto free_queue; + }

/* Allocate after the page size is known */ ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL); @@ -855,8 +869,10 @@ int nvme_init(struct udevice *udev) ndev->prp_entry_num = MAX_PRP_POOL >> 3;

ret = nvme_setup_io_queues(ndev); - if (ret) + if (ret) { + log_debug("Unable to setup I/O queues(err=%dE)\n", ret); goto free_queue; + }

nvme_get_info_from_identify(ndev);

QEMU emulates two common machines (Q35 and i440fx) which use mapping to determine whether RAM is present below 1MB. In order to copy the video BIOS to c0000 we need to flip this mapping over to RAM. This does not happen automatically until SPL has finished running.

Switch in RAM at these address so that the video BIOS can be loaded and run. This fix was found in the seabios code base.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/pci/pci_rom.c | 46 +++++++++++++++++++++++++++++++++++++++++++ include/pci_ids.h | 1 + 2 files changed, 47 insertions(+)

diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index f0dfe631490..0f44238bbbc 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -141,6 +141,49 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) return 0; }

+#define Q35_HOST_BRIDGE_PAM0 0x90 +#define I440FX_PAM0 0x59 + +/** + * intel_set_writable_ram() - Set RAM to be writable + * + * This is needed for QEMU when using Q35 or I440FX emulation, since otherwise + * there is no RAM available at c0000 + * + * See Intel 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet for + * information about the PAM0-PAM6 registers + */ +static void intel_set_writable_ram(void) +{ + struct udevice *dev; + int pam0 = -1; + int i; + + for (pci_find_first_device(&dev); dev; pci_find_next_device(&dev)) { + const struct pci_child_plat *pdata = dev_get_parent_plat(dev); + + if (pdata->vendor == PCI_VENDOR_ID_INTEL) { + if (pdata->device == PCI_DEVICE_ID_INTEL_Q35_MCH) { + pam0 = Q35_HOST_BRIDGE_PAM0; + break; + } else if (pdata->device == PCI_DEVICE_ID_INTEL_82441) { + pam0 = I440FX_PAM0; + break; + } + } + } + + if (!dev) + return; + + // Adjust RAM to be writable from c0000 to f0000 + for (i = 1; i <= 6; i++) + dm_pci_write_config8(dev, pam0 + i, 0x33); + + // Also f0000-100000 + dm_pci_write_config8(dev, pam0, 0x30); +} + /** * pci_rom_load() - Load a ROM image and return a pointer to it * @@ -185,6 +228,9 @@ static int pci_rom_load(struct pci_rom_header *rom_header, return -ENOMEM; *allocedp = true; #endif + /* QEMU hacks */ + intel_set_writable_ram(); + if (target != rom_header) { ulong start = get_timer(0);

diff --git a/include/pci_ids.h b/include/pci_ids.h index 88b0a640458..856d5326411 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2870,6 +2870,7 @@ #define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916 #define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918 #define PCI_DEVICE_ID_INTEL_ICH9_AHCI 0x2922 +#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0 #define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18 #define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19 #define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a

With qemu-x86_64 we need to run the video BIOS while in 32-bit mode, i.e. SPL. Add a Kconfig option for this, adjust the Makefile rules and use CONFIG_IS_ENABLED() where needed.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/x86/lib/Makefile | 7 ++++--- arch/x86/lib/bios.c | 2 +- drivers/pci/pci_rom.c | 28 ++++++++++++++-------------- 3 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index b0612ae6dd5..90a7618ecfd 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -4,16 +4,17 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de.

obj-y += bdinfo.o -ifndef CONFIG_X86_64 -ifndef CONFIG_TPL_BUILD + +ifndef CONFIG_$(SPL_TPL_)X86_64 obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o endif -endif + ifndef CONFIG_SPL_BUILD obj-$(CONFIG_X86_32BIT_INIT) += string.o endif + ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_BOOTM) += bootm.o endif diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c index 8cc686fd146..e29cae78e50 100644 --- a/arch/x86/lib/bios.c +++ b/arch/x86/lib/bios.c @@ -23,7 +23,7 @@ static int (*int_handler[256])(void);

/* to have a common register file for interrupt handlers */ -#ifndef CONFIG_BIOSEMU +#if !CONFIG_IS_ENABLED(BIOSEMU) X86EMU_sysEnv _X86EMU_env; #endif

diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index dab0f197906..2d9a2a899ef 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -344,20 +344,20 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), }

if (emulate) { -#ifdef CONFIG_BIOSEMU - BE_VGAInfo *info; - - log_debug("Running video BIOS with emulator..."); - ret = biosemu_setup(dev, &info); - if (ret) - goto err; - biosemu_set_interrupt_handler(0x15, int15_handler); - ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, - true, vesa_mode, &mode_info); - log_debug("done\n"); - if (ret) - goto err; -#endif + if (CONFIG_IS_ENABLED(BIOSEMU)) { + BE_VGAInfo *info; + + log_debug("Running video BIOS with emulator..."); + ret = biosemu_setup(dev, &info); + if (ret) + goto err; + biosemu_set_interrupt_handler(0x15, int15_handler); + ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, + true, vesa_mode, &mode_info); + log_debug("done\n"); + if (ret) + goto err; + } } else { #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL) log_debug("Running video BIOS...");

A hex value is expected for the VGA mode. Drop the 0x prefix, which is not supported in SPL.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/pci/pci_rom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index ecb6da64c5c..62cfe60c0fb 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -319,7 +319,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), defined(CONFIG_FRAMEBUFFER_VESA_MODE) vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; #endif - debug("Selected vesa mode %#x\n", vesa_mode); + debug("Selected vesa mode %x\n", vesa_mode);

if (exec_method & PCI_ROM_USE_NATIVE) { #ifdef CONFIG_X86 @@ -370,7 +370,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), log_debug("done\n"); #endif } - debug("Final vesa mode %#x\n", mode_info.video_mode); + debug("Final vesa mode %x\n", mode_info.video_mode); ret = 0;

err:

Enable the various options needed for display to work on the qemu-x86_64 board. This includes expanding the available malloc() memory in SPL, since the PCI bus must be enumerated in order to find the video device.

It also includes enabling a bloblist, so that the video parameters can be passed. This is placed at address 10000 but is not needed after U-Boot proper reads the information there.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

configs/qemu-x86_64_defconfig | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index f29a5aa0f81..371ca9de842 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -7,6 +7,7 @@ CONFIG_MAX_CPUS=2 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_SPL_TEXT_BASE=0xfffd0000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_X86_RUN_64BIT=y @@ -29,7 +30,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_ADDR=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CPU=y CONFIG_SPL_ENV_SUPPORT=y @@ -69,10 +73,12 @@ CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y CONFIG_CPU=y CONFIG_NVME_PCI=y +CONFIG_SPL_PCI_PNP=y CONFIG_SPL_DM_RTC=y CONFIG_SYS_NS16550_PORT_MAPPED=y CONFIG_SPI=y CONFIG_USB_KEYBOARD=y +CONFIG_SPL_VIDEO=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_USER=y CONFIG_FRAMEBUFFER_VESA_MODE=0x144

To save a few bytes, replace Error with ** and try to use the same string for multiple messages where possible.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Drop ** in strings and use log_err() for messages

fs/fat/fat.c | 20 +++++++++++--------- fs/fat/fat_write.c | 14 ++++---------- 2 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 2da93dae3cf..d1476aa433d 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -8,6 +8,8 @@ * 2003-03-10 - kharris@nexus-tech.net - ported to uboot */

+#define LOG_CATEGORY LOGC_FS + #include <common.h> #include <blk.h> #include <config.h> @@ -97,8 +99,8 @@ int fat_register_device(struct blk_desc *dev_desc, int part_no) /* Read the partition table, if present */ if (part_get_info(dev_desc, part_no, &info)) { if (part_no != 0) { - printf("** Partition %d not valid on device %d **\n", - part_no, dev_desc->devnum); + log_err("Partition %d invalid on device %d\n", part_no, + dev_desc->devnum); return -1; }

@@ -168,7 +170,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) __u32 ret = 0x00;

if (CHECK_CLUST(entry, mydata->fatsize)) { - printf("Error: Invalid FAT entry: 0x%08x\n", entry); + log_err("Invalid FAT entry: %#08x\n", entry); return ret; }

@@ -586,19 +588,19 @@ static int get_fs_info(fsdata *mydata) mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0]; mydata->clust_size = bs.cluster_size; if (mydata->sect_size != cur_part_info.blksz) { - printf("Error: FAT sector size mismatch (fs=%hu, dev=%lu)\n", - mydata->sect_size, cur_part_info.blksz); + log_err("FAT sector size mismatch (fs=%u, dev=%lu)\n", + mydata->sect_size, cur_part_info.blksz); return -1; } if (mydata->clust_size == 0) { - printf("Error: FAT cluster size not set\n"); + log_err("FAT cluster size not set\n"); return -1; } if ((unsigned int)mydata->clust_size * mydata->sect_size > MAX_CLUSTSIZE) { - printf("Error: FAT cluster size too big (cs=%u, max=%u)\n", - (unsigned int)mydata->clust_size * mydata->sect_size, - MAX_CLUSTSIZE); + log_err("FAT cluster size too big (cs=%u, max=%u)\n", + (uint)mydata->clust_size * mydata->sect_size, + MAX_CLUSTSIZE); return -1; }

diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 413fc432ebe..e2a9913f807 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -1571,8 +1571,9 @@ int fat_unlink(const char *filename) char *filename_copy, *dirname, *basename;

filename_copy = strdup(filename); - if (!filename_copy) { - printf("Error: allocating memory\n"); + itr = malloc_cache_aligned(sizeof(fat_itr)); + if (!itr || !filename_copy) { + printf("Error: out of memory\n"); ret = -ENOMEM; goto exit; } @@ -1584,13 +1585,6 @@ int fat_unlink(const char *filename) goto exit; }

- itr = malloc_cache_aligned(sizeof(fat_itr)); - if (!itr) { - printf("Error: allocating memory\n"); - ret = -ENOMEM; - goto exit; - } - ret = fat_itr_root(itr, &fsdata); if (ret) goto exit; @@ -1605,7 +1599,7 @@ int fat_unlink(const char *filename) }

if (!find_directory_entry(itr, basename)) { - printf("%s: doesn't exist\n", basename); + log_err("%s: doesn't exist (%d)\n", basename, -ENOENT); ret = -ENOENT; goto exit; }

This build can be used to boot standard distro builds, since these are mostly 64-bit these days. Enable some more options, so that all possible EFI UUIDs are decoded, we get a proper printf() in SPL, can search memory for tables, support the full set of standard-boot features, have full logging and can boot from CDROM media.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

configs/qemu-x86_64_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+)

diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 371ca9de842..79ea3591857 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -19,6 +19,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_X86_OFFSET_U_BOOT=0xfff00000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y +CONFIG_BOOTSTD_FULL=y CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTSTAGE=y @@ -27,6 +28,9 @@ CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOG=y +CONFIG_LOGF_FUNC=y +CONFIG_SPL_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y @@ -46,12 +50,14 @@ CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_MEM_SEARCH=y CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y CONFIG_CMD_BOOTSTAGE=y @@ -83,5 +89,7 @@ CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_USER=y CONFIG_FRAMEBUFFER_VESA_MODE=0x144 CONFIG_CONSOLE_SCROLL_LINES=5 +CONFIG_FAT_BLK_XLATE=y +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_GENERATE_ACPI_TABLE=y # CONFIG_GZIP is not set

The ACPI tables are special in that they are passed to EFI as a separate piece, independent of other tables.

Also they can be spread over two areas of memory, e.g. with QEMU we end up with tables kept in high memory as well.

Add new global_data fields to hold this information and update the bdinfo command to show the table areas.

Move the rom_table_end variable into the loop that uses it.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v3: - Adjust the code to handle qemu writing a pointer to tables in memory

Changes in v2: - Handle the case where the tables are in the bloblist

arch/sandbox/include/asm/global_data.h | 4 ++++ arch/x86/include/asm/global_data.h | 4 ++++ arch/x86/lib/bdinfo.c | 4 ++++ arch/x86/lib/tables.c | 18 +++++++++++++++++- drivers/misc/qfw.c | 8 ++++++++ 5 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index f4ce72d5660..f0ab3ba5c14 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -13,6 +13,10 @@ struct arch_global_data { uint8_t *ram_buf; /* emulated RAM buffer */ void *text_base; /* pointer to base of text region */ + ulong table_start; /* Start address of x86 tables */ + ulong table_end; /* End address of x86 tables */ + ulong table_start_high; /* Start address of high x86 tables */ + ulong table_end_high; /* End address of high x86 tables */ };

#include <asm-generic/global_data.h> diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 22d103df4ee..ea58259ad77 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -123,6 +123,10 @@ struct arch_global_data { #endif void *itss_priv; /* Private ITSS data pointer */ ulong coreboot_table; /* Address of coreboot table */ + ulong table_start; /* Start address of x86 tables */ + ulong table_end; /* End address of x86 tables */ + ulong table_start_high; /* Start address of high x86 tables */ + ulong table_end_high; /* End address of high x86 tables */ };

#endif diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 0970efa4726..9504e7fc293 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -23,6 +23,10 @@ void arch_print_bdinfo(void) bdinfo_print_str(" name", cpu_vendor_name(gd->arch.x86_vendor)); bdinfo_print_num_l("model", gd->arch.x86_model); bdinfo_print_num_l("phys_addr", cpu_phys_address_size()); + bdinfo_print_num_l("table start", gd->arch.table_start); + bdinfo_print_num_l("table end", gd->arch.table_end); + bdinfo_print_num_l(" high start", gd->arch.table_start_high); + bdinfo_print_num_l(" high end", gd->arch.table_end_high);

if (IS_ENABLED(CONFIG_EFI_STUB)) efi_show_bdinfo(); diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 132c02ee80f..d95fdb20500 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -54,6 +54,10 @@ static struct table_info table_list[] = { #ifdef CONFIG_GENERATE_MP_TABLE { "mp", write_mp_table, }, #endif + /* + * tables which can go in the bloblist must be last in this list, so + * that the calculation of gd->table_end works properly + */ #ifdef CONFIG_GENERATE_ACPI_TABLE { "acpi", write_acpi_tables, BLOBLISTT_ACPI_TABLES, 0x10000, 0x1000}, #endif @@ -80,10 +84,12 @@ int write_tables(void) { u32 high_table, table_size; struct memory_area cfg_tables[ARRAY_SIZE(table_list) + 1]; + bool use_high = false; u32 rom_addr; int i;

- rom_addr = ROM_TABLE_ADDR; + gd->arch.table_start = ROM_TABLE_ADDR; + rom_addr = gd->arch.table_start;

debug("Writing tables to %x:\n", rom_addr); for (i = 0; i < ARRAY_SIZE(table_list); i++) { @@ -92,10 +98,15 @@ int write_tables(void) u32 rom_table_end;

if (IS_ENABLED(CONFIG_BLOBLIST_TABLES) && table->tag) { + if (!gd->arch.table_end) + gd->arch.table_end = rom_addr; rom_addr = (ulong)bloblist_add(table->tag, size, table->align); if (!rom_addr) return log_msg_ret("bloblist", -ENOBUFS); + use_high = true; + if (!gd->arch.table_start_high) + gd->arch.table_start_high = rom_addr; } rom_table_end = table->write(rom_addr); if (!rom_table_end) { @@ -132,6 +143,11 @@ int write_tables(void) rom_addr = rom_table_end; }

+ if (use_high) + gd->arch.table_end_high = rom_addr; + else + gd->arch.table_end = rom_addr; + if (IS_ENABLED(CONFIG_SEABIOS)) { /* make sure the last item is zero */ cfg_tables[i].size = 0; diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c index 0a93feeb4b2..c0da4bd7359 100644 --- a/drivers/misc/qfw.c +++ b/drivers/misc/qfw.c @@ -65,6 +65,11 @@ static int bios_linker_allocate(struct udevice *dev, printf("error: allocating resource\n"); return -ENOMEM; } + if (aligned_addr < gd->arch.table_start_high) + gd->arch.table_start_high = aligned_addr; + if (aligned_addr + size > gd->arch.table_end_high) + gd->arch.table_end_high = aligned_addr + size; + } else if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG) { aligned_addr = ALIGN(*addr, align); } else { @@ -189,6 +194,9 @@ ulong write_acpi_tables(ulong addr) return addr; }

+ gd->arch.table_start_high = (ulong)table_loader; + gd->arch.table_end_high = (ulong)table_loader; + qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size, table_loader);

for (i = 0; i < (size / sizeof(*entry)); i++) {

Move from using debug() to log_debug() so that we don't have to use the __func__ parameter and can access other logging features.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Add new patch to convert some debug statements to use logging

arch/x86/cpu/intel_common/mrc.c | 10 +++++----- arch/x86/cpu/ivybridge/sdram.c | 4 +++- arch/x86/lib/mrccache.c | 6 ++++-- arch/x86/lib/spl.c | 22 ++++++++++++++-------- drivers/gpio/intel_ich6_gpio.c | 5 +++-- drivers/pch/pch9.c | 6 ++++-- 6 files changed, 33 insertions(+), 20 deletions(-)

diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index 69405d740b4..2819bae02e3 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -3,6 +3,8 @@ * Copyright (c) 2016 Google, Inc */

+#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <init.h> @@ -144,12 +146,10 @@ int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap)

ret = gpio_request_list_by_name(dev, "board-id-gpios", desc, ARRAY_SIZE(desc), GPIOD_IS_IN); - if (ret < 0) { - debug("%s: gpio ret=%d\n", __func__, ret); - return ret; - } + if (ret < 0) + return log_msg_ret("gp", ret); spd_index = dm_gpio_get_values_as_int(desc, ret); - debug("spd index %d\n", spd_index); + log_debug("spd index %d\n", spd_index);

node = fdt_first_subnode(blob, dev_of_offset(dev)); if (node < 0) diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 1a0ec433e65..0718aefbb1f 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -9,6 +9,8 @@ * Copyright (C) 2011 Google Inc. */

+#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <errno.h> @@ -213,7 +215,7 @@ static int copy_spd(struct udevice *dev, struct pei_data *peid)

ret = mrc_locate_spd(dev, sizeof(peid->spd_data[0]), &data); if (ret) { - debug("%s: Could not locate SPD (ret=%d)\n", __func__, ret); + log_debug("Could not locate SPD (err=%d)\n", ret); return ret; }

diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 2f6f6880003..6494b8d2634 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -6,6 +6,8 @@ * Copyright (C) 2015 Bin Meng bmeng.cn@gmail.com */

+#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <errno.h> @@ -197,8 +199,8 @@ static void mrccache_setup(struct mrc_output *mrc, void *data) cache->signature = MRC_DATA_SIGNATURE; cache->data_size = mrc->len; checksum = compute_ip_checksum(mrc->buf, cache->data_size); - debug("Saving %d bytes for MRC output data, checksum %04x\n", - cache->data_size, checksum); + log_debug("Saving %d bytes for MRC output data, checksum %04x\n", + cache->data_size, checksum); cache->checksum = checksum; cache->reserved = 0; memcpy(cache->data, mrc->buf, cache->data_size); diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 090fa718dbf..6886587f647 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -3,6 +3,8 @@ * Copyright (c) 2016 Google, Inc */

+#define LOG_CATEGORY LOGC_BOOT + #include <common.h> #include <cpu_func.h> #include <debug_uart.h> @@ -76,25 +78,25 @@ static int x86_spl_init(void) #endif int ret;

- debug("%s starting\n", __func__); + log_debug("x86 spl starting\n"); if (IS_ENABLED(TPL)) ret = x86_cpu_reinit_f(); else ret = x86_cpu_init_f(); ret = spl_init(); if (ret) { - debug("%s: spl_init() failed\n", __func__); + log_debug("spl_init() failed (err=%d)\n", ret); return ret; } ret = arch_cpu_init(); if (ret) { - debug("%s: arch_cpu_init() failed\n", __func__); + log_debug("arch_cpu_init() failed (err=%d)\n", ret); return ret; } #ifndef CONFIG_TPL ret = fsp_setup_pinctrl(NULL, NULL); if (ret) { - debug("%s: fsp_setup_pinctrl() failed\n", __func__); + log_debug("fsp_setup_pinctrl() failed (err=%d)\n", ret); return ret; } #endif @@ -103,23 +105,25 @@ static int x86_spl_init(void) #if !defined(CONFIG_TPL) && !CONFIG_IS_ENABLED(CPU) ret = print_cpuinfo(); if (ret) { - debug("%s: print_cpuinfo() failed\n", __func__); + log_debug("print_cpuinfo() failed (err=%d)\n", ret); return ret; } #endif ret = dram_init(); if (ret) { - debug("%s: dram_init() failed\n", __func__); + log_debug("dram_init() failed (err=%d)\n", ret); return ret; } + log_debug("mrc\n"); if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { ret = mrccache_spl_save(); if (ret) - debug("%s: Failed to write to mrccache (err=%d)\n", - __func__, ret); + log_debug("Failed to write to mrccache (err=%d)\n", + ret); }

#ifndef CONFIG_SYS_COREBOOT + log_debug("bss\n"); debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); @@ -140,6 +144,7 @@ static int x86_spl_init(void) gd->new_gd = (struct global_data *)ptr; memcpy(gd->new_gd, gd, sizeof(*gd));

+ log_debug("logging\n"); /* * Make sure logging is disabled when we switch, since the log system * list head will move @@ -179,6 +184,7 @@ static int x86_spl_init(void) debug("Failed to set CPU frequency (err=%d)\n", ret); # endif #endif + log_debug("done\n");

return 0; } diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c index 63a07b9592a..2ed0d0bea9a 100644 --- a/drivers/gpio/intel_ich6_gpio.c +++ b/drivers/gpio/intel_ich6_gpio.c @@ -26,6 +26,8 @@ * reserved or subject to arcane restrictions. */

+#define LOG_CATEGORY UCLASS_GPIO + #include <common.h> #include <dm.h> #include <errno.h> @@ -155,8 +157,7 @@ static int ich6_gpio_request(struct udevice *dev, unsigned offset, */ tmplong = inl(bank->use_sel); if (!(tmplong & (1UL << offset))) { - debug("%s: gpio %d is reserved for internal use\n", __func__, - offset); + log_debug("gpio %d is reserved for internal use\n", offset); return -EPERM; }

diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c index 3bd011518b3..3137eb2c28f 100644 --- a/drivers/pch/pch9.c +++ b/drivers/pch/pch9.c @@ -3,6 +3,8 @@ * Copyright (C) 2014 Google, Inc */

+#define LOG_CATEGORY UCLASS_PCH + #include <common.h> #include <dm.h> #include <log.h> @@ -38,7 +40,7 @@ static int pch9_get_gpio_base(struct udevice *dev, u32 *gbasep) */ dm_pci_read_config32(dev, GPIO_BASE, &base); if (base == 0x00000000 || base == 0xffffffff) { - debug("%s: unexpected BASE value\n", __func__); + log_debug("unexpected BASE value\n"); return -ENODEV; }

@@ -59,7 +61,7 @@ static int pch9_get_io_base(struct udevice *dev, u32 *iobasep)

dm_pci_read_config32(dev, IO_BASE, &base); if (base == 0x00000000 || base == 0xffffffff) { - debug("%s: unexpected BASE value\n", __func__); + log_debug("unexpected BASE value\n"); return -ENODEV; }

Some boards need to access GPIOs to determine which SDRAM is fitted to the board, for example chromebook_link. Probe this device (if it exists) to make sure that this works as expected.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Add new patch to make sure that the LPC is active before SDRAM init

arch/x86/lib/spl.c | 9 +++++++++ 1 file changed, 9 insertions(+)

diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 6886587f647..fb7dac68d7a 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -65,6 +65,8 @@ static int set_max_freq(void)

static int x86_spl_init(void) { + struct udevice *dev; + #ifndef CONFIG_TPL /* * TODO(sjg@chromium.org): We use this area of RAM for the stack @@ -109,6 +111,13 @@ static int x86_spl_init(void) return ret; } #endif + /* probe the LPC so we get the GPIO_BASE set up correctly */ + ret = uclass_first_device_err(UCLASS_LPC, &dev); + if (ret && ret != -ENODEV) { + log_debug("lpc probe failed\n"); + return ret; + } + ret = dram_init(); if (ret) { log_debug("dram_init() failed (err=%d)\n", ret);

Fix the header order in this file.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/sandbox/sandbox.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c index 2e44bdf0df3..e72d8164ebf 100644 --- a/board/sandbox/sandbox.c +++ b/board/sandbox/sandbox.c @@ -11,16 +11,16 @@ #include <efi.h> #include <efi_loader.h> #include <env_internal.h> +#include <extension_board.h> #include <init.h> #include <led.h> +#include <malloc.h> #include <os.h> #include <asm/global_data.h> #include <asm/test.h> #include <asm/u-boot-sandbox.h> #include <linux/kernel.h> -#include <malloc.h> - -#include <extension_board.h> +#include <linux/sizes.h>

/* * Pointer to initial global data area

U-Boot sets up the ACPI tables during startup. Rather than creating a new set, install the existing ones. Create a memory-map record to cover the tables.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Drop patch to set high bits of the mtrr base register, for now

lib/efi_loader/efi_acpi.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c index 2ddc3502b5d..f755af76f86 100644 --- a/lib/efi_loader/efi_acpi.c +++ b/lib/efi_loader/efi_acpi.c @@ -10,6 +10,9 @@ #include <log.h> #include <mapmem.h> #include <acpi/acpi_table.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR;

static const efi_guid_t acpi_guid = EFI_ACPI_TABLE_GUID;

@@ -20,26 +23,28 @@ static const efi_guid_t acpi_guid = EFI_ACPI_TABLE_GUID; */ efi_status_t efi_acpi_register(void) { - /* Map within the low 32 bits, to allow for 32bit ACPI tables */ - u64 acpi = U32_MAX; + ulong addr, start, end; efi_status_t ret; - ulong addr;

- /* Reserve 64kiB page for ACPI */ - ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, - EFI_ACPI_RECLAIM_MEMORY, 16, &acpi); + /* Mark space used for tables */ + start = ALIGN_DOWN(gd->arch.table_start, EFI_PAGE_MASK); + end = ALIGN(gd->arch.table_end, EFI_PAGE_MASK); + ret = efi_add_memory_map(start, end - start, EFI_ACPI_RECLAIM_MEMORY); if (ret != EFI_SUCCESS) return ret; + if (gd->arch.table_start_high) { + start = ALIGN_DOWN(gd->arch.table_start_high, EFI_PAGE_MASK); + end = ALIGN(gd->arch.table_end_high, EFI_PAGE_MASK); + ret = efi_add_memory_map(start, end - start, + EFI_ACPI_RECLAIM_MEMORY); + if (ret != EFI_SUCCESS) + return ret; + }

- /* - * Generate ACPI tables - we know that efi_allocate_pages() returns - * a 4k-aligned address, so it is safe to assume that - * write_acpi_tables() will write the table at that address. - */ - addr = map_to_sysmem((void *)(ulong)acpi); - write_acpi_tables(addr); + addr = gd_acpi_start(); + printf("EFI using ACPI tables at %lx\n", addr);

/* And expose them to our EFI payload */ return efi_install_configuration_table(&acpi_guid, - (void *)(uintptr_t)acpi); + (void *)(ulong)addr); }