[U-Boot] Pull request: u-boot-riscv/master

Hi Tom,
Please pull some riscv updates:
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01. - SiFive FU540 support SPL.
Thanks Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/694099665
The following changes since commit 0d8f35b58cc8458a5263b424896a386429ee49e5:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-06-03 12:27:51 -0400)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 0a94007e829876c7ebd49daebfaa90eea25801b8:
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01 (2020-06-04 09:44:21 +0800)
---------------------------------------------------------------- Bin Meng (2): riscv: sbi: Remove sbi_spec_version riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01
Jagan Teki (2): sifive: fu540: Add sample SD gpt partition layout sifive: fu540: Add U-Boot proper sector start
Pragnesh Patel (17): misc: add driver for the SiFive otp controller riscv: sifive: fu540: Use OTP DM driver for serial environment variable riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files sifive: fu540: add ddr driver sifive: dts: fu540: Add DDR controller and phy register settings riscv: sifive: dts: fu540: add U-Boot dmc node clk: sifive: fu540-prci: Add clock enable and disable ops clk: sifive: fu540-prci: Add ddr clock initialization clk: sifive: fu540-prci: Release ethernet clock reset riscv: sifive: dts: fu540: set ethernet clock rate riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux riscv: cpu: fu540: Add support for cpu fu540 riscv: sifive: fu540: add SPL configuration configs: fu540: Add config options for U-Boot SPL doc: sifive: fu540: Add description for OpenSBI generic platform
arch/riscv/Kconfig | 1 + arch/riscv/cpu/fu540/Kconfig | 15 ++ arch/riscv/cpu/fu540/Makefile | 11 ++ arch/riscv/cpu/fu540/cpu.c | 22 +++ arch/riscv/cpu/fu540/dram.c | 38 +++++ arch/riscv/cpu/fu540/spl.c | 23 +++ arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 89 +++++++++++ arch/riscv/dts/fu540-c000.dtsi | 37 ++++- arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 22 +++ arch/riscv/dts/hifive-unleashed-a00.dts | 9 ++ arch/riscv/include/asm/arch-fu540/clk.h | 14 ++ arch/riscv/include/asm/arch-fu540/gpio.h | 38 +++++ arch/riscv/include/asm/arch-fu540/spl.h | 14 ++ arch/riscv/include/asm/sbi.h | 2 - arch/riscv/lib/sbi.c | 40 +++-- board/sifive/fu540/Kconfig | 18 ++- board/sifive/fu540/Makefile | 4 + board/sifive/fu540/fu540.c | 134 ++++++++-------- board/sifive/fu540/spl.c | 74 +++++++++ common/spl/Kconfig | 3 +- configs/sifive_fu540_defconfig | 8 + doc/board/sifive/fu540.rst | 135 ++++++++++++++-- drivers/clk/sifive/fu540-prci.c | 177 ++++++++++++++++++--- drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/sifive-otp.c | 275 +++++++++++++++++++++++++++++++++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/sifive/Kconfig | 13 ++ drivers/ram/sifive/Makefile | 6 + drivers/ram/sifive/fu540_ddr.c | 410 +++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/sifive-fu540.h | 31 ++++ lib/Makefile | 2 +- 35 files changed, 3037 insertions(+), 129 deletions(-) create mode 100644 arch/riscv/cpu/fu540/Kconfig create mode 100644 arch/riscv/cpu/fu540/Makefile create mode 100644 arch/riscv/cpu/fu540/cpu.c create mode 100644 arch/riscv/cpu/fu540/dram.c create mode 100644 arch/riscv/cpu/fu540/spl.c create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu540/spl.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 drivers/misc/sifive-otp.c create mode 100644 drivers/ram/sifive/Kconfig create mode 100644 drivers/ram/sifive/Makefile create mode 100644 drivers/ram/sifive/fu540_ddr.c

On Thu, Jun 04, 2020 at 10:18:07AM +0800, uboot@andestech.com wrote:
Hi Tom,
Please pull some riscv updates:
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
Thanks Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/694099665
The following changes since commit 0d8f35b58cc8458a5263b424896a386429ee49e5:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-06-03 12:27:51 -0400)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 0a94007e829876c7ebd49daebfaa90eea25801b8:
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01 (2020-06-04 09:44:21 +0800)
Applied to u-boot/master, thanks!
participants (2)
-
Tom Rini
-
uboot@andestech.com