The spear configuration files are split into spear6xx_evb.h and spear3xx_evb.h with the common configurations placed in spear-common.h.

This split of configuration is not very conducive to increasing number of boards within each architecture. With number of boards supported by spear3xx_evb.h going up to 4, managing those boards becomes a tedious task.

This patch tries to re-split the spear configuration files hierarchically into

board files (spear600-evb.h, spear300-evb.h ...) soc files (spear600.h, spear300.h ...) arch files (spear6xx.h, spear3xx.h) platform file (spear.h)

board configuration file would define the driver enabler which is required for that respective board and would also define all board related configurations. All other generic configurations would be defined by respective config files (either spear3xx.h or spear300.h/spear310.h etc)

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/cpu/arm926ejs/spear/cpu.c | 12 +- arch/arm/cpu/arm926ejs/spear/spl.c | 8 +- arch/arm/cpu/arm926ejs/spear/timer.c | 4 +- arch/arm/include/asm/arch-spear/spr_misc.h | 4 +- include/configs/spear-common.h | 251 ------------------------- include/configs/spear.h | 193 +++++++++++++++++++ include/configs/spear300-evb.h | 99 ++++++++++ include/configs/{spear6xx_evb.h => spear300.h} | 45 ++--- include/configs/spear310-evb.h | 130 +++++++++++++ include/configs/spear310.h | 76 ++++++++ include/configs/spear320-evb.h | 128 +++++++++++++ include/configs/spear320.h | 66 +++++++ include/configs/spear3xx.h | 50 +++++ include/configs/spear3xx_evb.h | 173 ----------------- include/configs/spear600-evb.h | 99 ++++++++++ include/configs/spear600.h | 58 ++++++ include/configs/x600.h | 2 +- 17 files changed, 928 insertions(+), 470 deletions(-) delete mode 100644 include/configs/spear-common.h create mode 100644 include/configs/spear.h create mode 100644 include/configs/spear300-evb.h rename include/configs/{spear6xx_evb.h => spear300.h} (54%) create mode 100644 include/configs/spear310-evb.h create mode 100644 include/configs/spear310.h create mode 100644 include/configs/spear320-evb.h create mode 100644 include/configs/spear320.h create mode 100644 include/configs/spear3xx.h delete mode 100644 include/configs/spear3xx_evb.h create mode 100644 include/configs/spear600-evb.h create mode 100644 include/configs/spear600.h

diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index e299de3..7f29514 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -34,9 +34,9 @@ int arch_cpu_init(void)

periph1_clken = readl(&misc_p->periph1_clken);

-#if defined(CONFIG_SPEAR3XX) +#if defined(CONFIG_ARCH_SPEAR3XX) periph1_clken |= MISC_GPT2ENB; -#elif defined(CONFIG_SPEAR600) +#elif defined(CONFIG_SOC_SPEAR600) periph1_clken |= MISC_GPT3ENB; #endif

@@ -71,13 +71,13 @@ int arch_cpu_init(void) #ifdef CONFIG_DISPLAY_CPUINFO int print_cpuinfo(void) { -#ifdef CONFIG_SPEAR300 +#ifdef CONFIG_SOC_SPEAR300 printf("CPU: SPEAr300\n"); -#elif defined(CONFIG_SPEAR310) +#elif defined(CONFIG_SOC_SPEAR310) printf("CPU: SPEAr310\n"); -#elif defined(CONFIG_SPEAR320) +#elif defined(CONFIG_SOC_SPEAR320) printf("CPU: SPEAr320\n"); -#elif defined(CONFIG_SPEAR600) +#elif defined(CONFIG_SOC_SPEAR600) printf("CPU: SPEAr600\n"); #else #error CPU not supported in spear platform diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index 48e6efb..77fe3a9 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -203,7 +203,7 @@ static void sys_init(void) */ int get_socrev(void) { -#if defined(CONFIG_SPEAR600) +#if defined(CONFIG_SOC_SPEAR600) struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; u32 soc_id = readl(&misc_p->soc_core_id); u32 pri_socid = (soc_id >> SOC_PRI_SHFT) & 0xFF; @@ -219,11 +219,11 @@ int get_socrev(void) return SOC_SPEAR600_BA; else return SOC_SPEAR_NA; -#elif defined(CONFIG_SPEAR300) +#elif defined(CONFIG_SOC_SPEAR300) return SOC_SPEAR300; -#elif defined(CONFIG_SPEAR310) +#elif defined(CONFIG_SOC_SPEAR310) return SOC_SPEAR310; -#elif defined(CONFIG_SPEAR320) +#elif defined(CONFIG_SOC_SPEAR320) return SOC_SPEAR320; #endif } diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index 1dc7860..25a4f62 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -46,10 +46,10 @@ int timer_init(void) u32 synth;

/* Prescaler setting */ -#if defined(CONFIG_SPEAR3XX) +#if defined(CONFIG_ARCH_SPEAR3XX) writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg); synth = MISC_GPT4SYNTH; -#elif defined(CONFIG_SPEAR600) +#elif defined(CONFIG_ARCH_SPEAR6XX) writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg); synth = MISC_GPT3SYNTH; #else diff --git a/arch/arm/include/asm/arch-spear/spr_misc.h b/arch/arm/include/asm/arch-spear/spr_misc.h index 5f67a5f..b86296d 100644 --- a/arch/arm/include/asm/arch-spear/spr_misc.h +++ b/arch/arm/include/asm/arch-spear/spr_misc.h @@ -105,10 +105,10 @@ struct misc_regs { #define SYNTH23 0x00020003

/* PLLx_FRQ value */ -#if defined(CONFIG_SPEAR3XX) +#if defined(CONFIG_ARCH_SPEAR3XX) #define FREQ_332 0xA600010C #define FREQ_266 0x8500010C -#elif defined(CONFIG_SPEAR600) +#elif defined(CONFIG_ARCH_SPEAR6XX) #define FREQ_332 0xA600010F #define FREQ_266 0x8500010F #endif diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h deleted file mode 100644 index 192cda1..0000000 --- a/include/configs/spear-common.h +++ /dev/null @@ -1,251 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _SPEAR_COMMON_H -#define _SPEAR_COMMON_H -/* - * Common configurations used for both spear3xx as well as spear6xx - */ - -/* U-boot Load Address */ -#define CONFIG_SYS_TEXT_BASE 0x00700000 - -/* Ethernet driver configuration */ -#define CONFIG_MII -#define CONFIG_DESIGNWARE_ETH -#define CONFIG_DW_SEARCH_PHY -#define CONFIG_DW0_PHY 1 -#define CONFIG_NET_MULTI -#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#define CONFIG_DW_AUTONEG -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - -/* USBD driver configuration */ -#if defined(CONFIG_SPEAR_USBTTY) -#define CONFIG_DW_UDC -#define CONFIG_USB_DEVICE -#define CONFIG_USBD_HS -#define CONFIG_USB_TTY - -#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" -#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" - -#endif - -#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" - -/* I2C driver configuration */ -#define CONFIG_HARD_I2C -#define CONFIG_DW_I2C -#define CONFIG_SYS_I2C_SPEED 400000 -#define CONFIG_SYS_I2C_SLAVE 0x02 - -#define CONFIG_I2C_CHIPADDRESS 0x50 - -/* Timer, HZ specific defines */ -#define CONFIG_SYS_HZ 1000 - -/* Flash configuration */ -#if defined(CONFIG_FLASH_PNOR) -#define CONFIG_SPEAR_EMI -#else -#define CONFIG_ST_SMI -#endif - -#if defined(CONFIG_ST_SMI) - -#define CONFIG_SYS_MAX_FLASH_BANKS 2 -#define CONFIG_SYS_FLASH_BASE 0xF8000000 -#define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 -#define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 -#define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ - CONFIG_SYS_CS1_FLASH_BASE} -#define CONFIG_SYS_MAX_FLASH_SECT 128 - -#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) - -#endif - -/* - * Serial Configuration (PL011) - * CONFIG_PL01x_PORTS is defined in specific files - */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ - 57600, 115200 } - -#define CONFIG_SYS_LOADS_BAUD_CHANGE - -/* NAND FLASH Configuration */ -#define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_NAND_FSMC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_QUIET_TEST - -/* - * Command support defines - */ -#define CONFIG_CMD_I2C -#define CONFIG_CMD_NAND -#define CONFIG_CMD_ENV -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP - -/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <config_cmd_default.h> - -/* - * Default Environment Varible definitions - */ -#if defined(CONFIG_SPEAR_USBTTY) -#define CONFIG_BOOTDELAY -1 -#else -#define CONFIG_BOOTDELAY 1 -#endif - -#define CONFIG_ENV_OVERWRITE - -/* - * U-Boot Environment placing definitions. - */ -#if defined(CONFIG_ENV_IS_IN_FLASH) -#ifdef CONFIG_ST_SMI -/* - * Environment is in serial NOR flash - */ -#define CONFIG_SYS_MONITOR_LEN 0x00040000 -#define CONFIG_ENV_SECT_SIZE 0x00010000 -#define CONFIG_FSMTDBLK "/dev/mtdblock3 " - -#define CONFIG_BOOTCOMMAND "bootm 0xf8050000" - -#elif defined(CONFIG_SPEAR_EMI) -/* - * Environment is in parallel NOR flash - */ -#define CONFIG_SYS_MONITOR_LEN 0x00060000 -#define CONFIG_ENV_SECT_SIZE 0x00020000 -#define CONFIG_FSMTDBLK "/dev/mtdblock3 " - -#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \ - "0x4C0000; bootm 0x1600000" -#endif - -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ - CONFIG_SYS_MONITOR_LEN) -#elif defined(CONFIG_ENV_IS_IN_NAND) -/* - * Environment is in NAND - */ - -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_RANGE 0x10000 -#define CONFIG_FSMTDBLK "/dev/mtdblock7 " - -#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ - "0x80000 0x4C0000; " \ - "bootm 0x1600000" -#endif - -#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ - "mem=128M " \ - "root="CONFIG_FSMTDBLK \ - "rootfstype=jffs2" - -#define CONFIG_NFSBOOTCOMMAND \ - "bootp; " \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):" \ - "$(netmask):$(hostname):$(netdev):off " \ - "console=ttyAMA0,115200 $(othbootargs);" \ - "bootm; " - -#define CONFIG_RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=ttyAMA0,115200 $(othbootargs);" \ - CONFIG_BOOTCOMMAND - - -#define CONFIG_ENV_SIZE 0x02000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -/* Miscellaneous configurable options */ -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_MISC_INIT_R -#define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_STOP_STR " " -#define CONFIG_AUTOBOOT_PROMPT \ - "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay - -#define CONFIG_SYS_MEMTEST_START 0x00800000 -#define CONFIG_SYS_MEMTEST_END 0x04000000 -#define CONFIG_SYS_MALLOC_LEN (1024*1024) -#define CONFIG_IDENT_STRING "-SPEAr" -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "u-boot> " -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LOAD_ADDR 0x00800000 -#define CONFIG_SYS_CONSOLE_INFO_QUIET - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define PHYS_SDRAM_1_MAXSIZE 0x40000000 - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -#endif diff --git a/include/configs/spear.h b/include/configs/spear.h new file mode 100644 index 0000000..3a73811 --- /dev/null +++ b/include/configs/spear.h @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SPEAR_H +#define __CONFIG_SPEAR_H + +#include <config_cmd_default.h> + +#define CONFIG_PLAT_SPEAR + +#define CONFIG_SYS_TEXT_BASE 0x00700000 +#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 + +/* Timer, HZ specific defines */ +#define CONFIG_SYS_HZ 1000 + +/* Generic configuration for Designware Ethernet */ +#if defined(CONFIG_DESIGNWARE_ETH) || defined(CONFIG_MACB) + #define CONFIG_MII + #define CONFIG_NET_MULTI + #define CONFIG_PHY_GIGE + + #define CONFIG_CMD_NET + #define CONFIG_CMD_MII + #define CONFIG_CMD_PING + #define CONFIG_CMD_DHCP +#else + #undef CONFIG_CMD_NET + #undef CONFIG_CMD_NFS +#endif + +/* Generic configuration for USBD driver */ +#if defined(CONFIG_DW_UDC) + #define CONFIG_USB_DEVICE + #define CONFIG_USBD_HS + #define CONFIG_USB_TTY + +#ifndef CONFIG_USBD_PRODUCT_NAME + #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" +#endif +#ifndef CONFIG_USBD_MANUFACTURER + #define CONFIG_USBD_MANUFACTURER "ST Microelectronics" +#endif + +#endif /* CONFIG_DW_UDC */ + +#if !defined(CONFIG_BOARD_EXTRA_ENV) + #define CONFIG_BOARD_EXTRA_ENV "" +#endif +#if !defined(CONFIG_SOC_EXTRA_ENV) + #define CONFIG_SOC_EXTRA_ENV "" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_BOARD_EXTRA_ENV \ + CONFIG_SOC_EXTRA_ENV \ + "usbtty=cdc_acm\0unlock=yes\0" \ + "autoload=n\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):" \ + "$(netmask):$(hostname):$(netdev):off " \ + "console=ttyAMA0,115200 $(othbootargs)\0" + +/* Generic configuration for I2C driver */ +#if defined(CONFIG_DW_I2C) + #define CONFIG_HARD_I2C + #define CONFIG_CMD_I2C +#endif + +/* Generic configuration for ST SMI driver */ +#if defined(CONFIG_ST_SMI) + #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) + #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) +#endif + +/* Generic configuration for CFI driver */ +#if defined(CONFIG_FLASH_CFI_DRIVER) + #define CONFIG_SYS_FLASH_CFI + #define CONFIG_SYS_FLASH_QUIET_TEST + #define CONFIG_SYS_FLASH_PROTECTION +#endif + +/* Generic configuration for AMBA PL011 driver */ +#if defined(CONFIG_PL011_SERIAL) + #define CONFIG_BAUDRATE 115200 + #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ + 57600, 115200 } +#endif + +/* Generic configuration for FSMC NAND driver */ +#if defined(CONFIG_NAND_FSMC) + #define CONFIG_SYS_NAND_SELF_INIT + #define CONFIG_MTD_DEVICE + #define CONFIG_MTD_PARTITIONS + #define CONFIG_SYS_MAX_NAND_DEVICE 1 + #define CONFIG_SYS_NAND_ONFI_DETECTION + #define CONFIG_SYS_NAND_QUIET_TEST + + #define CONFIG_CMD_NAND +#endif + +/* Generic configuration for environment */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CMD_GREPENV + +#if !defined(CONFIG_ENV_SIZE) + #define CONFIG_ENV_SIZE 0x02000 +#endif + +#if defined(CONFIG_SPEAR_USBTTY) + #undef CONFIG_ENV_IS_IN_FLASH + #undef CONFIG_ENV_IS_IN_NAND + #define CONFIG_ENV_IS_NOWHERE + #define CONFIG_PREBOOT "setenv stdout usbtty;" \ + "setenv stderr usbtty;" \ + "setenv stdin usbtty" +#endif + +#if defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_BOOTDELAY -1 +#else + #define CONFIG_BOOTDELAY 1 +#endif + +#define CONFIG_NFSBOOTCOMMAND \ + "bootp; run nfsargs; run loados; run loaddtb; " \ + "bootm 0x900000 - 0x800000" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=ttyAMA0,115200 $(othbootargs);" \ + CONFIG_BOOTCOMMAND + +/* Miscellaneous configurable options */ +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_CPUINFO + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMDLINE_TAG + +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_PROMPT \ + "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x04000000 +#define CONFIG_SYS_MALLOC_LEN (1024*1024) +#define CONFIG_IDENT_STRING "-SPEAr" +#define CONFIG_SYS_LONGHELP + +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_PROMPT "u-boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LOAD_ADDR 0x00900000 +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_SYS_64BIT_VSPRINTF + +#define CONFIG_SYS_FLASH_EMPTY_INFO + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define SDRAM_MAX_SIZE 0x40000000 + +#endif /* __CONFIG_SPEAR_H */ diff --git a/include/configs/spear300-evb.h b/include/configs/spear300-evb.h new file mode 100644 index 0000000..cb6d764 --- /dev/null +++ b/include/configs/spear300-evb.h @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_usbtty) + #define CONFIG_SPEAR_USBTTY +#endif + +#if defined(CONFIG_nand) + #define CONFIG_ENV_IS_IN_NAND +#else + #define CONFIG_ENV_IS_IN_FLASH +#endif + +#define CONFIG_MACH_SPEAR300EVB +#define CONFIG_MACH_TYPE MACH_TYPE_SPEAR300 + +/* Designware Ethernet configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DESIGNWARE_ETH + #define CONFIG_DW_SEARCH_PHY + #define CONFIG_DW0_PHY 1 + #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ + #define CONFIG_DW_AUTONEG +#endif + +/* Designware I2C configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_I2C + #define CONFIG_I2C_CHIPADDRESS 0x50 + #define CONFIG_SYS_I2C_SPEED 400000 + #define CONFIG_SYS_I2C_SLAVE 0x02 +#endif + +/* AMBA PL011 configurations */ +#define CONFIG_PL011_SERIAL +#define CONFIG_CONS_INDEX 0 + +/* Designware UDC configurations */ +#if defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_UDC +#endif + +/* FSMC NAND configurations */ +#define CONFIG_NAND_FSMC +#define CONFIG_SYS_FSMC_NAND_8BIT + +/* ST SMI (Serial flash) configurations */ +#define CONFIG_ST_SMI + +#if defined(CONFIG_ENV_IS_IN_FLASH) + /* Environment is in serial NOR flash */ + #define CONFIG_ENV_ADDR 0xF8060000 + #define CONFIG_ENV_SECT_SIZE 0x00010000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8070000" + +#elif defined(CONFIG_ENV_IS_IN_NAND) + /* Environment is in NAND */ + #define CONFIG_ENV_OFFSET 0x00060000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock7 " + + #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x80000 0x4C0000; " \ + "bootm 0x1600000" +#endif + +#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ + "root="CONFIG_SPEAR_ROOTFSBLK \ + "rootfstype=jffs2" + +#define CONFIG_BOARD_EXTRA_ENV "" \ + "loados=tftpboot 0x900000 $(rootpath)/spear3xx_uImage\0" \ + "loaddtb=tftpboot 0x800000 $(rootpath)/spear300-evb.dtb\0" + +#include <configs/spear300.h> +#endif /* __CONFIG_H */ diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear300.h similarity index 54% rename from include/configs/spear6xx_evb.h rename to include/configs/spear300.h index 31b8725..1f09f71 100644 --- a/include/configs/spear6xx_evb.h +++ b/include/configs/spear300.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2009 + * (C) Copyright 2012 * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com * * See file CREDITS for list of people who contributed to this @@ -21,39 +21,22 @@ * MA 02111-1307 USA */

-#ifndef __CONFIG_H -#define __CONFIG_H +#ifndef __CONFIG_SPEAR300_H +#define __CONFIG_SPEAR300_H

-/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SPEAR600 +#define CONFIG_SOC_SPEAR300

-#if defined(CONFIG_usbtty) -#define CONFIG_SPEAR_USBTTY +/* PL011 configs */ +#if defined(CONFIG_PL011_SERIAL) +#define CONFIG_SYS_SERIAL0 0xD0000000 +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} #endif

-#if defined(CONFIG_nand) -#define CONFIG_ENV_IS_IN_NAND -#else -#define CONFIG_ENV_IS_IN_FLASH +/* FSMC NAND configs */ +#if defined(CONFIG_NAND_FSMC) +#define CONFIG_SYS_NAND_BASE 0x80000000 #endif

-#include <configs/spear-common.h> - -/* Serial Configuration (PL011) */ -#define CONFIG_SYS_SERIAL0 0xD0000000 -#define CONFIG_SYS_SERIAL1 0xD0080000 -#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1 } - -/* NAND flash configuration */ -#define CONFIG_SYS_FSMC_NAND_SP -#define CONFIG_SYS_FSMC_NAND_8BIT -#define CONFIG_SYS_NAND_BASE 0xD2000000 - -/* Environment Settings */ -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY - -#endif /* __CONFIG_H */ +#include <configs/spear3xx.h> +#endif /* __CONFIG_SPEAR300_H */ diff --git a/include/configs/spear310-evb.h b/include/configs/spear310-evb.h new file mode 100644 index 0000000..cb73ba7 --- /dev/null +++ b/include/configs/spear310-evb.h @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_usbtty) + #define CONFIG_SPEAR_USBTTY +#endif + +#if defined(CONFIG_pnor) + #define CONFIG_FLASH_PNOR +#endif + +#if defined(CONFIG_nand) + #define CONFIG_ENV_IS_IN_NAND +#else + #define CONFIG_ENV_IS_IN_FLASH +#endif + +#define CONFIG_MACH_SPEAR310EVB +#define CONFIG_MACH_TYPE MACH_TYPE_SPEAR310 + +/* Designware Ethernet configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DESIGNWARE_ETH + #define CONFIG_DW_SEARCH_PHY + #define CONFIG_DW0_PHY 1 + #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ + #define CONFIG_DW_AUTONEG +#endif + +/* MACB configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_MACB + #define CONFIG_MACB0_PHY 0x01 + #define CONFIG_MACB1_PHY 0x03 + #define CONFIG_MACB2_PHY 0x05 + #define CONFIG_MACB3_PHY 0x07 +#endif + +/* Designware I2C configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_I2C + #define CONFIG_I2C_CHIPADDRESS 0x50 + #define CONFIG_SYS_I2C_SPEED 400000 + #define CONFIG_SYS_I2C_SLAVE 0x02 +#endif + +/* AMBA PL011 configurations */ +#define CONFIG_PL011_SERIAL +#define CONFIG_CONS_INDEX 0 + +/* Designware UDC configurations */ +#if defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_UDC +#endif + +/* FSMC NAND configurations */ +#define CONFIG_NAND_FSMC +#define CONFIG_SYS_FSMC_NAND_8BIT + +/* Flash configurations */ +#if defined(CONFIG_FLASH_PNOR) + #define CONFIG_ST_EMI +#else + #define CONFIG_ST_SMI +#endif + +/* CFI Driver configurations */ +#if defined(CONFIG_FLASH_PNOR) + #define CONFIG_FLASH_CFI_DRIVER + #define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) +#endif + +/* Environment Variable configs */ +#if defined(CONFIG_ENV_IS_IN_FLASH) + #if defined(CONFIG_FLASH_PNOR) + /* Environment is in parallel NOR flash */ + #define CONFIG_ENV_ADDR 0xF8050000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8060000" + + #else + /* Environment is in serial NOR flash */ + #define CONFIG_ENV_ADDR 0xF8060000 + #define CONFIG_ENV_SECT_SIZE 0x00010000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8050000" + #endif +#elif defined(CONFIG_ENV_IS_IN_NAND) + /* Environment is in NAND */ + #define CONFIG_ENV_OFFSET 0x00060000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock7 " + + #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x200000 0x4C0000; " \ + "bootm 0x1600000" +#endif + +#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ + "root="CONFIG_SPEAR_ROOTFSBLK \ + "rootfstype=jffs2" + +#define CONFIG_BOARD_EXTRA_ENV "" \ + "loados=tftpboot 0x900000 $(rootpath)/spear3xx_uImage\0" \ + "loaddtb=tftpboot 0x800000 $(rootpath)/spear310-evb.dtb\0" + +#include <configs/spear310.h> +#endif /* __CONFIG_H */ diff --git a/include/configs/spear310.h b/include/configs/spear310.h new file mode 100644 index 0000000..30984a2 --- /dev/null +++ b/include/configs/spear310.h @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SPEAR310_H +#define __CONFIG_SPEAR310_H + +#define CONFIG_SOC_SPEAR310 + +/* PL011 configs */ +#if defined(CONFIG_PL011_SERIAL) + #define CONFIG_SYS_SERIAL0 0xD0000000 + #define CONFIG_SYS_SERIAL1 0xB2000000 + #define CONFIG_SYS_SERIAL2 0xB2080000 + #define CONFIG_SYS_SERIAL3 0xB2100000 + #define CONFIG_SYS_SERIAL4 0xB2180000 + #define CONFIG_SYS_SERIAL5 0xB2200000 + + #if (CONFIG_CONS_INDEX) + #define CONFIG_PL011_CLOCK (83 * 1000 * 1000) + #else + #define CONFIG_PL011_CLOCK (48 * 1000 * 1000) + #endif + + #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2, \ + (void *)CONFIG_SYS_SERIAL3, \ + (void *)CONFIG_SYS_SERIAL4, \ + (void *)CONFIG_SYS_SERIAL5 } +#endif + +/* CFI driver (Parallel flash) configs */ +#if defined(CONFIG_FLASH_CFI_DRIVER) + #define CONFIG_SYS_FLASH_PROTECTION + #define CONFIG_SYS_FLASH_BASE 0x50000000 + #define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 + #define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 + #define CONFIG_SYS_CS3_FLASH_BASE 0x80000000 + #define CONFIG_SYS_CS4_FLASH_BASE 0x90000000 + #define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000 + #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE, \ + CONFIG_SYS_CS2_FLASH_BASE, \ + CONFIG_SYS_CS3_FLASH_BASE, \ + CONFIG_SYS_CS4_FLASH_BASE, \ + CONFIG_SYS_CS5_FLASH_BASE } + #define CONFIG_SYS_MAX_FLASH_BANKS 6 +#endif + +/* FSMC NAND configs */ +#if defined(CONFIG_NAND_FSMC) + #define CONFIG_SYS_NAND_BASE 0x40000000 +#endif + +#include <configs/spear3xx.h> +#endif /* __CONFIG_SPEAR310_H */ diff --git a/include/configs/spear320-evb.h b/include/configs/spear320-evb.h new file mode 100644 index 0000000..a054970 --- /dev/null +++ b/include/configs/spear320-evb.h @@ -0,0 +1,128 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_usbtty) + #define CONFIG_SPEAR_USBTTY +#endif + +#if defined(CONFIG_pnor) + #define CONFIG_FLASH_PNOR +#endif + +#if defined(CONFIG_nand) + #define CONFIG_ENV_IS_IN_NAND +#else + #define CONFIG_ENV_IS_IN_FLASH +#endif + +#define CONFIG_MACH_SPEAR320EVB +#define CONFIG_MACH_TYPE MACH_TYPE_SPEAR320 + +/* Designware Ethernet configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DESIGNWARE_ETH + #define CONFIG_DW_SEARCH_PHY + #define CONFIG_DW0_PHY 1 + #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ + #define CONFIG_DW_AUTONEG +#endif + +/* MACB configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_MACB + #define CONFIG_MACB0_PHY 0x01 + #define CONFIG_MACB1_PHY 0x02 +#endif + +/* Designware I2C configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_I2C + #define CONFIG_I2C_CHIPADDRESS 0x50 + #define CONFIG_SYS_I2C_SPEED 400000 + #define CONFIG_SYS_I2C_SLAVE 0x02 +#endif + +/* AMBA PL011 configurations */ +#define CONFIG_PL011_SERIAL +#define CONFIG_CONS_INDEX 0 + +/* Designware UDC configurations */ +#if defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_UDC +#endif + +/* FSMC NAND configurations */ +#define CONFIG_NAND_FSMC +#define CONFIG_SYS_FSMC_NAND_8BIT + +/* Flash configurations */ +#if defined(CONFIG_FLASH_PNOR) + #define CONFIG_ST_EMI +#else + #define CONFIG_ST_SMI +#endif + +/* CFI Driver configurations */ +#if defined(CONFIG_FLASH_PNOR) + #define CONFIG_FLASH_CFI_DRIVER + #define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) +#endif + +/* Environment Variable configs */ +#if defined(CONFIG_ENV_IS_IN_FLASH) + #if defined(CONFIG_FLASH_PNOR) + /* Environment is in parallel NOR flash */ + #define CONFIG_ENV_ADDR 0xF8040000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8050000" + + #else + /* Environment is in serial NOR flash */ + #define CONFIG_ENV_ADDR 0xF8060000 + #define CONFIG_ENV_SECT_SIZE 0x00010000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8070000" + #endif +#elif defined(CONFIG_ENV_IS_IN_NAND) + /* Environment is in NAND */ + #define CONFIG_ENV_OFFSET 0x00060000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock7 " + + #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x200000 0x4C0000; " \ + "bootm 0x1600000" +#endif + +#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ + "root="CONFIG_SPEAR_ROOTFSBLK \ + "rootfstype=jffs2" + +#define CONFIG_BOARD_EXTRA_ENV "" \ + "loados=tftpboot 0x900000 $(rootpath)/spear3xx_uImage\0" \ + "loaddtb=tftpboot 0x800000 $(rootpath)/spear320-evb.dtb\0" + +#include <configs/spear320.h> +#endif /* __CONFIG_H */ diff --git a/include/configs/spear320.h b/include/configs/spear320.h new file mode 100644 index 0000000..bafcb9a --- /dev/null +++ b/include/configs/spear320.h @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SPEAR320_H +#define __CONFIG_SPEAR320_H + +#define CONFIG_SOC_SPEAR320 + +/* PL011 configs */ +#if defined(CONFIG_PL011_SERIAL) + #define CONFIG_SYS_SERIAL0 0xD0000000 + #define CONFIG_SYS_SERIAL1 0xA3000000 + #define CONFIG_SYS_SERIAL2 0xA4000000 + + #if (CONFIG_CONS_INDEX) + #define CONFIG_PL011_CLOCK (83 * 1000 * 1000) + #else + #define CONFIG_PL011_CLOCK (48 * 1000 * 1000) + #endif + + #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2 } +#endif + +/* CFI driver (Parallel flash) configs */ +#if defined(CONFIG_FLASH_CFI_DRIVER) + #define CONFIG_SYS_FLASH_PROTECTION + #define CONFIG_SYS_FLASH_BASE 0x44000000 + #define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 + #define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 + #define CONFIG_SYS_CS3_FLASH_BASE 0x47000000 + #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE, \ + CONFIG_SYS_CS2_FLASH_BASE, \ + CONFIG_SYS_CS3_FLASH_BASE } + #define CONFIG_SYS_MAX_FLASH_BANKS 4 +#endif + +/* FSMC NAND configs */ +#if defined(CONFIG_NAND_FSMC) + #define CONFIG_SYS_NAND_BASE 0x50000000 +#endif + +#include <configs/spear3xx.h> +#endif /* __CONFIG_SPEAR320_H */ diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h new file mode 100644 index 0000000..e89e9c2 --- /dev/null +++ b/include/configs/spear3xx.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SPEAR3XX_H +#define __CONFIG_SPEAR3XX_H + +#define CONFIG_ARCH_SPEAR3XX + +/* Designware Ethernet configurations */ +#if defined(CONFIG_DESIGNWARE_ETH) + #define CONFIG_DW_ALTDESCRIPTOR +#endif + +/* ST SMI (Serial flash) configurations */ +#if defined(CONFIG_ST_SMI) + #define CONFIG_SYS_MAX_FLASH_BANKS 2 + #define CONFIG_SYS_FLASH_BASE 0xF8000000 + #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 + #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 + #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE} + #define CONFIG_SYS_MAX_FLASH_SECT 128 +#endif + +/* Internal memory address for spear3xx */ +#define CONFIG_SYS_INIT_SP_ADDR (0xD2800000 + 0x2000 - \ + GENERATED_GBL_DATA_SIZE) + +#include <configs/spear.h> +#endif /* __CONFIG_SPEAR3XX_H */ diff --git a/include/configs/spear3xx_evb.h b/include/configs/spear3xx_evb.h deleted file mode 100644 index 3cd56dc..0000000 --- a/include/configs/spear3xx_evb.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#if defined(CONFIG_spear300) -#define CONFIG_SPEAR3XX -#define CONFIG_SPEAR300 -#elif defined(CONFIG_spear310) -#define CONFIG_SPEAR3XX -#define CONFIG_SPEAR310 -#elif defined(CONFIG_spear320) -#define CONFIG_SPEAR3XX -#define CONFIG_SPEAR320 -#endif - -#if defined(CONFIG_usbtty) -#define CONFIG_SPEAR_USBTTY -#endif - -#if defined(CONFIG_nand) -#define CONFIG_ENV_IS_IN_NAND -#else -#define CONFIG_ENV_IS_IN_FLASH -#endif - -#include <configs/spear-common.h> - -/* Ethernet driver configuration */ -#define CONFIG_DW_ALTDESCRIPTOR - -#if defined(CONFIG_SPEAR310) -#define CONFIG_MACB -#define CONFIG_MACB0_PHY 0x01 -#define CONFIG_MACB1_PHY 0x03 -#define CONFIG_MACB2_PHY 0x05 -#define CONFIG_MACB3_PHY 0x07 - -#elif defined(CONFIG_SPEAR320) -#define CONFIG_MACB -#define CONFIG_MACB0_PHY 0x01 - -#endif - -/* Serial Configuration (PL011) */ -#define CONFIG_SYS_SERIAL0 0xD0000000 - -#if defined(CONFIG_SPEAR300) -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} - -#elif defined(CONFIG_SPEAR310) - -#if (CONFIG_CONS_INDEX) -#undef CONFIG_PL011_CLOCK -#define CONFIG_PL011_CLOCK (83 * 1000 * 1000) -#endif - -#define CONFIG_SYS_SERIAL1 0xB2000000 -#define CONFIG_SYS_SERIAL2 0xB2080000 -#define CONFIG_SYS_SERIAL3 0xB2100000 -#define CONFIG_SYS_SERIAL4 0xB2180000 -#define CONFIG_SYS_SERIAL5 0xB2200000 -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1, \ - (void *)CONFIG_SYS_SERIAL2, \ - (void *)CONFIG_SYS_SERIAL3, \ - (void *)CONFIG_SYS_SERIAL4, \ - (void *)CONFIG_SYS_SERIAL5 } -#elif defined(CONFIG_SPEAR320) - -#if (CONFIG_CONS_INDEX) -#undef CONFIG_PL011_CLOCK -#define CONFIG_PL011_CLOCK (83 * 1000 * 1000) -#endif - -#define CONFIG_SYS_SERIAL1 0xA3000000 -#define CONFIG_SYS_SERIAL2 0xA4000000 -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1, \ - (void *)CONFIG_SYS_SERIAL2 } -#endif - -#if defined(CONFIG_SPEAR_EMI) - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER - -#if defined(CONFIG_SPEAR310) -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_BASE 0x50000000 -#define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 -#define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 -#define CONFIG_SYS_CS3_FLASH_BASE 0x80000000 -#define CONFIG_SYS_CS4_FLASH_BASE 0x90000000 -#define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ - CONFIG_SYS_CS1_FLASH_BASE, \ - CONFIG_SYS_CS2_FLASH_BASE, \ - CONFIG_SYS_CS3_FLASH_BASE, \ - CONFIG_SYS_CS4_FLASH_BASE, \ - CONFIG_SYS_CS5_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_BANKS 6 - -#elif defined(CONFIG_SPEAR320) -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_BASE 0x44000000 -#define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 -#define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 -#define CONFIG_SYS_CS3_FLASH_BASE 0x47000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ - CONFIG_SYS_CS1_FLASH_BASE, \ - CONFIG_SYS_CS2_FLASH_BASE, \ - CONFIG_SYS_CS3_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_BANKS 4 - -#endif - -#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) -#define CONFIG_SYS_FLASH_QUIET_TEST - -#endif - -/* NAND flash configuration */ -#define CONFIG_SYS_FSMC_NAND_SP -#define CONFIG_SYS_FSMC_NAND_8BIT - -#if defined(CONFIG_SPEAR300) -#define CONFIG_SYS_NAND_BASE 0x80000000 - -#elif defined(CONFIG_SPEAR310) -#define CONFIG_SYS_NAND_BASE 0x40000000 - -#elif defined(CONFIG_SPEAR320) -#define CONFIG_SYS_NAND_BASE 0x50000000 - -#endif - -/* Environment Settings */ -#if defined(CONFIG_SPEAR300) -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY - -#elif defined(CONFIG_SPEAR310) || defined(CONFIG_SPEAR320) -#define CONFIG_EXTRA_ENV_UNLOCK "unlock=yes\0" -#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY \ - CONFIG_EXTRA_ENV_UNLOCK -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/spear600-evb.h b/include/configs/spear600-evb.h new file mode 100644 index 0000000..5fe326a --- /dev/null +++ b/include/configs/spear600-evb.h @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#if defined(CONFIG_usbtty) + #define CONFIG_SPEAR_USBTTY +#endif + +#if defined(CONFIG_nand) + #define CONFIG_ENV_IS_IN_NAND +#else + #define CONFIG_ENV_IS_IN_FLASH +#endif + +#define CONFIG_MACH_SPEAR600EVB +#define CONFIG_MACH_TYPE MACH_TYPE_SPEAR600 + +/* Designware Ethernet configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DESIGNWARE_ETH + #define CONFIG_DW_SEARCH_PHY + #define CONFIG_DW0_PHY 1 + #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ + #define CONFIG_DW_AUTONEG +#endif + +/* Designware I2C configurations */ +#if !defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_I2C + #define CONFIG_I2C_CHIPADDRESS 0x50 + #define CONFIG_SYS_I2C_SPEED 400000 + #define CONFIG_SYS_I2C_SLAVE 0x02 +#endif + +/* AMBA PL011 configurations */ +#define CONFIG_PL011_SERIAL +#define CONFIG_CONS_INDEX 0 + +/* Designware UDC configurations */ +#if defined(CONFIG_SPEAR_USBTTY) + #define CONFIG_DW_UDC +#endif + +/* FSMC NAND configurations */ +#define CONFIG_NAND_FSMC +#define CONFIG_SYS_FSMC_NAND_8BIT + +/* ST SMI (Serial flash) configurations */ +#define CONFIG_ST_SMI + +#if defined(CONFIG_ENV_IS_IN_FLASH) + /* Environment is in serial NOR flash */ + #define CONFIG_ENV_ADDR 0xF8060000 + #define CONFIG_ENV_SECT_SIZE 0x00010000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock3 " + #define CONFIG_BOOTCOMMAND "bootm 0xF8060000" + +#elif defined(CONFIG_ENV_IS_IN_NAND) + /* Environment is in NAND */ + #define CONFIG_ENV_OFFSET 0x00060000 + #define CONFIG_SPEAR_ROOTFSBLK "/dev/mtdblock7 " + + #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x80000 0x4C0000; " \ + "bootm 0x1600000" +#endif + +#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \ + "root="CONFIG_SPEAR_ROOTFSBLK \ + "rootfstype=jffs2" + +#define CONFIG_BOARD_EXTRA_ENV "" \ + "loados=tftpboot 0x900000 $(rootpath)/spear600_uImage\0" \ + "loaddtb=tftpboot 0x800000 $(rootpath)/spear600-evb.dtb\0" + +#include <configs/spear600.h> +#endif diff --git a/include/configs/spear600.h b/include/configs/spear600.h new file mode 100644 index 0000000..e64f26d --- /dev/null +++ b/include/configs/spear600.h @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SPEAR600_H +#define __CONFIG_SPEAR600_H + +#define CONFIG_SOC_SPEAR600 +#define CONFIG_ARCH_SPEAR6XX + +/* PL011 configs */ +#if defined(CONFIG_PL011_SERIAL) +#define CONFIG_SYS_SERIAL0 0xD0000000 +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} +#endif + +/* FSMC NAND configs */ +#if defined(CONFIG_NAND_FSMC) +#define CONFIG_SYS_NAND_BASE 0xD2000000 +#endif + +/* ST SMI (Serial flash) configurations */ +#if defined(CONFIG_ST_SMI) + #define CONFIG_SYS_MAX_FLASH_BANKS 2 + #define CONFIG_SYS_FLASH_BASE 0xF8000000 + #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 + #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 + #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE} + #define CONFIG_SYS_MAX_FLASH_SECT 128 +#endif + +/* Internal memory address for spear3xx */ +#define CONFIG_SYS_INIT_SP_ADDR (0xD2800000 + 0x2000 - \ + GENERATED_GBL_DATA_SIZE) + +#include <configs/spear.h> +#endif /* __CONFIG_SPEAR600_H */ diff --git a/include/configs/x600.h b/include/configs/x600.h index 3082aaa..e15e36b 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -30,7 +30,7 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SPEAR600 /* SPEAr600 SoC */ +#define CONFIG_SOC_SPEAR600 /* SPEAr600 SoC */ #define CONFIG_X600 /* on X600 board */

#include <asm/arch/hardware.h>

This patch targets to cleanup the board area for spear. The modifications in this patch include

- Move spear board files to board/st/spear/ - Place specific init routines in respective macro Place board_nand_init and board_eth_init in respective CONFIG_CMD_ macros - Remove initialization of bi_arch_number bi_arch_number gets initialized via CONFIG_MACH_TYPE through the uboot framework itself obviating the need of this code - Remove misc_init_r routine - Remove routine dram_init_banksize

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- board/spear/common/Makefile | 50 ---------------------- board/spear/spear300/Makefile | 45 ------------------- board/spear/spear320/Makefile | 45 ------------------- board/spear/x600/Makefile | 47 -------------------- board/{spear/spear600 => st/spear}/Makefile | 16 ++++++- .../spear310/Makefile => st/spear/config.mk} | 27 ++---------- .../spear300/spear300.c => st/spear/spear300evb.c} | 12 +++--- .../spear310/spear310.c => st/spear/spear310evb.c} | 12 +++--- .../spear320/spear320.c => st/spear/spear320plc.c} | 11 +++-- .../spear600/spear600.c => st/spear/spear600evb.c} | 13 +++--- .../common/spr_misc.c => st/spear/spear_common.c} | 34 ++------------- .../spear/spear_lowlevel_init.S} | 0 board/{spear/x600 => st/spear}/x600.c | 0 board/{spear/x600/fpga.c => st/spear/x600fpga.c} | 0 board/{spear/x600/fpga.h => st/spear/x600fpga.h} | 0 boards.cfg | 28 ++++++------ 16 files changed, 61 insertions(+), 279 deletions(-) delete mode 100644 board/spear/common/Makefile delete mode 100644 board/spear/spear300/Makefile delete mode 100644 board/spear/spear320/Makefile delete mode 100644 board/spear/x600/Makefile rename board/{spear/spear600 => st/spear}/Makefile (76%) rename board/{spear/spear310/Makefile => st/spear/config.mk} (56%) rename board/{spear/spear300/spear300.c => st/spear/spear300evb.c} (94%) rename board/{spear/spear310/spear310.c => st/spear/spear310evb.c} (95%) rename board/{spear/spear320/spear320.c => st/spear/spear320plc.c} (95%) rename board/{spear/spear600/spear600.c => st/spear/spear600evb.c} (94%) rename board/{spear/common/spr_misc.c => st/spear/spear_common.c} (89%) rename board/{spear/common/spr_lowlevel_init.S => st/spear/spear_lowlevel_init.S} (100%) rename board/{spear/x600 => st/spear}/x600.c (100%) rename board/{spear/x600/fpga.c => st/spear/x600fpga.c} (100%) rename board/{spear/x600/fpga.h => st/spear/x600fpga.h} (100%)

diff --git a/board/spear/common/Makefile b/board/spear/common/Makefile deleted file mode 100644 index 5c66c3f..0000000 --- a/board/spear/common/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)board/$(VENDOR)/common) -endif - -LIB = $(obj)lib$(VENDOR).o - -ifndef CONFIG_SPL_BUILD -COBJS := spr_misc.o -SOBJS := spr_lowlevel_init.o -endif - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### -# This is for $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/spear/spear300/Makefile b/board/spear/spear300/Makefile deleted file mode 100644 index aa10749..0000000 --- a/board/spear/spear300/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := spear300.o -SOBJS := - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/spear/spear320/Makefile b/board/spear/spear320/Makefile deleted file mode 100644 index 68dd734..0000000 --- a/board/spear/spear320/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := spear320.o -SOBJS := - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/spear/x600/Makefile b/board/spear/x600/Makefile deleted file mode 100644 index 8c4e7e2..0000000 --- a/board/spear/x600/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -ifndef CONFIG_SPL_BUILD -COBJS := fpga.o $(BOARD).o -endif -SOBJS := - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/spear/spear600/Makefile b/board/st/spear/Makefile similarity index 76% rename from board/spear/spear600/Makefile rename to board/st/spear/Makefile index ee66fc6..f925c19 100644 --- a/board/spear/spear600/Makefile +++ b/board/st/spear/Makefile @@ -25,11 +25,23 @@ include $(TOPDIR)/config.mk

LIB = $(obj)lib$(BOARD).o

+SOBJS-y := +COBJS-y := + ifndef CONFIG_SPL_BUILD -COBJS := spear600.o +SOBJS-y += spear_lowlevel_init.o +COBJS-y += spear_common.o +COBJS-$(CONFIG_MACH_X600) += x600.o +COBJS-$(CONFIG_MACH_X600) += x600fpga.o endif -SOBJS :=

+COBJS-$(CONFIG_MACH_SPEAR300EVB) += spear300evb.o +COBJS-$(CONFIG_MACH_SPEAR310EVB) += spear310evb.o +COBJS-$(CONFIG_MACH_SPEAR320EVB) += spear320plc.o +COBJS-$(CONFIG_MACH_SPEAR600EVB) += spear600evb.o + +COBJS := $(sort $(COBJS-y)) +SOBJS := $(sort $(SOBJS-y)) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/spear/spear310/Makefile b/board/st/spear/config.mk similarity index 56% rename from board/spear/spear310/Makefile rename to board/st/spear/config.mk index c5b6327..9533c5f 100644 --- a/board/spear/spear310/Makefile +++ b/board/st/spear/config.mk @@ -1,6 +1,6 @@ # -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# Copyright (C) 2012 ST Microelectronics +# Vipin Kumar vipin.kumar@st.com # # See file CREDITS for list of people who contributed to this # project. @@ -21,25 +21,4 @@ # MA 02111-1307 USA #

-include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := spear310.o -SOBJS := - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### +ALL-y += $(obj)u-boot.img diff --git a/board/spear/spear300/spear300.c b/board/st/spear/spear300evb.c similarity index 94% rename from board/spear/spear300/spear300.c rename to board/st/spear/spear300evb.c index 27a1697..2c7ccd6 100644 --- a/board/spear/spear300/spear300.c +++ b/board/st/spear/spear300evb.c @@ -31,20 +31,17 @@ #include <asm/arch/generic.h> #include <asm/arch/misc.h>

+#if defined(CONFIG_CMD_NAND) static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +#endif

-int board_init(void) -{ - return spear_board_init(MACH_TYPE_SPEAR300); -} - +#if defined(CONFIG_CMD_NAND) /* * board_nand_init - Board specific NAND initialization * @nand: mtd private chip structure * * Called by nand_init_chip to initialize the board specific functions */ - void board_nand_init() { struct misc_regs *const misc_regs_p = @@ -62,7 +59,9 @@ void board_nand_init() #endif return; } +#endif

+#if defined(CONFIG_CMD_NET) int board_eth_init(bd_t *bis) { int ret = 0; @@ -75,3 +74,4 @@ int board_eth_init(bd_t *bis) #endif return ret; } +#endif diff --git a/board/spear/spear310/spear310.c b/board/st/spear/spear310evb.c similarity index 95% rename from board/spear/spear310/spear310.c rename to board/st/spear/spear310evb.c index a1c45ae..4ed8f01 100644 --- a/board/spear/spear310/spear310.c +++ b/board/st/spear/spear310evb.c @@ -32,20 +32,17 @@ #include <asm/arch/generic.h> #include <asm/arch/misc.h>

+#if defined(CONFIG_CMD_NAND) static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +#endif

-int board_init(void) -{ - return spear_board_init(MACH_TYPE_SPEAR310); -} - +#if defined(CONFIG_CMD_NAND) /* * board_nand_init - Board specific NAND initialization * @nand: mtd private chip structure * * Called by nand_init_chip to initialize the board specific functions */ - void board_nand_init() { struct misc_regs *const misc_regs_p = @@ -63,7 +60,9 @@ void board_nand_init() #endif return; } +#endif

+#if defined(CONFIG_CMD_NET) int board_eth_init(bd_t *bis) { int ret = 0; @@ -93,3 +92,4 @@ int board_eth_init(bd_t *bis) #endif return ret; } +#endif diff --git a/board/spear/spear320/spear320.c b/board/st/spear/spear320plc.c similarity index 95% rename from board/spear/spear320/spear320.c rename to board/st/spear/spear320plc.c index 82674f3..a463998 100644 --- a/board/spear/spear320/spear320.c +++ b/board/st/spear/spear320plc.c @@ -35,7 +35,9 @@ #define PLGPIO_SEL_36 0xb3000028 #define PLGPIO_IO_36 0xb3000038

+#if defined(CONFIG_CMD_NAND) static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +#endif

static void spear_phy_reset(void) { @@ -46,23 +48,22 @@ static void spear_phy_reset(void) int board_init(void) { spear_phy_reset(); - return spear_board_init(MACH_TYPE_SPEAR320); + return 0; }

+#if defined(CONFIG_CMD_NAND) /* * board_nand_init - Board specific NAND initialization * @nand: mtd private chip structure * * Called by nand_init_chip to initialize the board specific functions */ - void board_nand_init() { struct misc_regs *const misc_regs_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; struct nand_chip *nand = &nand_chip[0];

-#if defined(CONFIG_NAND_FSMC) if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == MISC_SOCCFG30) || ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == @@ -70,11 +71,12 @@ void board_nand_init()

fsmc_nand_init(nand); } -#endif

return; } +#endif

+#if defined(CONFIG_CMD_NET) int board_eth_init(bd_t *bis) { int ret = 0; @@ -92,3 +94,4 @@ int board_eth_init(bd_t *bis) #endif return ret; } +#endif diff --git a/board/spear/spear600/spear600.c b/board/st/spear/spear600evb.c similarity index 94% rename from board/spear/spear600/spear600.c rename to board/st/spear/spear600evb.c index b4f013f..61cea50 100644 --- a/board/spear/spear600/spear600.c +++ b/board/st/spear/spear600evb.c @@ -31,20 +31,17 @@ #include <asm/arch/generic.h> #include <asm/arch/misc.h>

+#if defined(CONFIG_CMD_NAND) static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +#endif

-int board_init(void) -{ - return spear_board_init(MACH_TYPE_SPEAR600); -} - +#if defined(CONFIG_CMD_NAND) /* * board_nand_init - Board specific NAND initialization * @nand: mtd private chip structure * * Called by nand_init_chip to initialize the board specific functions */ - void board_nand_init() { struct misc_regs *const misc_regs_p = @@ -57,11 +54,12 @@ void board_nand_init() #endif return; } +#endif

+#if defined(CONFIG_CMD_NET) int board_eth_init(bd_t *bis) { int ret = 0; - #if defined(CONFIG_DESIGNWARE_ETH) u32 interface = PHY_INTERFACE_MODE_MII; #if defined(CONFIG_DW_AUTONEG) @@ -73,3 +71,4 @@ int board_eth_init(bd_t *bis) #endif return ret; } +#endif diff --git a/board/spear/common/spr_misc.c b/board/st/spear/spear_common.c similarity index 89% rename from board/spear/common/spr_misc.c rename to board/st/spear/spear_common.c index df05ff2..c760229 100644 --- a/board/spear/common/spr_misc.c +++ b/board/st/spear/spear_common.c @@ -39,21 +39,18 @@ DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_CMD_NET) static int i2c_read_mac(uchar *buffer); #endif +void lowlevel_init(void) +{ +}

int dram_init(void) { /* Store complete RAM size and return */ - gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE); + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, SDRAM_MAX_SIZE);

return 0; }

-void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = gd->ram_size; -} - int board_early_init_f() { #if defined(CONFIG_ST_SMI) @@ -61,27 +58,6 @@ int board_early_init_f() #endif return 0; } -int misc_init_r(void) -{ -#if defined(CONFIG_CMD_NET) - uchar mac_id[6]; - - if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id)) - eth_setenv_enetaddr("ethaddr", mac_id); -#endif - setenv("verify", "n"); - -#if defined(CONFIG_SPEAR_USBTTY) - setenv("stdin", "usbtty"); - setenv("stdout", "usbtty"); - setenv("stderr", "usbtty"); - -#ifndef CONFIG_SYS_NO_DCACHE - dcache_enable(); -#endif -#endif - return 0; -}

#ifdef CONFIG_SPEAR_EMI struct cust_emi_para { @@ -140,8 +116,6 @@ void spear_emi_init(void)

int spear_board_init(ulong mach_type) { - gd->bd->bi_arch_number = mach_type; - /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;

diff --git a/board/spear/common/spr_lowlevel_init.S b/board/st/spear/spear_lowlevel_init.S similarity index 100% rename from board/spear/common/spr_lowlevel_init.S rename to board/st/spear/spear_lowlevel_init.S diff --git a/board/spear/x600/x600.c b/board/st/spear/x600.c similarity index 100% rename from board/spear/x600/x600.c rename to board/st/spear/x600.c diff --git a/board/spear/x600/fpga.c b/board/st/spear/x600fpga.c similarity index 100% rename from board/spear/x600/fpga.c rename to board/st/spear/x600fpga.c diff --git a/board/spear/x600/fpga.h b/board/st/spear/x600fpga.h similarity index 100% rename from board/spear/x600/fpga.h rename to board/st/spear/x600fpga.h diff --git a/boards.cfg b/boards.cfg index fe357e7..3b0348a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -198,19 +198,21 @@ omap730p2_cs0boot arm arm926ejs omap730p2 ti omap omap730p2_cs3boot arm arm926ejs omap730p2 ti omap omap730p2:CS3_BOOT edminiv2 arm arm926ejs - LaCie orion5x dkb arm arm926ejs - Marvell pantheon -spear300 arm arm926ejs spear300 spear spear spear3xx_evb:spear300 -spear300_nand arm arm926ejs spear300 spear spear spear3xx_evb:spear300,nand -spear300_usbtty arm arm926ejs spear300 spear spear spear3xx_evb:spear300,usbtty -spear310 arm arm926ejs spear310 spear spear spear3xx_evb:spear310 -spear310_pnor arm arm926ejs spear310 spear spear spear3xx_evb:spear310,FLASH_PNOR -spear310_nand arm arm926ejs spear310 spear spear spear3xx_evb:spear310,nand -spear310_usbtty arm arm926ejs spear310 spear spear spear3xx_evb:spear310,usbtty -spear320 arm arm926ejs spear320 spear spear spear3xx_evb:spear320 -spear320_usbtty arm arm926ejs spear320 spear spear spear3xx_evb:spear320,usbtty -spear600 arm arm926ejs spear600 spear spear spear6xx_evb:spear600 -spear600_nand arm arm926ejs spear600 spear spear spear6xx_evb:spear600,nand -spear600_usbtty arm arm926ejs spear600 spear spear spear6xx_evb:spear600,usbtty -x600 arm arm926ejs - spear spear x600 +x600 arm arm926ejs - st spear x600 +spear300 arm arm926ejs spear st spear spear300-evb:spear300 +spear300_nand arm arm926ejs spear st spear spear300-evb:spear300,nand +spear300_usbtty arm arm926ejs spear st spear spear300-evb:spear300,usbtty +spear310 arm arm926ejs spear st spear spear310-evb:spear310 +spear310_pnor arm arm926ejs spear st spear spear310-evb:spear310,pnor +spear310_nand arm arm926ejs spear st spear spear310-evb:spear310,nand +spear310_usbtty arm arm926ejs spear st spear spear310-evb:spear310,usbtty +spear320 arm arm926ejs spear st spear spear320-evb:spear320 +spear320_pnor arm arm926ejs spear st spear spear320-evb:spear320,pnor +spear320_nand arm arm926ejs spear st spear spear320-evb:spear320,nand +spear320_usbtty arm arm926ejs spear st spear spear320-evb:spear320,usbtty +spear600 arm arm926ejs spear st spear spear600-evb:spear600 +spear600_nand arm arm926ejs spear st spear spear600-evb:spear600,nand +spear600_usbtty arm arm926ejs spear st spear spear600-evb:spear600,usbtty versatileab arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_AB versatilepb arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_PB versatileqemu arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB

spear600evb and spear300evb place ethaddr on a I2C memory. This patch cleans up reading of ethaddr

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- board/st/spear/spear300evb.c | 5 ++++ board/st/spear/spear600evb.c | 7 ++++++ board/st/spear/spear_common.c | 55 +++++++++++++++++++++++++++---------------- 3 files changed, 47 insertions(+), 20 deletions(-)

diff --git a/board/st/spear/spear300evb.c b/board/st/spear/spear300evb.c index 2c7ccd6..46a5922 100644 --- a/board/st/spear/spear300evb.c +++ b/board/st/spear/spear300evb.c @@ -68,6 +68,11 @@ int board_eth_init(bd_t *bis)

#if defined(CONFIG_DESIGNWARE_ETH) u32 interface = PHY_INTERFACE_MODE_MII; +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) + uchar mac_id[6]; + if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id)) + eth_setenv_enetaddr("ethaddr", mac_id); +#endif if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY, interface) >= 0) ret++; diff --git a/board/st/spear/spear600evb.c b/board/st/spear/spear600evb.c index 61cea50..b5901e6 100644 --- a/board/st/spear/spear600evb.c +++ b/board/st/spear/spear600evb.c @@ -60,11 +60,18 @@ void board_nand_init() int board_eth_init(bd_t *bis) { int ret = 0; +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) + uchar mac_id[6]; +#endif #if defined(CONFIG_DESIGNWARE_ETH) u32 interface = PHY_INTERFACE_MODE_MII; #if defined(CONFIG_DW_AUTONEG) interface = PHY_INTERFACE_MODE_GMII; #endif +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) + if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id)) + eth_setenv_enetaddr("ethaddr", mac_id); +#endif if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY, interface) >= 0) ret++; diff --git a/board/st/spear/spear_common.c b/board/st/spear/spear_common.c index c760229..71e9348 100644 --- a/board/st/spear/spear_common.c +++ b/board/st/spear/spear_common.c @@ -36,9 +36,6 @@

DECLARE_GLOBAL_DATA_PTR;

-#if defined(CONFIG_CMD_NET) -static int i2c_read_mac(uchar *buffer); -#endif void lowlevel_init(void) { } @@ -125,26 +122,33 @@ int spear_board_init(ulong mach_type) return 0; }

-#if defined(CONFIG_CMD_NET) -static int i2c_read_mac(uchar *buffer) +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) && defined(CONFIG_CMD_NET) && \ + defined(CONFIG_CMD_I2C) +int i2c_read_mac(uchar *buffer) { u8 buf[2];

- i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN); + /* + * A magic ID which is present at offset 0 and reads 0x55AA represents + * whether MACID is present starting at offset 2 + */ + i2c_read(CONFIG_I2C_CHIPADDRESS, 0, 1, buf, 2);

/* Check if mac in i2c memory is valid */ - if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) { + if ((buf[0] == 0x55) && (buf[1] == 0xAA)) { /* Valid mac address is saved in i2c eeprom */ - i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN); + i2c_read(CONFIG_I2C_CHIPADDRESS, 0x2, 1, buffer, 6); return 0; }

return -1; }

-static int write_mac(uchar *mac) +static int i2c_write_mac(uchar *mac) { u8 buf[2]; + u8 temp[MAC_LEN]; + int i;

buf[0] = (u8)MAGIC_BYTE0; buf[1] = (u8)MAGIC_BYTE1; @@ -158,8 +162,15 @@ static int write_mac(uchar *mac) /* check if valid MAC address is saved in I2C EEPROM or not? */ if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) { i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN); - puts("I2C EEPROM written with mac address \n"); - return 0; + + for (i = 0; i < MAC_LEN; i++) + temp[i] = ~mac[i]; + i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, temp, MAC_LEN); + + if (!memcmp(mac, temp, MAC_LEN)) { + puts("I2C EEPROM written with mac address\n"); + return 0; + } }

puts("I2C EEPROM writing failed\n"); @@ -171,7 +182,8 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { void (*sram_setfreq) (unsigned int, unsigned int); unsigned int frequency; -#if defined(CONFIG_CMD_NET) +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) && defined(CONFIG_CMD_NET) && \ + defined(CONFIG_CMD_I2C) unsigned char mac[6]; #endif

@@ -199,7 +211,8 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

return 0;

-#if defined(CONFIG_CMD_NET) +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) && defined(CONFIG_CMD_NET) && \ + defined(CONFIG_CMD_I2C) } else if (!strcmp(argv[1], "ethaddr")) {

u32 reg; @@ -209,19 +222,18 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (s) s = (*e) ? e + 1 : e; } - write_mac(mac); + i2c_write_mac(mac);

return 0; -#endif } else if (!strcmp(argv[1], "print")) { -#if defined(CONFIG_CMD_NET) if (!i2c_read_mac(mac)) { printf("Ethaddr (from i2c mem) = %pM\n", mac); } else { printf("Ethaddr (from i2c mem) = Not set\n"); } -#endif + return 0; +#endif }

return cmd_usage(cmdtp); @@ -229,8 +241,11 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

U_BOOT_CMD(chip_config, 3, 1, do_chip_config, "configure chip", - "chip_config cpufreq/ddrfreq frequency\n" -#if defined(CONFIG_CMD_NET) + "chip_config cpufreq/ddrfreq frequency" +#if defined(CONFIG_SPEAR_MACID_IN_I2CMEM) && defined(CONFIG_CMD_NET) && \ + defined(CONFIG_CMD_I2C) + "\n" "chip_config ethaddr XX:XX:XX:XX:XX:XX\n" + "chip_config print" #endif - "chip_config print"); + "");

This patch cleans up the spear SPL support. The modifications include

- Move mpmc register programing values to board dir MPMC register programming values are dependent on DDR timings which in turn depend a lot on the placement of DDR chip on the board. It makes more sense to keep these register init values in board - Add SPEAR to the CONFIG_DDR namespace Add SPEAR to the CONFIG_DDR namespace to make it exclusive to SPEAr platfroms only - Add hardware configurations for spear600 spl support - Avoid console operations during spl The spl runs in the environment provided by boot code. The Boot code may or may not initialize UART (padmux, clock etc). This mandates the SPL to initialize UART to dump information SPEAr SPL as a policy initializes only the system and ddr - Do not copy the header arbitrarily The current logic is copying the header at 64 bytes before the load address. This can lead to unpredictable results as that memory is reserved to be bss/rw area Modify the logic to use a local structure for image header - Rename spear600.c to spl-spear600.c - Use the smi_init routine from smi driver - Perform Data CRC check on relocated image image_check_dcrc accepts a header pointer as an argument and performs a data crc check based on the assumption that the image data is placed immediately after the header. The SPEAr SPL support performs the data verification after relocation to RAM has taken place. There are at least following two benefits of doing so * It is faster in Normal booting cases It also leads to a basic DDR test * because the code gets copied to the recently initialized DDR and it works like a read-write test for RAM before the control is actually transfered to u-boot - Implement independent routines for get_socrev() - Rename register bitmask definitions - Simplify lds file - Use ENTRY/ENDPROC macros and clear bss

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/cpu/arm926ejs/spear/Makefile | 6 +- arch/arm/cpu/arm926ejs/spear/spear600.c | 232 --------------------- arch/arm/cpu/arm926ejs/spear/spl-spear3xx.c | 35 ++++ arch/arm/cpu/arm926ejs/spear/spl-spear600.c | 98 +++++++++ arch/arm/cpu/arm926ejs/spear/spl.c | 140 ++++--------- arch/arm/cpu/arm926ejs/spear/spl_boot.c | 84 +++----- arch/arm/cpu/arm926ejs/spear/start.S | 58 +++--- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds | 65 ++---- arch/arm/include/asm/arch-spear/generic.h | 88 ++++++-- arch/arm/include/asm/arch-spear/misc.h | 191 +++++------------ arch/arm/include/asm/arch-spear/spear600.h | 13 ++ arch/arm/include/asm/arch-spear/syscntl.h | 21 +- board/st/spear/config.mk | 6 + board/st/spear/ddr/Makefile | 57 +++++ .../ddr/spear600_mt47h128m8_3_266_cl5_async.c | 3 +- .../spear/ddr/spear600_mt47h32m16_333_cl5_psync.c | 8 +- .../ddr/spear600_mt47h32m16_37e_166_cl4_sync.c | 3 +- .../ddr/spear600_mt47h64m16_3_333_cl5_psync.c | 8 +- board/st/spear/spear600evb.c | 91 ++++++++ include/configs/spear600.h | 11 + spl/Makefile | 4 + 21 files changed, 578 insertions(+), 644 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/spear/spear600.c create mode 100644 arch/arm/cpu/arm926ejs/spear/spl-spear3xx.c create mode 100644 arch/arm/cpu/arm926ejs/spear/spl-spear600.c create mode 100644 board/st/spear/ddr/Makefile rename arch/arm/cpu/arm926ejs/spear/spr600_mt47h128m8_3_266_cl5_async.c => board/st/spear/ddr/spear600_mt47h128m8_3_266_cl5_async.c (95%) rename arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_333_cl5_psync.c => board/st/spear/ddr/spear600_mt47h32m16_333_cl5_psync.c (91%) rename arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c => board/st/spear/ddr/spear600_mt47h32m16_37e_166_cl4_sync.c (95%) rename arch/arm/cpu/arm926ejs/spear/spr600_mt47h64m16_3_333_cl5_psync.c => board/st/spear/ddr/spear600_mt47h64m16_3_333_cl5_psync.c (91%)

diff --git a/arch/arm/cpu/arm926ejs/spear/Makefile b/arch/arm/cpu/arm926ejs/spear/Makefile index 939f372..3fe7e26 100644 --- a/arch/arm/cpu/arm926ejs/spear/Makefile +++ b/arch/arm/cpu/arm926ejs/spear/Makefile @@ -33,11 +33,7 @@ COBJS-$(CONFIG_ST_EMI) += emi.o

ifdef CONFIG_SPL_BUILD COBJS-y += spl.o spl_boot.o -COBJS-$(CONFIG_SPEAR600) += spear600.o -COBJS-$(CONFIG_DDR_MT47H64M16) += spr600_mt47h64m16_3_333_cl5_psync.o -COBJS-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_333_cl5_psync.o -COBJS-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_37e_166_cl4_sync.o -COBJS-$(CONFIG_DDR_MT47H128M8) += spr600_mt47h128m8_3_266_cl5_async.o +COBJS-$(CONFIG_SOC_SPEAR600) += spl-spear600.o endif

SRCS := $(START:.o=.S) $(COBJS-y:.o=.c) diff --git a/arch/arm/cpu/arm926ejs/spear/spear600.c b/arch/arm/cpu/arm926ejs/spear/spear600.c deleted file mode 100644 index bd8cb7a..0000000 --- a/arch/arm/cpu/arm926ejs/spear/spear600.c +++ /dev/null @@ -1,232 +0,0 @@ -/* - * (C) Copyright 2000-2009 - * Viresh Kumar, ST Microelectronics, viresh.kumar@st.com - * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/hardware.h> -#include <asm/io.h> -#include <asm/arch/misc.h> -#include <asm/arch/generic.h> - -#define FALSE 0 -#define TRUE (!FALSE) - -static void sel_1v8(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - u32 ddr1v8, ddr2v5; - - ddr2v5 = readl(&misc_p->ddr_2v5_compensation); - ddr2v5 &= 0x8080ffc0; - ddr2v5 |= 0x78000003; - writel(ddr2v5, &misc_p->ddr_2v5_compensation); - - ddr1v8 = readl(&misc_p->ddr_1v8_compensation); - ddr1v8 &= 0x8080ffc0; - ddr1v8 |= 0x78000010; - writel(ddr1v8, &misc_p->ddr_1v8_compensation); - - while (!(readl(&misc_p->ddr_1v8_compensation) & DDR_COMP_ACCURATE)) - ; -} - -static void sel_2v5(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - u32 ddr1v8, ddr2v5; - - ddr1v8 = readl(&misc_p->ddr_1v8_compensation); - ddr1v8 &= 0x8080ffc0; - ddr1v8 |= 0x78000003; - writel(ddr1v8, &misc_p->ddr_1v8_compensation); - - ddr2v5 = readl(&misc_p->ddr_2v5_compensation); - ddr2v5 &= 0x8080ffc0; - ddr2v5 |= 0x78000010; - writel(ddr2v5, &misc_p->ddr_2v5_compensation); - - while (!(readl(&misc_p->ddr_2v5_compensation) & DDR_COMP_ACCURATE)) - ; -} - -/* - * plat_ddr_init: - */ -void plat_ddr_init(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - u32 ddrpad; - u32 core3v3, ddr1v8, ddr2v5; - - /* DDR pad register configurations */ - ddrpad = readl(&misc_p->ddr_pad); - ddrpad &= ~DDR_PAD_CNF_MSK; - -#if (CONFIG_DDR_HCLK) - ddrpad |= 0xEAAB; -#elif (CONFIG_DDR_2HCLK) - ddrpad |= 0xEAAD; -#elif (CONFIG_DDR_PLL2) - ddrpad |= 0xEAAD; -#endif - writel(ddrpad, &misc_p->ddr_pad); - - /* Compensation register configurations */ - core3v3 = readl(&misc_p->core_3v3_compensation); - core3v3 &= 0x8080ffe0; - core3v3 |= 0x78000002; - writel(core3v3, &misc_p->core_3v3_compensation); - - ddr1v8 = readl(&misc_p->ddr_1v8_compensation); - ddr1v8 &= 0x8080ffc0; - ddr1v8 |= 0x78000004; - writel(ddr1v8, &misc_p->ddr_1v8_compensation); - - ddr2v5 = readl(&misc_p->ddr_2v5_compensation); - ddr2v5 &= 0x8080ffc0; - ddr2v5 |= 0x78000004; - writel(ddr2v5, &misc_p->ddr_2v5_compensation); - - if ((readl(&misc_p->ddr_pad) & DDR_PAD_SW_CONF) == DDR_PAD_SW_CONF) { - /* Software memory configuration */ - if (readl(&misc_p->ddr_pad) & DDR_PAD_SSTL_SEL) - sel_1v8(); - else - sel_2v5(); - } else { - /* Hardware memory configuration */ - if (readl(&misc_p->ddr_pad) & DDR_PAD_DRAM_TYPE) - sel_1v8(); - else - sel_2v5(); - } -} - -/* - * soc_init: - */ -void soc_init(void) -{ - /* Nothing to be done for SPEAr600 */ -} - -/* - * xxx_boot_selected: - * - * return TRUE if the particular booting option is selected - * return FALSE otherwise - */ -static u32 read_bootstrap(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - - return readl(&misc_p->auto_cfg_reg) & MISC_BOOTSTRAPMASK; -} - -int snor_boot_selected(void) -{ - u32 bootstrap = read_bootstrap(); - - if (SNOR_BOOT_SUPPORTED) { - /* Check whether SNOR boot is selected */ - if ((bootstrap & MISC_ONLYSNORBOOT) == MISC_ONLYSNORBOOT) - return TRUE; - - if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND8BOOT) - return TRUE; - - if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND16BOOT) - return TRUE; - } - - return FALSE; -} - -int nand_boot_selected(void) -{ - u32 bootstrap = read_bootstrap(); - - if (NAND_BOOT_SUPPORTED) { - /* Check whether NAND boot is selected */ - if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND8BOOT) - return TRUE; - - if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND16BOOT) - return TRUE; - } - - return FALSE; -} - -int pnor_boot_selected(void) -{ - /* Parallel NOR boot is not selected in any SPEAr600 revision */ - return FALSE; -} - -int usb_boot_selected(void) -{ - u32 bootstrap = read_bootstrap(); - - if (USB_BOOT_SUPPORTED) { - /* Check whether USB boot is selected */ - if (!(bootstrap & MISC_USBBOOT)) - return TRUE; - } - - return FALSE; -} - -int tftp_boot_selected(void) -{ - /* TFTP boot is not selected in any SPEAr600 revision */ - return FALSE; -} - -int uart_boot_selected(void) -{ - /* UART boot is not selected in any SPEAr600 revision */ - return FALSE; -} - -int spi_boot_selected(void) -{ - /* SPI boot is not selected in any SPEAr600 revision */ - return FALSE; -} - -int i2c_boot_selected(void) -{ - /* I2C boot is not selected in any SPEAr600 revision */ - return FALSE; -} - -int mmc_boot_selected(void) -{ - return FALSE; -} - -void plat_late_init(void) -{ - spear_late_init(); -} diff --git a/arch/arm/cpu/arm926ejs/spear/spl-spear3xx.c b/arch/arm/cpu/arm926ejs/spear/spl-spear3xx.c new file mode 100644 index 0000000..7e2bc98 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/spear/spl-spear3xx.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int get_socrev(void) +{ +#if defined(CONFIG_SOC_SPEAR300) + return SOC_SPEAR300; +#elif defined(CONFIG_SOC_SPEAR310) + return SOC_SPEAR310; +#elif defined(CONFIG_SOC_SPEAR320) + return SOC_SPEAR320; +#endif +} diff --git a/arch/arm/cpu/arm926ejs/spear/spl-spear600.c b/arch/arm/cpu/arm926ejs/spear/spl-spear600.c new file mode 100644 index 0000000..5813656 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/spear/spl-spear600.c @@ -0,0 +1,98 @@ +/* + * (C) Copyright 2000-2009 + * Viresh Kumar, ST Microelectronics, viresh.kumar@st.com + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/arch/misc.h> +#include <asm/arch/generic.h> + +#define FALSE 0 +#define TRUE (!FALSE) + +int get_socrev(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 soc_id = readl(&misc_p->soc_core_id); + u32 pri_socid = (soc_id >> MISC_PRISOCID_SHFT) & 0xFF; + u32 sec_socid = (soc_id >> MISC_SECSOCID_SHFT) & 0xFF; + + if ((pri_socid == 'B') && (sec_socid == 'B')) + return SOC_SPEAR600_BB; + else if ((pri_socid == 'B') && (sec_socid == 'C')) + return SOC_SPEAR600_BC; + else if ((pri_socid == 'B') && (sec_socid == 'D')) + return SOC_SPEAR600_BD; + else if (soc_id == 0) + return SOC_SPEAR600_BA; + else + return SOC_SPEAR_NA; +} + +/* + * soc_init: + */ +void soc_init(void) +{ + /* Nothing to be done for SPEAr600 */ +} + +u32 getboottype(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 bootstrap = readl(&misc_p->auto_cfg_reg) & MISC_BOOTSTRAPMASK; + u32 bootmask = 0; + + if (SNOR_BOOT_SUPPORTED) { + /* Check whether SNOR boot is selected */ + if ((bootstrap & MISC_ONLYSNORBOOT) == MISC_ONLYSNORBOOT) + bootmask |= BOOT_TYPE_SMI; + + if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND8BOOT) + bootmask |= BOOT_TYPE_SMI; + + if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND16BOOT) + bootmask |= BOOT_TYPE_SMI; + } + + if (NAND_BOOT_SUPPORTED) { + /* Check whether NAND boot is selected */ + if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND8BOOT) + bootmask |= BOOT_TYPE_NAND; + + if ((bootstrap & MISC_NORNANDBOOT) == MISC_NORNAND16BOOT) + bootmask |= BOOT_TYPE_NAND; + } + + if (USBD_BOOT_SUPPORTED) { + /* Check whether USB boot is selected */ + if (!(bootstrap & MISC_USBBOOT)) + bootmask |= BOOT_TYPE_USBD; + } + + if (!bootmask) + bootmask |= BOOT_TYPE_UNSUPPORTED; + + return bootmask; +} diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index 16ab82d..4203150 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -33,7 +33,6 @@

inline void hang(void) { - serial_puts("### ERROR ### Please RESET the board ###\n"); for (;;) ; } @@ -44,27 +43,27 @@ static void ddr_clock_init(void) u32 clkenb, ddrpll;

clkenb = readl(&misc_p->periph1_clken); - clkenb &= ~PERIPH_MPMCMSK; - clkenb |= PERIPH_MPMC_WE; + clkenb &= ~MISC_MPMCMSK; + clkenb |= MISC_MPMCWE;

/* Intentionally done twice */ writel(clkenb, &misc_p->periph1_clken); writel(clkenb, &misc_p->periph1_clken);

ddrpll = readl(&misc_p->pll_ctr_reg); - ddrpll &= ~MEM_CLK_SEL_MSK; -#if (CONFIG_DDR_HCLK) - ddrpll |= MEM_CLK_HCLK; -#elif (CONFIG_DDR_2HCLK) - ddrpll |= MEM_CLK_2HCLK; -#elif (CONFIG_DDR_PLL2) - ddrpll |= MEM_CLK_PLL2; + ddrpll &= ~MISC_DDRCLK_MSK; +#if defined(CONFIG_SPEAR_DDR_HCLK) + ddrpll |= MISC_DDRCLK_HCLK; +#elif defined(CONFIG_SPEAR_DDR_2HCLK) + ddrpll |= MISC_DDRCLK_2HCLK; +#elif defined(CONFIG_SPEAR_DDR_PLL2) + ddrpll |= MISC_DDRCLK_PLL2; #else -#error "please define one of CONFIG_DDR_(HCLK|2HCLK|PLL2)" +#error "please define one of CONFIG_SPEAR_DDR_(HCLK|2HCLK|PLL2)" #endif writel(ddrpll, &misc_p->pll_ctr_reg);

- writel(readl(&misc_p->periph1_clken) | PERIPH_MPMC_EN, + writel(readl(&misc_p->periph1_clken) | MISC_MPMCENB, &misc_p->periph1_clken); }

@@ -89,16 +88,13 @@ static void mpmc_init_values(void) ; }

-static void mpmc_init(void) +static void ddr_init(void) { /* Clock related settings for DDR */ ddr_clock_init();

- /* - * DDR pad register bits are different for different SoCs - * Compensation values are also handled separately - */ - plat_ddr_init(); + /* Borad related low level initializations */ + board_ddr_init();

/* Initialize mpmc register values */ mpmc_init_values(); @@ -109,13 +105,13 @@ static void pll_init(void) struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE;

/* Initialize PLLs */ - writel(FREQ_332, &misc_p->pll1_frq); + writel(MISC_FREQ_332, &misc_p->pll1_frq); writel(0x1C0A, &misc_p->pll1_cntl); writel(0x1C0E, &misc_p->pll1_cntl); writel(0x1C06, &misc_p->pll1_cntl); writel(0x1C0E, &misc_p->pll1_cntl);

- writel(FREQ_332, &misc_p->pll2_frq); + writel(MISC_FREQ_332, &misc_p->pll2_frq); writel(0x1C0A, &misc_p->pll2_cntl); writel(0x1C0E, &misc_p->pll2_cntl); writel(0x1C06, &misc_p->pll2_cntl); @@ -135,113 +131,51 @@ static void sys_init(void) (struct syscntl_regs *)CONFIG_SPEAR_SYSCNTLBASE;

/* Set system state to SLOW */ - writel(SLOW, &syscntl_p->scctrl); - writel(PLL_TIM << 3, &syscntl_p->scpllctrl); + writel(SYSCNTL_REQ_SLOW, &syscntl_p->scctrl); + writel(SYSCNTL_PLL_TIM << 3, &syscntl_p->scpllctrl);

/* Initialize PLLs */ pll_init();

- /* - * Ethernet configuration - * To be done only if the tftp boot is not selected already - * Boot code ensures the correct configuration in tftp booting - */ - if (!tftp_boot_selected()) - mac_init(); - - writel(RTC_DISABLE | PLLTIMEEN, &misc_p->periph_clk_cfg); + writel(MISC_RTC_DISABLE | MISC_PLLTIMEEN, &misc_p->periph_clk_cfg); writel(0x555, &misc_p->amba_clk_cfg);

- writel(NORMAL, &syscntl_p->scctrl); + writel(SYSCNTL_REQ_NORMAL, &syscntl_p->scctrl);

/* Wait for system to switch to normal mode */ - while (((readl(&syscntl_p->scctrl) >> MODE_SHIFT) & MODE_MASK) - != NORMAL) + while ((readl(&syscntl_p->scctrl) & SYSCNTL_STATE_MASK) != + SYSCNTL_STATE_NORMAL) ; }

-/* - * get_socrev - * - * Get SoC Revision. - * @return SOC_SPEARXXX - */ -int get_socrev(void) +static void spear_icm_init(void) { -#if defined(CONFIG_SOC_SPEAR600) struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - u32 soc_id = readl(&misc_p->soc_core_id); - u32 pri_socid = (soc_id >> SOC_PRI_SHFT) & 0xFF; - u32 sec_socid = (soc_id >> SOC_SEC_SHFT) & 0xFF; - - if ((pri_socid == 'B') && (sec_socid == 'B')) - return SOC_SPEAR600_BB; - else if ((pri_socid == 'B') && (sec_socid == 'C')) - return SOC_SPEAR600_BC; - else if ((pri_socid == 'B') && (sec_socid == 'D')) - return SOC_SPEAR600_BD; - else if (soc_id == 0) - return SOC_SPEAR600_BA; - else - return SOC_SPEAR_NA; -#elif defined(CONFIG_SOC_SPEAR300) - return SOC_SPEAR300; -#elif defined(CONFIG_SOC_SPEAR310) - return SOC_SPEAR310; -#elif defined(CONFIG_SOC_SPEAR320) - return SOC_SPEAR320; -#endif + + writel(0x80000007, &misc_p->arb_icm_ml1); + writel(0x80000007, &misc_p->arb_icm_ml2); + writel(0x80000007, &misc_p->arb_icm_ml3); + writel(0x80000007, &misc_p->arb_icm_ml4); + writel(0x80000007, &misc_p->arb_icm_ml5); + writel(0x80000007, &misc_p->arb_icm_ml6); + writel(0x80000007, &misc_p->arb_icm_ml7); + writel(0x80000007, &misc_p->arb_icm_ml8); + writel(0x80000007, &misc_p->arb_icm_ml9); }

void lowlevel_init(void) { struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; - const char *u_boot_rev = U_BOOT_VERSION;

/* Initialize PLLs */ sys_init();

- /* Initialize UART */ - serial_init(); - - /* Print U-Boot SPL version string */ - serial_puts("\nU-Boot SPL "); - /* Avoid a second "U-Boot" coming from this string */ - u_boot_rev = &u_boot_rev[7]; - serial_puts(u_boot_rev); - serial_puts(" ("); - serial_puts(U_BOOT_DATE); - serial_puts(" - "); - serial_puts(U_BOOT_TIME); - serial_puts(")\n"); - -#if defined(CONFIG_OS_BOOT) - writel(readl(&misc_p->periph1_clken) | PERIPH_UART1, - &misc_p->periph1_clken); -#endif - /* Enable IPs (release reset) */ - writel(PERIPH_RST_ALL, &misc_p->periph1_rst); + writel(MISC_PERIPH_RST_ALL, &misc_p->periph1_rst);

/* Initialize MPMC */ - serial_puts("Configure DDR\n"); - mpmc_init(); - - /* SoC specific initialization */ - soc_init(); -} - -void spear_late_init(void) -{ - struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + ddr_init();

- writel(0x80000007, &misc_p->arb_icm_ml1); - writel(0x80000007, &misc_p->arb_icm_ml2); - writel(0x80000007, &misc_p->arb_icm_ml3); - writel(0x80000007, &misc_p->arb_icm_ml4); - writel(0x80000007, &misc_p->arb_icm_ml5); - writel(0x80000007, &misc_p->arb_icm_ml6); - writel(0x80000007, &misc_p->arb_icm_ml7); - writel(0x80000007, &misc_p->arb_icm_ml8); - writel(0x80000007, &misc_p->arb_icm_ml9); + /* Initialize Interconnect Matrix */ + spear_icm_init(); } diff --git a/arch/arm/cpu/arm926ejs/spear/spl_boot.c b/arch/arm/cpu/arm926ejs/spear/spl_boot.c index c67774d..9742135 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/spear/spl_boot.c @@ -31,63 +31,40 @@ #include <asm/arch/hardware.h> #include <asm/arch/generic.h>

-static const char kernel_name[] = "Linux"; -static const char loader_name[] = "U-Boot"; +uint32_t crc32(uint32_t, const unsigned char *, uint);

-int image_check_header(image_header_t *hdr, const char *name) +int image_check_header(image_header_t *hdr) { - if (image_check_magic(hdr) && - (!strncmp(image_get_name(hdr), name, strlen(name))) && - image_check_hcrc(hdr)) { + if (image_check_magic(hdr) && image_check_hcrc(hdr)) return 1; - } + return 0; }

int image_check_data(image_header_t *hdr) { - if (image_check_dcrc(hdr)) - return 1; + ulong data = image_get_load(hdr); + ulong len = image_get_data_size(hdr); + ulong dcrc = crc32(0, (unsigned char *)data, len);

- return 0; + return (dcrc == image_get_dcrc(hdr)); }

-/* - * SNOR (Serial NOR flash) related functions - */ -void snor_init(void) +static int snor_image_load(u8 *load_addr, void (**image_p)(void)) { - struct smi_regs *const smicntl = - (struct smi_regs * const)CONFIG_SYS_SMI_BASE; + image_header_t header;

- /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ - writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, - &smicntl->smi_cr1); -} + memcpy(&header, load_addr, sizeof(image_header_t));

-static int snor_image_load(u8 *load_addr, void (**image_p)(void), - const char *image_name) -{ - image_header_t *header; + if (image_check_header(&header)) { + /* Copy the image to load address */ + memcpy((void *)image_get_load(&header), + load_addr + sizeof(image_header_t), + image_get_data_size(&header));

- /* - * Since calculating the crc in the SNOR flash does not - * work, we copy the image to the destination address - * minus the header size. And point the header to this - * new destination. This will not work for address 0 - * of course. - */ - header = (image_header_t *)load_addr; - memcpy((ulong *)(image_get_load(header) - sizeof(image_header_t)), - (const ulong *)load_addr, - image_get_data_size(header) + sizeof(image_header_t)); - header = (image_header_t *)(image_get_load(header) - - sizeof(image_header_t)); - - if (image_check_header(header, image_name)) { - if (image_check_data(header)) { + if (image_check_data(&header)) { /* Jump to boot image */ - *image_p = (void *)image_get_load(header); + *image_p = (void (*)(void))image_get_load(&header); return 1; } } @@ -102,6 +79,12 @@ static void boot_image(void (*image)(void)) (*funcp)(); }

+static void __def_board_lowlevel_late_init(void) +{ +} +void board_lowlevel_late_init(void) + __attribute__((weak, alias("__def_board_lowlevel_late_init"))); + /* * spl_boot: * @@ -114,7 +97,7 @@ u32 spl_boot(void) void (*image)(void);

#ifdef CONFIG_SPEAR_USBTTY - plat_late_init(); + board_lowlevel_late_init(); return 1; #endif

@@ -126,17 +109,14 @@ u32 spl_boot(void)

if (SNOR_BOOT_SUPPORTED && snor_boot_selected()) { /* SNOR-SMI initialization */ - snor_init(); + smi_init();

- serial_puts("Booting via SNOR\n"); /* Serial NOR booting */ - if (1 == snor_image_load((u8 *)CONFIG_SYS_UBOOT_BASE, - &image, loader_name)) { + if (snor_image_load((u8 *)CONFIG_SYS_SNOR_BOOT_BASE, &image)) { /* Platform related late initialasations */ - plat_late_init(); + board_lowlevel_late_init();

/* Jump to boot image */ - serial_puts("Jumping to U-Boot\n"); boot_image(image); return 1; } @@ -178,18 +158,18 @@ u32 spl_boot(void) * the following booting scenarios */

- if (USB_BOOT_SUPPORTED && usb_boot_selected()) { - plat_late_init(); + if (USBD_BOOT_SUPPORTED && usbd_boot_selected()) { + board_lowlevel_late_init(); return 1; }

if (TFTP_BOOT_SUPPORTED && tftp_boot_selected()) { - plat_late_init(); + board_lowlevel_late_init(); return 1; }

if (UART_BOOT_SUPPORTED && uart_boot_selected()) { - plat_late_init(); + board_lowlevel_late_init(); return 1; }

diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index a103c0f..26368b3 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -31,30 +31,12 @@ */

+#include <asm-offsets.h> #include <config.h> +#include <asm/system.h> +#include <linux/linkage.h>

-.globl _start -_start: - b reset - ldr pc, _undefined_instruction - ldr pc, _software_interrupt - ldr pc, _prefetch_abort - ldr pc, _data_abort - ldr pc, _not_used - ldr pc, _irq - ldr pc, _fiq - -_undefined_instruction: -_software_interrupt: -_prefetch_abort: -_data_abort: -_not_used: -_irq: -_fiq: - .word infinite_loop - -infinite_loop: - b infinite_loop +.syntax unified

/* ************************************************************************* @@ -69,17 +51,28 @@ infinite_loop: ************************************************************************* */

-/* - * the actual reset code - */ - -reset: +.globl _start +_start: /* * Xloader has to return back to BootROM in a few cases. * eg. Ethernet boot, UART boot, USB boot * Saving registers for returning back */ - stmdb sp!, {r0-r12,r14} + push {r0-r12, r14} + + /* Relocate data if needed and Clear BSS */ + ldr r0, =__bss_start + ldr r1, =__bss_end + mov r2, #0x00000000 /* clear */ + +clbss_l: + cmp r0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] + add r0, r0, #4 + b clbss_l +clbss_e: + bl cpu_init_crit /* * Clearing bss area is not done in Xloader. @@ -87,7 +80,7 @@ reset: * bss is assumed to be uninitialized. */ bl spl_boot - ldmia sp!, {r0-r12,pc} + pop {r0-r12, pc}

/* ************************************************************************* @@ -99,7 +92,7 @@ reset: * ************************************************************************* */ -cpu_init_crit: +ENTRY(cpu_init_crit) /* * flush v4 I/D caches */ @@ -117,6 +110,7 @@ cpu_init_crit: /* * Go setup Memory and board specific bits prior to relocation. */ - stmdb sp!, {lr} + push {lr} bl lowlevel_init /* go setup pll,mux,memory */ - ldmia sp!, {pc} + pop {pc} +ENDPROC(cpu_init_crit) diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds index f3bd5e7..43af464 100644 --- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds +++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds @@ -1,4 +1,7 @@ /* + * (C) Copyright 2012 + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com * on behalf of DENX Software Engineering GmbH * @@ -30,59 +33,21 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_start) -SECTIONS + +MEMORY { - . = 0x00000000; + xloader : ORIGIN = 0xD2800B00, LENGTH = 0x1500 +}

- . = ALIGN(4); - .text : +SECTIONS +{ + .text : { arch/arm/cpu/arm926ejs/spear/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { - *(.data) - } - - . = ALIGN(4); - - .u_boot_list : { - #include <u-boot.lst> - } - - . = ALIGN(4); - - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } - - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - - .bss : { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end__ = .; - } - - _end = .; + *(.text); . = ALIGN(4); + } > xloader

- /DISCARD/ : { *(.dynstr*) } - /DISCARD/ : { *(.dynsym*) } - /DISCARD/ : { *(.dynamic*) } - /DISCARD/ : { *(.hash*) } - /DISCARD/ : { *(.plt*) } - /DISCARD/ : { *(.interp*) } - /DISCARD/ : { *(.gnu*) } + .rodata : { *(.rodata*); . = ALIGN(4); } > xloader + .data : { *(.data*); . = ALIGN(4); } > xloader + .bss : { __bss_start = .; *(.bss*); . = ALIGN(4); __bss_end = .;} > xloader } diff --git a/arch/arm/include/asm/arch-spear/generic.h b/arch/arm/include/asm/arch-spear/generic.h index 062571c..68a775e 100644 --- a/arch/arm/include/asm/arch-spear/generic.h +++ b/arch/arm/include/asm/arch-spear/generic.h @@ -27,21 +27,85 @@ /* Routines exported from baord */ extern void setfreq(unsigned int, unsigned int); extern unsigned int setfreq_sz; +extern void board_ddr_init(void); +extern void board_lowlevel_late_init(void);

-void spear_late_init(void); -void plat_late_init(void); +extern u32 mpmc_conf_vals[];

-int snor_boot_selected(void); -int nand_boot_selected(void); -int pnor_boot_selected(void); -int usb_boot_selected(void); -int uart_boot_selected(void); -int tftp_boot_selected(void); -int i2c_boot_selected(void); -int spi_boot_selected(void); -int mmc_boot_selected(void); +/* + * All SoCs should support a generic routine getboottype() which returns a + * bitmask with one or more of the following bits set. This is a generic routine + * which can be used on any SoC + */ +#define BOOT_TYPE_BYPASS (1 << 1) +#define BOOT_TYPE_SMI (1 << 2) +#define BOOT_TYPE_NAND (1 << 3) +#define BOOT_TYPE_RESERVED (1 << 4) +#define BOOT_TYPE_I2C (1 << 5) +#define BOOT_TYPE_SPI (1 << 6) +#define BOOT_TYPE_USBD (1 << 7) +#define BOOT_TYPE_TFTP (1 << 8) +#define BOOT_TYPE_PCIE (1 << 9) +#define BOOT_TYPE_UART (1 << 10) +#define BOOT_TYPE_MMC (1 << 11) +#define BOOT_TYPE_PNOR8 (1 << 12) +#define BOOT_TYPE_PNOR16 (1 << 13) +#define BOOT_TYPE_PNOR32 (1 << 14) +#define BOOT_TYPE_UNSUPPORTED (1 << 31)

-extern u32 mpmc_conf_vals[]; +extern u32 getboottype(void); + +/* xxx_boot_selected */ +#define boot_bypass_selected() \ + (getboottype() & BOOT_TYPE_BYPASS) +#define usbd_boot_selected() \ + (getboottype() & BOOT_TYPE_USBD) +#define snor_boot_selected() \ + (getboottype() & BOOT_TYPE_SMI) +#define nand_boot_selected() \ + (getboottype() & BOOT_TYPE_NAND) +#define pnor8_boot_selected() \ + (getboottype() & BOOT_TYPE_PNOR8) +#define pnor16_boot_selected() \ + (getboottype() & BOOT_TYPE_PNOR16) +#define pnor32_boot_selected() \ + (getboottype() & BOOT_TYPE_PNOR32) +#define pnor_boot_selected() \ + (pnor8_boot_selected() || \ + pnor16_boot_selected() || \ + pnor32_boot_selected()) +#define tftp_boot_selected() \ + (getboottype() & BOOT_TYPE_TFTP) +#define uart_boot_selected() \ + (getboottype() & BOOT_TYPE_UART) +#define spi_boot_selected() \ + (getboottype() & BOOT_TYPE_SPI) +#define i2c_boot_selected() \ + (getboottype() & BOOT_TYPE_I2C) +#define pcie_boot_selected() \ + (getboottype() & BOOT_TYPE_PCIE) +#define mmc_boot_selected() \ + (getboottype() & BOOT_TYPE_MMC) + +/* Revision definitions */ +/* + * The definitons have started from + * 101 for SPEAr6xx + * 201 for SPEAr3xx + */ +#define SOC_SPEAR_NA 0 +#define SOC_SPEAR600_AA 101 +#define SOC_SPEAR600_AB 102 +#define SOC_SPEAR600_BA 103 +#define SOC_SPEAR600_BB 104 +#define SOC_SPEAR600_BC 105 +#define SOC_SPEAR600_BD 106 + +#define SOC_SPEAR300 201 +#define SOC_SPEAR310 202 +#define SOC_SPEAR320 203 + +extern int get_socrev(void);

/* HW mac id in i2c memory definitions */ #define MAGIC_OFF 0x0 diff --git a/arch/arm/include/asm/arch-spear/misc.h b/arch/arm/include/asm/arch-spear/misc.h index 2696203..bb97650 100644 --- a/arch/arm/include/asm/arch-spear/misc.h +++ b/arch/arm/include/asm/arch-spear/misc.h @@ -101,38 +101,7 @@ struct misc_regs { u32 ras_gpp2_out; /* 0x800C */ };

-/* SYNTH_CLK value*/ -#define SYNTH23 0x00020003 - -/* PLLx_FRQ value */ -#if defined(CONFIG_ARCH_SPEAR3XX) -#define FREQ_332 0xA600010C -#define FREQ_266 0x8500010C -#elif defined(CONFIG_ARCH_SPEAR6XX) -#define FREQ_332 0xA600010F -#define FREQ_266 0x8500010F -#endif - -/* PLL_CTR_REG */ -#define MEM_CLK_SEL_MSK 0x70000000 -#define MEM_CLK_HCLK 0x00000000 -#define MEM_CLK_2HCLK 0x10000000 -#define MEM_CLK_PLL2 0x30000000 - -#define EXPI_CLK_CFG_LOW_COMPR 0x2000 -#define EXPI_CLK_CFG_CLK_EN 0x0400 -#define EXPI_CLK_CFG_RST 0x0200 -#define EXPI_CLK_SYNT_EN 0x0010 -#define EXPI_CLK_CFG_SEL_PLL2 0x0004 -#define EXPI_CLK_CFG_INT_CLK_EN 0x0001 - -#define PLL2_CNTL_6UA 0x1c00 -#define PLL2_CNTL_SAMPLE 0x0008 -#define PLL2_CNTL_ENABLE 0x0004 -#define PLL2_CNTL_RESETN 0x0002 -#define PLL2_CNTL_LOCK 0x0001 - -/* AUTO_CFG_REG value */ +/* auto_cfg_reg value */ #define MISC_SOCCFGMSK 0x0000003F #define MISC_SOCCFG30 0x0000000C #define MISC_SOCCFG31 0x0000000D @@ -144,26 +113,34 @@ struct misc_regs { #define MISC_NORNAND16BOOT 0x00090000 #define MISC_USBBOOT 0x00080000

-/* PERIPH_CLK_CFG value */ +/* pllX_frq value */ +#if defined(CONFIG_ARCH_SPEAR3XX) +#define MISC_FREQ_332 0xA600010C +#define MISC_FREQ_266 0x8500010C +#elif defined(CONFIG_ARCH_SPEAR6XX) +#define MISC_FREQ_332 0xA600010F +#define MISC_FREQ_266 0x8500010F +#endif + +/* pll_ctr_reg */ +#define MISC_DDRCLK_MSK 0x70000000 +#define MISC_DDRCLK_HCLK 0x00000000 +#define MISC_DDRCLK_2HCLK 0x10000000 +#define MISC_DDRCLK_PLL2 0x30000000 + +/* periph_clk_cfg */ #define MISC_GPT3SYNTH 0x00000400 #define MISC_GPT4SYNTH 0x00000800 +#define MISC_RTC_DISABLE 0x00000080 #define MISC_UART48M 0x00000000 #define MISC_UARTCLKMSK 0x00000010 +#define MISC_PLLTIMEEN 0x00000002

-/* PRSC_CLK_CFG value */ -/* - * Fout = Fin / (2^(N+1) * (M + 1)) - */ -#define MISC_PRSC_N_1 0x00001000 -#define MISC_PRSC_M_9 0x00000009 -#define MISC_PRSC_N_4 0x00004000 -#define MISC_PRSC_M_399 0x0000018F -#define MISC_PRSC_N_6 0x00006000 -#define MISC_PRSC_M_2593 0x00000A21 -#define MISC_PRSC_M_124 0x0000007C -#define MISC_PRSC_CFG (MISC_PRSC_N_1 | MISC_PRSC_M_9) - -/* PERIPH1_CLKEN, PERIPH1_RST value */ +/* periph1_clken, periph1_rst */ +#define MISC_MPMCMSK 0x60000000 +#define MISC_MPMCWE 0x40000000 +#define MISC_MPMCENB 0x20000000 +#define MISC_USBHENB 0x02000000 #define MISC_USBDENB 0x01000000 #define MISC_ETHENB 0x00800000 #define MISC_SMIENB 0x00200000 @@ -174,106 +151,38 @@ struct misc_regs { #define MISC_I2CENB 0x00000080 #define MISC_SSP2ENB 0x00000070 #define MISC_UART0ENB 0x00000008 +#define MISC_PERIPH_RST_ALL 0x00000004

-/* PERIPH_CLK_CFG */ -#define XTALTIMEEN 0x00000001 -#define PLLTIMEEN 0x00000002 -#define CLCDCLK_SYNTH 0x00000000 -#define CLCDCLK_48MHZ 0x00000004 -#define CLCDCLK_EXT 0x00000008 -#define UARTCLK_MASK (0x1 << 4) -#define UARTCLK_48MHZ 0x00000000 -#define UARTCLK_SYNTH 0x00000010 -#define IRDACLK_48MHZ 0x00000000 -#define IRDACLK_SYNTH 0x00000020 -#define IRDACLK_EXT 0x00000040 -#define RTC_DISABLE 0x00000080 -#define GPT1CLK_48MHZ 0x00000000 -#define GPT1CLK_SYNTH 0x00000100 -#define GPT2CLK_48MHZ 0x00000000 -#define GPT2CLK_SYNTH 0x00000200 -#define GPT3CLK_48MHZ 0x00000000 -#define GPT3CLK_SYNTH 0x00000400 -#define GPT4CLK_48MHZ 0x00000000 -#define GPT4CLK_SYNTH 0x00000800 -#define GPT5CLK_48MHZ 0x00000000 -#define GPT5CLK_SYNTH 0x00001000 -#define GPT1_FREEZE 0x00002000 -#define GPT2_FREEZE 0x00004000 -#define GPT3_FREEZE 0x00008000 -#define GPT4_FREEZE 0x00010000 -#define GPT5_FREEZE 0x00020000 - -/* PERIPH1_CLKEN bits */ -#define PERIPH_ARM1_WE 0x00000001 -#define PERIPH_ARM1 0x00000002 -#define PERIPH_ARM2 0x00000004 -#define PERIPH_UART1 0x00000008 -#define PERIPH_UART2 0x00000010 -#define PERIPH_SSP1 0x00000020 -#define PERIPH_SSP2 0x00000040 -#define PERIPH_I2C 0x00000080 -#define PERIPH_JPEG 0x00000100 -#define PERIPH_FSMC 0x00000200 -#define PERIPH_FIRDA 0x00000400 -#define PERIPH_GPT4 0x00000800 -#define PERIPH_GPT5 0x00001000 -#define PERIPH_GPIO4 0x00002000 -#define PERIPH_SSP3 0x00004000 -#define PERIPH_ADC 0x00008000 -#define PERIPH_GPT3 0x00010000 -#define PERIPH_RTC 0x00020000 -#define PERIPH_GPIO3 0x00040000 -#define PERIPH_DMA 0x00080000 -#define PERIPH_ROM 0x00100000 -#define PERIPH_SMI 0x00200000 -#define PERIPH_CLCD 0x00400000 -#define PERIPH_GMAC 0x00800000 -#define PERIPH_USBD 0x01000000 -#define PERIPH_USBH1 0x02000000 -#define PERIPH_USBH2 0x04000000 -#define PERIPH_MPMC 0x08000000 -#define PERIPH_RAMW 0x10000000 -#define PERIPH_MPMC_EN 0x20000000 -#define PERIPH_MPMC_WE 0x40000000 -#define PERIPH_MPMCMSK 0x60000000 - -#define PERIPH_CLK_ALL 0x0FFFFFF8 -#define PERIPH_RST_ALL 0x00000004 - -/* DDR_PAD values */ -#define DDR_PAD_CNF_MSK 0x0000ffff -#define DDR_PAD_SW_CONF 0x00060000 -#define DDR_PAD_SSTL_SEL 0x00000001 -#define DDR_PAD_DRAM_TYPE 0x00008000 - -/* DDR_COMP values */ -#define DDR_COMP_ACCURATE 0x00000010 - -/* SoC revision stuff */ -#define SOC_PRI_SHFT 16 -#define SOC_SEC_SHFT 8 +/* soc_core_id */ +#define MISC_PRISOCID_SHFT 16 +#define MISC_SECSOCID_SHFT 8

-/* Revision definitions */ -#define SOC_SPEAR_NA 0 +/* synth_clk */ +#define MISC_SYNTH23 0x00020003

+/* prsc_clk_cfg */ /* - * The definitons have started from - * 101 for SPEAr6xx - * 201 for SPEAr3xx - * 301 for SPEAr13xx + * Fout = Fin / (2^(N+1) * (M + 1)) */ -#define SOC_SPEAR600_AA 101 -#define SOC_SPEAR600_AB 102 -#define SOC_SPEAR600_BA 103 -#define SOC_SPEAR600_BB 104 -#define SOC_SPEAR600_BC 105 -#define SOC_SPEAR600_BD 106 +#define MISC_PRSC_N_1 0x00001000 +#define MISC_PRSC_M_9 0x00000009 +#define MISC_PRSC_N_4 0x00004000 +#define MISC_PRSC_M_399 0x0000018F +#define MISC_PRSC_N_6 0x00006000 +#define MISC_PRSC_M_2593 0x00000A21 +#define MISC_PRSC_M_124 0x0000007C +#define MISC_PRSC_CFG (MISC_PRSC_N_1 | MISC_PRSC_M_9) + +/* amem_cfg_ctrl */ +#define MISC_AMEM_CLKENB 0x00000001

-#define SOC_SPEAR300 201 -#define SOC_SPEAR310 202 -#define SOC_SPEAR320 203 +/* ddr_compensation */ +#define MISC_DDR_COMP_ACCURATE 0x00000010

-extern int get_socrev(void); +/* ddr_pad */ +#define MISC_DDR_PAD_CNF_MSK 0x0000ffff +#define MISC_DDR_PAD_SW_CONF 0x00060000 +#define MISC_DDR_PAD_SSTL_SEL 0x00000001 +#define MISC_DDR_PAD_DRAM_TYPE 0x00008000

#endif diff --git a/arch/arm/include/asm/arch-spear/spear600.h b/arch/arm/include/asm/arch-spear/spear600.h index c8b0047..dd4f531 100644 --- a/arch/arm/include/asm/arch-spear/spear600.h +++ b/arch/arm/include/asm/arch-spear/spear600.h @@ -32,7 +32,10 @@ #define CONFIG_SYS_PLUG_BASE 0xE1200000 #define CONFIG_SYS_UHC0_EHCI_BASE 0xE1800000 #define CONFIG_SYS_SMI_BASE 0xFC000000 + #define CONFIG_SPEAR_MPMCBASE 0xFC600000 +#define CONFIG_SPEAR_MPMCREGS 100 + #define CONFIG_SPEAR_TIMERBASE 0xFC800000 #define CONFIG_SPEAR_SYSCNTLBASE 0xFCA00000 #define CONFIG_SPEAR_MISCBASE 0xFCA80000 @@ -42,4 +45,14 @@ #define CONFIG_SYS_NAND_CLE (1 << 16) #define CONFIG_SYS_NAND_ALE (1 << 17)

+#define SNOR_BOOT_SUPPORTED 1 +#define NAND_BOOT_SUPPORTED 1 +#define PNOR_BOOT_SUPPORTED 0 +#define USBD_BOOT_SUPPORTED 1 +#define TFTP_BOOT_SUPPORTED 0 +#define UART_BOOT_SUPPORTED 0 +#define MMC_BOOT_SUPPORTED 0 +#define SPI_BOOT_SUPPORTED 0 +#define I2C_BOOT_SUPPORTED 0 + #endif diff --git a/arch/arm/include/asm/arch-spear/syscntl.h b/arch/arm/include/asm/arch-spear/syscntl.h index 2393d89..f55ce92 100644 --- a/arch/arm/include/asm/arch-spear/syscntl.h +++ b/arch/arm/include/asm/arch-spear/syscntl.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef __SYSCTRL_H -#define __SYSCTRL_H +#ifndef ASM_ARCH_SPEAR_SYSCTRL_H +#define ASM_ARCH_SPEAR_SYSCTRL_H

struct syscntl_regs { u32 scctrl; @@ -40,13 +40,16 @@ struct syscntl_regs { const u32 scperstat; };

-#define MODE_SHIFT 0x00000003 +#define SYSCNTL_STATE_MASK (0x07 << 3) +#define SYSCNTL_STATE_NORMAL (0x04 << 3) +#define SYSCNTL_STATE_SLOW (0x02 << 3) +#define SYSCNTL_STATE_DOZE (0x01 << 3) +#define SYSCNTL_STATE_SLEEP (0x00 << 3) +#define SYSCNTL_REQ_NORMAL (0x04 << 0) +#define SYSCNTL_REQ_SLOW (0x02 << 0) +#define SYSCNTL_REQ_DOZE (0x01 << 0) +#define SYSCNTL_REQ_SLEEP (0x00 << 0)

-#define NORMAL 0x00000004 -#define SLOW 0x00000002 -#define DOZE 0x00000001 -#define SLEEP 0x00000000 - -#define PLL_TIM 0x01FFFFFF +#define SYSCNTL_PLL_TIM 0x01FFFFFF

#endif diff --git a/board/st/spear/config.mk b/board/st/spear/config.mk index 9533c5f..971d60a 100644 --- a/board/st/spear/config.mk +++ b/board/st/spear/config.mk @@ -21,4 +21,10 @@ # MA 02111-1307 USA #

+ifndef CONFIG_SPL_BUILD ALL-y += $(obj)u-boot.img + +ifdef CONFIG_MACH_SPEAR600EVB +ALL-y += $(obj)spl/u-boot-spl.img +endif +endif diff --git a/board/st/spear/ddr/Makefile b/board/st/spear/ddr/Makefile new file mode 100644 index 0000000..9f1c627 --- /dev/null +++ b/board/st/spear/ddr/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2012 +# Vipin Kumar, ST Microelectronics, vipin.kumar@st.com +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD)ddr.o + +SOBJS-y := +COBJS-y := + +ifdef CONFIG_SPL_BUILD +COBJS-$(CONFIG_DDR_MT47H64M16) += spear600_mt47h64m16_3_333_cl5_psync.o +COBJS-$(CONFIG_DDR_MT47H32M16) += spear600_mt47h32m16_333_cl5_psync.o +COBJS-$(CONFIG_DDR_MT47H32M16) += spear600_mt47h32m16_37e_166_cl4_sync.o +COBJS-$(CONFIG_DDR_MT47H128M8) += spear600_mt47h128m8_3_266_cl5_async.o +endif + +COBJS := $(sort $(COBJS-y)) +SOBJS := $(sort $(SOBJS-y)) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h128m8_3_266_cl5_async.c b/board/st/spear/ddr/spear600_mt47h128m8_3_266_cl5_async.c similarity index 95% rename from arch/arm/cpu/arm926ejs/spear/spr600_mt47h128m8_3_266_cl5_async.c rename to board/st/spear/ddr/spear600_mt47h128m8_3_266_cl5_async.c index 5edc115..abaa7b6 100644 --- a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h128m8_3_266_cl5_async.c +++ b/board/st/spear/ddr/spear600_mt47h128m8_3_266_cl5_async.c @@ -22,8 +22,9 @@ */

#include <common.h> +#include <asm/arch/hardware.h>

-#if (CONFIG_DDR_PLL2) +#if defined(CONFIG_ARCH_SPEAR6XX) && defined(CONFIG_SPEAR_DDR_PLL2)

const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = { 0x00000001, diff --git a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_333_cl5_psync.c b/board/st/spear/ddr/spear600_mt47h32m16_333_cl5_psync.c similarity index 91% rename from arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_333_cl5_psync.c rename to board/st/spear/ddr/spear600_mt47h32m16_333_cl5_psync.c index 616b861..65e7371 100644 --- a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_333_cl5_psync.c +++ b/board/st/spear/ddr/spear600_mt47h32m16_333_cl5_psync.c @@ -22,14 +22,16 @@ */

#include <common.h> +#include <asm/arch/hardware.h>

-#if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK) +#if defined(CONFIG_ARCH_SPEAR6XX) && \ + (defined(CONFIG_SPEAR_DDR_PLL2) || defined(CONFIG_SPEAR_DDR_2HCLK))

const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = { -#if (CONFIG_DDR_PLL2) +#if defined(CONFIG_SPEAR_DDR_PLL2) 0x00000001, 0x00000000, -#elif (CONFIG_DDR_2HCLK) +#elif defined(CONFIG_SPEAR_DDR_2HCLK) 0x02020201, 0x02020202, #endif diff --git a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c b/board/st/spear/ddr/spear600_mt47h32m16_37e_166_cl4_sync.c similarity index 95% rename from arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c rename to board/st/spear/ddr/spear600_mt47h32m16_37e_166_cl4_sync.c index b89f77d..1e4e0d9 100644 --- a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h32m16_37e_166_cl4_sync.c +++ b/board/st/spear/ddr/spear600_mt47h32m16_37e_166_cl4_sync.c @@ -22,8 +22,9 @@ */

#include <common.h> +#include <asm/arch/hardware.h>

-#if (CONFIG_DDR_HCLK) +#if defined(CONFIG_ARCH_SPEAR6XX) && defined(CONFIG_SPEAR_DDR_HCLK)

const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = { 0x03030301, diff --git a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h64m16_3_333_cl5_psync.c b/board/st/spear/ddr/spear600_mt47h64m16_3_333_cl5_psync.c similarity index 91% rename from arch/arm/cpu/arm926ejs/spear/spr600_mt47h64m16_3_333_cl5_psync.c rename to board/st/spear/ddr/spear600_mt47h64m16_3_333_cl5_psync.c index 0c39cd1..81cd706 100644 --- a/arch/arm/cpu/arm926ejs/spear/spr600_mt47h64m16_3_333_cl5_psync.c +++ b/board/st/spear/ddr/spear600_mt47h64m16_3_333_cl5_psync.c @@ -22,14 +22,16 @@ */

#include <common.h> +#include <asm/arch/hardware.h>

-#if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK) +#if defined(CONFIG_ARCH_SPEAR6XX) && \ + (defined(CONFIG_SPEAR_DDR_PLL2) || defined(CONFIG_SPEAR_DDR_2HCLK))

const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = { -#if (CONFIG_DDR_PLL2) +#if defined(CONFIG_SPEAR_DDR_PLL2) 0x00000001, 0x00000000, -#elif (CONFIG_DDR_2HCLK) +#elif defined(CONFIG_SPEAR_DDR_2HCLK) 0x02020201, 0x02020202, #endif diff --git a/board/st/spear/spear600evb.c b/board/st/spear/spear600evb.c index b5901e6..17828a3 100644 --- a/board/st/spear/spear600evb.c +++ b/board/st/spear/spear600evb.c @@ -79,3 +79,94 @@ int board_eth_init(bd_t *bis) return ret; } #endif + +#if defined(CONFIG_SPL_BUILD) +static void sel_1v8(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 ddr1v8, ddr2v5; + + ddr2v5 = readl(&misc_p->ddr_2v5_compensation); + ddr2v5 &= 0x8080ffc0; + ddr2v5 |= 0x78000003; + writel(ddr2v5, &misc_p->ddr_2v5_compensation); + + ddr1v8 = readl(&misc_p->ddr_1v8_compensation); + ddr1v8 &= 0x8080ffc0; + ddr1v8 |= 0x78000010; + writel(ddr1v8, &misc_p->ddr_1v8_compensation); + + while (!(readl(&misc_p->ddr_1v8_compensation) & MISC_DDR_COMP_ACCURATE)) + ; +} + +static void sel_2v5(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 ddr1v8, ddr2v5; + + ddr1v8 = readl(&misc_p->ddr_1v8_compensation); + ddr1v8 &= 0x8080ffc0; + ddr1v8 |= 0x78000003; + writel(ddr1v8, &misc_p->ddr_1v8_compensation); + + ddr2v5 = readl(&misc_p->ddr_2v5_compensation); + ddr2v5 &= 0x8080ffc0; + ddr2v5 |= 0x78000010; + writel(ddr2v5, &misc_p->ddr_2v5_compensation); + + while (!(readl(&misc_p->ddr_2v5_compensation) & MISC_DDR_COMP_ACCURATE)) + ; +} + +void board_ddr_init(void) +{ + struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 ddrpad; + u32 core3v3, ddr1v8, ddr2v5; + + /* DDR pad register configurations */ + ddrpad = readl(&misc_p->ddr_pad); + ddrpad &= ~MISC_DDR_PAD_CNF_MSK; + +#if defined(CONFIG_SPEAR_DDR_HCLK) + ddrpad |= 0xEAAB; +#elif defined(CONFIG_SPEAR_DDR_2HCLK) + ddrpad |= 0xEAAD; +#elif defined(CONFIG_SPEAR_DDR_PLL2) + ddrpad |= 0xEAAD; +#endif + writel(ddrpad, &misc_p->ddr_pad); + + /* Compensation register configurations */ + core3v3 = readl(&misc_p->core_3v3_compensation); + core3v3 &= 0x8080ffe0; + core3v3 |= 0x78000002; + writel(core3v3, &misc_p->core_3v3_compensation); + + ddr1v8 = readl(&misc_p->ddr_1v8_compensation); + ddr1v8 &= 0x8080ffc0; + ddr1v8 |= 0x78000004; + writel(ddr1v8, &misc_p->ddr_1v8_compensation); + + ddr2v5 = readl(&misc_p->ddr_2v5_compensation); + ddr2v5 &= 0x8080ffc0; + ddr2v5 |= 0x78000004; + writel(ddr2v5, &misc_p->ddr_2v5_compensation); + + if ((readl(&misc_p->ddr_pad) & MISC_DDR_PAD_SW_CONF) == + MISC_DDR_PAD_SW_CONF) { + /* Software memory configuration */ + if (readl(&misc_p->ddr_pad) & MISC_DDR_PAD_SSTL_SEL) + sel_1v8(); + else + sel_2v5(); + } else { + /* Hardware memory configuration */ + if (readl(&misc_p->ddr_pad) & MISC_DDR_PAD_DRAM_TYPE) + sel_1v8(); + else + sel_2v5(); + } +} +#endif diff --git a/include/configs/spear600.h b/include/configs/spear600.h index e64f26d..dfe8196 100644 --- a/include/configs/spear600.h +++ b/include/configs/spear600.h @@ -54,5 +54,16 @@ #define CONFIG_SYS_INIT_SP_ADDR (0xD2800000 + 0x2000 - \ GENERATED_GBL_DATA_SIZE)

+/* SPL configurations */ +#if defined(CONFIG_SPL) + #define CONFIG_SPL_NO_CPU_SUPPORT_CODE + #define CONFIG_SPL_LIBCOMMON_SUPPORT + #define CONFIG_SPL_LIBGENERIC_SUPPORT + #define CONFIG_SPL_MTD_SUPPORT + #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear" + #define CONFIG_SPL_LDSCRIPT \ + "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds" +#endif + #include <configs/spear.h> #endif /* __CONFIG_SPEAR600_H */ diff --git a/spl/Makefile b/spl/Makefile index 20a943c..e38467a 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -61,6 +61,10 @@ LIBS-$(CONFIG_SPL_NET_SUPPORT) += net/libnet.o LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o

+ifeq ($(BOARD),spear) +LIBS-y += board/$(BOARDDIR)/ddr/lib$(BOARD)ddr.o +endif + ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/cpu/arm926ejs/spear/Makefile | 2 ++ arch/arm/cpu/arm926ejs/spear/cpu.c | 3 +++ arch/arm/cpu/arm926ejs/spear/spear3xx.c | 43 +++++++++++++++++++++++++++++++ arch/arm/cpu/arm926ejs/spear/spear6xx.c | 43 +++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-spear/generic.h | 3 +++ drivers/usb/host/ehci-spear.c | 9 ++++++- 6 files changed, 102 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm926ejs/spear/spear3xx.c create mode 100644 arch/arm/cpu/arm926ejs/spear/spear6xx.c

diff --git a/arch/arm/cpu/arm926ejs/spear/Makefile b/arch/arm/cpu/arm926ejs/spear/Makefile index 3fe7e26..7d11035 100644 --- a/arch/arm/cpu/arm926ejs/spear/Makefile +++ b/arch/arm/cpu/arm926ejs/spear/Makefile @@ -30,6 +30,8 @@ COBJS-y := cpu.o \ timer.o

COBJS-$(CONFIG_ST_EMI) += emi.o +COBJS-$(CONFIG_ARCH_SPEAR3XX) += spear3xx.o +COBJS-$(CONFIG_ARCH_SPEAR6XX) += spear6xx.o

ifdef CONFIG_SPL_BUILD COBJS-y += spl.o spl_boot.o diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index d7608b2..59655f5 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -88,6 +88,9 @@ int arch_cpu_init(void) #if defined(CONFIG_NAND_FSMC) periph1_clken |= MISC_FSMCENB; #endif +#if defined(CONFIG_USB_EHCI_SPEAR) + periph1_clken |= MISC_USBHENB; +#endif

writel(periph1_clken, &misc_p->periph1_clken);

diff --git a/arch/arm/cpu/arm926ejs/spear/spear3xx.c b/arch/arm/cpu/arm926ejs/spear/spear3xx.c new file mode 100644 index 0000000..7a85fa9 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/spear/spear3xx.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/misc.h> + +#if defined(CONFIG_USB_EHCI_SPEAR) +void spear3xx_usbh_stop(void) +{ + struct misc_regs *const misc_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 periph1_rst = readl(misc_p->periph1_rst); + + periph1_rst |= MISC_USBHENB; + writel(periph1_rst, misc_p->periph1_rst); + + udelay(1000); + periph1_rst &= ~MISC_USBHENB; + writel(periph1_rst, misc_p->periph1_rst); +} +#endif diff --git a/arch/arm/cpu/arm926ejs/spear/spear6xx.c b/arch/arm/cpu/arm926ejs/spear/spear6xx.c new file mode 100644 index 0000000..0a798ec --- /dev/null +++ b/arch/arm/cpu/arm926ejs/spear/spear6xx.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2012 + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/misc.h> + +#if defined(CONFIG_USB_EHCI_SPEAR) +void spear6xx_usbh_stop(void) +{ + struct misc_regs *const misc_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 periph1_rst = readl(misc_p->periph1_rst); + + periph1_rst |= MISC_USBHENB; + writel(periph1_rst, misc_p->periph1_rst); + + udelay(1000); + periph1_rst &= ~MISC_USBHENB; + writel(periph1_rst, misc_p->periph1_rst); +} +#endif diff --git a/arch/arm/include/asm/arch-spear/generic.h b/arch/arm/include/asm/arch-spear/generic.h index 68a775e..b7026e2 100644 --- a/arch/arm/include/asm/arch-spear/generic.h +++ b/arch/arm/include/asm/arch-spear/generic.h @@ -30,6 +30,9 @@ extern unsigned int setfreq_sz; extern void board_ddr_init(void); extern void board_lowlevel_late_init(void);

+extern void spear3xx_usbh_stop(void); +extern void spear6xx_usbh_stop(void); + extern u32 mpmc_conf_vals[];

/* diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c index f99bd1f..71c4ea2 100644 --- a/drivers/usb/host/ehci-spear.c +++ b/drivers/usb/host/ehci-spear.c @@ -30,7 +30,7 @@ #include <usb.h> #include "ehci.h" #include <asm/arch/hardware.h> - +#include <asm/arch/generic.h>

/* * Create the appropriate control structures to manage @@ -55,5 +55,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) */ int ehci_hcd_stop(int index) { +#if defined(CONFIG_ARCH_SPEAR3XX) + spear3xx_usbh_stop(); +#elif defined(CONFIG_ARCH_SPEAR6XX) + spear6xx_usbh_stop(); +#else +#error No spear platforms defined +#endif return 0; }