[PATCH v1 0/2] pinctrl single: GPIO support

From: Bharat Gooty bharat.gooty@broadcom.com
pinctrl-single:- Add support to parse "pinctrl-single,gpio-range" and "#pinctrl-single,gpio-range-cells" DT properties
Add pinctrl_ops request()
Bharat Gooty (2): pinctrl: single: Parse gpio details from dt pinctrl: single: Add request() api
drivers/pinctrl/pinctrl-single.c | 86 ++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+)

From: Bharat Gooty bharat.gooty@broadcom.com
Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com --- drivers/pinctrl/pinctrl-single.c | 52 ++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index cf9ad3670f..0f96cd5870 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -8,6 +8,7 @@ #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> +#include <dm/of_access.h> #include <dm/pinctrl.h> #include <linux/libfdt.h> #include <linux/list.h> @@ -44,11 +45,27 @@ struct single_func { unsigned int *pins; };
+/** + * struct single_gpiofunc_range - pin ranges with same mux value of gpio fun + * @offset: offset base of pins + * @npins: number pins with the same mux value of gpio function + * @gpiofunc: mux value of gpio function + * @node: list node + */ +struct single_gpiofunc_range { + u32 offset; + u32 npins; + u32 gpiofunc; + struct list_head node; +}; + /** * struct single_priv - private data * @bits_per_pin: number of bits per pin * @npins: number of selectable pins * @pin_name: temporary buffer to store the pin name + * @functions: list pin functions + * @gpiofuncs: list gpio functions */ struct single_priv { #if (IS_ENABLED(CONFIG_SANDBOX)) @@ -58,6 +75,7 @@ struct single_priv { unsigned int npins; char pin_name[PINNAME_SIZE]; struct list_head functions; + struct list_head gpiofuncs; };
/** @@ -454,6 +472,36 @@ static int single_get_pins_count(struct udevice *dev) return priv->npins; }
+static int single_add_gpio_func(struct udevice *dev) +{ + struct single_priv *priv = dev_get_priv(dev); + const char *propname = "pinctrl-single,gpio-range"; + const char *cellname = "#pinctrl-single,gpio-range-cells"; + struct single_gpiofunc_range *range; + struct ofnode_phandle_args gpiospec; + int ret, i; + + for (i = 0; ; i++) { + ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), propname, + cellname, 0, i, &gpiospec); + /* Do not treat it as error. Only treat it as end condition. */ + if (ret) { + ret = 0; + break; + } + range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL); + if (!range) { + ret = -ENOMEM; + break; + } + range->offset = gpiospec.args[0]; + range->npins = gpiospec.args[1]; + range->gpiofunc = gpiospec.args[2]; + list_add_tail(&range->node, &priv->gpiofuncs); + } + return ret; +} + static int single_probe(struct udevice *dev) { struct single_pdata *pdata = dev_get_plat(dev); @@ -461,6 +509,7 @@ static int single_probe(struct udevice *dev) u32 size;
INIT_LIST_HEAD(&priv->functions); + INIT_LIST_HEAD(&priv->gpiofuncs);
size = pdata->offset + pdata->width / BITS_PER_BYTE; #if (CONFIG_IS_ENABLED(SANDBOX)) @@ -483,6 +532,9 @@ static int single_probe(struct udevice *dev) priv->npins *= (pdata->width / priv->bits_per_pin); }
+ if (single_add_gpio_func(dev)) + dev_dbg(dev, "gpio functions are not added\n"); + dev_dbg(dev, "%d pins\n", priv->npins); return 0; }

On Tue, Aug 24, 2021 at 3:46 PM Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com
drivers/pinctrl/pinctrl-single.c | 52 ++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index cf9ad3670f..0f96cd5870 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -8,6 +8,7 @@ #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> +#include <dm/of_access.h> #include <dm/pinctrl.h> #include <linux/libfdt.h> #include <linux/list.h> @@ -44,11 +45,27 @@ struct single_func { unsigned int *pins; };
+/**
- struct single_gpiofunc_range - pin ranges with same mux value of gpio fun
- @offset: offset base of pins
- @npins: number pins with the same mux value of gpio function
- @gpiofunc: mux value of gpio function
- @node: list node
- */
+struct single_gpiofunc_range {
u32 offset;
u32 npins;
u32 gpiofunc;
struct list_head node;
+};
/**
- struct single_priv - private data
- @bits_per_pin: number of bits per pin
- @npins: number of selectable pins
- @pin_name: temporary buffer to store the pin name
- @functions: list pin functions
*/
- @gpiofuncs: list gpio functions
struct single_priv { #if (IS_ENABLED(CONFIG_SANDBOX)) @@ -58,6 +75,7 @@ struct single_priv { unsigned int npins; char pin_name[PINNAME_SIZE]; struct list_head functions;
struct list_head gpiofuncs;
};
/** @@ -454,6 +472,36 @@ static int single_get_pins_count(struct udevice *dev) return priv->npins; }
+static int single_add_gpio_func(struct udevice *dev) +{
struct single_priv *priv = dev_get_priv(dev);
const char *propname = "pinctrl-single,gpio-range";
const char *cellname = "#pinctrl-single,gpio-range-cells";
struct single_gpiofunc_range *range;
struct ofnode_phandle_args gpiospec;
int ret, i;
for (i = 0; ; i++) {
ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), propname,
cellname, 0, i, &gpiospec);
/* Do not treat it as error. Only treat it as end condition. */
if (ret) {
ret = 0;
break;
}
range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL);
if (!range) {
ret = -ENOMEM;
break;
}
range->offset = gpiospec.args[0];
range->npins = gpiospec.args[1];
range->gpiofunc = gpiospec.args[2];
list_add_tail(&range->node, &priv->gpiofuncs);
}
return ret;
+}
static int single_probe(struct udevice *dev) { struct single_pdata *pdata = dev_get_plat(dev); @@ -461,6 +509,7 @@ static int single_probe(struct udevice *dev) u32 size;
INIT_LIST_HEAD(&priv->functions);
INIT_LIST_HEAD(&priv->gpiofuncs); size = pdata->offset + pdata->width / BITS_PER_BYTE; #if (CONFIG_IS_ENABLED(SANDBOX))
@@ -483,6 +532,9 @@ static int single_probe(struct udevice *dev) priv->npins *= (pdata->width / priv->bits_per_pin); }
if (single_add_gpio_func(dev))
dev_dbg(dev, "gpio functions are not added\n");
dev_dbg(dev, "%d pins\n", priv->npins); return 0;
}
2.17.1
Acked-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com

Hi Bharat,
On Tue, 24 Aug 2021 at 04:16, Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com
drivers/pinctrl/pinctrl-single.c | 52 ++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)
Looks OK but please update the pinctrl.c test. Also please see below.
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index cf9ad3670f..0f96cd5870 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -8,6 +8,7 @@ #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> +#include <dm/of_access.h> #include <dm/pinctrl.h> #include <linux/libfdt.h> #include <linux/list.h> @@ -44,11 +45,27 @@ struct single_func { unsigned int *pins; };
+/**
- struct single_gpiofunc_range - pin ranges with same mux value of gpio fun
fun?
- @offset: offset base of pins
- @npins: number pins with the same mux value of gpio function
- @gpiofunc: mux value of gpio function
- @node: list node
- */
+struct single_gpiofunc_range {
u32 offset;
u32 npins;
u32 gpiofunc;
struct list_head node;
+};
/**
- struct single_priv - private data
- @bits_per_pin: number of bits per pin
- @npins: number of selectable pins
- @pin_name: temporary buffer to store the pin name
- @functions: list pin functions
*/
- @gpiofuncs: list gpio functions
struct single_priv { #if (IS_ENABLED(CONFIG_SANDBOX)) @@ -58,6 +75,7 @@ struct single_priv { unsigned int npins; char pin_name[PINNAME_SIZE]; struct list_head functions;
struct list_head gpiofuncs;
};
/** @@ -454,6 +472,36 @@ static int single_get_pins_count(struct udevice *dev) return priv->npins; }
+static int single_add_gpio_func(struct udevice *dev) +{
struct single_priv *priv = dev_get_priv(dev);
const char *propname = "pinctrl-single,gpio-range";
Can you please add the binding for this to U-Boot?
const char *cellname = "#pinctrl-single,gpio-range-cells";
struct single_gpiofunc_range *range;
struct ofnode_phandle_args gpiospec;
int ret, i;
for (i = 0; ; i++) {
ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), propname,
cellname, 0, i, &gpiospec);
/* Do not treat it as error. Only treat it as end condition. */
if (ret) {
ret = 0;
break;
}
range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL);
if (!range) {
ret = -ENOMEM;
break;
}
range->offset = gpiospec.args[0];
range->npins = gpiospec.args[1];
range->gpiofunc = gpiospec.args[2];
list_add_tail(&range->node, &priv->gpiofuncs);
}
return ret;
+}
static int single_probe(struct udevice *dev) { struct single_pdata *pdata = dev_get_plat(dev); @@ -461,6 +509,7 @@ static int single_probe(struct udevice *dev) u32 size;
INIT_LIST_HEAD(&priv->functions);
INIT_LIST_HEAD(&priv->gpiofuncs); size = pdata->offset + pdata->width / BITS_PER_BYTE; #if (CONFIG_IS_ENABLED(SANDBOX))
@@ -483,6 +532,9 @@ static int single_probe(struct udevice *dev) priv->npins *= (pdata->width / priv->bits_per_pin); }
if (single_add_gpio_func(dev))
dev_dbg(dev, "gpio functions are not added\n");
return the error here
dev_dbg(dev, "%d pins\n", priv->npins); return 0;
}
2.17.1
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Plesew drop this
Regards, Simon

On Tue, Aug 24, 2021 at 03:46:31PM +0530, Bharat Kumar Reddy Gooty wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com Acked-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com
Applied to u-boot/master, thanks!

From: Bharat Gooty bharat.gooty@broadcom.com
Add pinctrl_ops->request api to configure pctrl pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com --- drivers/pinctrl/pinctrl-single.c | 34 ++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 0f96cd5870..8fc07e3498 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -250,6 +250,39 @@ static int single_get_pin_muxing(struct udevice *dev, unsigned int pin, return 0; }
+static int single_request(struct udevice *dev, int pin, int flags) +{ + struct single_priv *priv = dev_get_priv(dev); + struct single_pdata *pdata = dev_get_plat(dev); + struct single_gpiofunc_range *frange = NULL; + struct list_head *pos, *tmp; + phys_addr_t reg; + int mux_bytes = 0; + u32 data; + + /* If function mask is null, needn't enable it. */ + if (!pdata->mask) + return -ENOTSUPP; + + list_for_each_safe(pos, tmp, &priv->gpiofuncs) { + frange = list_entry(pos, struct single_gpiofunc_range, node); + if ((pin >= frange->offset + frange->npins) || + pin < frange->offset) + continue; + + mux_bytes = pdata->width / BITS_PER_BYTE; + reg = pdata->base + pin * mux_bytes; + + data = single_read(dev, reg); + data &= ~pdata->mask; + data |= frange->gpiofunc; + single_write(dev, data, reg); + break; + } + + return 0; +} + static struct single_func *single_allocate_function(struct udevice *dev, unsigned int group_pins) { @@ -587,6 +620,7 @@ const struct pinctrl_ops single_pinctrl_ops = { .get_pin_name = single_get_pin_name, .set_state = single_set_state, .get_pin_muxing = single_get_pin_muxing, + .request = single_request, };
static const struct udevice_id single_pinctrl_match[] = {

On Tue, Aug 24, 2021 at 3:46 PM Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Add pinctrl_ops->request api to configure pctrl pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com
drivers/pinctrl/pinctrl-single.c | 34 ++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 0f96cd5870..8fc07e3498 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -250,6 +250,39 @@ static int single_get_pin_muxing(struct udevice *dev, unsigned int pin, return 0; }
+static int single_request(struct udevice *dev, int pin, int flags) +{
struct single_priv *priv = dev_get_priv(dev);
struct single_pdata *pdata = dev_get_plat(dev);
struct single_gpiofunc_range *frange = NULL;
struct list_head *pos, *tmp;
phys_addr_t reg;
int mux_bytes = 0;
u32 data;
/* If function mask is null, needn't enable it. */
if (!pdata->mask)
return -ENOTSUPP;
list_for_each_safe(pos, tmp, &priv->gpiofuncs) {
frange = list_entry(pos, struct single_gpiofunc_range, node);
if ((pin >= frange->offset + frange->npins) ||
pin < frange->offset)
continue;
mux_bytes = pdata->width / BITS_PER_BYTE;
reg = pdata->base + pin * mux_bytes;
data = single_read(dev, reg);
data &= ~pdata->mask;
data |= frange->gpiofunc;
single_write(dev, data, reg);
break;
}
return 0;
+}
static struct single_func *single_allocate_function(struct udevice *dev, unsigned int group_pins) { @@ -587,6 +620,7 @@ const struct pinctrl_ops single_pinctrl_ops = { .get_pin_name = single_get_pin_name, .set_state = single_set_state, .get_pin_muxing = single_get_pin_muxing,
.request = single_request,
};
static const struct udevice_id single_pinctrl_match[] = {
2.17.1
Acked-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com

On Mon, 13 Sept 2021 at 00:39, Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com wrote:
On Tue, Aug 24, 2021 at 3:46 PM Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Add pinctrl_ops->request api to configure pctrl pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com
drivers/pinctrl/pinctrl-single.c | 34 ++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org

On Tue, Aug 24, 2021 at 03:46:32PM +0530, Bharat Kumar Reddy Gooty wrote:
From: Bharat Gooty bharat.gooty@broadcom.com
Add pinctrl_ops->request api to configure pctrl pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com Acked-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
participants (4)
-
Bharat Kumar Reddy Gooty
-
Rayagonda Kokatanur
-
Simon Glass
-
Tom Rini