[U-Boot-Users] RE: problems with the strataflash driver in U-boot
Josh, Use the flash driver in drivers/cfi_flash.c - this is a much better version. A number of people have helped make improvements over the original strataflash driver. I use this driver in a 4 chip16 x 64 and a 2 chip 16 x 32 implementations. If you have 4 chips in parrallel it should detect a 16x64 bit interface. Brad
-----Original Message----- From: Josh Fryman [mailto:fryman@cc.gatech.edu] Sent: Sun 2/15/2004 2:48 PM To: u-boot-users@lists.sourceforge.net Cc: Brad Kemp Subject: problems with the strataflash driver in U-boot
hi, the strataflash driver (used in the U-boot boot loader project) is getting confused by the configuration of flash i've got. i'm CC'ing Brad Kemp, the author of the driver, as i'm not sure he's a developer of U-boot. the intel sitsang platform has the 28F128J3 (A150) on it. it has 4 of these 16MB chips, set up to make a 32-bit wide flash interface. the address lines and flash bank enables are shared for both chips in a block. ie: 0-32MB: high-data chip 1 low-data chip 0 32-64MB: high-data chip 3 low-data chip 2 should the driver support this? it seems to be getting very confused right in the beginnining of initialization, with flash_get_size() calling flash_isequal() which does this pattern of data xfer... (i've tossed in a lot of debug statements :) Flash Driver initializing... flash_isequal: tgt = 00000010 (sect 0 ofs 16) flash_isequal: cptr-8[0]=0x14, cword=0x51 flash_isequal: retval = 0 flash_isequal: tgt = 00000020 (sect 0 ofs 16) flash_isequal: cptr-16[0]=0x0000, cword=0x5151 flash_isequal: retval = 0 flash_isequal: tgt = 00000020 (sect 0 ofs 16) flash_isequal: cptr-16[0]=0x0260, cword=0x5100 flash_isequal: retval = 0 flash_isequal: tgt = 00000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0x00510051, cword=0x51515151 flash_isequal: retval = 0 flash_isequal: tgt = 00000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0xa1fe0000, cword=0x51005100 flash_isequal: retval = 0 flash_isequal: tgt = 00000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0xa1fe0000, cword=0x51000000 flash_isequal: retval = 0 flash detect base 0, bank 0 failed Flash bank 0 reported size 0x00000000 ## Unknown FLASH on Bank 0 - Size = 0x00000000 = 0x00000000 MB flash_isequal: tgt = 02000010 (sect 0 ofs 16) flash_isequal: cptr-8[0]=0x0e, cword=0x51 flash_isequal: retval = 0 flash_isequal: tgt = 02000020 (sect 0 ofs 16) flash_isequal: cptr-16[0]=0x0000, cword=0x5151 flash_isequal: retval = 0 flash_isequal: tgt = 02000020 (sect 0 ofs 16) flash_isequal: cptr-16[0]=0xe195, cword=0x5100 flash_isequal: retval = 0 flash_isequal: tgt = 02000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0x00510051, cword=0x51515151 flash_isequal: retval = 0 flash_isequal: tgt = 02000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0x2523fa29, cword=0x51005100 flash_isequal: retval = 0 flash_isequal: tgt = 02000040 (sect 0 ofs 16) flash_isequal: cptr-32[0]=0x2523fa29, cword=0x51000000 flash_isequal: retval = 0 flash detect base 33554432, bank 1 failed Flash bank 1 reported size 0x00000000 ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0x00000000 MB Flash driver done... returning size 0 Flash: 0 kB do i just have the permutation of CFG_foo flags set wrong? thanks for any input, -josh
no dice. here's the configuration in chip terms, followed by my config settings, followed by the driver ouput.
suggestions?
-josh
two banks. each bank is 32bit data, 32MB in size, made up of 2 chips in parallel. each chip is 16MB x 16bit data, organized as (128) 128KB sectors.
wiring: 0-32MB = 2x Intel 28F128J3A-150
address space 0x0000 0000 - 0200 0000
Shared: Flash A0 = Gnd Flash A1:A23 = PXA A2:24 Flash CE = PXA FlashBank 0 CE
Separate: Chip A: D00:15 = PXA D00:15 Chip B: D16:31 = PXA D16:31
address space 0x0200 0000 - 0400 0000
Shared: Flash A0 = Gnd Flash A1:A23 = PXA A2:24 Flash CE = PXA FlashBank 1 CE
Separate: Chip A: D00:15 = PXA D00:15 Chip B: D16:31 = PXA D16:31
config flags:
/* * FLASH and environment organization */ #define CFG_MAX_FLASH_BANKS 2 #define CFG_MAX_FLASH_SECT 256 #define PHYS_FLASH_1 0x00000000 #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 128 KB sectors, but x2 (2chips) */ #define CFG_MONITOR_LEN 0x00040000 /* set aside space for U-boot */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x03f00000) #define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE #define CFG_FLASH_BASE PHYS_FLASH_1 #define CFG_FLASH_USE_BUFFER_WRITE #define CFG_FLASH_CFI #define CFG_FLASH_CFI_DRIVER #define CFG_MONITOR_BASE CFG_FLASH_BASE /* where does the monitor live? */
output on hardware:
U-Boot 1.0.2 (Feb 15 2004 - 19:37:14)
U-Boot code: A1FE0000 -> A200A798 BSS: -> A203EE88 RAM Configuration: Bank #0: a1ffaf2c 2592 MB flash detect cfi fwc addr 00000000 cmd ff ff 8bit x 8 bit fwc addr 00000055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr 00000010 is= 14 51 fwc addr 00000000 cmd ff ffff 16bit x 8 bit fwc addr 000000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr 00000020 is= 0260 5151 fwc addr 00000000 cmd ff ff00 16bit x 16 bit fwc addr 000000aa cmd 98 9800 16bit x 16 bit is= cmd 51(Q) addr 00000020 is= 0260 5100 fwc addr 00000000 cmd ff ffffffff 32bit x 8 bit fwc addr 00000154 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr 00000040 is= 00510051 51515151 fwc addr 00000000 cmd ff ff00ff00 32bit x 16 bit fwc addr 00000154 cmd 98 98009800 32bit x 16 bit is= cmd 51(Q) addr 00000040 is= a1fe0000 51005100 fwc addr 00000000 cmd ff ff000000 32bit x 32 bit fwc addr 00000154 cmd 98 98000000 32bit x 32 bit is= cmd 51(Q) addr 00000040 is= a1fe0000 51000000 fwrite addr 00000000 cmd ff ffffffffffffffff 64 bit x 8 bit fwrite addr 000002a8 cmd 98 9898989898989898 64 bit x 8 bit is= cmd 51(Q) addr 00000080 is= 070007000a000a00 5151515151515151 fwrite addr 00000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit fwrite addr 000002a8 cmd 98 0098009800980098 64 bit x 16 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0051005100510051 fwrite addr 00000000 cmd ff 000000ff000000ff 64 bit x 32 bit fwrite addr 000002a8 cmd 98 0000009800000098 64 bit x 32 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0000005100000051 fwrite addr 00000000 cmd ff 00000000000000ff 64 bit x 64 bit fwrite addr 000002a8 cmd 98 0000000000000098 64 bit x 64 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0000000000000051 not found ## Unknown FLASH on Bank 0 - Size = 0x00000000 = 0 MB flash detect cfi fwc addr 00000000 cmd ff ff 8bit x 8 bit fwc addr 00000055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr 00000010 is= 14 51 fwc addr 00000000 cmd ff ffff 16bit x 8 bit fwc addr 000000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr 00000020 is= 0260 5151 fwc addr 00000000 cmd ff ff00 16bit x 16 bit fwc addr 000000aa cmd 98 9800 16bit x 16 bit is= cmd 51(Q) addr 00000020 is= 0260 5100 fwc addr 00000000 cmd ff ffffffff 32bit x 8 bit fwc addr 00000154 cmd 98 98989898 32bit x 8 bit is= cmd 51(Q) addr 00000040 is= 00510051 51515151 fwc addr 00000000 cmd ff ff00ff00 32bit x 16 bit fwc addr 00000154 cmd 98 98009800 32bit x 16 bit is= cmd 51(Q) addr 00000040 is= a1fe0000 51005100 fwc addr 00000000 cmd ff ff000000 32bit x 32 bit fwc addr 00000154 cmd 98 98000000 32bit x 32 bit is= cmd 51(Q) addr 00000040 is= a1fe0000 51000000 fwrite addr 00000000 cmd ff ffffffffffffffff 64 bit x 8 bit fwrite addr 000002a8 cmd 98 9898989898989898 64 bit x 8 bit is= cmd 51(Q) addr 00000080 is= 070007000a000a00 5151515151515151 fwrite addr 00000000 cmd ff 00ff00ff00ff00ff 64 bit x 16 bit fwrite addr 000002a8 cmd 98 0098009800980098 64 bit x 16 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0051005100510051 fwrite addr 00000000 cmd ff 000000ff000000ff 64 bit x 32 bit fwrite addr 000002a8 cmd 98 0000009800000098 64 bit x 32 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0000005100000051 fwrite addr 00000000 cmd ff 00000000000000ff 64 bit x 64 bit fwrite addr 000002a8 cmd 98 0000000000000098 64 bit x 64 bit is= cmd 51(Q) addr 00000080 is= 9c649fe5005096e5 0000000000000051 not found ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB Flash: 0 kB *** Warning - bad CRC, using default environment
two banks. each bank is 32bit data, 32MB in size, made up of 2 chips in parallel. each chip is 16MB x 16bit data, organized as (128) 128KB sectors.
sigh. sorry, my brain is fried after this weekend.
i meant, each chip is 8MB x 16bit == 16Mbyte.
any suggestions most welcome.
thanks,
-josh
Josh,
no dice. here's the configuration in chip terms, followed by my config settings, followed by the driver ouput.
suggestions?
I might be pointing the obvious but did you take out older strataflash.c/o from your board Makefile? If not there can be conflict! Do a "make mrproper" first so that dependencies are generated properly as well.
I used Brad's latest driver in 2x16bit(chipwidth)=32bit bus configuration (using Intel 28F128J3) without any problem.
Best regards, Tolunay
I might be pointing the obvious but did you take out older strataflash.c/o from your board Makefile? If not there can be conflict! Do a "make mrproper" first so that dependencies are generated properly as well.
not a silly observation at all. i got caught by this exact issue when i moved from a custom flash.c -> strataflash.c. in this case of moving from strataflash.c -> cfi_flash.c, i remembered to fix the makefile.
i tend to use "make distclean", "make sistang_config", "make" whenever seriously modifying dependencies or the like. it appears that the cfi_flash.c is the one being run.
thanks for the suggestion.
any others?
-j
participants (3)
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Brad Kemp -
Josh Fryman -
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