[PATCH] arm64: zynqmp: Switch to amd.com emails

10 Jul 2023

diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts b/arch/arm/dts/avnet-ultra96-rev1.dts
index ddb8febaece1..96a6403efaf3 100644
--- a/arch/arm/dts/avnet-ultra96-rev1.dts
+++ b/arch/arm/dts/avnet-ultra96-rev1.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2018 - 2020, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts
index 1863d29d3dac..bd685ddfdb42 100644
--- a/arch/arm/dts/versal-mini-emmc0.dts
+++ b/arch/arm/dts/versal-mini-emmc0.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018-2019, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts
index 8701c3bb2732..fbdcf5d77f56 100644
--- a/arch/arm/dts/versal-mini-emmc1.dts
+++ b/arch/arm/dts/versal-mini-emmc1.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018-2019, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi
index 2d04521dd679..19caea7368a0 100644
--- a/arch/arm/dts/versal-mini-ospi.dtsi
+++ b/arch/arm/dts/versal-mini-ospi.dtsi
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018-2019, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi
index bb8819dd25ff..2fec92ce3ec8 100644
--- a/arch/arm/dts/versal-mini-qspi.dtsi
+++ b/arch/arm/dts/versal-mini-qspi.dtsi
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018-2019, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts
index 769eb9e7b294..a213b745bc26 100644
--- a/arch/arm/dts/versal-mini.dts
+++ b/arch/arm/dts/versal-mini.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts
index cfe07102297b..d06838c5eeb3 100644
--- a/arch/arm/dts/zynq-dlc20-rev1.0.dts
+++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts
@@ -2,7 +2,7 @@
 /*
  * Copyright (C) 2018 Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
 #include "zynq-7000.dtsi"
diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts
index 38365d1c0ecb..3214ee49e283 100644
--- a/arch/arm/dts/zynq-minized.dts
+++ b/arch/arm/dts/zynq-minized.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2018, Xilinx, Inc.
  *
- * Ibai Erkiaga ibai.erkiaga-elorza@xilinx.com
+ * Ibai Erkiaga ibai.erkiaga-elorza@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-a2197-revA.dts b/arch/arm/dts/zynqmp-a2197-revA.dts
index 04f9f025e5ca..84167050d10e 100644
--- a/arch/arm/dts/zynqmp-a2197-revA.dts
+++ b/arch/arm/dts/zynqmp-a2197-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 38dc9cd8fc05..173e4bc5f1d8 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts
index 7460e4a4fdea..e287a9b6591c 100644
--- a/arch/arm/dts/zynqmp-dlc21-revA.dts
+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index 3fa18f560c9c..e24d070adb69 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index 02d2427809d5..b185669b9c5e 100644
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 2d7fe592c8f9..aa4f7c23ede5 100644
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index e46748d32c03..7aa8c2b4d1f6 100644
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index f564817e2c84..459736abe6bc 100644
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts
index d1e58eb6d135..08ec2f7b4a9a 100644
--- a/arch/arm/dts/zynqmp-mini-emmc0.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2018, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts
index 0c139f82aa0b..905de08fdb0b 100644
--- a/arch/arm/dts/zynqmp-mini-emmc1.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2018, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts
index 8fae01b250d4..e5688fd703e6 100644
--- a/arch/arm/dts/zynqmp-mini-nand.dts
+++ b/arch/arm/dts/zynqmp-mini-nand.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts
index a7cf4eff6cc2..fc0a2e801e49 100644
--- a/arch/arm/dts/zynqmp-mini-qspi.dts
+++ b/arch/arm/dts/zynqmp-mini-qspi.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2015 - 2020, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts
index 15bee169a90c..b9a24f043635 100644
--- a/arch/arm/dts/zynqmp-mini.dts
+++ b/arch/arm/dts/zynqmp-mini.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index d63deb83e3c6..d5f4a16f20eb 100644
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2019, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 /dts-v1/;
diff --git a/arch/arm/dts/zynqmp-r5.dts b/arch/arm/dts/zynqmp-r5.dts
index 9789d7144e6f..77b15fe158cf 100644
--- a/arch/arm/dts/zynqmp-r5.dts
+++ b/arch/arm/dts/zynqmp-r5.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2018, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
index c82e1dfac9da..95347604a27b 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
index 9dd160c7a7c9..26ac540e7b0e 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2021 - 2022, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
index 6f5a42606568..2b6c3946e858 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
@@ -9,7 +9,7 @@
  * "Y" – A01 board modified with legacy interposer (Nexperia)
  * "Z" – A01 board modified with Diode interposer
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
index 7764adf1295f..308d7876b882 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2020 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index eac0b55de368..e9ec4b79fc1f 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2020 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-smk-k26-revA.dts b/arch/arm/dts/zynqmp-smk-k26-revA.dts
index c70966c1f344..85b0d1677240 100644
--- a/arch/arm/dts/zynqmp-smk-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-smk-k26-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2020 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include "zynqmp-sm-k26-revA.dts"
diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts
index 63c553f77242..a288029797b6 100644
--- a/arch/arm/dts/zynqmp-zc1232-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1232-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts
index 343033cc7e88..5c4acd17cc5d 100644
--- a/arch/arm/dts/zynqmp-zc1254-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1254-revA.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2015 - 2020, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index 7ea2a1c96f4e..b663651583c3 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2015 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index b6bc2f5be031..9d0cf11665c6 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2015 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
index 6021f8b4e1be..69ad58039e79 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index e153a64f4fb6..3017c9b29a2b 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2015 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
index ae2d03d98322..7f973fcf4da4 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2015 - 2021, Xilinx, Inc.
  *
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
- * Michal Simek michal.simek@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 742a53986467..116037dbe73f 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  * Nathalie Chan King Choy
  */
diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
index d508f3359943..c0a4d913afea 100644
--- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
+++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2020, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include "zynqmp-zcu102-revB.dts"
diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.1.dts b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts
index b6798394fcf4..705369766a55 100644
--- a/arch/arm/dts/zynqmp-zcu102-rev1.1.dts
+++ b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2020, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include "zynqmp-zcu102-rev1.0.dts"
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index d78bfb8987fc..8823eb2462e4 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2015 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts
index de3b5ab9d93b..ce0a6e5f60a7 100644
--- a/arch/arm/dts/zynqmp-zcu102-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revB.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2020, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include "zynqmp-zcu102-revA.dts"
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index b9d82afc5188..92e01ac921e3 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 6f24e335a19c..c61d8b15ee23 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts
index f43c477a17fb..a9b5826a777d 100644
--- a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts
+++ b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2022, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include "zynqmp-zcu106-revA.dts"
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 266c24e41259..67775eceaa84 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2016 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 8535cc089132..7fc1aa238a60 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts
index e88fc23b1f14..9404c139a24b 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts
index 97ae1b2d2d71..c06d262506d0 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts
index eaf99a9fa82d..99ea143c02ea 100644
--- a/arch/arm/dts/zynqmp-zcu1285-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts
@@ -4,8 +4,8 @@
  *
  * (C) Copyright 2018 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 7e7e1577eb5b..1fac632d6317 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 35a30971cb73..ea96f5c80141 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
/dts-v1/;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 6a166381fa77..c9640c44451f 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -4,7 +4,7 @@
  *
  * (C) Copyright 2014 - 2021, Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c
index d45b1faaa2c2..ea4eac392d96 100644
--- a/arch/arm/mach-tegra/arm64-mmu.c
+++ b/arch/arm/mach-tegra/arm64-mmu.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  * (This file derived from arch/arm/mach-zynqmp/cpu.c)
  *
  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
diff --git a/arch/arm/mach-versal/Makefile b/arch/arm/mach-versal/Makefile
index ca12e29170d3..864b3053d698 100644
--- a/arch/arm/mach-versal/Makefile
+++ b/arch/arm/mach-versal/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2016 - 2018 Xilinx, Inc.
-# Michal Simek michal.simek@xilinx.com
+# Michal Simek michal.simek@amd.com
 #
obj-y	+= clk.o
diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c
index 249e050cc8d6..5e3f44c77822 100644
--- a/arch/arm/mach-versal/clk.c
+++ b/arch/arm/mach-versal/clk.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016 - 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 9dc308bbc3d9..e4dc305d9288 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016 - 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c
index 5b850f3f89fb..7bd39289fac5 100644
--- a/arch/arm/mach-versal/mp.c
+++ b/arch/arm/mach-versal/mp.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2019 Xilinx, Inc.
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
  */
#include <common.h>
diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile
index bb1830c84625..3f2555494399 100644
--- a/arch/arm/mach-zynqmp/Makefile
+++ b/arch/arm/mach-zynqmp/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2014 - 2015 Xilinx, Inc.
-# Michal Simek michal.simek@xilinx.com
+# Michal Simek michal.simek@amd.com
obj-y	+= clk.o
 obj-y	+= cpu.o
diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c
index 1e6e726e8792..3b05f8455bf5 100644
--- a/arch/arm/mach-zynqmp/clk.c
+++ b/arch/arm/mach-zynqmp/clk.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 26e285c24fe0..6ae27894ecd9 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c
index 511b241462f9..dce92438926e 100644
--- a/arch/arm/mach-zynqmp/handoff.c
+++ b/arch/arm/mach-zynqmp/handoff.c
@@ -2,7 +2,7 @@
 /*
  * Copyright 2016 - 2017 Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-zynqmp/include/mach/clk.h b/arch/arm/mach-zynqmp/include/mach/clk.h
index cfd44c8e0f7a..9918d469122d 100644
--- a/arch/arm/mach-zynqmp/include/mach/clk.h
+++ b/arch/arm/mach-zynqmp/include/mach/clk.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _ASM_ARCH_CLK_H_
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index 70221e03057f..634bf169c637 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _ASM_ARCH_HARDWARE_H
diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
index ede00d73fe0c..15b69e777124 100644
--- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _ASM_ARCH_SYS_PROTO_H
diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
index 4c514258ba69..aff9054212c5 100644
--- a/arch/arm/mach-zynqmp/mp.c
+++ b/arch/arm/mach-zynqmp/mp.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c
index 5c5c7d136e77..b4d7f44bbeee 100644
--- a/arch/arm/mach-zynqmp/psu_spl_init.c
+++ b/arch/arm/mach-zynqmp/psu_spl_init.c
@@ -2,7 +2,7 @@
 /*
  * Copyright 2018 Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 #include <common.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index b428fd53121a..a0f35f36faac 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -2,7 +2,7 @@
 /*
  * Copyright 2015 - 2016 Xilinx, Inc.
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index eaa095ba99fa..c21beafdb810 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -2,7 +2,7 @@
 /*
  * (C) Copyright 2013 - 2014 Xilinx, Inc
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds
index 597095195cae..09abbea84d06 100644
--- a/arch/microblaze/cpu/u-boot-spl.lds
+++ b/arch/microblaze/cpu/u-boot-spl.lds
@@ -2,7 +2,7 @@
 /*
  * (C) Copyright 2013 - 2014 Xilinx, Inc
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <asm-offsets.h>
diff --git a/arch/microblaze/include/asm/spl.h b/arch/microblaze/include/asm/spl.h
index 350d283124e8..7557dc2a5a39 100644
--- a/arch/microblaze/include/asm/spl.h
+++ b/arch/microblaze/include/asm/spl.h
@@ -2,7 +2,7 @@
 /*
  * (C) Copyright 2013 - 2014 Xilinx, Inc
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _ASM_MICROBLAZE_SPL_H_
diff --git a/board/xilinx/common/Makefile b/board/xilinx/common/Makefile
index cdc3c9677432..d563290ab901 100644
--- a/board/xilinx/common/Makefile
+++ b/board/xilinx/common/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 # (C) Copyright 2020 Xilinx, Inc.
-# Michal Simek michal.simek@xilinx.com
+# Michal Simek michal.simek@amd.com
 #
obj-y	+= board.o
diff --git a/board/xilinx/common/board.h b/board/xilinx/common/board.h
index 922c9d557af0..64d657673e92 100644
--- a/board/xilinx/common/board.h
+++ b/board/xilinx/common/board.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * (C) Copyright 2020 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _BOARD_XILINX_COMMON_BOARD_H
diff --git a/board/xilinx/common/cpu-info.c b/board/xilinx/common/cpu-info.c
index 4eccc7abbea5..bfe7f5b7e385 100644
--- a/board/xilinx/common/cpu-info.c
+++ b/board/xilinx/common/cpu-info.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2020 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/board/xilinx/common/fru.h b/board/xilinx/common/fru.h
index 586c41b66ef7..2b3fa05a6136 100644
--- a/board/xilinx/common/fru.h
+++ b/board/xilinx/common/fru.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2019 Xilinx, Inc.
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#ifndef __FRU_H
diff --git a/board/xilinx/versal/Makefile b/board/xilinx/versal/Makefile
index 4a46ca02d705..d912f2e74f34 100644
--- a/board/xilinx/versal/Makefile
+++ b/board/xilinx/versal/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2016 - 2018 Xilinx, Inc.
-# Michal Simek michal.simek@xilinx.com
+# Michal Simek michal.simek@amd.com
 #
obj-y	:= board.o
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 81e1b69905e9..60bf37d3c90f 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <command.h>
diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c
index 797c1a5d6892..148fa51266d2 100644
--- a/board/xilinx/versal/cmds.c
+++ b/board/xilinx/versal/cmds.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2020 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <cpu_func.h>
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 732f909fc215..204e4fadf0ed 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 # (C) Copyright 2014 - 2016 Xilinx, Inc.
-# Michal Simek michal.simek@xilinx.com
+# Michal Simek michal.simek@amd.com
obj-y	:= zynqmp.o
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index dd1ad66f90c0..ea404d547f6c 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2018 Xilinx, Inc.
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#include <common.h>
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 39da96bcfb08..309f24a5f43d 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#include <common.h>
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 8139a203273c..93cf420d810a 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -6,7 +6,7 @@
  * (C) Copyright 2016
  * Toradex AG
  *
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  * Stefan Agner stefan.agner@toradex.com
  */
 #include <common.h>
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
index 43bcc59cd282..47366438fdfd 100644
--- a/drivers/ata/sata_ceva.c
+++ b/drivers/ata/sata_ceva.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2015 - 2016 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
 #include <common.h>
 #include <dm.h>
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index faebbab1c6d3..b3b333312358 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2019 Xilinx, Inc.
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#include <common.h>
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index d3876a8f541a..be58db54275c 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2019, Xilinx, Inc,
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#include <common.h>
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 7b5128fe27a1..b1f201fb18ba 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2015 - 2016, Xilinx, Inc,
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad siva.durga.paladugu@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad siva.durga.prasad.paladugu@amd.com>
  */
#include <console.h>
diff --git a/drivers/net/xilinx_axi_mrmac.c b/drivers/net/xilinx_axi_mrmac.c
index 6d15386c66ca..410fb25ddef4 100644
--- a/drivers/net/xilinx_axi_mrmac.c
+++ b/drivers/net/xilinx_axi_mrmac.c
@@ -3,7 +3,7 @@
  * Xilinx Multirate Ethernet MAC(MRMAC) driver
  *
  * Author(s):   Ashok Reddy Soma ashok.reddy.soma@xilinx.com
- *              Michal Simek michal.simek@xilinx.com
+ *              Michal Simek michal.simek@amd.com
  *
  * Copyright (C) 2021 Xilinx, Inc. All rights reserved.
  */
diff --git a/drivers/net/xilinx_axi_mrmac.h b/drivers/net/xilinx_axi_mrmac.h
index 4f875857cf7f..e2c2105450ce 100644
--- a/drivers/net/xilinx_axi_mrmac.h
+++ b/drivers/net/xilinx_axi_mrmac.h
@@ -3,7 +3,7 @@
  * Xilinx Multirate Ethernet MAC(MRMAC) driver
  *
  * Author(s):   Ashok Reddy Soma ashok.reddy.soma@xilinx.com
- *              Michal Simek michal.simek@xilinx.com
+ *              Michal Simek michal.simek@amd.com
  *
  * Copyright (C) 2021 Xilinx, Inc. All rights reserved.
  */
diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c
index ee6529b3c295..02626a7561e8 100644
--- a/drivers/pinctrl/pinctrl-zynqmp.c
+++ b/drivers/pinctrl/pinctrl-zynqmp.c
@@ -3,7 +3,7 @@
  * Xilinx pinctrl driver for ZynqMP
  *
  * Author(s):   Ashok Reddy Soma ashok.reddy.soma@xilinx.com
- *              Michal Simek michal.simek@xilinx.com
+ *              Michal Simek michal.simek@amd.com
  *
  * Copyright (C) 2021 Xilinx, Inc. All rights reserved.
  */
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index afa277f6049f..d9a5944965ba 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -3,7 +3,7 @@
  * Xilinx ZynqMP SOC driver
  *
  * Copyright (C) 2021 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  *
  * Copyright (C) 2022 Weidmüller Interface GmbH & Co. KG
  * Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.com
diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c
index 0f9fb0200289..b38c40001611 100644
--- a/drivers/watchdog/xilinx_tb_wdt.c
+++ b/drivers/watchdog/xilinx_tb_wdt.c
@@ -2,7 +2,7 @@
 /*
  * Xilinx AXI platforms watchdog timer driver.
  *
- * Author(s):	Michal Simek michal.simek@xilinx.com
+ * Author(s):	Michal Simek michal.simek@amd.com
  *		Shreenidhi Shedi yesshedi@gmail.com
  *
  * Copyright (c) 2011-2018 Xilinx Inc.
diff --git a/drivers/watchdog/xilinx_wwdt.c b/drivers/watchdog/xilinx_wwdt.c
index 8b6fc30edbe3..963ab22fb452 100644
--- a/drivers/watchdog/xilinx_wwdt.c
+++ b/drivers/watchdog/xilinx_wwdt.c
@@ -2,7 +2,7 @@
 /*
  * Xilinx window watchdog timer driver.
  *
- * Author(s):	Michal Simek michal.simek@xilinx.com
+ * Author(s):	Michal Simek michal.simek@amd.com
  *		Ashok Reddy Soma ashok.reddy.soma@xilinx.com
  *
  * Copyright (c) 2020, Xilinx Inc.
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index e70acd93bac4..a403999977e4 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -2,7 +2,7 @@
 /*
  * Configuration for Xilinx Versal
  * (C) Copyright 2016 - 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  *
  * Based on Configuration for Xilinx ZynqMP
  */
diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h
index 23655a475221..628fd80baa62 100644
--- a/include/configs/xilinx_versal_mini.h
+++ b/include/configs/xilinx_versal_mini.h
@@ -3,8 +3,8 @@
  * Configuration for Xilinx Versal MINI configuration
  *
  * (C) Copyright 2018-2019 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#ifndef __CONFIG_VERSAL_MINI_H
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index f9ffcd6de61b..a8edf13e3465 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -2,7 +2,7 @@
 /*
  * Configuration for Xilinx ZynqMP
  * (C) Copyright 2014 - 2015 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  *
  * Based on Configuration for Versatile Express
  */
diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h
index 9af05456640b..8afccb7f7375 100644
--- a/include/configs/xilinx_zynqmp_mini.h
+++ b/include/configs/xilinx_zynqmp_mini.h
@@ -3,8 +3,8 @@
  * Configuration for Xilinx ZynqMP Flash utility
  *
  * (C) Copyright 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#ifndef __CONFIG_ZYNQMP_MINI_H
diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h
index 1b6e26ee3966..cf3747aab147 100644
--- a/include/configs/xilinx_zynqmp_mini_nand.h
+++ b/include/configs/xilinx_zynqmp_mini_nand.h
@@ -3,8 +3,8 @@
  * Configuration for Xilinx ZynqMP Nand Flash utility
  *
  * (C) Copyright 2018 Xilinx, Inc.
- * Michal Simek michal.simek@xilinx.com
- * Siva Durga Prasad Paladugu sivadur@xilinx.com
+ * Michal Simek michal.simek@amd.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#ifndef __CONFIG_ZYNQMP_MINI_NAND_H
diff --git a/include/versalpl.h b/include/versalpl.h
index 0cc101be2f84..7dae56b23609 100644
--- a/include/versalpl.h
+++ b/include/versalpl.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * (C) Copyright 2019 Xilinx, Inc,
- * Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
+ * Siva Durga Prasad Paladugu siva.durga.prasad.paladugu@amd.com>
  */
#ifndef _VERSALPL_H_
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index acf75a8f079c..3fd334a54d35 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * (C) Copyright 2015 Xilinx, Inc,
- * Michal Simek michal.simek@xilinx.com
+ * Michal Simek michal.simek@amd.com
  */
#ifndef _ZYNQMPPL_H_
diff --git a/tools/zynqmp_psu_init_minimize.sh b/tools/zynqmp_psu_init_minimize.sh
index 16c622f6ce7f..5c8b73703bfb 100755
--- a/tools/zynqmp_psu_init_minimize.sh
+++ b/tools/zynqmp_psu_init_minimize.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 # SPDX-License-Identifier: GPL-2.0+
-# Copyright (C) 2018 Michal Simek michal.simek@xilinx.com
+# Copyright (C) 2018 Michal Simek michal.simek@amd.com
 # Copyright (C) 2019 Luca Ceresoli luca@lucaceresoli.net
 # Copyright (C) 2022 Weidmüller Interface GmbH & Co. KG
 # Stefan Herbrechtsmeier stefan.herbrechtsmeier@weidmueller.com
diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index 5113ba895f0d..bb54f41a153d 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2016 Michal Simek michals@xilinx.com
+ * Copyright (C) 2016 Michal Simek michal.simek@amd.com
  * Copyright (C) 2015 Nathan Rossi nathan@nathanrossi.com
  *
  * The following Boot Header format/structures and values are defined in the
diff --git a/tools/zynqmpimage.h b/tools/zynqmpimage.h
index 9d526a17cdd2..ca7489835a8f 100644
--- a/tools/zynqmpimage.h
+++ b/tools/zynqmpimage.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2016 Michal Simek michals@xilinx.com
+ * Copyright (C) 2016 Michal Simek michal.simek@amd.com
  * Copyright (C) 2015 Nathan Rossi nathan@nathanrossi.com
  *
  * The following Boot Header format/structures and values are defined in the
-- 
2.36.1


    

Michal Simek

Michal Simek

Signed-off-by: Michal Simek michal.simek@amd.com

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