[U-Boot] [PATCH 1/5] x86: Remove include directory in arch/x86/dts
The include directory in arch/x86/dts is not used, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/include/dt-bindings | 1 - 1 file changed, 1 deletion(-) delete mode 120000 arch/x86/dts/include/dt-bindings
diff --git a/arch/x86/dts/include/dt-bindings b/arch/x86/dts/include/dt-bindings deleted file mode 120000 index 0cecb3d..0000000 --- a/arch/x86/dts/include/dt-bindings +++ /dev/null @@ -1 +0,0 @@ -../../../../include/dt-bindings \ No newline at end of file
No board is using alex.dts, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/Makefile | 1 - arch/x86/dts/alex.dts | 24 ------------------------ 2 files changed, 25 deletions(-) delete mode 100644 arch/x86/dts/alex.dts
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 3b5d6da..5525094 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -1,6 +1,5 @@ dtb-y += link.dtb \ chromebook_link.dtb \ - alex.dtb \ crownbay.dtb
targets += $(dtb-y) diff --git a/arch/x86/dts/alex.dts b/arch/x86/dts/alex.dts deleted file mode 100644 index 2f13544..0000000 --- a/arch/x86/dts/alex.dts +++ /dev/null @@ -1,24 +0,0 @@ -/dts-v1/; - -/include/ "coreboot.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "Google Alex"; - compatible = "google,alex", "intel,atom-pineview"; - - config { - silent_console = <0>; - }; - - gpio: gpio {}; - - serial { - reg = <0x3f8 8>; - clock-frequency = <115200>; - }; - - chosen { }; - memory { device_type = "memory"; reg = <0 0>; }; -};
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
No board is using alex.dts, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
On 27 December 2014 at 18:22, Simon Glass sjg@chromium.org wrote:
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
No board is using alex.dts, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86/next, thanks!
The name of coreboot.dtsi is misleading, as it actually describes the legacy serial port device node.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/crownbay.dts | 2 +- arch/x86/dts/link.dts | 2 +- arch/x86/dts/{coreboot.dtsi => serial.dtsi} | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/x86/dts/{coreboot.dtsi => serial.dtsi} (100%)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 3f43f3c..c3e112f 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -6,7 +6,7 @@
/dts-v1/;
-/include/ "coreboot.dtsi" +/include/ "serial.dtsi"
/ { #address-cells = <1>; diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index a739080..c6b7d82 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -1,6 +1,6 @@ /dts-v1/;
-/include/ "coreboot.dtsi" +/include/ "serial.dtsi"
/ { #address-cells = <1>; diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/serial.dtsi similarity index 100% rename from arch/x86/dts/coreboot.dtsi rename to arch/x86/dts/serial.dtsi
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The name of coreboot.dtsi is misleading, as it actually describes the legacy serial port device node.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
On 27 December 2014 at 18:22, Simon Glass sjg@chromium.org wrote:
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The name of coreboot.dtsi is misleading, as it actually describes the legacy serial port device node.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86/next, thanks!
This commits cleans up the board dts files.
- Correct the serial port register size to 8 - Remove the misleading status = "disabled" statement in the serial.dtsi - Move the inclusion of skeleton.dtsi from serial.dtsi to board dts files - Let the board dts file define stdout-path in the chosen node - Remove device nodes in board dts files thar are duplicated to skeleton.dtsi
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/crownbay.dts | 11 +++-------- arch/x86/dts/link.dts | 11 +++-------- arch/x86/dts/serial.dtsi | 9 +-------- 3 files changed, 7 insertions(+), 24 deletions(-)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index c3e112f..97f7a52 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -6,11 +6,10 @@
/dts-v1/;
+/include/ "skeleton.dtsi" /include/ "serial.dtsi"
/ { - #address-cells = <1>; - #size-cells = <1>; model = "Intel Crown Bay"; compatible = "intel,crownbay", "intel,queensbay";
@@ -32,14 +31,10 @@ bank-name = "B"; };
- serial { - reg = <0x3f8 8>; - clock-frequency = <115200>; + chosen { + stdout-path = "/serial"; };
- chosen { }; - memory { device_type = "memory"; reg = <0 0>; }; - spi { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index c6b7d82..107af60 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -1,10 +1,9 @@ /dts-v1/;
+/include/ "skeleton.dtsi" /include/ "serial.dtsi"
/ { - #address-cells = <1>; - #size-cells = <1>; model = "Google Link"; compatible = "google,link", "intel,celeron-ivybridge";
@@ -33,14 +32,10 @@ bank-name = "C"; };
- serial { - reg = <0x3f8 8>; - clock-frequency = <115200>; + chosen { + stdout-path = "/serial"; };
- chosen { }; - memory { device_type = "memory"; reg = <0 0>; }; - spd { compatible = "memory-spd"; #address-cells = <1>; diff --git a/arch/x86/dts/serial.dtsi b/arch/x86/dts/serial.dtsi index 65a93ac..ebdda76 100644 --- a/arch/x86/dts/serial.dtsi +++ b/arch/x86/dts/serial.dtsi @@ -1,17 +1,10 @@ -/include/ "skeleton.dtsi" - / { - chosen { - stdout-path = "/serial"; - }; - serial { compatible = "x86-uart"; - reg = <0x3f8 0x10>; + reg = <0x3f8 8>; reg-shift = <0>; io-mapped = <1>; multiplier = <1>; baudrate = <115200>; - status = "disabled"; }; };
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
This commits cleans up the board dts files.
- Correct the serial port register size to 8
- Remove the misleading status = "disabled" statement in the serial.dtsi
- Move the inclusion of skeleton.dtsi from serial.dtsi to board dts files
- Let the board dts file define stdout-path in the chosen node
- Remove device nodes in board dts files thar are duplicated to skeleton.dtsi
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
On 27 December 2014 at 18:22, Simon Glass sjg@chromium.org wrote:
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
This commits cleans up the board dts files.
- Correct the serial port register size to 8
- Remove the misleading status = "disabled" statement in the serial.dtsi
- Move the inclusion of skeleton.dtsi from serial.dtsi to board dts files
- Let the board dts file define stdout-path in the chosen node
- Remove device nodes in board dts files thar are duplicated to skeleton.dtsi
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86/next, thanks!
Right now all dts files under arch/x86/dts are compiled. This is not necessary so update the Makefile to only compile dts file for a specific board.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/dts/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 5525094..1291e69 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -1,6 +1,6 @@ -dtb-y += link.dtb \ - chromebook_link.dtb \ - crownbay.dtb +dtb-$(CONFIG_TARGET_COREBOOT) += link.dtb +dtb-$(CONFIG_TARGET_CHROMEBOOK_LINK) += chromebook_link.dtb +dtb-$(CONFIG_TARGET_CROWNBAY) += crownbay.dtb
targets += $(dtb-y)
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
Right now all dts files under arch/x86/dts are compiled. This is not necessary so update the Makefile to only compile dts file for a specific board.
I'd rather that we go the other way - making the boards more common. If I can get the Minnowmax spun up I am going to try to unify the support such that we can build an image that will boot on all the x86 boards. This would require:
- a set of operations and data provided by each board (how to do CAR, whether to use FSP, how to detect the board, etc.) - allowing a board config to enable multiple arch types, like ivybridge and atom, for example - allow multiple device trees, FSPs, microcodes, etc. to reside in the image
One benefit is easier programming, if we can have an image that is common to many boards - we don't need to worry so much about breaking a different board if most things are common. Also we retain the option to build just for a single target.
I feel that if we get the structure for this in place now, it will be relatively easy to build on, whereas trying to retrofit it later would be too hard.
Regards, Simon
Hi Simon,
On Sun, Dec 28, 2014 at 9:07 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
Right now all dts files under arch/x86/dts are compiled. This is not necessary so update the Makefile to only compile dts file for a specific board.
I'd rather that we go the other way - making the boards more common. If I can get the Minnowmax spun up I am going to try to unify the support such that we can build an image that will boot on all the x86 boards. This would require:
- a set of operations and data provided by each board (how to do CAR,
whether to use FSP, how to detect the board, etc.)
- allowing a board config to enable multiple arch types, like
ivybridge and atom, for example
- allow multiple device trees, FSPs, microcodes, etc. to reside in the image
One benefit is easier programming, if we can have an image that is common to many boards - we don't need to worry so much about breaking a different board if most things are common. Also we retain the option to build just for a single target.
I feel that if we get the structure for this in place now, it will be relatively easy to build on, whereas trying to retrofit it later would be too hard.
The idea of making the boards support more common sounds good to me. We will see how far we can go.
Regards, Bin
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The include directory in arch/x86/dts is not used, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Actually we do need this - the Chrome OS keyboard .dtsi will use a binding when I get around to updating it.
arch/x86/dts/include/dt-bindings | 1 - 1 file changed, 1 deletion(-) delete mode 120000 arch/x86/dts/include/dt-bindings
diff --git a/arch/x86/dts/include/dt-bindings b/arch/x86/dts/include/dt-bindings deleted file mode 120000 index 0cecb3d..0000000 --- a/arch/x86/dts/include/dt-bindings +++ /dev/null @@ -1 +0,0 @@ -../../../../include/dt-bindings \ No newline at end of file -- 1.8.2.1
Regards, Simon
Hi Simon,
On Sun, Dec 28, 2014 at 9:02 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The include directory in arch/x86/dts is not used, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Actually we do need this - the Chrome OS keyboard .dtsi will use a binding when I get around to updating it.
OK, so maybe we can just put anything we do need into the include instead of a symbolic link to the genric one?
Regards, Bin
Hi Bin,
On 28 December 2014 at 23:04, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Sun, Dec 28, 2014 at 9:02 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The include directory in arch/x86/dts is not used, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Actually we do need this - the Chrome OS keyboard .dtsi will use a binding when I get around to updating it.
OK, so maybe we can just put anything we do need into the include instead of a symbolic link to the genric one?
The idea as (I understand it) is that include/dt-bindings is the standard directory for all archs to put their bindings. This is how ARM works too.
Regards, Simon
Hi Simon,
On Tue, Dec 30, 2014 at 3:39 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 28 December 2014 at 23:04, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Sun, Dec 28, 2014 at 9:02 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 23 December 2014 at 22:06, Bin Meng bmeng.cn@gmail.com wrote:
The include directory in arch/x86/dts is not used, so remove it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Actually we do need this - the Chrome OS keyboard .dtsi will use a binding when I get around to updating it.
OK, so maybe we can just put anything we do need into the include instead of a symbolic link to the genric one?
The idea as (I understand it) is that include/dt-bindings is the standard directory for all archs to put their bindings. This is how ARM works too.
OK, thanks for the clarification.
Regards, Bin
participants (2)
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Bin Meng -
Simon Glass