[PATCH 0/3] ARM: dts: stm32f429 sync with Linux kernel 6.5
This series contains my patches on the device tree for stm32f429 platform that have already been merged into the mainline of Linux. Since they applied perfectly, I preferred not to merge them into a single patch, which would have been less readable.
Dario Binacchi (3): ARM: dts: stm32: add CAN support on stm32f429 ARM: dts: stm32: add pin map for CAN controller on stm32f4 ARM: dts: stm32f429: put can2 in secondary mode
arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/dts/stm32f429.dtsi | 30 ++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+)
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de ---
arch/arm/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index e5b13aca40c0..22225104fca8 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -321,6 +321,35 @@ status = "disabled"; };
+ can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>;
On 9/3/23 22:33, Dario Binacchi wrote:
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index e5b13aca40c0..22225104fca8 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -321,6 +321,35 @@ status = "disabled"; };
can1: can@40006400 {compatible = "st,stm32f4-bxcan";reg = <0x40006400 0x200>;interrupts = <19>, <20>, <21>, <22>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F4_APB1_RESET(CAN1)>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;st,can-primary;st,gcan = <&gcan>;status = "disabled";};gcan: gcan@40006600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40006600 0x200>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;};can2: can@40006800 {compatible = "st,stm32f4-bxcan";reg = <0x40006800 0x200>;interrupts = <63>, <64>, <65>, <66>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F4_APB1_RESET(CAN2)>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;st,gcan = <&gcan>;status = "disabled";};- dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:33, Dario Binacchi wrote:
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index e5b13aca40c0..22225104fca8 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -321,6 +321,35 @@ status = "disabled"; };
can1: can@40006400 {compatible = "st,stm32f4-bxcan";reg = <0x40006400 0x200>;interrupts = <19>, <20>, <21>, <22>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F4_APB1_RESET(CAN1)>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;st,can-primary;st,gcan = <&gcan>;status = "disabled";};gcan: gcan@40006600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40006600 0x200>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;};can2: can@40006800 {compatible = "st,stm32f4-bxcan";reg = <0x40006800 0x200>;interrupts = <63>, <64>, <65>, <66>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F4_APB1_RESET(CAN2)>;clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;st,gcan = <&gcan>;status = "disabled";};- dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>;
Apply on stm32/next
Thanks Patrice
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de ---
arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi b/arch/arm/dts/stm32f4-pinctrl.dtsi index 46815c965d59..0adc41b2a46c 100644 --- a/arch/arm/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/dts/stm32f4-pinctrl.dtsi @@ -412,6 +412,36 @@ slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; }; }; };
On 9/3/23 22:33, Dario Binacchi wrote:
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi b/arch/arm/dts/stm32f4-pinctrl.dtsi index 46815c965d59..0adc41b2a46c 100644 --- a/arch/arm/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/dts/stm32f4-pinctrl.dtsi @@ -412,6 +412,36 @@ slew-rate = <2>; }; };
can1_pins_a: can1-0 {pins1 {pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */bias-pull-up;};};can2_pins_a: can2-0 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */bias-pull-up;};};can2_pins_b: can2-1 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */bias-pull-up;};};};
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:33, Dario Binacchi wrote:
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi b/arch/arm/dts/stm32f4-pinctrl.dtsi index 46815c965d59..0adc41b2a46c 100644 --- a/arch/arm/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/dts/stm32f4-pinctrl.dtsi @@ -412,6 +412,36 @@ slew-rate = <2>; }; };
can1_pins_a: can1-0 {pins1 {pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */bias-pull-up;};};can2_pins_a: can2-0 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */bias-pull-up;};};can2_pins_b: can2-1 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */bias-pull-up;};};};
Apply on stm32/next
Thanks Patrice
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
---
arch/arm/dts/stm32f429.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index 22225104fca8..8133ea15b036 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -346,6 +346,7 @@ interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN2)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,can-secondary; st,gcan = <&gcan>; status = "disabled"; };
On 9/3/23 22:33, Dario Binacchi wrote:
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f429.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index 22225104fca8..8133ea15b036 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -346,6 +346,7 @@ interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN2)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
st,can-secondary; st,gcan = <&gcan>; status = "disabled";
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:33, Dario Binacchi wrote:
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f429.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index 22225104fca8..8133ea15b036 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -346,6 +346,7 @@ interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN2)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
st,can-secondary; st,gcan = <&gcan>; status = "disabled";
Apply on stm32/next
Thanks Patrice
participants (2)
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Dario Binacchi -
Patrice CHOTARD