[U-Boot] [PATCH] miniarm-rk3288: set isp/vop qos priority level

isp-camera image will be broken when enter dual screen display mode. We set isp qos high to solve this problem.
Signed-off-by: Nickey Yang nickey.yang@rock-chips.com ---
board/rockchip/miniarm_rk3288/miniarm-rk3288.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c index 79541a3..7b90be5 100644 --- a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c +++ b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c @@ -5,3 +5,26 @@ */
#include <common.h> +#include <asm/io.h> + +/* cpu axi qos priority */ +#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \ + ((((h) & 3) << 2) | ((l) & 3)) + +int rk_board_late_init(void) +{ + /* read latency configure */ + writel(0x34, 0xffac0000 + 0x14); + writel(0x34, 0xffac0080 + 0x14); + + /* set isp qos to highest priority */ + writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0908); + writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0108); + writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0188); + + /* set vop qos to highest priority */ + writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0008); + writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0408); + + return 0; +}

Hi Nickey,
On 7 December 2016 at 01:16, Nickey Yang nickey.yang@rock-chips.com wrote:
isp-camera image will be broken when enter dual screen display mode. We set isp qos high to solve this problem.
Signed-off-by: Nickey Yang nickey.yang@rock-chips.com
board/rockchip/miniarm_rk3288/miniarm-rk3288.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c index 79541a3..7b90be5 100644 --- a/board/rockchip/miniarm_rk3288/miniarm-rk3288.c +++ b/board/rockchip/miniarm_rk3288/miniarm-rk3288.c @@ -5,3 +5,26 @@ */
#include <common.h> +#include <asm/io.h>
+/* cpu axi qos priority */ +#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
((((h) & 3) << 2) | ((l) & 3))
+int rk_board_late_init(void) +{
/* read latency configure */
writel(0x34, 0xffac0000 + 0x14);
writel(0x34, 0xffac0080 + 0x14);
What is this register? Can you please define a struct for it in a header file in arch/arm/include/asm/arch-rockchip/ ?
/* set isp qos to highest priority */
writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0908);
writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0108);
writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0188);
/* set vop qos to highest priority */
writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0008);
writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), 0xffad0408);
return 0;
+}
1.9.1
Regards, Simon
participants (2)
-
Nickey Yang
-
Simon Glass