On 2022/9/9 06:28, Johan Jonker wrote:

Move all rk3128 u-boot specific properties in separate dtsi files. Sort emmc node.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

Changed V2: Keep max-frequency property in dtsi

---

arch/arm/dts/rk3128-evb-u-boot.dtsi | 7 +++++++ arch/arm/dts/rk3128-evb.dts | 10 +++++----- arch/arm/dts/rk3128-u-boot.dtsi | 19 +++++++++++++++++++ arch/arm/dts/rk3128.dtsi | 9 --------- 4 files changed, 31 insertions(+), 14 deletions(-) create mode 100644 arch/arm/dts/rk3128-evb-u-boot.dtsi create mode 100644 arch/arm/dts/rk3128-u-boot.dtsi

diff --git a/arch/arm/dts/rk3128-evb-u-boot.dtsi b/arch/arm/dts/rk3128-evb-u-boot.dtsi new file mode 100644 index 00000000..8b16bbe4 --- /dev/null +++ b/arch/arm/dts/rk3128-evb-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0+

+#include "rk3128-u-boot.dtsi"

+&emmc {

• u-boot,dm-pre-reloc;

+}; diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts index a407ac2d..e7d8f7c9 100644 --- a/arch/arm/dts/rk3128-evb.dts +++ b/arch/arm/dts/rk3128-evb.dts @@ -37,6 +37,11 @@ }; };

+&emmc {

• fifo-mode;
• status = "okay";

+};

• &i2c1 { status = "okay";

@@ -74,11 +79,6 @@ status = "okay"; };

-&emmc {

• fifo-mode;
• status = "okay";

-};

• &pinctrl { usb_otg { otg_vbus_drv: host-vbus-drv {

diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi new file mode 100644 index 00000000..4a98e249 --- /dev/null +++ b/arch/arm/dts/rk3128-u-boot.dtsi @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+

+#include "rockchip-u-boot.dtsi"

+/ {

• dmc: dmc@20004000 {

• compatible = "rockchip,rk3128-dmc", "syscon";
  

• reg = <0x0 0x20004000 0x0 0x1000>;
  

• u-boot,dm-pre-reloc;
  

• };

+};

+&cru {

• u-boot,dm-pre-reloc;

+};

+&grf {

• u-boot,dm-pre-reloc;

+}; diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi index 62fd5343..760c98b6 100644 --- a/arch/arm/dts/rk3128.dtsi +++ b/arch/arm/dts/rk3128.dtsi @@ -237,14 +237,7 @@ clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc"; };

• dmc: dmc@20004000 {

• u-boot,dm-pre-reloc;
  

• compatible = "rockchip,rk3128-dmc", "syscon";
  

• reg = <0x0 0x20004000 0x0 0x1000>;
  

• };
• cru: clock-controller@20000000 {

• u-boot,dm-pre-reloc;
  

  compatible = "rockchip,rk3128-cru"; reg = <0x20000000 0x1000>; rockchip,grf = <&grf>;

@@ -453,7 +446,6 @@ };

emmc: dwmmc@1021c000 {

• u-boot,dm-pre-reloc;
  

  compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x1021c000 0x4000>; max-frequency = <150000000>;

@@ -538,7 +530,6 @@ };

grf: syscon@20008000 {

• u-boot,dm-pre-reloc;
  

  compatible = "rockchip,rk3128-grf", "syscon"; reg = <0x20008000 0x1000>; };