Dear "Sean Preston",

In message 008901cbb715$9a371b10$cea55130$@pfk.co.za you wrote:

I am working with a TI Davinci DM365 and would love to use the boot count limit feature for a product that we are working on but the docs state it is only supported by Power Architecture processors. Could someone please

The fact that so far mostly (or only? don't know) PPC systems use this is that environments where such a feature is needed or useful often have pretty strict requirements in terms of reliability, robustness and long-time availability (think for example telecoms). PPC has traditionally been the preferred platform for such systems. For example, only pretty recently you can find ARM vendors that guarantee that a certain chip will be available in 10 years from now.

explain why this is and how it works as I will need to either find an alternate solution or investigate implementing something similar for this project and would appreciate any insights.

How it works? Please see the code.

Basicly all you need is a 32 bit storage location in some register or SRAM or similar which is guaranteed not to change it's value during a (hard) reset of the board.

Best regards,

Wolfgang Denk