[U-Boot] [PATCH 1/2] MIPS: Fix invalidate_dcache_range to operate on L1 Dcache

Commit fb64cda57998 ("MIPS: Abstract cache op loops with a macro") accidentally modified invalidate_dcache_range to operate on the L1 Icache instead of the Dcache. Fix the cache op used to operate on the Dcache.
Signed-off-by: Paul Burton paul.burton@imgtec.com Fixes: fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
---
arch/mips/lib/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index 5f520c0..db81953 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -91,5 +91,5 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) if (start_addr == stop) return;
- cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_I); + cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D); }

For consistency with the other cache-related Kconfig entries & the values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int entry instead of a hex entry.
Signed-off-by: Paul Burton paul.burton@imgtec.com Fixes: 372286217f05 ("MIPS: Split I & D cache line size config") ---
arch/mips/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5c30ae9..21066f0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -253,7 +253,7 @@ config SYS_DCACHE_SIZE The total size of the L1 Dcache, if known at compile time.
config SYS_DCACHE_LINE_SIZE - hex + int default 0 help The size of L1 Dcache lines, if known at compile time.

Am 09.06.2016 um 14:09 schrieb Paul Burton:
For consistency with the other cache-related Kconfig entries & the values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int entry instead of a hex entry.
Signed-off-by: Paul Burton paul.burton@imgtec.com Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")
arch/mips/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
applied to u-boot-mips, thanks.
BTW: there is a similar patch from Purna [1] but I applied this one because it contains a "Fixes:" line.
[1] http://patchwork.ozlabs.org/patch/630747/

Am 09.06.2016 um 14:09 schrieb Paul Burton:
Commit fb64cda57998 ("MIPS: Abstract cache op loops with a macro") accidentally modified invalidate_dcache_range to operate on the L1 Icache instead of the Dcache. Fix the cache op used to operate on the Dcache.
Signed-off-by: Paul Burton paul.burton@imgtec.com Fixes: fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
applied to u-boot-mips, thanks.
participants (2)
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Daniel Schwierzeck
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Paul Burton