[U-Boot] [PATCH v3 5/5] common: Enable fdt_support in SPL build
Enable more device tree function support such as fdt_getprop_u32_default_node in SPL.
Signed-off-by: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Dinh Nguyen dinh.linux@gmail.com Cc: Marek Vasut marex@denx.de Cc: Stefan Roese sr@denx.de Cc: Vikas Manocha vikas.manocha@st.com Cc: Jagannadh Teki jteki@openedev.com Cc: Pavel Machek pavel@denx.de --- common/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/Makefile b/common/Makefile index 556fb07..9e059fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o obj-$(CONFIG_CMD_FAT) += cmd_fat.o obj-$(CONFIG_CMD_FDC) += cmd_fdc.o -obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o +obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o obj-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA @@ -265,7 +265,7 @@ obj-y += malloc_simple.o endif obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o -obj-$(CONFIG_OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_OF_LIBFDT) += image-fdt.o fdt_support.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o -- 1.7.7.4
On Thursday, September 10, 2015 at 07:02:16 AM, Chin Liang See wrote:
Enable more device tree function support such as fdt_getprop_u32_default_node in SPL.
Signed-off-by: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Dinh Nguyen dinh.linux@gmail.com Cc: Marek Vasut marex@denx.de Cc: Stefan Roese sr@denx.de Cc: Vikas Manocha vikas.manocha@st.com Cc: Jagannadh Teki jteki@openedev.com Cc: Pavel Machek pavel@denx.de
+CC Simon, I'm worried this might blow the size of all SPLs , which is not the thing we'd like to see.
common/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/Makefile b/common/Makefile index 556fb07..9e059fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o obj-$(CONFIG_CMD_FAT) += cmd_fat.o obj-$(CONFIG_CMD_FDC) += cmd_fdc.o -obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o +obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o obj-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA @@ -265,7 +265,7 @@ obj-y += malloc_simple.o endif obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o -obj-$(CONFIG_OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_OF_LIBFDT) += image-fdt.o fdt_support.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o -- 1.7.7.4
Best regards, Marek Vasut
Hi,
On 10 September 2015 at 04:49, Marek Vasut marex@denx.de wrote:
On Thursday, September 10, 2015 at 07:02:16 AM, Chin Liang See wrote:
Enable more device tree function support such as fdt_getprop_u32_default_node in SPL.
Signed-off-by: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Dinh Nguyen dinh.linux@gmail.com Cc: Marek Vasut marex@denx.de Cc: Stefan Roese sr@denx.de Cc: Vikas Manocha vikas.manocha@st.com Cc: Jagannadh Teki jteki@openedev.com Cc: Pavel Machek pavel@denx.de
+CC Simon, I'm worried this might blow the size of all SPLs , which is not the thing we'd like to see.
common/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/Makefile b/common/Makefile index 556fb07..9e059fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o obj-$(CONFIG_CMD_FAT) += cmd_fat.o obj-$(CONFIG_CMD_FDC) += cmd_fdc.o -obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o +obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o obj-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA @@ -265,7 +265,7 @@ obj-y += malloc_simple.o endif obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o -obj-$(CONFIG_OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_OF_LIBFDT) += image-fdt.o fdt_support.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o -- 1.7.7.4
It might need a bit of work - here's a buildman run:
02: common: Enable fdt_support in SPL build powerpc: + P1022DS_36BIT_NAND T1024RDB_SPIFLASH P1010RDB-PA_SPIFLASH P1021RDB-PC_36BIT_NAND T2080QDS_SPIFLASH P1025RDB_SDCARD P2020RDB-PC_36BIT_SPIFLASH T1042RDB_PI_SPIFLASH P1010RDB-PA_36BIT_NAND P1010RDB-PB_SDCARD P2020RDB-PC_SPIFLASH P1020MBG-PC_36BIT_SDCARD P1024RDB_SPIFLASH T1042D4RDB_NAND T4240RDB_SDCARD P1010RDB-PB_36BIT_NAND P1022DS_36BIT_SDCARD T1024QDS_NAND P1021RDB-PC_SPIFLASH T1024RDB_NAND T1023RDB_SDCARD P1010RDB-PB_36BIT_SDCARD P1022DS_NAND P1020RDB-PC_36BIT_NAND P1020RDB-PC_SDCARD T1042RDB_PI_NAND P1020RDB-PD_SPIFLASH T2080RDB_NAND P1022DS_SDCARD P1020RDB-PC_36BIT_SPIFLASH T1042RDB_PI_SDCARD T2081QDS_NAND T4160QDS_SDCARD P1010RDB-PB_SPIFLASH T2080QDS_SDCARD P1020MBG-PC_SDCARD P1020RDB-PC_SPIFLASH T4240QDS_SDCARD P2020RDB-PC_36BIT_SDCARD T1040RDB_SDCARD P1021RDB-PC_SDCARD B4860QDS_NAND T2080RDB_SDCARD P1020RDB-PC_36BIT_SDCARD T1040D4RDB_SDCARD T1040D4RDB_SPIFLASH P1020RDB-PC_NAND T2080QDS_NAND T1023RDB_NAND P1020RDB-PD_NAND T1040D4RDB_NAND P1010RDB-PA_NAND T1040RDB_SPIFLASH P2020RDB-PC_SDCARD T2081QDS_SDCARD P1010RDB-PA_36BIT_SDCARD P1024RDB_NAND P1024RDB_SDCARD T4240QDS_NAND C29XPCIE_NAND B4420QDS_NAND P1021RDB-PC_36BIT_SPIFLASH P1025RDB_SPIFLASH T2081QDS_SPIFLASH T1040RDB_NAND P1010RDB-PA_SDCARD P1010RDB-PB_NAND T1024QDS_SDCARD T1024QDS_SPIFLASH P1021RDB-PC_NAND T1042D4RDB_SPIFLASH P1020UTM-PC_36BIT_SDCARD T4160QDS_NAND T2080RDB_SPIFLASH P1022DS_SPIFLASH T1042D4RDB_SDCARD P1021RDB-PC_36BIT_SDCARD P1020RDB-PD_SDCARD P1022DS_36BIT_SPIFLASH T1024RDB_SDCARD P1020UTM-PC_SDCARD P2020RDB-PC_36BIT_NAND P2020RDB-PC_NAND T1023RDB_SPIFLASH P1010RDB-PB_36BIT_SPIFLASH P1025RDB_NAND P1010RDB-PA_36BIT_SPIFLASH blackfin: (for 34/35 boards) all +16.0 rodata +16.0 x86: (for 9/9 boards) bss -14.2 rodata +14.2 aarch64: (for 13/13 boards) all +17.2 rodata +17.2 spl/u-boot-spl:all +151.4 spl/u-boot-spl:rodata +151.4 avr32: (for 4/4 boards) all +16.0 rodata +16.0 sandbox: (for 1/1 boards) all +16.0 rodata +16.0 m68k: (for 48/48 boards) all +11.7 text +11.7 powerpc: (for 412/416 boards) all +3.6 data +1.6 rodata +2.0 spl/u-boot-spl:all +5.8 spl/u-boot-spl:rodata +5.0 spl/u-boot-spl:text +0.8 sparc: (for 5/5 boards) all +32.0 data +16.0 text +16.0 sh: (for 21/22 boards) all +16.0 rodata +16.0 nios2: (for 1/1 boards) all +16.0 data +16.0 mips: (for 24/24 boards) all +20.0 bss +4.0 rodata +16.0 arm: (for 531/531 boards) all +17.7 bss +0.3 rodata +17.4 spl/u-boot-spl:all +69.0 spl/u-boot-spl:rodata +69.0 nds32: (for 1/1 boards) all +16.0 rodata +16.0
So there are some code size changes (which may not be a big deal at 15 -60 bytes) but it breaks lots of powerpc boards.
Can we instead add CONFIG_SPL_OF_LIBFDT?
Regards, Simon
On Friday, September 11, 2015 at 02:14:17 AM, Simon Glass wrote:
Hi,
On 10 September 2015 at 04:49, Marek Vasut marex@denx.de wrote:
On Thursday, September 10, 2015 at 07:02:16 AM, Chin Liang See wrote:
Enable more device tree function support such as fdt_getprop_u32_default_node in SPL.
Signed-off-by: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Dinh Nguyen dinh.linux@gmail.com Cc: Marek Vasut marex@denx.de Cc: Stefan Roese sr@denx.de Cc: Vikas Manocha vikas.manocha@st.com Cc: Jagannadh Teki jteki@openedev.com Cc: Pavel Machek pavel@denx.de
+CC Simon, I'm worried this might blow the size of all SPLs , which is not the thing we'd like to see.
common/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/Makefile b/common/Makefile index 556fb07..9e059fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o
obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o obj-$(CONFIG_CMD_FAT) += cmd_fat.o obj-$(CONFIG_CMD_FDC) += cmd_fdc.o
-obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o +obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o
obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o obj-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA
@@ -265,7 +265,7 @@ obj-y += malloc_simple.o
endif obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
-obj-$(CONFIG_OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_OF_LIBFDT) += image-fdt.o fdt_support.o
obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o
-- 1.7.7.4
It might need a bit of work - here's a buildman run:
02: common: Enable fdt_support in SPL build powerpc: + P1022DS_36BIT_NAND T1024RDB_SPIFLASH P1010RDB-PA_SPIFLASH P1021RDB-PC_36BIT_NAND T2080QDS_SPIFLASH P1025RDB_SDCARD P2020RDB-PC_36BIT_SPIFLASH T1042RDB_PI_SPIFLASH P1010RDB-PA_36BIT_NAND P1010RDB-PB_SDCARD P2020RDB-PC_SPIFLASH P1020MBG-PC_36BIT_SDCARD P1024RDB_SPIFLASH T1042D4RDB_NAND T4240RDB_SDCARD P1010RDB-PB_36BIT_NAND P1022DS_36BIT_SDCARD T1024QDS_NAND P1021RDB-PC_SPIFLASH T1024RDB_NAND T1023RDB_SDCARD P1010RDB-PB_36BIT_SDCARD P1022DS_NAND P1020RDB-PC_36BIT_NAND P1020RDB-PC_SDCARD T1042RDB_PI_NAND P1020RDB-PD_SPIFLASH T2080RDB_NAND P1022DS_SDCARD P1020RDB-PC_36BIT_SPIFLASH T1042RDB_PI_SDCARD T2081QDS_NAND T4160QDS_SDCARD P1010RDB-PB_SPIFLASH T2080QDS_SDCARD P1020MBG-PC_SDCARD P1020RDB-PC_SPIFLASH T4240QDS_SDCARD P2020RDB-PC_36BIT_SDCARD T1040RDB_SDCARD P1021RDB-PC_SDCARD B4860QDS_NAND T2080RDB_SDCARD P1020RDB-PC_36BIT_SDCARD T1040D4RDB_SDCARD T1040D4RDB_SPIFLASH P1020RDB-PC_NAND T2080QDS_NAND T1023RDB_NAND P1020RDB-PD_NAND T1040D4RDB_NAND P1010RDB-PA_NAND T1040RDB_SPIFLASH P2020RDB-PC_SDCARD T2081QDS_SDCARD P1010RDB-PA_36BIT_SDCARD P1024RDB_NAND P1024RDB_SDCARD T4240QDS_NAND C29XPCIE_NAND B4420QDS_NAND P1021RDB-PC_36BIT_SPIFLASH P1025RDB_SPIFLASH T2081QDS_SPIFLASH T1040RDB_NAND P1010RDB-PA_SDCARD P1010RDB-PB_NAND T1024QDS_SDCARD T1024QDS_SPIFLASH P1021RDB-PC_NAND T1042D4RDB_SPIFLASH P1020UTM-PC_36BIT_SDCARD T4160QDS_NAND T2080RDB_SPIFLASH P1022DS_SPIFLASH T1042D4RDB_SDCARD P1021RDB-PC_36BIT_SDCARD P1020RDB-PD_SDCARD P1022DS_36BIT_SPIFLASH T1024RDB_SDCARD P1020UTM-PC_SDCARD P2020RDB-PC_36BIT_NAND P2020RDB-PC_NAND T1023RDB_SPIFLASH P1010RDB-PB_36BIT_SPIFLASH P1025RDB_NAND P1010RDB-PA_36BIT_SPIFLASH blackfin: (for 34/35 boards) all +16.0 rodata +16.0 x86: (for 9/9 boards) bss -14.2 rodata +14.2 aarch64: (for 13/13 boards) all +17.2 rodata +17.2 spl/u-boot-spl:all +151.4 spl/u-boot-spl:rodata +151.4 avr32: (for 4/4 boards) all +16.0 rodata +16.0 sandbox: (for 1/1 boards) all +16.0 rodata +16.0 m68k: (for 48/48 boards) all +11.7 text +11.7 powerpc: (for 412/416 boards) all +3.6 data +1.6 rodata +2.0 spl/u-boot-spl:all +5.8 spl/u-boot-spl:rodata +5.0 spl/u-boot-spl:text +0.8 sparc: (for 5/5 boards) all +32.0 data +16.0 text +16.0 sh: (for 21/22 boards) all +16.0 rodata +16.0 nios2: (for 1/1 boards) all +16.0 data +16.0 mips: (for 24/24 boards) all +20.0 bss +4.0 rodata +16.0 arm: (for 531/531 boards) all +17.7 bss +0.3 rodata +17.4 spl/u-boot-spl:all +69.0 spl/u-boot-spl:rodata +69.0 nds32: (for 1/1 boards) all +16.0 rodata +16.0
Just what I was worried about.
So there are some code size changes (which may not be a big deal at 15 -60 bytes) but it breaks lots of powerpc boards.
Can we instead add CONFIG_SPL_OF_LIBFDT?
What would be the difference between having CONFIG_OF_LIBFDT enabled in SPL (which is the case now) and having CONFIG_SPL_OF_LIBFDT enabled ? The naming seems a bit difficult to comprehend to me.
participants (3)
-
Chin Liang See -
Marek Vasut -
Simon Glass