This is the 1st part of a series meant to add mx6solo/mx6duallite support for a saberlite. I stopped at the last patch because with it applied, Linux will no longer boot. However, the same plugin code used under imx-android-r13.3 will work fine.
So, the last patch in the series is not ready to be applied. I also, tried initializing in the normal manner and running the plugin with nothing to do. That also fails to boot Linux.
Any advice???? Thanks Troy
Also, the header offset is no longer right before the code starts.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 142 +++++++++++++++++++++++++++++++----------------------- tools/imximage.h | 10 ++-- 2 files changed, 87 insertions(+), 65 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..25d3b74 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,12 +65,15 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static set_imx_size_t set_imx_size; +static uint32_t g_flash_offset; + +static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -207,85 +210,79 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; - uint32_t base_offset; - - /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } + uint32_t hdr_base; + uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) + - ((char *)imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr; - fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - - sizeof(struct imx_header); - fhdr_v1->app_code_jump_vector = params->ep; + hdr_base = entry_point - header_length; + fhdr_v1->app_dest_ptr = hdr_base - flash_offset; + fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ; - fhdr_v1->dcd_ptr_ptr = - (uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) - - offsetof(flash_header_v1_t, app_code_jump_vector) + - base_offset); - - fhdr_v1->dcd_ptr = base_offset + - offsetof(imx_header_v1_t, dcd_table); - - /* The external flash header must be at the end of the DCD table */ - dcd_v1->addr_data[dcd_len].type = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr); + fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; + return header_length; +} + +static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset) +{ + uint32_t *p = (uint32_t *)(((char *)imxhdr) + + imximage_params.header_size); + + /* The external flash header must be at the end of the DCD table */ + /* file_size includes header */ + p[-1] = file_size + flash_offset; }
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; - - /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } + uint32_t hdr_base; + uint32_t header_length = (dcd_len) ? + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) + : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
- fhdr_v2->entry = params->ep; + fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = params->ep - sizeof(struct imx_header); - - fhdr_v2->dcd_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, dcd_table); + fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->boot_data_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, boot_data); - - hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset; - hdr_v2->boot_data.size = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + + offsetof(imx_header_v2_t, dcd_table) : 0; + fhdr_v2->boot_data_ptr = hdr_base + + offsetof(imx_header_v2_t, boot_data); + hdr_v2->boot_data.start = hdr_base - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0; + return header_length; +} + +static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset) +{ + imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; + /* file_size includes header */ + hdr_v2->boot_data.size = file_size + flash_offset; }
static void set_hdr_func(struct imx_header *imxhdr) @@ -295,11 +292,13 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; + set_imx_size = set_imx_size_v1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; + set_imx_size = set_imx_size_v2; break; default: err_imximage_version(imximage_version); @@ -381,9 +380,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM: - imxhdr->flash_offset = get_table_entry_id(imximage_bootops, + g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token); - if (imxhdr->flash_offset == -1) { + if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE); @@ -521,12 +520,17 @@ static void imximage_print_header(const void *ptr) } }
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) +int imximage_vrec_header(struct mkimage_params *params, + struct image_type_params *tparams) { - struct imx_header *imxhdr = (struct imx_header *)ptr; + struct imx_header *imxhdr; uint32_t dcd_len;
+ imxhdr = calloc(1, MAX_HEADER_SIZE); + if (!imxhdr) { + fprintf(stderr, "Error: out of memory\n"); + exit(EXIT_FAILURE); + } /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -534,14 +538,31 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ - imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED; + g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
+ /* Exit if there is no BOOT_FROM field specifying the flash_offset */ + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { + fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", + params->imagename); + exit(EXIT_FAILURE); + } /* Set the imx header */ - (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params); + imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, + params->ep, g_flash_offset); + imximage_params.hdr = imxhdr; + return 0; +} + +static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /* Set the size in header */ + (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size, + g_flash_offset); }
int imximage_check_params(struct mkimage_params *params) @@ -571,8 +592,9 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support", - .header_size = sizeof(struct imx_header), - .hdr = (void *)&imximage_header, + .header_size = 0, + .hdr = NULL, + .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header, diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..5fe3a8a 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header; - uint32_t flash_offset; };
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,9 +168,9 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params); +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset); +typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
Before the len was checked after the entire file was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 25d3b74..0bfbec3 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -71,6 +71,7 @@ static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; +static uint32_t max_dcd_entries; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -173,13 +174,6 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V1) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V1); - exit(EXIT_FAILURE); - } - dcd_v1->preamble.barker = DCD_BARKER; dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); } @@ -193,13 +187,6 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V2) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V2); - exit(EXIT_FAILURE); - } - dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.length = cpu_to_be16( dcd_len * sizeof(dcd_addr_data_t) + 8); @@ -293,12 +280,14 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1; + max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; set_imx_size = set_imx_size_v2; + max_dcd_entries = MAX_HW_CFG_SIZE_V2; break; default: err_imximage_version(imximage_version); @@ -425,8 +414,15 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, value = get_cfg_value(token, name, lineno); (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
- if (fld == CFG_REG_VALUE) + if (fld == CFG_REG_VALUE) { (*dcd_len)++; + if (*dcd_len > max_dcd_entries) { + fprintf(stderr, "Error: %s[%d] -" + "DCD table exceeds maximum size(%d)\n", + name, lineno, max_dcd_entries); + exit(EXIT_FAILURE); + } + } break; default: break;
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 153 ++++++++++++++++++++++++++---------------------------- tools/imximage.h | 15 ++---- 2 files changed, 77 insertions(+), 91 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 0bfbec3..21c49e6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -68,10 +68,9 @@ static table_entry_t imximage_versions[] = { static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; -static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; -static uint32_t max_dcd_entries; +static uint32_t *p_max_dcd; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -119,8 +118,10 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
+static uint32_t *p_entry; + static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
@@ -133,13 +134,15 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, name, lineno, value); exit(EXIT_FAILURE); } - dcd_v1->addr_data[off].type = value; + *p_entry++ = value; break; case CFG_REG_ADDRESS: - dcd_v1->addr_data[off].addr = value; + *p_entry++ = value; break; case CFG_REG_VALUE: - dcd_v1->addr_data[off].value = value; + *p_entry++ = value; + dcd_v1->preamble.length = (char *)p_entry + - (char *)&dcd_v1->addr_data[0].type; break; default: break; @@ -147,17 +150,45 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } }
+static write_dcd_command_t *p_dcd; + static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { + uint32_t len; dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
switch (fld) { + case CFG_REG_SIZE: + /* Byte, halfword, word */ + if ((value != 1) && (value != 2) && (value != 4)) { + fprintf(stderr, "Error: %s[%d] - " + "Invalid register size " "(%d)\n", + name, lineno, value); + exit(EXIT_FAILURE); + } + if (p_dcd && (p_dcd->param == value)) + break; + if (!p_dcd) { + dcd_v2->header.tag = DCD_HEADER_TAG; + dcd_v2->header.version = DCD_VERSION; + p_dcd = &dcd_v2->write_dcd_command; + } else { + p_dcd = (write_dcd_command_t *)p_entry; + } + p_dcd->param = value; + p_dcd->tag = DCD_COMMAND_TAG; + p_entry = (uint32_t *)(p_dcd + 1); + break; case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + *p_entry++ = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + *p_entry++ = cpu_to_be32(value); + len = (char *)p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)p_entry - (char *)p_dcd; + p_dcd->length = cpu_to_be16(len); break; default: break; @@ -165,47 +196,13 @@ static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, } }
-/* - * Complete setting up the rest field of DCD of V1 - * such as barker code and DCD data length. - */ -static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; - - dcd_v1->preamble.barker = DCD_BARKER; - dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); -} - -/* - * Complete setting up the reset field of DCD of V2 - * such as DCD tag, version, length, etc. - */ -static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; - - dcd_v2->header.tag = DCD_HEADER_TAG; - dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); - dcd_v2->header.version = DCD_VERSION; - dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; -} - -static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; - dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; - uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)imxhdr)); + uint32_t header_length = ((char *)p_entry) + 4 - ((char *)imxhdr);
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -234,15 +231,13 @@ static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, p[-1] = file_size + flash_offset; }
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; - uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) - : offsetof(imx_header_v2_t, dcd_table); + uint32_t header_length = ((char *)p_entry) - ((char *)imxhdr);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -253,7 +248,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + fhdr_v2->dcd_ptr = (p_dcd) ? hdr_base + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); @@ -277,17 +272,19 @@ static void set_hdr_func(struct imx_header *imxhdr) switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; - set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1; - max_dcd_entries = MAX_HW_CFG_SIZE_V1; + p_entry = &imxhdr->header.hdr_v1.dcd_table.addr_data[0].type; + p_max_dcd = &imxhdr->header.hdr_v1.dcd_table + .addr_data[MAX_HW_CFG_SIZE_V1].type; + imxhdr->header.hdr_v1.dcd_table.preamble.barker = DCD_BARKER; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; - set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; set_imx_size = set_imx_size_v2; - max_dcd_entries = MAX_HW_CFG_SIZE_V2; + p_entry = (uint32_t *)&imxhdr->header.hdr_v2.dcd_table; + p_max_dcd = (uint32_t *)((char *)imxhdr + MAX_HEADER_SIZE); break; default: err_imximage_version(imximage_version); @@ -351,7 +348,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) }
static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, - char *name, int lineno, int fld, int dcd_len) + char *name, int lineno, int fld) { int value; static int cmd_ver_first = ~0; @@ -381,7 +378,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); + (*set_dcd_val)(imxhdr, name, lineno, fld, value); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -389,7 +386,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, }
static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, - char *token, char *name, int lineno, int fld, int *dcd_len) + char *token, char *name, int lineno, int fld) { int value;
@@ -404,7 +401,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -412,23 +409,20 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len); - - if (fld == CFG_REG_VALUE) { - (*dcd_len)++; - if (*dcd_len > max_dcd_entries) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, max_dcd_entries); - exit(EXIT_FAILURE); - } + (*set_dcd_val)(imxhdr, name, lineno, fld, value); + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)imxhdr; + fprintf(stderr, "Error: %s[%d] -" + "header exceeds maximum size(%d)\n", + name, lineno, size); + exit(EXIT_FAILURE); } break; default: break; } } -static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) +static void parse_cfg_file(struct imx_header *imxhdr, char *name) { FILE *fd = NULL; char *line = NULL; @@ -436,7 +430,6 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int lineno = 0; int fld; size_t len; - int dcd_len = 0; int32_t cmd;
fd = fopen(name, "r"); @@ -467,15 +460,12 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) break;
parse_cfg_fld(imxhdr, &cmd, token, name, - lineno, fld, &dcd_len); + lineno, fld); }
} - - (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd); - - return dcd_len; + return; }
@@ -520,9 +510,12 @@ int imximage_vrec_header(struct mkimage_params *params, struct image_type_params *tparams) { struct imx_header *imxhdr; - uint32_t dcd_len;
- imxhdr = calloc(1, MAX_HEADER_SIZE); + /* + * A little extra space to avoid access violation on dcd table overflow. + * Overflow is checked after entry is added. + */ + imxhdr = calloc(1, MAX_HEADER_SIZE + 32); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); @@ -538,7 +531,7 @@ int imximage_vrec_header(struct mkimage_params *params, set_hdr_func(imxhdr);
/* Parse dcd configuration file */ - dcd_len = parse_cfg_file(imxhdr, params->imagename); + parse_cfg_file(imxhdr, params->imagename);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { @@ -547,8 +540,8 @@ int imximage_vrec_header(struct mkimage_params *params, exit(EXIT_FAILURE); } /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, - params->ep, g_flash_offset); + imximage_params.header_size = (*set_imx_hdr)(imxhdr, params->ep, + g_flash_offset); imximage_params.hdr = imxhdr; return 0; } diff --git a/tools/imximage.h b/tools/imximage.h index 5fe3a8a..0319c02 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -47,7 +47,6 @@ #define DCD_HEADER_TAG 0xD2 #define DCD_COMMAND_TAG 0xCC #define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4
enum imximage_cmd { CMD_INVALID, @@ -159,17 +158,11 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, - char *name, int lineno, - int fld, uint32_t value, - uint32_t off); +typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, char *name, + int lineno, int fld, uint32_t value);
-typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - char *name, int lineno); - -typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, - uint32_t entry_point, uint32_t flash_offset); +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, + uint32_t flash_offset); typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, uint32_t flash_offset);
Move to pulling tokens instead of pushing them. Remove need for switch statements to process commands. Add error messages such as "command not finished", "extra data at end of line", and "invalid token" Add ';' as command separator.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 380 ++++++++++++++++++++++++++++++------------------------ tools/imximage.h | 25 ++-- 2 files changed, 226 insertions(+), 179 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 21c49e6..1e120354 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -75,21 +75,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{ - char *endptr; - uint32_t value; - - errno = 0; - value = strtoul(token, &endptr, 16); - if (errno || (token == endptr)) { - fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n", - name, linenr, token); - exit(EXIT_FAILURE); - } - return value; -} - static uint32_t detect_imximage_version(struct imx_header *imx_hdr) { imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1; @@ -120,55 +105,38 @@ static void err_imximage_version(int version)
static uint32_t *p_entry;
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v1(struct imx_header *imxhdr, uint32_t *data) { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - *p_entry++ = value; - break; - case CFG_REG_ADDRESS: - *p_entry++ = value; - break; - case CFG_REG_VALUE: - *p_entry++ = value; - dcd_v1->preamble.length = (char *)p_entry - - (char *)&dcd_v1->addr_data[0].type; - break; - default: - break; - + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; } + *p_entry++ = val; + *p_entry++ = *data++; + *p_entry++ = *data++; + dcd_v1->preamble.length = (char *)p_entry - (char *)&dcd_v1-> + addr_data[0].type; + return 0; }
static write_dcd_command_t *p_dcd;
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) { uint32_t len; dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - if (p_dcd && (p_dcd->param == value)) - break; + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; + } + if (!(p_dcd && (p_dcd->param == val))) { if (!p_dcd) { dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.version = DCD_VERSION; @@ -176,24 +144,19 @@ static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, } else { p_dcd = (write_dcd_command_t *)p_entry; } - p_dcd->param = value; + p_dcd->param = val; p_dcd->tag = DCD_COMMAND_TAG; p_entry = (uint32_t *)(p_dcd + 1); - break; - case CFG_REG_ADDRESS: - *p_entry++ = cpu_to_be32(value); - break; - case CFG_REG_VALUE: - *p_entry++ = cpu_to_be32(value); - len = (char *)p_entry - (char *)&dcd_v2->header; - dcd_v2->header.length = cpu_to_be16(len); - len = (char *)p_entry - (char *)p_dcd; - p_dcd->length = cpu_to_be16(len); - break; - default: - break; - } + val = *data++; + *p_entry++ = cpu_to_be32(val); + val = *data++; + *p_entry++ = cpu_to_be32(val); + len = (char *)p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)p_entry - (char *)p_dcd; + p_dcd->length = cpu_to_be16(len); + return 0; }
static int set_imx_hdr_v1(struct imx_header *imxhdr, @@ -347,93 +310,186 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, - char *name, int lineno, int fld) +static int cmd_cnt; + +int skip_separators(struct data_src *ds) { - int value; - static int cmd_ver_first = ~0; - - switch (cmd) { - case CMD_IMAGE_VERSION: - imximage_version = get_cfg_value(token, name, lineno); - if (cmd_ver_first == 0) { - fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION " - "command need be the first before other " - "valid command in the file\n", name, lineno); - exit(EXIT_FAILURE); + int line_no = ds->lineno; + char *p = ds->p; + + for (;;) { + char c; + if (!p) { + if (getline(&ds->line, &ds->len, ds->fd) <= 0) + return -1; + ds->lineno++; + p = ds->line; + if (ds->cmd_started) { + fprintf(stderr, "warning: continuing command on" + " next line, line %s[%d](%s)\n", + ds->filename, ds->lineno, p); + } } - cmd_ver_first = 1; - set_hdr_func(imxhdr); - break; - case CMD_BOOT_FROM: - g_flash_offset = get_table_entry_id(imximage_bootops, - "imximage boot option", token); - if (g_flash_offset == -1) { - fprintf(stderr, "Error: %s[%d] -Invalid boot device" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); + c = *p; + if ((c == ' ') || (c == '\t')) { + p++; + continue; } - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; - case CMD_DATA: - value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value); - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; + /* Drop all text starting with '#' as comments */ + if ((c == '#') || (c == '\r') || (c == '\n') + || !c) { + p = NULL; + continue; + } + if (c == ';') { + if (ds->cmd_started) { + fprintf(stderr, "Error: command not " + "finished:%s[%d](%s)\n", + ds->filename, ds->lineno, p); + exit(EXIT_FAILURE); + } + p++; + continue; + } + if (!ds->cmd_started && line_no == ds->lineno) { + fprintf(stderr, "warning: extra data at end " + "of line %s[%d](%s)\n", + ds->filename, ds->lineno, p); + p = NULL; + continue; + } + ds->p = p; + return 0; } }
-static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, - char *token, char *name, int lineno, int fld) +char *grab_token(char *dest, int size, char *src) { - int value; - - switch (fld) { - case CFG_COMMAND: - *cmd = get_table_entry_id(imximage_cmds, - "imximage commands", token); - if (*cmd < 0) { - fprintf(stderr, "Error: %s[%d] - Invalid command" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - break; - case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld); - break; - case CFG_REG_ADDRESS: - case CFG_REG_VALUE: - if (*cmd != CMD_DATA) - return; - - value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value); - if (p_entry > p_max_dcd) { - uint32_t size = (char *)p_max_dcd - (char *)imxhdr; - fprintf(stderr, "Error: %s[%d] -" - "header exceeds maximum size(%d)\n", - name, lineno, size); - exit(EXIT_FAILURE); - } - break; - default: - break; + while (size) { + char c = *src; + if ((c == ' ') || (c == '\t') || (c == '\r') || (c == '\n') + || (c == '#') || !c) + break; + *dest++ = c; + size--; + src++; + } + if (!size) + return NULL; + *dest = 0; + return src; +} + +static uint32_t get_cfg_value(struct data_src *ds, uint32_t *pval) +{ + char *endptr; + uint32_t value; + + if (skip_separators(ds)) + return -1; + errno = 0; + value = strtoul(ds->p, &endptr, 16); + if (errno || (ds->p == endptr)) + return -1; + *pval = value; + ds->p = endptr; + return 0; +} + +static int parse_cmd_data(struct data_src *ds) +{ + uint32_t data[3]; + int ret = get_cfg_value(ds, &data[0]); + + if (ret) + return ret; + ret = get_cfg_value(ds, &data[1]); + if (ret) + return ret; + ret = get_cfg_value(ds, &data[2]); + if (ret) + return ret; + ret = (*set_dcd_val)(ds->imxhdr, data); + if (ret) + return ret; + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_image_version(struct data_src *ds) +{ + int ret; + + ret = get_cfg_value(ds, &imximage_version); + if (ret) + return ret; + if (cmd_cnt) { + fprintf(stderr, "Error: IMAGE_VERSION command needs be " + "before other valid commands in the file\n"); + return -1; + } + set_hdr_func(ds->imxhdr); + return 0; +} + +int get_from_array(struct data_src *ds, + const table_entry_t *table, const char *table_name) +{ + int val; + char token[16]; + char *p; + + if (skip_separators(ds)) + return -1; + p = grab_token(token, sizeof(token), ds->p); + if (!p) + return -1; + val = get_table_entry_id(table, table_name, token); + if (val != -1) + ds->p = p; + return val; +} + +static int parse_boot_from(struct data_src *ds) +{ + g_flash_offset = get_from_array(ds, imximage_bootops, + "imximage boot option"); + if (g_flash_offset == -1) { + fprintf(stderr, "Error: Invalid boot device\n"); + return -1; } + return 0; } + +parse_fld_t cmd_table[] = { + parse_image_version, parse_boot_from, parse_cmd_data +}; + +static int parse_command(struct data_src *ds) +{ + int cmd = get_from_array(ds, imximage_cmds, "imximage commands"); + if (cmd < 0) + return cmd; + return cmd_table[cmd](ds); +} + static void parse_cfg_file(struct imx_header *imxhdr, char *name) { - FILE *fd = NULL; - char *line = NULL; - char *token, *saveptr1, *saveptr2; - int lineno = 0; - int fld; - size_t len; - int32_t cmd; - - fd = fopen(name, "r"); - if (fd == 0) { + struct data_src ds; + + ds.line = NULL; + ds.len = 0; + ds.lineno = 0; + ds.filename = name; + ds.fd = fopen(name, "r"); + ds.imxhdr = imxhdr; + ds.p = NULL; + if (ds.fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); exit(EXIT_FAILURE); } @@ -441,34 +497,22 @@ static void parse_cfg_file(struct imx_header *imxhdr, char *name) /* Very simple parsing, line starting with # are comments * and are dropped */ - while ((getline(&line, &len, fd)) > 0) { - lineno++; - - token = strtok_r(line, "\r\n", &saveptr1); - if (token == NULL) - continue; - - /* Check inside the single line */ - for (fld = CFG_COMMAND, cmd = CMD_INVALID, - line = token; ; line = NULL, fld++) { - token = strtok_r(line, " \t", &saveptr2); - if (token == NULL) - break; - - /* Drop all text starting with '#' as comments */ - if (token[0] == '#') - break; - - parse_cfg_fld(imxhdr, &cmd, token, name, - lineno, fld); + for (;;) { + ds.cmd_started = 0; + if (skip_separators(&ds)) + break; + ds.cmd_started = 1; + if (parse_command(&ds)) { + fprintf(stderr, "Error: invalid token " + "%s[%d](%s)\n", name, ds.lineno, ds.p); + exit(EXIT_FAILURE); } - + cmd_cnt++; } - fclose(fd); + fclose(ds.fd); return; }
- static int imximage_check_image_types(uint8_t type) { if (type == IH_TYPE_IMXIMAGE) @@ -557,12 +601,12 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, int imximage_check_params(struct mkimage_params *params) { if (!params) - return CFG_INVALID; + return -1; if (!strlen(params->imagename)) { fprintf(stderr, "Error: %s - Configuration file not specified, " "it is needed for imximage generation\n", params->cmdname); - return CFG_INVALID; + return -1; } /* * Check parameters: diff --git a/tools/imximage.h b/tools/imximage.h index 0319c02..efd249b 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -49,20 +49,11 @@ #define DCD_VERSION 0x40
enum imximage_cmd { - CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_DATA };
-enum imximage_fld_types { - CFG_INVALID = -1, - CFG_COMMAND, - CFG_REG_SIZE, - CFG_REG_ADDRESS, - CFG_REG_VALUE -}; - enum imximage_version { IMXIMAGE_VER_INVALID = -1, IMXIMAGE_V1 = 1, @@ -158,8 +149,20 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, char *name, - int lineno, int fld, uint32_t value); +struct data_src { + char *line; + size_t len; + FILE *fd; + int lineno; + char cmd_started; + char *filename; + struct imx_header *imxhdr; + char *p; +}; + +typedef int (*parse_fld_t)(struct data_src *ds); + +typedef int (*set_dcd_val_t)(struct imx_header *imxhdr, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset);
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 172 ++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 1e120354..2c5a622 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -380,20 +380,172 @@ char *grab_token(char *dest, int size, char *src) return src; }
+char precedence[] = { + /* ( + - * / & ^ | ) */ + 0, 2, 2, 1, 1, 3, 4, 5, 6 +}; +char unary_operations[] = "(+-"; +char binary_operations[] = " +-*/&^|)"; + +uint32_t do_func(uint32_t val1, uint32_t val2, int op) +{ + switch (op) { + case 1: + return val1 + val2; + case 2: + return val1 - val2; + case 3: + return val1 * val2; + case 4: + return val1 / val2; + case 5: + return val1 & val2; + case 6: + return val1 ^ val2; + case 7: + return val1 | val2; + } + fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n", + __func__, val1, val2, op); + exit(EXIT_FAILURE); +} + +int find_op(char c, char *p) +{ + int i; + for (i = 0; ; i++) { + if (c == p[i]) + return i; + if (!p[i]) + break; + } + return -1; +} + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + static uint32_t get_cfg_value(struct data_src *ds, uint32_t *pval) { char *endptr; - uint32_t value; + int op_i = 0; + int val_i = 0; + unsigned char op[16]; + uint32_t val[16]; + int unary = 1; + char *p;
- if (skip_separators(ds)) - return -1; - errno = 0; - value = strtoul(ds->p, &endptr, 16); - if (errno || (ds->p == endptr)) - return -1; - *pval = value; - ds->p = endptr; - return 0; + p = ds->p; + for (;;) { + char c; + int i, j; + char *ops = unary ? unary_operations : binary_operations; + + if (unary) { + ds->p = p; + if (skip_separators(ds)) + return -1; + p = ds->p; + c = *p; + } else { + for (;;) { + c = *p; + if ((c != ' ') && (c != '\t')) + break; + p++; + } + } + i = find_op(c, ops); + debug("%d,%c,%d:%s\n", i, c, unary, p); + if ((i < 0) && unary) { + if (val_i >= ARRAY_SIZE(val)) + return -1; + errno = 0; + val[val_i++] = strtoul(p, &endptr, 16); + if (errno || (p == endptr)) { + ds->p = p; + return -1; + } + p = endptr; + unary = 0; + debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1], + op_i, val_i); +do_unary: + while (op_i) { + j = op[op_i - 1]; + if (!(j & 0x80)) + break; + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("un:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + continue; + } + if (i < 0) { + c = 0; + i = 8; + } else { + p++; + } + if (c == '(') { + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i; + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], + op_i, val_i); + unary = 1; + continue; + } + for (;;) { + if (!op_i || unary) + break; + j = op[op_i - 1]; + if (j == 0) { + if (c == ')') { + op_i--; + goto do_unary; + } + break; + } + if ((j & 0x80)) { + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("unary:%d,%x\n", val[val_i - 1], j); + continue; + } + if (precedence[i] < precedence[j]) + break; + if (val_i < 2) + return -1; + op_i--; + val[val_i - 2] = do_func(val[val_i - 2], + val[val_i - 1], j); + val_i--; + debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + if (c == ')') { + fprintf(stderr, "Error: unmatched parenthesis\n"); + return -1; + } + if (i == 8) { + if ((op_i != 0) || (val_i != 1)) { + fprintf(stderr, "Error: syntax %d %d\n", + op_i, val_i); + return -1; + } + ds->p = p; + *pval = val[0]; + return 0; + } + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i | (unary << 7); + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i); + unary = 1; + } }
static int parse_cmd_data(struct data_src *ds)
Add commands plugin address filename iomux_entry addr, data1 [, data2, [, data3]] write_entry addr, data1 [, data2, [, data3]]
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 338 ++++++++++++++++++++++++++++++++++++++++++++---------- tools/imximage.h | 11 +- 2 files changed, 287 insertions(+), 62 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2c5a622..63252be 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -31,7 +31,6 @@ #include "mkimage.h" #include <image.h> #include "imximage.h" - /* * Supported commands for configuration file */ @@ -39,6 +38,9 @@ static table_entry_t imximage_cmds[] = { {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_DATA, "DATA", "Reg Write Data", }, {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", }, + {CMD_PLUGIN, "plugin", "plugin addr,file", }, + {CMD_IOMUX_ENTRY, "iomux_entry", "Write iomux reg", }, + {CMD_WRITE_ENTRY, "write_entry", "Write register", }, {-1, "", "", }, };
@@ -69,8 +71,8 @@ static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_imx_hdr_t set_imx_hdr; -static set_imx_size_t set_imx_size; static uint32_t *p_max_dcd; +static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -88,8 +90,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */ - if ((fhdr_v2->header.tag == IVT_HEADER_TAG) && - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG)) + if ((fhdr_v2->header.tag == IVT_HEADER_TAG)) return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID; @@ -160,7 +161,7 @@ static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) }
static int set_imx_hdr_v1(struct imx_header *imxhdr, - uint32_t entry_point, uint32_t flash_offset) + uint32_t entry_point, uint32_t flash_offset, int plugin) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; @@ -180,22 +181,12 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; + header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); return header_length; }
-static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset) -{ - uint32_t *p = (uint32_t *)(((char *)imxhdr) - + imximage_params.header_size); - - /* The external flash header must be at the end of the DCD table */ - /* file_size includes header */ - p[-1] = file_size + flash_offset; -} - static int set_imx_hdr_v2(struct imx_header *imxhdr, - uint32_t entry_point, uint32_t flash_offset) + uint32_t entry_point, uint32_t flash_offset, int plugin) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; @@ -216,27 +207,20 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); hdr_v2->boot_data.start = hdr_base - flash_offset; + hdr_v2->boot_data.plugin = plugin;
/* Security feature are not supported */ fhdr_v2->csf = 0; + header_size_ptr = &hdr_v2->boot_data.size; return header_length; }
-static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset) -{ - imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; - /* file_size includes header */ - hdr_v2->boot_data.size = file_size + flash_offset; -} - static void set_hdr_func(struct imx_header *imxhdr) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_imx_hdr = set_imx_hdr_v1; - set_imx_size = set_imx_size_v1; p_entry = &imxhdr->header.hdr_v1.dcd_table.addr_data[0].type; p_max_dcd = &imxhdr->header.hdr_v1.dcd_table .addr_data[MAX_HW_CFG_SIZE_V1].type; @@ -245,7 +229,6 @@ static void set_hdr_func(struct imx_header *imxhdr) case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_imx_hdr = set_imx_hdr_v2; - set_imx_size = set_imx_size_v2; p_entry = (uint32_t *)&imxhdr->header.hdr_v2.dcd_table; p_max_dcd = (uint32_t *)((char *)imxhdr + MAX_HEADER_SIZE); break; @@ -283,31 +266,49 @@ static void print_hdr_v1(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector); }
-static void print_hdr_v2(struct imx_header *imx_hdr) +static void print_header_info2(struct imx_header *imx_hdr) { imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; + + printf("Data Size: "); + genimg_print_size(hdr_v2->boot_data.size); + printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr); + printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); +} + +static void print_hdr_v2(struct imx_header *imxhdr) +{ + imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table; uint32_t size, version;
- size = be16_to_cpu(dcd_v2->header.length) - 8; - if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { - fprintf(stderr, - "Error: Image corrupt DCD size %d exceed maximum %d\n", - (uint32_t)(size / sizeof(dcd_addr_data_t)), - MAX_HW_CFG_SIZE_V2); - exit(EXIT_FAILURE); + if (hdr_v2->fhdr.dcd_ptr) { + size = be16_to_cpu(dcd_v2->header.length) - 8; + if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { + fprintf(stderr, "Error: Image corrupt DCD size " + "%d exceed maximum %d\n", + (uint32_t)(size / sizeof(dcd_addr_data_t)), + MAX_HW_CFG_SIZE_V2); + exit(EXIT_FAILURE); + } } - - version = detect_imximage_version(imx_hdr); + version = detect_imximage_version(imxhdr);
printf("Image Type: Freescale IMX Boot Image\n"); printf("Image Ver: %x", version); printf("%s\n", get_table_entry_name(imximage_versions, NULL, version)); - printf("Data Size: "); - genimg_print_size(hdr_v2->boot_data.size); - printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr); - printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); + print_header_info2(imxhdr); + if (hdr_v2->boot_data.plugin) { + uint32_t flash_offset = + hdr_v2->fhdr.self - hdr_v2->boot_data.start; + /* The 1st size includes flash offset and the next header */ + uint32_t plugin_length = hdr_v2->boot_data.size - flash_offset + - offsetof(imx_header_v2_t, dcd_table); + + imxhdr = (struct imx_header *)((char *)imxhdr + plugin_length); + print_header_info2(imxhdr); + } }
static int cmd_cnt; @@ -363,6 +364,24 @@ int skip_separators(struct data_src *ds) } }
+int skip_comma(struct data_src *ds) +{ + char *p = ds->p; + + for (;;) { + char c = *p++; + if ((c == '#') || (c == '\r') || (c == '\n') || !c) + return 0; + if (c == ',') { + ds->p = p; + skip_separators(ds); + return 1; + } + if ((c != ' ') && (c == '\t')) + return 0; + } +} + char *grab_token(char *dest, int size, char *src) { while (size) { @@ -551,16 +570,18 @@ do_unary: static int parse_cmd_data(struct data_src *ds) { uint32_t data[3]; - int ret = get_cfg_value(ds, &data[0]); + int ret, i;
- if (ret) - return ret; - ret = get_cfg_value(ds, &data[1]); - if (ret) - return ret; - ret = get_cfg_value(ds, &data[2]); - if (ret) - return ret; + if (ds->plugin) { + fprintf(stderr, "DATA should be before plug command\n"); + return -1; + } + for (i = 0; i < 3; i++) { + int ret = get_cfg_value(ds, &data[i]); + if (ret) + return ret; + skip_comma(ds); /* comma is optional */ + } ret = (*set_dcd_val)(ds->imxhdr, data); if (ret) return ret; @@ -573,6 +594,103 @@ static int parse_cmd_data(struct data_src *ds) return 0; }
+static int get_data(struct data_src *ds, uint32_t *data, int cnt) +{ + int i = 0; + + if (!ds->plugin) { + fprintf(stderr, "missing plug command\n"); + return -1; + } + for (;;) { + int ret = get_cfg_value(ds, &data[i++]); + if (ret) + return ret; + if (i >= cnt) + break; + if (!skip_comma(ds)) + break; + } + if (i < 2) { + fprintf(stderr, "missing ','\n"); + return -1; + } + while (i < 4) { + data[i] = data[i - 1]; + i++; + } + return 0; +} + +static int store_data(struct data_src *ds, uint32_t *data, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + *p_entry++ = data[i]; + + ds->prev[1] = data[1]; + ds->prev[2] = data[2]; + ds->prev[3] = data[3]; + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_iomux_entry(struct data_src *ds) +{ + uint32_t data[4]; + int ret, i, j; + + ret = get_data(ds, data, 4); + if (ret) + return ret; + if (data[0] & (3 << 30)) { + fprintf(stderr, "bad 1st value\n"); + return -1; + } + if ((data[1] == ds->prev[1]) && (data[2] == ds->prev[2]) + && (data[3] == ds->prev[3])) { + i = j = 1; + } else if ((data[1] == data[2]) && (data[2] == data[3])) { + i = j = 2; + } else { + i = 3; + j = 4; + } + data[0] |= (i << 30); + return store_data(ds, data, j); +} + +static int parse_write_entry(struct data_src *ds) +{ + uint32_t data[4]; + int ret, i; + + ret = get_data(ds, data, 4); + if (ret) + return ret; + if (data[0] & 3) { + fprintf(stderr, "Address must be aligned on word boundary\n"); + return -1; + } + if ((data[1] == ds->prev[1]) && (data[2] == ds->prev[2]) + && (data[3] == ds->prev[3])) + i = 0; + else if ((data[1] == data[2]) && (data[2] == data[3])) + i = 1; + else if (data[2] == data[3]) + i = 2; + else + i = 3; + data[0] |= i; + return store_data(ds, data, i + 1); +} + static int parse_image_version(struct data_src *ds) { int ret; @@ -618,8 +736,82 @@ static int parse_boot_from(struct data_src *ds) return 0; }
+static int parse_plugin(struct data_src *ds) +{ + struct stat sbuf; + int plug_file; + unsigned char *ptr; + char *p; + char c; + int ret; + uint32_t plug_base; + uint32_t header_length; + + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { + fprintf(stderr, "Error: Place BOOT_FROM before plugin\n"); + return -1; + } + ret = get_cfg_value(ds, &plug_base); + if (ret) + return ret; + + if (skip_separators(ds)) + return -1; + p = ds->p; + for (;;) { + c = *p; + if (!c) + break; + if ((c == ' ') || (c == '\t') || (c == ';') || (c == '#') + || (c == '\r') || (c == '\n')) { + *p = 0; + break; + } + p++; + } + plug_file = open(ds->p, O_RDONLY|O_BINARY); + if (plug_file < 0) { + fprintf(stderr, "Can't open plugin file %s: %s\n", + ds->p, strerror(errno)); + *p = c; + return -1; + } + if (fstat(plug_file, &sbuf) < 0) { + fprintf(stderr, "Can't stat %s: %s\n", + ds->p, strerror(errno)); + close(plug_file); + return -1; + } + ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, plug_file, 0); + if (ptr == MAP_FAILED) { + fprintf(stderr, "Can't read %s: %s\n", + ds->p, strerror(errno)); + return -1; + } + *p = c; + ds->p = p; + /* Set the plugin header */ + header_length = (*set_imx_hdr)(ds->imxhdr, plug_base, + g_flash_offset, 1); + + p = ((char *)ds->imxhdr) + header_length; + if ((p + sbuf.st_size) >= (char *)p_max_dcd) { + fprintf(stderr, "Out of space\n"); + return -1; + } + + ds->plugin = 1; + memcpy(p, ptr, sbuf.st_size); + munmap((void *)ptr, sbuf.st_size); + close(plug_file); + + p_entry = (uint32_t *)(p + sbuf.st_size); + return 0; +} + parse_fld_t cmd_table[] = { - parse_image_version, parse_boot_from, parse_cmd_data + parse_image_version, parse_boot_from, parse_cmd_data, parse_plugin, + parse_iomux_entry, parse_write_entry };
static int parse_command(struct data_src *ds) @@ -630,9 +822,11 @@ static int parse_command(struct data_src *ds) return cmd_table[cmd](ds); }
-static void parse_cfg_file(struct imx_header *imxhdr, char *name) +static void parse_cfg_file(struct imx_header *imxhdr, char *name, + uint32_t entry_point) { struct data_src ds; + uint32_t plugin_length = 0;
ds.line = NULL; ds.len = 0; @@ -662,6 +856,35 @@ static void parse_cfg_file(struct imx_header *imxhdr, char *name) cmd_cnt++; } fclose(ds.fd); + + if (ds.plugin) { + uint32_t header_length, more; + struct imx_header *next_imxhdr; + + *p_entry++ = 0; + header_length = ((char *)p_entry) - ((char *)imxhdr); + plugin_length = ((header_length - 1) | 0x3f) + 1; + more = plugin_length - header_length; + if (more) + memset(p_entry, 0, more); + next_imxhdr = (struct imx_header *) + (((char *)imxhdr) + plugin_length); + p_entry = (imximage_version == IMXIMAGE_V1) ? (uint32_t *) + &next_imxhdr->header.hdr_v1.dcd_table.addr_data[0].type + : (uint32_t *)&next_imxhdr->header.hdr_v2.dcd_table; + if (p_entry > p_max_dcd) { + fprintf(stderr, "Out of space\n"); + exit(EXIT_FAILURE); + } + + /* Set the plugin size in header to include next header */ + *header_size_ptr = ((char *)p_entry) - ((char *)imxhdr) + + g_flash_offset; + imxhdr = next_imxhdr; + } + /* Set the imx header */ + imximage_params.header_size = (*set_imx_hdr)(imxhdr, entry_point, + g_flash_offset + plugin_length, 0) + plugin_length; return; }
@@ -727,7 +950,7 @@ int imximage_vrec_header(struct mkimage_params *params, set_hdr_func(imxhdr);
/* Parse dcd configuration file */ - parse_cfg_file(imxhdr, params->imagename); + parse_cfg_file(imxhdr, params->imagename, params->ep);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { @@ -735,9 +958,6 @@ int imximage_vrec_header(struct mkimage_params *params, params->imagename); exit(EXIT_FAILURE); } - /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, params->ep, - g_flash_offset); imximage_params.hdr = imxhdr; return 0; } @@ -746,8 +966,10 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, struct mkimage_params *params) { /* Set the size in header */ - (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size, - g_flash_offset); + uint32_t offset = (char *)header_size_ptr - (char *)imximage_params.hdr; + uint32_t *p = (uint32_t *)((char *)ptr + offset); + + *p = sbuf->st_size + g_flash_offset; }
int imximage_check_params(struct mkimage_params *params) diff --git a/tools/imximage.h b/tools/imximage.h index efd249b..79f0156 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -51,7 +51,10 @@ enum imximage_cmd { CMD_IMAGE_VERSION, CMD_BOOT_FROM, - CMD_DATA + CMD_DATA, + CMD_PLUGIN, + CMD_IOMUX_ENTRY, + CMD_WRITE_ENTRY, };
enum imximage_version { @@ -158,6 +161,8 @@ struct data_src { char *filename; struct imx_header *imxhdr; char *p; + int plugin; + uint32_t prev[4]; };
typedef int (*parse_fld_t)(struct data_src *ds); @@ -165,8 +170,6 @@ typedef int (*parse_fld_t)(struct data_src *ds); typedef int (*set_dcd_val_t)(struct imx_header *imxhdr, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, - uint32_t flash_offset); -typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset); + uint32_t flash_offset, int plugin);
#endif /* _IMXIMAGE_H_ */
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
diff --git a/Makefile b/Makefile index fe2f98c..edf647e 100644 --- a/Makefile +++ b/Makefile @@ -425,7 +425,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin - $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ + $(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx + $(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin diff --git a/board/esg/ima3-mx53/imximage.cfg b/board/esg/ima3-mx53/imximage.cfg index fa6b42d..fce7492 100644 --- a/board/esg/ima3-mx53/imximage.cfg +++ b/board/esg/ima3-mx53/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C) Copyright 2012 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2012 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM nor
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# IOMUX for RAM only +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* IOMUX for RAM only */ DATA 4 0x53fa8554 0x300020 DATA 4 0x53fa8560 0x300020 DATA 4 0x53fa8594 0x300020 @@ -72,37 +74,47 @@ DATA 4 0x53fa86fc 0x0 DATA 4 0x53fa86f4 0x0 DATA 4 0x53fa8714 0x0 DATA 4 0x53fa8724 0x4000000 -# -# DDR RAM + +/* DDR RAM */ DATA 4 0x63fd9088 0x40404040 DATA 4 0x63fd9090 0x40404040 DATA 4 0x63fd907C 0x01420143 DATA 4 0x63fd9080 0x01450146 DATA 4 0x63fd9018 0x00111740 DATA 4 0x63fd9000 0x84190000 -# esdcfgX + +/* esdcfgX */ DATA 4 0x63fd900C 0x9f5152e3 DATA 4 0x63fd9010 0xb68e8a63 DATA 4 0x63fd9014 0x01ff00db -# Read/Write command delay + +/* Read/Write command delay */ DATA 4 0x63fd902c 0x000026d2 -# Out of reset delays + +/* Out of reset delays */ DATA 4 0x63fd9030 0x00ff0e21 -# ESDCTL ODT timing control + +/* ESDCTL ODT timing control */ DATA 4 0x63fd9008 0x12273030 -# ESDCTL power down control + +/* ESDCTL power down control */ DATA 4 0x63fd9004 0x0002002d -# Set registers in DDR memory chips + +/* Set registers in DDR memory chips */ DATA 4 0x63fd901c 0x00008032 DATA 4 0x63fd901c 0x00008033 DATA 4 0x63fd901c 0x00028031 DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 -# ESDCTL refresh control + +/* ESDCTL refresh control */ DATA 4 0x63fd9020 0x00005800 -# PHY ZQ HW control + +/* PHY ZQ HW control */ DATA 4 0x63fd9040 0x05380003 -# PHY ODT control + +/* PHY ODT control */ DATA 4 0x63fd9058 0x00022222 -# start DDR3 + +/* start DDR3 */ DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 62498ab..c86cd40 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -154,7 +158,7 @@ DATA 4 0x021b48b8 0x00000800 DATA 4 0x021b001c 0x00000000 DATA 4 0x021b0404 0x00011006
-# set the default clock gate to save power +/* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 @@ -163,8 +167,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx25pdk/imximage.cfg b/board/freescale/mx25pdk/imximage.cfg index f7af7ff..c42a283 100644 --- a/board/freescale/mx25pdk/imximage.cfg +++ b/board/freescale/mx25pdk/imximage.cfg @@ -1,46 +1,49 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# EIM config-CS5 init -- CPLD +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* EIM config-CS5 init -- CPLD */ DATA 4 0xB8002050 0x0000D843 DATA 4 0xB8002054 0x22252521 DATA 4 0xB8002058 0x22220A00
-# DDR2 init +/* DDR2 init */ DATA 4 0xB8001004 0x0076E83A DATA 4 0xB8001010 0x00000204 DATA 4 0xB8001000 0x92210000 @@ -67,7 +70,7 @@ DATA 4 0x43FAC454 0x00001000
DATA 4 0x53F80008 0x20034000
-# Enable the clocks +/* Enable the clocks */ DATA 4 0x53f8000c 0x1fffffff DATA 4 0x53f80010 0xffffffff DATA 4 0x53f80014 0xfdfff diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg index a875e8f..3e141ee 100644 --- a/board/freescale/mx51evk/imximage.cfg +++ b/board/freescale/mx51evk/imximage.cfg @@ -1,46 +1,50 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */
-# Setting IOMUXC +/* Setting IOMUXC */ DATA 4 0x73FA88a0 0x200 DATA 4 0x73FA850c 0x20c5 DATA 4 0x73FA8510 0x20c5 @@ -65,22 +69,24 @@ DATA 4 0x73FA88a4 0x6 DATA 4 0x73FA88ac 0x6 DATA 4 0x73FA88b8 0x6
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83FD9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83FD9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83FD9010 0x000ad0d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83FD9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83FD900C 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83FD9014 0x04008008 DATA 4 0x83FD9014 0x0000801a DATA 4 0x83FD9014 0x0000801b @@ -94,7 +100,7 @@ DATA 4 0x83FD9014 0x03808019 DATA 4 0x83FD9014 0x00408019 DATA 4 0x83FD9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83FD9014 0x0400800c DATA 4 0x83FD9014 0x0000801e DATA 4 0x83FD9014 0x0000801f @@ -108,12 +114,12 @@ DATA 4 0x83FD9014 0x0380801d DATA 4 0x83FD9014 0x0040801d DATA 4 0x83FD9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83FD9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83FD9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83FD9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83FD9034 0x90000000 DATA 4 0x83FD9014 0x00000000 diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg index 915fb2c..1cd61d5 100644 --- a/board/freescale/mx53evk/imximage.cfg +++ b/board/freescale/mx53evk/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Setting IOMUXC +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* Setting IOMUXC */ DATA 4 0x53fa8554 0x00200000 DATA 4 0x53fa8560 0x00200000 DATA 4 0x53fa8594 0x00200000 diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index 2ce5f8d..e6b90c1 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -1,48 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index bf941a3..4ed211e 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -166,8 +170,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/genesi/mx51_efikamx/imximage_mx.cfg b/board/genesi/mx51_efikamx/imximage_mx.cfg index 38fa760..21ff6d6 100644 --- a/board/genesi/mx51_efikamx/imximage_mx.cfg +++ b/board/genesi/mx51_efikamx/imximage_mx.cfg @@ -1,52 +1,58 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Essential GPIO settings to be done as early as possible -# PCBIDn pad settings are all the defaults except #2 which needs HVE off +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* + * Essential GPIO settings to be done as early as possible + * PCBIDn pad settings are all the defaults except #2 which needs HVE off + */ DATA 4 0x73fa8134 0x3 # PCBID0 ALT3 GPIO 3_16 DATA 4 0x73fa8130 0x3 # PCBID1 ALT3 GPIO 3_17 DATA 4 0x73fa8128 0x3 # PCBID2 ALT3 GPIO 3_11 @@ -55,7 +61,7 @@ DATA 4 0x73fa8198 0x3 # LED0 ALT3 GPIO 3_13 DATA 4 0x73fa81c4 0x3 # LED1 ALT3 GPIO 3_14 DATA 4 0x73fa81c8 0x3 # LED2 ALT3 GPIO 3_15
-# DDR bus IOMUX PAD settings +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 DATA 4 0x73fa84ac 0xc5 # SDWE @@ -72,22 +78,24 @@ DATA 4 0x73fa84d8 0xc5 # DRAM_DQM1 DATA 4 0x73fa84dc 0xc5 # DRAM_DQM2 DATA 4 0x73fa84e0 0xc5 # DRAM_DQM3
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x3f3574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x3f3574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -101,7 +109,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -115,12 +123,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0040801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/genesi/mx51_efikamx/imximage_sb.cfg b/board/genesi/mx51_efikamx/imximage_sb.cfg index 26d259f..7ddd0b1 100644 --- a/board/genesi/mx51_efikamx/imximage_sb.cfg +++ b/board/genesi/mx51_efikamx/imximage_sb.cfg @@ -1,51 +1,55 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# DDR bus IOMUX PAD settings +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register +*/ +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa88a0 0x200 # GRP_INMODE1 DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 @@ -62,22 +66,24 @@ DATA 4 0x73fa84b4 0xe5 # SDCKE1 DATA 4 0x73fa84cc 0xe5 # DRAM_CS0 DATA 4 0x73fa84d0 0xe4 # DRAM_CS1
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -91,7 +97,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -105,12 +111,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0042801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/ttcontrol/vision2/imximage_hynix.cfg b/board/ttcontrol/vision2/imximage_hynix.cfg index ed531db..c1de94f 100644 --- a/board/ttcontrol/vision2/imximage_hynix.cfg +++ b/board/ttcontrol/vision2/imximage_hynix.cfg @@ -1,209 +1,228 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# (C) Copyright 2010 -# Klaus Steinhammer TTECH Control Gmbh kst@tttech.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, nand, onenand, sd - +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * (C) Copyright 2010 + * Klaus Steinhammer TTECH Control Gmbh kst@tttech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* + * Boot Device : one of + * spi, nand, onenand, sd + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -####################### -### Disable WDOG ### -####################### +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * ####################### + * ### Disable WDOG ### + * ####################### + */ DATA 2 0x73f98000 0x30
-####################### -### SET DDR Clk ### -####################### - -# CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) +/* + * ####################### + * ### SET DDR Clk ### + * ####################### + */ +/* CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) */ DATA 4 0x73FD4018 0x000024C0
-# DOUBLE SPI CLK (13MHz->26 MHz Clock) +/* DOUBLE SPI CLK (13MHz->26 MHz Clock) */ DATA 4 0x73FD4038 0x2010241
-#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8600 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8604 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8608 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa860c 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8614 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) +/* IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) */ DATA 4 0x73fa86a8 0x00000187
-####################### -### Settings IOMUXC ### -####################### - -# DDR IOMUX configuration -# Control, Data, Address pads are in their default state: HIGH DS, FAST SR. -# IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS +/* + * ####################### + * ### Settings IOMUXC ### + * ####################### + */ +/* + * DDR IOMUX configuration + * Control, Data, Address pads are in their default state: HIGH DS, FAST SR. + * IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS + */ DATA 4 0x73fa84b8 0x000000e7 -# PVTC MAX (at GPC, PGR reg) -#DATA 4 0x73FD8004 0x1fc00000 +/* PVTC MAX (at GPC, PGR reg) */ +/* DATA 4 0x73FD8004 0x1fc00000 */
-#DQM0 DS high slew rate slow +/* DQM0 DS high slew rate slow */ DATA 4 0x73fa84d4 0x000000e4 -#DQM1 DS high slew rate slow +/* DQM1 DS high slew rate slow */ DATA 4 0x73fa84d8 0x000000e4 -#DQM2 DS high slew rate slow +/* DQM2 DS high slew rate slow */ DATA 4 0x73fa84dc 0x000000e4 -#DQM3 DS high slew rate slow +/* DQM3 DS high slew rate slow */ DATA 4 0x73fa84e0 0x000000e4
-#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow */ DATA 4 0x73fa84bc 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow */ DATA 4 0x73fa84c0 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow */ DATA 4 0x73fa84c4 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow */ DATA 4 0x73fa84c8 0x000000c4
-#DRAM_DATA B0 +/* DRAM_DATA B0 */ DATA 4 0x73fa88a4 0x00000004 -#DRAM_DATA B1 +/* DRAM_DATA B1 */ DATA 4 0x73fa88ac 0x00000004 -#DRAM_DATA B2 +/* DRAM_DATA B2 */ DATA 4 0x73fa88b8 0x00000004 -#DRAM_DATA B3 +/* DRAM_DATA B3 */ DATA 4 0x73fa882c 0x00000004
-#DRAM_DATA B0 slew rate +/* DRAM_DATA B0 slew rate */ DATA 4 0x73fa8878 0x00000000 -#DRAM_DATA B1 slew rate +/* DRAM_DATA B1 slew rate */ DATA 4 0x73fa8880 0x00000000 -#DRAM_DATA B2 slew rate +/* DRAM_DATA B2 slew rate */ DATA 4 0x73fa888c 0x00000000 -#DRAM_DATA B3 slew rate +/* DRAM_DATA B3 slew rate */ DATA 4 0x73fa889c 0x00000000
-####################### -### Configure SDRAM ### -####################### +/* + * ####################### + * ### Configure SDRAM ### + * ####################### + */
-# Configure CS0 -####################### +/* Configure CS0 */ +/* ####################### */
-# ESDCTL0: Enable controller +/* ESDCTL0: Enable controller */ DATA 4 0x83fd9000 0x83220000
-# Init DRAM on CS0 -# ESDSCR: Precharge command +/* Init DRAM on CS0 / +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x04008008 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x00338018 -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801a -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008000
-# ESDSCR: EMR with full Drive strength -#DATA 4 0x83fd9014 0x0000801a +/* ESDSCR: EMR with full Drive strength */ +/* DATA 4 0x83fd9014 0x0000801a */
-# ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9000 0xC3220000
-# ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd9004 0xC33574AA - -#micron mDDR -# ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD9004 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd9004 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD9004 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD9004 0x704564a8
-# ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 +/* ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 */ DATA 4 0x83fd9010 0x000a1700
-# Configure CS1 -####################### +/* Configure CS1 */ +/* ####################### */
-# ESDCTL1: Enable controller +/* ESDCTL1: Enable controller */ DATA 4 0x83fd9008 0x83220000
-# Init DRAM on CS1 -# ESDSCR: Precharge command +/* Init DRAM on CS1 */ +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x0400800c -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x0033801c -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801e -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008004
-# ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9008 0xC3220000 - -# ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd900c 0xC33574AA - -#micron mDDR -# ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD900C 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd900c 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD900C 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD900C 0x704564a8
-# ESDSCR (mDRAM configuration finished) +/* ESDSCR (mDRAM configuration finished) */ DATA 4 0x83FD9014 0x00000004
-# ESDSCR - clear "configuration request" bit +/* ESDSCR - clear "configuration request" bit */ DATA 4 0x83fd9014 0x00000000
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 141 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..b1fce4e 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -33,11 +33,14 @@ SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) plugin.bin
$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))
+plugin.bin: plugin.o + $(OBJCOPY) -O binary --gap-fill 0xff $< $@ + #########################################################################
# defines $(obj).depend target diff --git a/arch/arm/cpu/armv7/mx6/plugin.S b/arch/arm/cpu/armv7/mx6/plugin.S new file mode 100644 index 0000000..e2a45d7 --- /dev/null +++ b/arch/arm/cpu/armv7/mx6/plugin.S @@ -0,0 +1,141 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#include <config.h> +#include <asm/arch/imx-regs.h> + +#define HAB_RVT_ENTRY 0x98 +#define HAB_RVT_FAIL_SAFE_VECT 0xbc +#define HAB_RVT_LOAD_DATA 0xc8 + +#define HDR_SELF_PTR 0x14 +#define HDR_BOOT_DATA 0x20 +#define HDR_IMAGE_LEN 0x24 + +/* + * plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset) + */ +plugin_start: +/* Save the return address and the function arguments */ + push {r0-r8, lr} + +/* r0-r2 must not be 0 and must be 4 byte aligned */ + tst r0, r0 + tstne r1, r1 + tstne r2, r2 + mov r3, r0 + orreq r3, r3, #1 + orr r3, r3, r1 + orr r3, r3, r2 +#if 0 + ldr r0, plugin + tst r0, r0 + orreq r3, r3, #1 +#endif + +#define rCPU r2 /* 22 - mx6q, 12 - mx6dl, 2 sololite */ +#define rFlag r3 +#define rIomux r4 +#define rVal0 r5 +#define rVal1 r6 +#define rVal2 r7 +#define rTable r8 + mov rCPU, #2 + + ldr r1, =ANATOP_BASE_ADDR + ldr r0, [r1, #0x280] + mov r0, r0, LSR #16 + cmp r0, #0x60 + movne rCPU, #12 + ldrne r0, [r1, #0x260] + movne r0, r0, LSR #16 + cmpne r0, #0x61 + movne rCPU, #22 + + mov rVal0, #0 + mov rVal1, #0 + mov rVal2, #0 + ldr rIomux, =IOMUXC_BASE_ADDR + adr rTable, mx6_table + b 3f + +1: movs r0, r1, LSR #30 + beq 2f + mov r1, r1, LSL rCPU + movs r1, r1, LSR #32-10 + addne r1, rIomux, r1, LSL #2 + cmp r0, #3 + subne r0, r0, #1 + orr r1, r1, r0 + +2: ands r0, r1, #3 + bic r1, r1, #3 + ldrne rVal0, [rTable], #4 + movne rVal1, rVal0 + movne rVal2, rVal0 + subnes r0, r0, #1 + ldrne rVal1, [rTable], #4 + movne rVal2, rVal1 + subnes r0, r0, #1 + ldrne rVal2, [rTable], #4 + + mov r0, rVal0 + cmp rCPU, #12 + moveq r0, rVal1 + cmp rCPU, #2 + moveq r0, rVal2 + cmp r1, #0 + strne r0, [r1] +3: ldr r1, [rTable], #4 + cmp r1, #0 + bne 1b + + ands rFlag, rFlag, #3 + bne 4f /* Branch if not called as plugin */ +/* Align end of table to 64 byte boundary */ + sub rTable, rTable, #1 + orr rTable, rTable, #0x3f + add rTable, rTable, #1 + ldr r2, [rTable, #HDR_SELF_PTR] + ldr r0, [rTable, #HDR_BOOT_DATA] + ldr r1, [rTable, #HDR_IMAGE_LEN] + sub rTable, r2, r0 + mov r2, r0 + mov r3, r1 + mov r4, #0 + push {r0-r4} + mov r0, #HAB_RVT_LOAD_DATA + ldr r4, [r0] + mov r0, sp + add r1, sp, #4 + add r2, sp, #8 + blx r4 + + pop {r4, r5} + add sp, sp, #12 + pop {r0-r3} +/* + * Before returning to ROM, we need to fill the return values arguments + * to our function. + * plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset) + */ + + str r4, [r0] + str r5, [r1] + str rTable, [r2] + mov r0, #1 + pop {r4-r8, pc} + +/* Not called as plugin */ +4: popne {r0-r8, lr} + mov r0, #HAB_RVT_ENTRY + ldr lr, [r0] + blx lr + mov r0, #HAB_RVT_FAIL_SAFE_VECT + ldr lr, [r0] + blx lr + + .ltorg +mx6_table:
On 9/18/2012 5:03 PM, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 141 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
Ok, I found the issue with Linux not booting, and I'll need to change this patch to add disabling of L2 cache and a cache clean.
This allows us to generate plugin data or DCD rom style data simply by defining USE_PLUGIN
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 163 +++++++++++++++++ board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 248 +++++++++++++------------- 2 files changed, 290 insertions(+), 121 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h
diff --git a/arch/arm/include/asm/arch-mx6/imx-mkimage.h b/arch/arm/include/asm/arch-mx6/imx-mkimage.h new file mode 100644 index 0000000..e61d5b6 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/imx-mkimage.h @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#ifndef __ASM_ARCH_IMX_MKIMAGE_H__ +#define __ASM_ARCH_IMX_MKIMAGE_H__ + +/* mx6 duallite and solo have same offsets */ +/* + * Bits 31:30 : + * 0 : 29:2 absolute address, 1:0 # of data values, + * followed by 0-3 data values in (mx6q, mx6dl, mx6_sololite) + * 0 means repeat last data value + * 1 : iomuxc relative address, 9:0 mx6q offset, 19:10 mx6dl offset, + * 29:20 mx6_sololite offset, 0 offset means skip if this processor + * previous data repeated + * 2 : same as 1, but single data value follows + * 3 : same as 1. but 3 data values follow + */ +#define MA(mx6q, mx6dl, mx6solo_lite) ((mx6q / 4 & 0x3ff) | \ + ((mx6dl / 4 & 0x3ff) * 0x400) | \ + ((mx6solo_lite / 4 & 0x3ff) * 0x100000)) + +#define IOM_DRAM_DQM0 MA(0x5ac, 0x470, 0x0) +#define IOM_DRAM_DQM1 MA(0x5b4, 0x474, 0x0) +#define IOM_DRAM_DQM2 MA(0x528, 0x478, 0x0) +#define IOM_DRAM_DQM3 MA(0x520, 0x47c, 0x0) +#define IOM_DRAM_DQM4 MA(0x514, 0x480, 0x0) +#define IOM_DRAM_DQM5 MA(0x510, 0x484, 0x0) +#define IOM_DRAM_DQM6 MA(0x5bc, 0x488, 0x0) +#define IOM_DRAM_DQM7 MA(0x5c4, 0x48c, 0x0) + +#define IOM_DRAM_CAS MA(0x56c, 0x464, 0x0) +#define IOM_DRAM_RAS MA(0x578, 0x490, 0x0) +#define IOM_DRAM_RESET MA(0x57c, 0x494, 0x0) +#define IOM_DRAM_SDCLK_0 MA(0x588, 0x4ac, 0x0) +#define IOM_DRAM_SDCLK_1 MA(0x594, 0x4b0, 0x0) +#define IOM_DRAM_SDBA2 MA(0x58c, 0x4a0, 0x0) +#define IOM_DRAM_SDCKE0 MA(0x590, 0x4a4, 0x0) +#define IOM_DRAM_SDCKE1 MA(0x598, 0x4a8, 0x0) +#define IOM_DRAM_SDODT0 MA(0x59c, 0x4b4, 0x0) +#define IOM_DRAM_SDODT1 MA(0x5a0, 0x4b8, 0x0) + +#define IOM_DRAM_SDQS0 MA(0x5a8, 0x4bc, 0x0) +#define IOM_DRAM_SDQS1 MA(0x5b0, 0x4c0, 0x0) +#define IOM_DRAM_SDQS2 MA(0x524, 0x4c4, 0x0) +#define IOM_DRAM_SDQS3 MA(0x51c, 0x4c8, 0x0) +#define IOM_DRAM_SDQS4 MA(0x518, 0x4cc, 0x0) +#define IOM_DRAM_SDQS5 MA(0x50c, 0x4d0, 0x0) +#define IOM_DRAM_SDQS6 MA(0x5b8, 0x4d4, 0x0) +#define IOM_DRAM_SDQS7 MA(0x5c0, 0x4d8, 0x0) + +#define IOM_GRP_B0DS MA(0x784, 0x764, 0x0) +#define IOM_GRP_B1DS MA(0x788, 0x770, 0x0) +#define IOM_GRP_B2DS MA(0x794, 0x778, 0x0) +#define IOM_GRP_B3DS MA(0x79c, 0x77c, 0x0) +#define IOM_GRP_B4DS MA(0x7a0, 0x780, 0x0) +#define IOM_GRP_B5DS MA(0x7a4, 0x784, 0x0) +#define IOM_GRP_B6DS MA(0x7a8, 0x78c, 0x0) +#define IOM_GRP_B7DS MA(0x748, 0x748, 0x0) +#define IOM_GRP_ADDDS MA(0x74c, 0x74c, 0x0) +#define IOM_DDRMODE_CTL MA(0x750, 0x750, 0x0) +#define IOM_GRP_DDRPKE MA(0x758, 0x754, 0x0) +#define IOM_GRP_DDRMODE MA(0x774, 0x760, 0x0) +#define IOM_GRP_CTLDS MA(0x78c, 0x76c, 0x0) +#define IOM_GRP_DDR_TYPE MA(0x798, 0x774, 0x0) + +#define MMDC_P0 0x021b0000 +#define MMDC_P1 0x021b4000 +#define IOMUXC_BASE_ADDR 0x020e0000 +#define CCM_BASE 0x020C4000 +#define IRAM_FREE_START 0x00907000 + +#define IOMUXC_GPR4 (IOMUXC_BASE_ADDR + 0x010) +#define IOMUXC_GPR6 (IOMUXC_BASE_ADDR + 0x018) +#define IOMUXC_GPR7 (IOMUXC_BASE_ADDR + 0x01c) + +#define MMDC_MDCTL 0x000 +#define MMDC_MDPDC 0x004 +#define MMDC_MDOTC 0x008 +#define MMDC_MDCFG0 0x00c +#define MMDC_MDCFG1 0x010 +#define MMDC_MDCFG2 0x014 +#define MMDC_MDMISC 0x018 +#define MMDC_MDSCR 0x01c +#define MMDC_MDREF 0x020 +#define MMDC_MDRWD 0x02c +#define MMDC_MDOR 0x030 +#define MMDC_MDASP 0x040 +#define MMDC_MAPSR 0x404 +#define MMDC_MPZQHWCTRL 0x800 +#define MMDC_MPWLDECTRL0 0x80c +#define MMDC_MPWLDECTRL1 0x810 +#define MMDC_MPODTCTRL 0x818 +#define MMDC_MPRDDQBY0DL 0x81c +#define MMDC_MPRDDQBY1DL 0x820 +#define MMDC_MPRDDQBY2DL 0x824 +#define MMDC_MPRDDQBY3DL 0x828 +#define MMDC_MPDGCTRL0 0x83c +#define MMDC_MPDGCTRL1 0x840 +#define MMDC_MPRDDLCTL 0x848 +#define MMDC_MPWRDLCTL 0x850 +#define MMDC_MPMUR0 0x8b8 + +#define CCM_CCGR0 0x068 +#define CCM_CCGR1 0x06c +#define CCM_CCGR2 0x070 +#define CCM_CCGR3 0x074 +#define CCM_CCGR4 0x078 +#define CCM_CCGR5 0x07c +#define CCM_CCGR6 0x080 + +#ifdef USE_PLUGIN +#define IOMUX_ENTRY(addr, args...) iomux_entry addr, args +#define IOMUX_ENTRY1 IOMUX_ENTRY +#define IOMUX_ENTRY2 IOMUX_ENTRY +#define IOMUX_ENTRY3 IOMUX_ENTRY +#define WRITE_ENTRY(addr, args...) write_entry addr, args +#define WRITE_ENTRY1 WRITE_ENTRY +#define WRITE_ENTRY2 WRITE_ENTRY +#define WRITE_ENTRY3 WRITE_ENTRY +#else +#ifdef FOR_MX6Q +#define IOMUX_ENTRY1(addr, mx6q) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) & 0x3ff) * 4)), mx6q +#define IOMUX_ENTRY2(addr, mx6q, mx6dl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) & 0x3ff) * 4)), mx6q +#define IOMUX_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) & 0x3ff) * 4)), mx6q +#define WRITE_ENTRY1(addr, mx6q) DATA 4, addr, mx6q +#define WRITE_ENTRY2(addr, mx6q, mx6dl) DATA 4, addr, mx6q +#define WRITE_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, addr, mx6q +#else +#ifdef FOR_MX6DL +#define IOMUX_ENTRY1(addr, mx6q) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x400 & 0x3ff) * 4)), mx6q +#define IOMUX_ENTRY2(addr, mx6q, mx6dl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x400 & 0x3ff) * 4)), mx6dl +#define IOMUX_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x400 & 0x3ff) * 4)), mx6dl +#define WRITE_ENTRY1(addr, mx6q) DATA 4, addr, mx6q +#define WRITE_ENTRY2(addr, mx6q, mx6dl) DATA 4, addr, mx6dl +#define WRITE_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, addr, mx6dl +#else +#ifdef FOR_MX6SL +#define IOMUX_ENTRY1(addr, mx6q) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x100000 & 0x3ff) * 4)), mx6q +#define IOMUX_ENTRY2(addr, mx6q, mx6dl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x100000 & 0x3ff) * 4)), mx6dl +#define IOMUX_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, \ + (IOMUXC_BASE_ADDR+(((addr) / 0x100000 & 0x3ff) * 4)), mx6sl +#define WRITE_ENTRY1(addr, mx6q) DATA 4, addr, mx6q +#define WRITE_ENTRY2(addr, mx6q, mx6dl) DATA 4, addr, mx6dl +#define WRITE_ENTRY3(addr, mx6q, mx6dl, mx6sl) DATA 4, addr, mx6sl +#else +#error "Please select cpu" +#endif +#endif +#endif +#endif + +#endif diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index c86cd40..a95831f 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -25,6 +25,9 @@ * * The syntax is taken as close as possible with the kwbimage */ +#define FOR_MX6Q + +#include <asm/arch/imx-mkimage.h>
/* image version */ IMAGE_VERSION 2 @@ -35,6 +38,9 @@ IMAGE_VERSION 2 */ BOOT_FROM sd
+#ifdef USE_PLUGIN + plugin IRAM_FREE_START+0x42c arch/arm/cpu/armv7/mx6/plugin.bin +#endif /* * Device Configuration Data (DCD) * @@ -46,129 +52,129 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ -DATA 4 0x020e05a8 0x00000030 -DATA 4 0x020e05b0 0x00000030 -DATA 4 0x020e0524 0x00000030 -DATA 4 0x020e051c 0x00000030 - -DATA 4 0x020e0518 0x00000030 -DATA 4 0x020e050c 0x00000030 -DATA 4 0x020e05b8 0x00000030 -DATA 4 0x020e05c0 0x00000030 - -DATA 4 0x020e05ac 0x00020030 -DATA 4 0x020e05b4 0x00020030 -DATA 4 0x020e0528 0x00020030 -DATA 4 0x020e0520 0x00020030 - -DATA 4 0x020e0514 0x00020030 -DATA 4 0x020e0510 0x00020030 -DATA 4 0x020e05bc 0x00020030 -DATA 4 0x020e05c4 0x00020030 - -DATA 4 0x020e056c 0x00020030 -DATA 4 0x020e0578 0x00020030 -DATA 4 0x020e0588 0x00020030 -DATA 4 0x020e0594 0x00020030 - -DATA 4 0x020e057c 0x00020030 -DATA 4 0x020e0590 0x00003000 -DATA 4 0x020e0598 0x00003000 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e0788 0x00000030 - -DATA 4 0x020e0794 0x00000030 -DATA 4 0x020e079c 0x00000030 -DATA 4 0x020e07a0 0x00000030 -DATA 4 0x020e07a4 0x00000030 - -DATA 4 0x020e07a8 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 - -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 - -DATA 4 0x021b0018 0x00081740 - -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7975 -DATA 4 0x021b0010 0xFF538E64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x005B0E21 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 - -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x0408803A -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x0000803B -DATA 4 0x021b001c 0x00428031 -DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x09408030 -DATA 4 0x021b001c 0x09408038 - -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b001c 0x04008048 -DATA 4 0x021b0800 0xA1380003 -DATA 4 0x021b4800 0xA1380003 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00022227 -DATA 4 0x021b4818 0x00022227 - -DATA 4 0x021b083c 0x434B0350 -DATA 4 0x021b0840 0x034C0359 -DATA 4 0x021b483c 0x434B0350 -DATA 4 0x021b4840 0x03650348 -DATA 4 0x021b0848 0x4436383B -DATA 4 0x021b4848 0x39393341 -DATA 4 0x021b0850 0x35373933 -DATA 4 0x021b4850 0x48254A36 - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x00440044 -DATA 4 0x021b4810 0x00440044 - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b001c 0x00000000 -DATA 4 0x021b0404 0x00011006 +IOMUX_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS3, 0x00000030) + +IOMUX_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS7, 0x00000030) + +IOMUX_ENTRY1(IOM_DRAM_DQM0, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM1, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM2, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM3, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_DQM4, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM5, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM6, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM7, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_CAS, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_RAS, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_RESET, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) +IOMUX_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) +IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000) + +IOMUX_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) +IOMUX_ENTRY1(IOM_DRAM_SDODT1, 0x00003030) +IOMUX_ENTRY1(IOM_GRP_B0DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B1DS, 0x00000030) + +IOMUX_ENTRY1(IOM_GRP_B2DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B3DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B4DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B5DS, 0x00000030) + +IOMUX_ENTRY1(IOM_GRP_B6DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B7DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +IOMUX_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) + +IOMUX_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +IOMUX_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) +IOMUX_ENTRY1(IOM_GRP_CTLDS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG0, 0x555A7975) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG2, 0x01FF00DB) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDRWD, 0x000026D2) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDOR, 0x005B0E21) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDOTC, 0x09444040) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00025576) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDASP, 0x00000027) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCTL, 0x831A0000) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04088032) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0408803A) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0000803B) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428031) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428039) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408038) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008048) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDREF, 0x00005800) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPODTCTRL, 0x00022227) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F) + +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPMUR0, 0x00000800) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPMUR0, 0x00000800) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00000000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MAPSR, 0x00011006)
/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF +WRITE_ENTRY1(CCM_BASE + CCM_CCGR0, 0x00C03F3F) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR1, 0x0030FC03) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR2, 0x0FFFC000) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR3, 0x3FF00000) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR4, 0x00FFF300) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR5, 0x0F0000C3) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR6, 0x000003FF)
/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF +WRITE_ENTRY1(IOMUXC_GPR4, 0xF00000CF) /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F +WRITE_ENTRY1(IOMUXC_GPR6, 0x007F007F) +WRITE_ENTRY1(IOMUXC_GPR7, 0x007F007F)
Enabling plugin mode seems to require this additional memory write for ddr3 initialization.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index a95831f..eea8d3a 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -111,6 +111,8 @@ WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333) +/* MDPDC - CKE pulse width = 3 cycles. CKSRE = 6 cycles, CKSRX = 6 cycles */ +WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00020036)
WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740)
Don't apply this patch yet, because although u-boot will boot, Linux won't!!!!
The other CPU's won't come online, and L2 cache initialization crashes
Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 Initializing cgroup subsys cpuacct CPU: Testing write buffer coherency: ok hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available CPU1: failed to come online CPU2: failed to come online CPU3: failed to come online Brought up 1 CPUs SMP: Total of 1 processors activated (1581.05 BogoMIPS). print_constraints: dummy: NET: Registered protocol family 16 print_constraints: vddpu: 725 <--> 1300 mV at 1100 mV fast normal print_constraints: vddcore: 725 <--> 1300 mV at 1100 mV fast normal print_constraints: vddsoc: 725 <--> 1300 mV at 1200 mV fast normal print_constraints: vdd2p5: 2000 <--> 2775 mV at 2400 mV fast normal print_constraints: vdd1p1: 800 <--> 1400 mV at 1100 mV fast normal print_constraints: vdd3p0: 2800 <--> 3150 mV at 3000 mV fast normal ------------ Board type Nitrogen6X/W hw-breakpoint: found 6 breakpoint and 1 watchpoint registers. hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step. hw-breakpoint: maximum watchpoint size is 4 bytes. Unhandled fault: imprecise external abort (0x1c06) at 0x1d4c07b4 Internal error: : 1c06 [#1] PREEMPT SMP Modules linked in: CPU: 0 Not tainted (3.0.35-1968-gd3f7f36-03060-ga3844c7 #1) PC is at mxc_init_l2x0+0x50/0x120
Anyone have a clue?
The same thing under freescale's imx-android-r13.3 works fine. Only mainline doesn't work
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index eea8d3a..2af4265 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -26,7 +26,7 @@ * The syntax is taken as close as possible with the kwbimage */ #define FOR_MX6Q - +#define USE_PLUGIN #include <asm/arch/imx-mkimage.h>
/* image version */
On 9/18/2012 5:03 PM, Troy Kisky wrote:
Don't apply this patch yet, because although u-boot will boot, Linux won't!!!!
The other CPU's won't come online, and L2 cache initialization crashes
Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 Initializing cgroup subsys cpuacct CPU: Testing write buffer coherency: ok hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available CPU1: failed to come online CPU2: failed to come online CPU3: failed to come online Brought up 1 CPUs SMP: Total of 1 processors activated (1581.05 BogoMIPS). print_constraints: dummy: NET: Registered protocol family 16 print_constraints: vddpu: 725 <--> 1300 mV at 1100 mV fast normal print_constraints: vddcore: 725 <--> 1300 mV at 1100 mV fast normal print_constraints: vddsoc: 725 <--> 1300 mV at 1200 mV fast normal print_constraints: vdd2p5: 2000 <--> 2775 mV at 2400 mV fast normal print_constraints: vdd1p1: 800 <--> 1400 mV at 1100 mV fast normal print_constraints: vdd3p0: 2800 <--> 3150 mV at 3000 mV fast normal ------------ Board type Nitrogen6X/W hw-breakpoint: found 6 breakpoint and 1 watchpoint registers. hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step. hw-breakpoint: maximum watchpoint size is 4 bytes. Unhandled fault: imprecise external abort (0x1c06) at 0x1d4c07b4 Internal error: : 1c06 [#1] PREEMPT SMP Modules linked in: CPU: 0 Not tainted (3.0.35-1968-gd3f7f36-03060-ga3844c7 #1) PC is at mxc_init_l2x0+0x50/0x120
Anyone have a clue?
The same thing under freescale's imx-android-r13.3 works fine. Only mainline doesn't work
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index eea8d3a..2af4265 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -26,7 +26,7 @@
- The syntax is taken as close as possible with the kwbimage
*/ #define FOR_MX6Q
+#define USE_PLUGIN #include <asm/arch/imx-mkimage.h>
/* image version */
Never mind. I found the issue. I need to disable the L2 cache before returning from plugin.
Thanks Troy
After this series the same binary will run on a Saberlite board using any of the pin compatible processors mx6 quad, mx6 duallite, or mx6 solo. This is accomplished using a plugin and a table built by mkimage.
I made it easy to revert back to the current method by removing #define USE_PLUGIN
from imximage.cfg file so that it is easy to support a single processor.
In that case, you should also add #define FOR_MX6Q/FOR_MX6DL/FOR_MX6SOLO/FOR_MX6SOLOLITE to select which processor you are building for.
Patches 1-5 of the series are unchanged from version 1.
Troy Kisky (21): imximage: make header variable length imximage: check dcd_len as entries added imximage: enable word writes for version2 header imximage: cleanup parsing imximage: add expression evaluation imximage: add plugin commands imximage.cfg: run files through C preprocessor mx6: add plugin file for use with imximage.cfg mx6q_4x_mt41j128.cfg: use symbols instead of hardcoded constants mx6q_4x_mt41j128.cfg: allow plugin to work mx6q_4x_mt41j128.cfg: enable plugin mode mx6q_4x_mt41j128.cfg: add comments mx6q_4x_mt41j128.cfg: use ddr3 mode for reset mx6q_4x_mt41j128.cfg: skip initiailizing non-existent memory mx6q_4x_mt41j128.cfg: reorder for more efficient storage mx6q_4x_mt41j128.cfg: force ZQ calibration mx6: soc: add get_cpu_type arch-mx6: add mx6dl_pins.h mx6qsabrelite: add support for mx6 solo/duallite mx6q_4x_mt41j128.cfg: add mx6 solo/duallite support mx6qsabrelite: change CONFIG_SYS_PROMPT
Makefile | 3 +- arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 164 +++++ arch/arm/cpu/armv7/mx6/soc.c | 26 + arch/arm/include/asm/arch-mx6/imx-mkimage.h | 177 +++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 +++ arch/arm/include/asm/arch-mx6/sys_proto.h | 6 + board/esg/ima3-mx53/imximage.cfg | 120 +-- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 433 ++++++----- board/freescale/mx25pdk/imximage.cfg | 77 +- board/freescale/mx51evk/imximage.cfg | 114 +-- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++- board/freescale/mx53evk/imximage.cfg | 86 +-- board/freescale/mx53loco/imximage.cfg | 83 ++- board/freescale/mx53smd/imximage.cfg | 83 ++- board/freescale/mx6qarm2/imximage.cfg | 88 +-- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 231 ++---- board/freescale/mx6qsabrelite/pads.h | 172 +++++ board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++-- board/genesi/mx51_efikamx/imximage_sb.cfg | 126 ++-- board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++---- include/configs/mx6qsabrelite.h | 2 +- tools/imximage.c | 967 ++++++++++++++++++------- tools/imximage.h | 45 +- 25 files changed, 2389 insertions(+), 1248 deletions(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h create mode 100644 board/freescale/mx6qsabrelite/pads.h
Also, the header offset is no longer right before the code starts.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- Series tested on an mx51 and mx6q --- tools/imximage.c | 142 +++++++++++++++++++++++++++++++----------------------- tools/imximage.h | 10 ++-- 2 files changed, 87 insertions(+), 65 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..25d3b74 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,12 +65,15 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static set_imx_size_t set_imx_size; +static uint32_t g_flash_offset; + +static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -207,85 +210,79 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; - uint32_t base_offset; - - /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } + uint32_t hdr_base; + uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) + - ((char *)imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr; - fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - - sizeof(struct imx_header); - fhdr_v1->app_code_jump_vector = params->ep; + hdr_base = entry_point - header_length; + fhdr_v1->app_dest_ptr = hdr_base - flash_offset; + fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ; - fhdr_v1->dcd_ptr_ptr = - (uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) - - offsetof(flash_header_v1_t, app_code_jump_vector) + - base_offset); - - fhdr_v1->dcd_ptr = base_offset + - offsetof(imx_header_v1_t, dcd_table); - - /* The external flash header must be at the end of the DCD table */ - dcd_v1->addr_data[dcd_len].type = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr); + fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; + return header_length; +} + +static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset) +{ + uint32_t *p = (uint32_t *)(((char *)imxhdr) + + imximage_params.header_size); + + /* The external flash header must be at the end of the DCD table */ + /* file_size includes header */ + p[-1] = file_size + flash_offset; }
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; - - /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } + uint32_t hdr_base; + uint32_t header_length = (dcd_len) ? + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) + : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
- fhdr_v2->entry = params->ep; + fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = params->ep - sizeof(struct imx_header); - - fhdr_v2->dcd_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, dcd_table); + fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->boot_data_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, boot_data); - - hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset; - hdr_v2->boot_data.size = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + + offsetof(imx_header_v2_t, dcd_table) : 0; + fhdr_v2->boot_data_ptr = hdr_base + + offsetof(imx_header_v2_t, boot_data); + hdr_v2->boot_data.start = hdr_base - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0; + return header_length; +} + +static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset) +{ + imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; + /* file_size includes header */ + hdr_v2->boot_data.size = file_size + flash_offset; }
static void set_hdr_func(struct imx_header *imxhdr) @@ -295,11 +292,13 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; + set_imx_size = set_imx_size_v1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; + set_imx_size = set_imx_size_v2; break; default: err_imximage_version(imximage_version); @@ -381,9 +380,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM: - imxhdr->flash_offset = get_table_entry_id(imximage_bootops, + g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token); - if (imxhdr->flash_offset == -1) { + if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE); @@ -521,12 +520,17 @@ static void imximage_print_header(const void *ptr) } }
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) +int imximage_vrec_header(struct mkimage_params *params, + struct image_type_params *tparams) { - struct imx_header *imxhdr = (struct imx_header *)ptr; + struct imx_header *imxhdr; uint32_t dcd_len;
+ imxhdr = calloc(1, MAX_HEADER_SIZE); + if (!imxhdr) { + fprintf(stderr, "Error: out of memory\n"); + exit(EXIT_FAILURE); + } /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -534,14 +538,31 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ - imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED; + g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
+ /* Exit if there is no BOOT_FROM field specifying the flash_offset */ + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { + fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", + params->imagename); + exit(EXIT_FAILURE); + } /* Set the imx header */ - (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params); + imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, + params->ep, g_flash_offset); + imximage_params.hdr = imxhdr; + return 0; +} + +static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /* Set the size in header */ + (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size, + g_flash_offset); }
int imximage_check_params(struct mkimage_params *params) @@ -571,8 +592,9 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support", - .header_size = sizeof(struct imx_header), - .hdr = (void *)&imximage_header, + .header_size = 0, + .hdr = NULL, + .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header, diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..5fe3a8a 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header; - uint32_t flash_offset; };
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,9 +168,9 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params); +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset); +typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, + uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
On 22/09/2012 04:38, Troy Kisky wrote:
Hi Troy,
Also, the header offset is no longer right before the code starts.
Comment and subject of the patch do not match. Can you better explain it ? What have "making header variable length", that is, a new feature, with " the header offset is no longer rigth", that is, a bug ?
Do we already have a variable header the we add a vrec_header function to image_type_params ?
Series tested on an mx51 and mx6q
tools/imximage.c | 142 +++++++++++++++++++++++++++++++----------------------- tools/imximage.h | 10 ++-- 2 files changed, 87 insertions(+), 65 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..25d3b74 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,12 +65,15 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static set_imx_size_t set_imx_size; +static uint32_t g_flash_offset;
+static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -207,85 +210,79 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset){ imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
- uint32_t base_offset;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
Do you drop BOOT_FROM ? Then this should be documented. Is this to allow that the same image can be loaded from different media, that share the same flash offset ? Then, instead of drop it, I suggest to add more entries in the imximage file, one for each media that is allow.
Something like: BOOT_FROM sd, nand, spi
and maybe a check in the code if all entries do not share the same start address.
- uint32_t hdr_base;
- uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
- ((char *)imxhdr));
For V1, the header is preallocated with the maximum size, that is the maximum number of DCD entries the SOC in V1 can support. Why do we need a dynamic length for V1 processors ? As far as I know, the number of entries and fields for theses SOCs (i.MX25, i.MX35, i.MX51) is fixed.
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr;
- fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset -
sizeof(struct imx_header);- fhdr_v1->app_code_jump_vector = params->ep;
- hdr_base = entry_point - header_length;
- fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
- fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ;
- fhdr_v1->dcd_ptr_ptr =
(uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) -offsetof(flash_header_v1_t, app_code_jump_vector) +base_offset);- fhdr_v1->dcd_ptr = base_offset +
offsetof(imx_header_v1_t, dcd_table);- /* The external flash header must be at the end of the DCD table */
- dcd_v1->addr_data[dcd_len].type = sbuf->st_size +
imxhdr->flash_offset +sizeof(struct imx_header);
fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
return header_length;
+}
Ok, I skip review of this part - it depends on your answer on the previous question.
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset){ imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
- uint32_t hdr_base;
- uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr): offsetof(imx_header_v2_t, dcd_table);
So you add a case where there is no DCD table at all. Apart that this van be a use case, but does it happen in the real life ?
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
- fhdr_v2->entry = params->ep;
- fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
- fhdr_v2->self = params->ep - sizeof(struct imx_header);
- fhdr_v2->dcd_ptr = fhdr_v2->self +
offsetof(imx_header_v2_t, dcd_table);
- fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->boot_data_ptr = fhdr_v2->self +
offsetof(imx_header_v2_t, boot_data);- hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset;
- hdr_v2->boot_data.size = sbuf->st_size +
imxhdr->flash_offset +sizeof(struct imx_header);
fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base
+ offsetof(imx_header_v2_t, dcd_table) : 0;fhdr_v2->boot_data_ptr = hdr_base
+ offsetof(imx_header_v2_t, boot_data);hdr_v2->boot_data.start = hdr_base - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0;
return header_length;
+}
+static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset)+{
- imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
- /* file_size includes header */
- hdr_v2->boot_data.size = file_size + flash_offset;
}
static void set_hdr_func(struct imx_header *imxhdr) @@ -295,11 +292,13 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1;
set_imx_size = set_imx_size_v1;set_imx_size = set_imx_size_v2;@@ -381,9 +380,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM:
imxhdr->flash_offset = get_table_entry_id(imximage_bootops,
g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token);
if (imxhdr->flash_offset == -1) {
Why do we need a global when we have already a way to not use a global ?
if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE);@@ -521,12 +520,17 @@ static void imximage_print_header(const void *ptr) } }
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+int imximage_vrec_header(struct mkimage_params *params,
struct image_type_params *tparams){
- struct imx_header *imxhdr = (struct imx_header *)ptr;
struct imx_header *imxhdr; uint32_t dcd_len;
imxhdr = calloc(1, MAX_HEADER_SIZE);
if (!imxhdr) {
fprintf(stderr, "Error: out of memory\n");exit(EXIT_FAILURE);} /*
- In order to not change the old imx cfg file
- by adding VERSION command into it, here need
@@ -534,14 +538,31 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */
- imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED;
g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
if (g_flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);} /* Set the imx header */
- (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params);
- imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len,
params->ep, g_flash_offset);- imximage_params.hdr = imxhdr;
- return 0;
+}
+static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+{
- /* Set the size in header */
- (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size,
g_flash_offset);}
int imximage_check_params(struct mkimage_params *params) @@ -571,8 +592,9 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support",
- .header_size = sizeof(struct imx_header),
- .hdr = (void *)&imximage_header,
- .header_size = 0,
- .hdr = NULL,
- .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header,
diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..5fe3a8a 100644
--- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header;
- uint32_t flash_offset;
};
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,9 +168,9 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr,
uint32_t dcd_len,struct stat *sbuf,struct mkimage_params *params);+typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset);+typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset);
I disagree here. mkimage is valid for all architecture, we must not have special entries here for a SOC or SOC family. For all other SOCs, DCD, iMX header have no sense. Anyway, why do you need to add set_imx_size_t when you call it only in imximage.c ?
#endif /* _IMXIMAGE_H_ */
You should split changes in image.h, that are valid for all architecture, from changes to imximage.c, that are only for i.MX, into different patches.
In my understanding you add additional entry points to have a variable header lenght, but this feature is already used on TI with the AIS image. You use also vrec_header. What am I missing here ?
Best regards, Stefano Babic
On 9/23/2012 3:57 AM, Stefano Babic wrote:
On 22/09/2012 04:38, Troy Kisky wrote:
Hi Troy,
Also, the header offset is no longer right before the code starts.
Comment and subject of the patch do not match. Can you better explain it ? What have "making header variable length", that is, a new feature, with " the header offset is no longer rigth", that is, a bug ?
Do we already have a variable header the we add a vrec_header function to image_type_params ?
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000 * 0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed. That is what I mean by making it a variable length header.
Series tested on an mx51 and mx6q
tools/imximage.c | 142 +++++++++++++++++++++++++++++++----------------------- tools/imximage.h | 10 ++-- 2 files changed, 87 insertions(+), 65 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..25d3b74 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,12 +65,15 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static set_imx_size_t set_imx_size; +static uint32_t g_flash_offset;
+static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -207,85 +210,79 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset)
- uint32_t base_offset;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
Do you drop BOOT_FROM ? Then this should be documented. Is this to allow that the same image can be loaded from different media, that share the same flash offset ? Then, instead of drop it, I suggest to add more entries in the imximage file, one for each media that is allow.
No I did not drop the BOOT_FROM command. I merely moved this check before the function call, as it was common to both set_imx_hdr_v1 and set_imx_hdr_v2
I can make it a separate patch to make it obvious.
Something like: BOOT_FROM sd, nand, spi
and maybe a check in the code if all entries do not share the same start address.
- uint32_t hdr_base;
- uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
- ((char *)imxhdr));For V1, the header is preallocated with the maximum size, that is the maximum number of DCD entries the SOC in V1 can support. Why do we need a dynamic length for V1 processors ? As far as I know, the number of entries and fields for theses SOCs (i.MX25, i.MX35, i.MX51) is fixed.
You right the DCD table maximum size is fixed. But why should we be forced to use the maximum size? Why make V1 headers a special case?
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr;
- fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset -
sizeof(struct imx_header);- fhdr_v1->app_code_jump_vector = params->ep;
- hdr_base = entry_point - header_length;
- fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
- fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ;
- fhdr_v1->dcd_ptr_ptr =
(uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) -offsetof(flash_header_v1_t, app_code_jump_vector) +base_offset);- fhdr_v1->dcd_ptr = base_offset +
offsetof(imx_header_v1_t, dcd_table);- /* The external flash header must be at the end of the DCD table */
- dcd_v1->addr_data[dcd_len].type = sbuf->st_size +
imxhdr->flash_offset +sizeof(struct imx_header);
fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
return header_length;
+}
Ok, I skip review of this part - it depends on your answer on the previous question.
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset)
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
- uint32_t hdr_base;
- uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr): offsetof(imx_header_v2_t, dcd_table);So you add a case where there is no DCD table at all. Apart that this van be a use case, but does it happen in the real life ?
Yes, after this patch series, sabrelite with use a plugin with no DCD table at all. Even your SPL route could use no DCD table.
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
- fhdr_v2->entry = params->ep;
- fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
- fhdr_v2->self = params->ep - sizeof(struct imx_header);
- fhdr_v2->dcd_ptr = fhdr_v2->self +
offsetof(imx_header_v2_t, dcd_table);
- fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->boot_data_ptr = fhdr_v2->self +
offsetof(imx_header_v2_t, boot_data);- hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset;
- hdr_v2->boot_data.size = sbuf->st_size +
imxhdr->flash_offset +sizeof(struct imx_header);
fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base
+ offsetof(imx_header_v2_t, dcd_table) : 0;fhdr_v2->boot_data_ptr = hdr_base
+ offsetof(imx_header_v2_t, boot_data);hdr_v2->boot_data.start = hdr_base - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0;
return header_length;
+}
+static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset)+{
imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
/* file_size includes header */
hdr_v2->boot_data.size = file_size + flash_offset; }
static void set_hdr_func(struct imx_header *imxhdr)
@@ -295,11 +292,13 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1;
set_imx_size = set_imx_size_v1;set_imx_size = set_imx_size_v2;@@ -381,9 +380,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM:
imxhdr->flash_offset = get_table_entry_id(imximage_bootops,
g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token);
if (imxhdr->flash_offset == -1) {Why do we need a global when we have already a way to not use a global ?
Because that flash_offset is unnecessarily taking up space in the output file, and with variable length headers, I might overwrite it with other data.
if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE);@@ -521,12 +520,17 @@ static void imximage_print_header(const void *ptr) } }
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+int imximage_vrec_header(struct mkimage_params *params,
struct image_type_params *tparams)
- struct imx_header *imxhdr = (struct imx_header *)ptr;
struct imx_header *imxhdr; uint32_t dcd_len;
imxhdr = calloc(1, MAX_HEADER_SIZE);
if (!imxhdr) {
fprintf(stderr, "Error: out of memory\n");exit(EXIT_FAILURE);} /*
- In order to not change the old imx cfg file
- by adding VERSION command into it, here need
@@ -534,14 +538,31 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */
- imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED;
g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
if (g_flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);} /* Set the imx header */
- (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params);
- imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len,
params->ep, g_flash_offset);- imximage_params.hdr = imxhdr;
- return 0;
+}
+static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+{
/* Set the size in header */
(*set_imx_size)((struct imx_header *)ptr, sbuf->st_size,
g_flash_offset);}
int imximage_check_params(struct mkimage_params *params)
@@ -571,8 +592,9 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support",
- .header_size = sizeof(struct imx_header),
- .hdr = (void *)&imximage_header,
- .header_size = 0,
- .hdr = NULL,
- .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header,
diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..5fe3a8a 100644
--- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header;
uint32_t flash_offset; };
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
@@ -168,9 +168,9 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr,
uint32_t dcd_len,struct stat *sbuf,struct mkimage_params *params);+typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset);+typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset);I disagree here. mkimage is valid for all architecture, we must not have special entries here for a SOC or SOC family. For all other SOCs, DCD, iMX header have no sense. Anyway, why do you need to add set_imx_size_t when you call it only in imximage.c ?
I think you misread the file name. This is imximage.h. But I will squash the removal of set_imx_size_t done in a later patch with this one to make it easier to review.
#endif /* _IMXIMAGE_H_ */
You should split changes in image.h, that are valid for all architecture, from changes to imximage.c, that are only for i.MX, into different patches.
In my understanding you add additional entry points to have a variable header lenght, but this feature is already used on TI with the AIS image. You use also vrec_header. What am I missing here ?
I did not change image.h at all.
Best regards, Stefano Babic
On 24/09/2012 22:30, Troy Kisky wrote:
On 9/23/2012 3:57 AM, Stefano Babic wrote:
On 22/09/2012 04:38, Troy Kisky wrote:
Hi Troy,
Also, the header offset is no longer right before the code starts.
Comment and subject of the patch do not match. Can you better explain it ? What have "making header variable length", that is, a new feature, with " the header offset is no longer rigth", that is, a bug ?
Do we already have a variable header the we add a vrec_header function to image_type_params ?
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000
0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
Right - I do not know anymore the reason why it was explicitely set. It is not useful and not required by the SOC, no reason to have it, agree.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed. That is what I mean by making it a variable length header.
Ok - I understan that the whole header have a different lenght, but really it is the DCD table that has now a variable length. Please change commit header and comment to explain it. Feel free to add this example
Series tested on an mx51 and mx6q
tools/imximage.c | 142 +++++++++++++++++++++++++++++++----------------------- tools/imximage.h | 10 ++-- 2 files changed, 87 insertions(+), 65 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..25d3b74 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,12 +65,15 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, }; -static struct imx_header imximage_header; static uint32_t imximage_version; static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static set_imx_size_t set_imx_size; +static uint32_t g_flash_offset;
+static struct image_type_params imximage_params; static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -207,85 +210,79 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; } -static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset)
- uint32_t base_offset;
- /* Exit if there is no BOOT_FROM field specifying the
flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
Do you drop BOOT_FROM ? Then this should be documented. Is this to allow that the same image can be loaded from different media, that share the same flash offset ? Then, instead of drop it, I suggest to add more entries in the imximage file, one for each media that is allow.
No I did not drop the BOOT_FROM command. I merely moved this check before the function call, as it was common to both set_imx_hdr_v1 and set_imx_hdr_v2
I can make it a separate patch to make it obvious.
Yes, please.
Something like: BOOT_FROM sd, nand, spi
and maybe a check in the code if all entries do not share the same start address.
- uint32_t hdr_base;
- uint32_t header_length = (((char
*)&dcd_v1->addr_data[dcd_len].addr)
- ((char *)imxhdr));For V1, the header is preallocated with the maximum size, that is the maximum number of DCD entries the SOC in V1 can support. Why do we need a dynamic length for V1 processors ? As far as I know, the number of entries and fields for theses SOCs (i.MX25, i.MX35, i.MX51) is fixed.
You right the DCD table maximum size is fixed. But why should we be forced to use the maximum size? Why make V1 headers a special case?
No, it should not be - I want only be sure that changes are clear enough. It is absolutely ok that there is no padding after the DCD table. What I see, you fix several different issues with this single patch, and this can make confusion. Split into several patches or at least add a complete and exhaurient commit message.
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr;
- fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset -
sizeof(struct imx_header);- fhdr_v1->app_code_jump_vector = params->ep;
- hdr_base = entry_point - header_length;
- fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
- fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ;
- fhdr_v1->dcd_ptr_ptr =
(uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) -offsetof(flash_header_v1_t, app_code_jump_vector) +base_offset);- fhdr_v1->dcd_ptr = base_offset +
offsetof(imx_header_v1_t, dcd_table);- /* The external flash header must be at the end of the DCD table */
- dcd_v1->addr_data[dcd_len].type = sbuf->st_size +
imxhdr->flash_offset +sizeof(struct imx_header);
- fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t,
dcd_ptr);
- fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table); /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
- return header_length;
+}
Ok, I skip review of this part - it depends on your answer on the previous question.
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
struct stat *sbuf,struct mkimage_params *params)+static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset)
- /* Exit if there is no BOOT_FROM field specifying the
flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
- uint32_t hdr_base;
- uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr): offsetof(imx_header_v2_t, dcd_table);So you add a case where there is no DCD table at all. Apart that this van be a use case, but does it happen in the real life ?
Yes, after this patch series, sabrelite with use a plugin with no DCD table at all. Even your SPL route could use no DCD table.
Ok - then this is also a bug fix. The SOCs support an empty DCD table, and the current imximage does not. Add also this fix in the commit message, or move it into a separate patch if you can.
if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE);@@ -521,12 +520,17 @@ static void imximage_print_header(const void *ptr) } } -static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+int imximage_vrec_header(struct mkimage_params *params,
struct image_type_params *tparams)
- struct imx_header *imxhdr = (struct imx_header *)ptr;
- struct imx_header *imxhdr; uint32_t dcd_len;
- imxhdr = calloc(1, MAX_HEADER_SIZE);
- if (!imxhdr) {
fprintf(stderr, "Error: out of memory\n");exit(EXIT_FAILURE);- } /*
- In order to not change the old imx cfg file
- by adding VERSION command into it, here need
@@ -534,14 +538,31 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */
- imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED;
- g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr); /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
- /* Exit if there is no BOOT_FROM field specifying the
flash_offset */
- if (g_flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- } /* Set the imx header */
- (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params);
- imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len,
params->ep, g_flash_offset);- imximage_params.hdr = imxhdr;
- return 0;
+}
+static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+{
- /* Set the size in header */
- (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size,
g_flash_offset);@@ -571,8 +592,9 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support",
- .header_size = sizeof(struct imx_header),
- .hdr = (void *)&imximage_header,
- .header_size = 0,
- .hdr = NULL,
- .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header,
diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..5fe3a8a 100644
--- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9 #define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10) #define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header;
- uint32_t flash_offset; }; typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
@@ -168,9 +168,9 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno); -typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr,
uint32_t dcd_len,struct stat *sbuf,struct mkimage_params *params);+typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset);+typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset);I disagree here. mkimage is valid for all architecture, we must not have special entries here for a SOC or SOC family. For all other SOCs, DCD, iMX header have no sense. Anyway, why do you need to add set_imx_size_t when you call it only in imximage.c ?
I think you misread the file name. This is imximage.h.
Sorry, my fault here.
But I will squash the removal of set_imx_size_t done in a later patch with this one to make it easier to review.
#endif /* _IMXIMAGE_H_ */You should split changes in image.h, that are valid for all architecture, from changes to imximage.c, that are only for i.MX, into different patches.
In my understanding you add additional entry points to have a variable header lenght, but this feature is already used on TI with the AIS image. You use also vrec_header. What am I missing here ?
I did not change image.h at all.
That is fine, then.
Best regards, Stefano Babic
Before the len was checked after the entire file was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 25d3b74..0bfbec3 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -71,6 +71,7 @@ static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; +static uint32_t max_dcd_entries; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -173,13 +174,6 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V1) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V1); - exit(EXIT_FAILURE); - } - dcd_v1->preamble.barker = DCD_BARKER; dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); } @@ -193,13 +187,6 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V2) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V2); - exit(EXIT_FAILURE); - } - dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.length = cpu_to_be16( dcd_len * sizeof(dcd_addr_data_t) + 8); @@ -293,12 +280,14 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1; + max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; set_imx_size = set_imx_size_v2; + max_dcd_entries = MAX_HW_CFG_SIZE_V2; break; default: err_imximage_version(imximage_version); @@ -425,8 +414,15 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, value = get_cfg_value(token, name, lineno); (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
- if (fld == CFG_REG_VALUE) + if (fld == CFG_REG_VALUE) { (*dcd_len)++; + if (*dcd_len > max_dcd_entries) { + fprintf(stderr, "Error: %s[%d] -" + "DCD table exceeds maximum size(%d)\n", + name, lineno, max_dcd_entries); + exit(EXIT_FAILURE); + } + } break; default: break;
On 22/09/2012 04:38, Troy Kisky wrote:
Before the len was checked after the entire file was processed, so it could have already overflowed.
Hi Troy,
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
tools/imximage.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 25d3b74..0bfbec3 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -71,6 +71,7 @@ static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; +static uint32_t max_dcd_entries; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -173,13 +174,6 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V1) {
fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, MAX_HW_CFG_SIZE_V1);exit(EXIT_FAILURE);- }
- dcd_v1->preamble.barker = DCD_BARKER; dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
} @@ -193,13 +187,6 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V2) {
fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, MAX_HW_CFG_SIZE_V2);exit(EXIT_FAILURE);- }
- dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.length = cpu_to_be16( dcd_len * sizeof(dcd_addr_data_t) + 8);
@@ -293,12 +280,14 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1;
max_dcd_entries = MAX_HW_CFG_SIZE_V1;max_dcd_entries = MAX_HW_CFG_SIZE_V2;@@ -425,8 +414,15 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, value = get_cfg_value(token, name, lineno); (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE)
if (fld == CFG_REG_VALUE) { (*dcd_len)++;if (*dcd_len > max_dcd_entries) {fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, max_dcd_entries);exit(EXIT_FAILURE);}}
This patch seems to me unrelated to the rest, and fixes the case when too much DCD entries are put into the imximage.cfg file. What about to rebase it on the current code and post it as separate patch ? I think this can be merged directly, also in the current realease.
Best regards, Stefano Babic
On 9/23/2012 4:05 AM, Stefano Babic wrote:
On 22/09/2012 04:38, Troy Kisky wrote:
Before the len was checked after the entire file was processed, so it could have already overflowed.
Hi Troy,
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
tools/imximage.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 25d3b74..0bfbec3 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -71,6 +71,7 @@ static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; +static uint32_t max_dcd_entries; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -173,13 +174,6 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V1) {
fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, MAX_HW_CFG_SIZE_V1);exit(EXIT_FAILURE);- }
- dcd_v1->preamble.barker = DCD_BARKER; dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); }
@@ -193,13 +187,6 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V2) {
fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, MAX_HW_CFG_SIZE_V2);exit(EXIT_FAILURE);- }
- dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.length = cpu_to_be16( dcd_len * sizeof(dcd_addr_data_t) + 8);
@@ -293,12 +280,14 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1;
max_dcd_entries = MAX_HW_CFG_SIZE_V1;max_dcd_entries = MAX_HW_CFG_SIZE_V2;@@ -425,8 +414,15 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, value = get_cfg_value(token, name, lineno); (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE)
if (fld == CFG_REG_VALUE) { (*dcd_len)++;if (*dcd_len > max_dcd_entries) {fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, max_dcd_entries);exit(EXIT_FAILURE);}}This patch seems to me unrelated to the rest, and fixes the case when too much DCD entries are put into the imximage.cfg file. What about to rebase it on the current code and post it as separate patch ? I think this can be merged directly, also in the current realease.
Best regards, Stefano Babic
It is a fix, but for a bug that has never happened. So I think it is very low priority. But I can reorder the patches so that this is the 1st in the series, in case the other patches are never accepted. I don't think it belongs in the current release.
Troy
On 24/09/2012 22:54, Troy Kisky wrote:
It is a fix, but for a bug that has never happened.
Right, but anyway it is a fix ;-)
So I think it is very low priority. But I can reorder the patches so that this is the 1st in the series, in case the other patches are never accepted.
The reason is that simply and easy patches could be merged soon.
I don't think it belongs in the current release.
Right, this should go in -next
Best regards, Stefano
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 153 ++++++++++++++++++++++++++---------------------------- tools/imximage.h | 15 ++---- 2 files changed, 77 insertions(+), 91 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 0bfbec3..21c49e6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -68,10 +68,9 @@ static table_entry_t imximage_versions[] = { static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; -static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static set_imx_size_t set_imx_size; -static uint32_t max_dcd_entries; +static uint32_t *p_max_dcd; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -119,8 +118,10 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
+static uint32_t *p_entry; + static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
@@ -133,13 +134,15 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, name, lineno, value); exit(EXIT_FAILURE); } - dcd_v1->addr_data[off].type = value; + *p_entry++ = value; break; case CFG_REG_ADDRESS: - dcd_v1->addr_data[off].addr = value; + *p_entry++ = value; break; case CFG_REG_VALUE: - dcd_v1->addr_data[off].value = value; + *p_entry++ = value; + dcd_v1->preamble.length = (char *)p_entry + - (char *)&dcd_v1->addr_data[0].type; break; default: break; @@ -147,17 +150,45 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } }
+static write_dcd_command_t *p_dcd; + static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { + uint32_t len; dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
switch (fld) { + case CFG_REG_SIZE: + /* Byte, halfword, word */ + if ((value != 1) && (value != 2) && (value != 4)) { + fprintf(stderr, "Error: %s[%d] - " + "Invalid register size " "(%d)\n", + name, lineno, value); + exit(EXIT_FAILURE); + } + if (p_dcd && (p_dcd->param == value)) + break; + if (!p_dcd) { + dcd_v2->header.tag = DCD_HEADER_TAG; + dcd_v2->header.version = DCD_VERSION; + p_dcd = &dcd_v2->write_dcd_command; + } else { + p_dcd = (write_dcd_command_t *)p_entry; + } + p_dcd->param = value; + p_dcd->tag = DCD_COMMAND_TAG; + p_entry = (uint32_t *)(p_dcd + 1); + break; case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + *p_entry++ = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + *p_entry++ = cpu_to_be32(value); + len = (char *)p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)p_entry - (char *)p_dcd; + p_dcd->length = cpu_to_be16(len); break; default: break; @@ -165,47 +196,13 @@ static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, } }
-/* - * Complete setting up the rest field of DCD of V1 - * such as barker code and DCD data length. - */ -static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; - - dcd_v1->preamble.barker = DCD_BARKER; - dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); -} - -/* - * Complete setting up the reset field of DCD of V2 - * such as DCD tag, version, length, etc. - */ -static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; - - dcd_v2->header.tag = DCD_HEADER_TAG; - dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); - dcd_v2->header.version = DCD_VERSION; - dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; -} - -static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; - dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; - uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)imxhdr)); + uint32_t header_length = ((char *)p_entry) + 4 - ((char *)imxhdr);
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -234,15 +231,13 @@ static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, p[-1] = file_size + flash_offset; }
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; - uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) - : offsetof(imx_header_v2_t, dcd_table); + uint32_t header_length = ((char *)p_entry) - ((char *)imxhdr);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -253,7 +248,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + fhdr_v2->dcd_ptr = (p_dcd) ? hdr_base + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); @@ -277,17 +272,19 @@ static void set_hdr_func(struct imx_header *imxhdr) switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; - set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; set_imx_size = set_imx_size_v1; - max_dcd_entries = MAX_HW_CFG_SIZE_V1; + p_entry = &imxhdr->header.hdr_v1.dcd_table.addr_data[0].type; + p_max_dcd = &imxhdr->header.hdr_v1.dcd_table + .addr_data[MAX_HW_CFG_SIZE_V1].type; + imxhdr->header.hdr_v1.dcd_table.preamble.barker = DCD_BARKER; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; - set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; set_imx_size = set_imx_size_v2; - max_dcd_entries = MAX_HW_CFG_SIZE_V2; + p_entry = (uint32_t *)&imxhdr->header.hdr_v2.dcd_table; + p_max_dcd = (uint32_t *)((char *)imxhdr + MAX_HEADER_SIZE); break; default: err_imximage_version(imximage_version); @@ -351,7 +348,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) }
static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, - char *name, int lineno, int fld, int dcd_len) + char *name, int lineno, int fld) { int value; static int cmd_ver_first = ~0; @@ -381,7 +378,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); + (*set_dcd_val)(imxhdr, name, lineno, fld, value); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -389,7 +386,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, }
static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, - char *token, char *name, int lineno, int fld, int *dcd_len) + char *token, char *name, int lineno, int fld) { int value;
@@ -404,7 +401,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -412,23 +409,20 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len); - - if (fld == CFG_REG_VALUE) { - (*dcd_len)++; - if (*dcd_len > max_dcd_entries) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, max_dcd_entries); - exit(EXIT_FAILURE); - } + (*set_dcd_val)(imxhdr, name, lineno, fld, value); + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)imxhdr; + fprintf(stderr, "Error: %s[%d] -" + "header exceeds maximum size(%d)\n", + name, lineno, size); + exit(EXIT_FAILURE); } break; default: break; } } -static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) +static void parse_cfg_file(struct imx_header *imxhdr, char *name) { FILE *fd = NULL; char *line = NULL; @@ -436,7 +430,6 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int lineno = 0; int fld; size_t len; - int dcd_len = 0; int32_t cmd;
fd = fopen(name, "r"); @@ -467,15 +460,12 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) break;
parse_cfg_fld(imxhdr, &cmd, token, name, - lineno, fld, &dcd_len); + lineno, fld); }
} - - (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd); - - return dcd_len; + return; }
@@ -520,9 +510,12 @@ int imximage_vrec_header(struct mkimage_params *params, struct image_type_params *tparams) { struct imx_header *imxhdr; - uint32_t dcd_len;
- imxhdr = calloc(1, MAX_HEADER_SIZE); + /* + * A little extra space to avoid access violation on dcd table overflow. + * Overflow is checked after entry is added. + */ + imxhdr = calloc(1, MAX_HEADER_SIZE + 32); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); @@ -538,7 +531,7 @@ int imximage_vrec_header(struct mkimage_params *params, set_hdr_func(imxhdr);
/* Parse dcd configuration file */ - dcd_len = parse_cfg_file(imxhdr, params->imagename); + parse_cfg_file(imxhdr, params->imagename);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { @@ -547,8 +540,8 @@ int imximage_vrec_header(struct mkimage_params *params, exit(EXIT_FAILURE); } /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, - params->ep, g_flash_offset); + imximage_params.header_size = (*set_imx_hdr)(imxhdr, params->ep, + g_flash_offset); imximage_params.hdr = imxhdr; return 0; } diff --git a/tools/imximage.h b/tools/imximage.h index 5fe3a8a..0319c02 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -47,7 +47,6 @@ #define DCD_HEADER_TAG 0xD2 #define DCD_COMMAND_TAG 0xCC #define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4
enum imximage_cmd { CMD_INVALID, @@ -159,17 +158,11 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, - char *name, int lineno, - int fld, uint32_t value, - uint32_t off); +typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, char *name, + int lineno, int fld, uint32_t value);
-typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - char *name, int lineno); - -typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, - uint32_t entry_point, uint32_t flash_offset); +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, + uint32_t flash_offset); typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, uint32_t flash_offset);
Move to pulling tokens instead of pushing them. Remove need for switch statements to process commands. Add error messages such as "command not finished", "extra data at end of line", and "invalid token" Add ';' as command separator.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 380 ++++++++++++++++++++++++++++++------------------------ tools/imximage.h | 25 ++-- 2 files changed, 226 insertions(+), 179 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 21c49e6..1e120354 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -75,21 +75,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{ - char *endptr; - uint32_t value; - - errno = 0; - value = strtoul(token, &endptr, 16); - if (errno || (token == endptr)) { - fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n", - name, linenr, token); - exit(EXIT_FAILURE); - } - return value; -} - static uint32_t detect_imximage_version(struct imx_header *imx_hdr) { imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1; @@ -120,55 +105,38 @@ static void err_imximage_version(int version)
static uint32_t *p_entry;
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v1(struct imx_header *imxhdr, uint32_t *data) { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - *p_entry++ = value; - break; - case CFG_REG_ADDRESS: - *p_entry++ = value; - break; - case CFG_REG_VALUE: - *p_entry++ = value; - dcd_v1->preamble.length = (char *)p_entry - - (char *)&dcd_v1->addr_data[0].type; - break; - default: - break; - + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; } + *p_entry++ = val; + *p_entry++ = *data++; + *p_entry++ = *data++; + dcd_v1->preamble.length = (char *)p_entry - (char *)&dcd_v1-> + addr_data[0].type; + return 0; }
static write_dcd_command_t *p_dcd;
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) { uint32_t len; dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - if (p_dcd && (p_dcd->param == value)) - break; + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; + } + if (!(p_dcd && (p_dcd->param == val))) { if (!p_dcd) { dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.version = DCD_VERSION; @@ -176,24 +144,19 @@ static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, } else { p_dcd = (write_dcd_command_t *)p_entry; } - p_dcd->param = value; + p_dcd->param = val; p_dcd->tag = DCD_COMMAND_TAG; p_entry = (uint32_t *)(p_dcd + 1); - break; - case CFG_REG_ADDRESS: - *p_entry++ = cpu_to_be32(value); - break; - case CFG_REG_VALUE: - *p_entry++ = cpu_to_be32(value); - len = (char *)p_entry - (char *)&dcd_v2->header; - dcd_v2->header.length = cpu_to_be16(len); - len = (char *)p_entry - (char *)p_dcd; - p_dcd->length = cpu_to_be16(len); - break; - default: - break; - } + val = *data++; + *p_entry++ = cpu_to_be32(val); + val = *data++; + *p_entry++ = cpu_to_be32(val); + len = (char *)p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)p_entry - (char *)p_dcd; + p_dcd->length = cpu_to_be16(len); + return 0; }
static int set_imx_hdr_v1(struct imx_header *imxhdr, @@ -347,93 +310,186 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, - char *name, int lineno, int fld) +static int cmd_cnt; + +int skip_separators(struct data_src *ds) { - int value; - static int cmd_ver_first = ~0; - - switch (cmd) { - case CMD_IMAGE_VERSION: - imximage_version = get_cfg_value(token, name, lineno); - if (cmd_ver_first == 0) { - fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION " - "command need be the first before other " - "valid command in the file\n", name, lineno); - exit(EXIT_FAILURE); + int line_no = ds->lineno; + char *p = ds->p; + + for (;;) { + char c; + if (!p) { + if (getline(&ds->line, &ds->len, ds->fd) <= 0) + return -1; + ds->lineno++; + p = ds->line; + if (ds->cmd_started) { + fprintf(stderr, "warning: continuing command on" + " next line, line %s[%d](%s)\n", + ds->filename, ds->lineno, p); + } } - cmd_ver_first = 1; - set_hdr_func(imxhdr); - break; - case CMD_BOOT_FROM: - g_flash_offset = get_table_entry_id(imximage_bootops, - "imximage boot option", token); - if (g_flash_offset == -1) { - fprintf(stderr, "Error: %s[%d] -Invalid boot device" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); + c = *p; + if ((c == ' ') || (c == '\t')) { + p++; + continue; } - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; - case CMD_DATA: - value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value); - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; + /* Drop all text starting with '#' as comments */ + if ((c == '#') || (c == '\r') || (c == '\n') + || !c) { + p = NULL; + continue; + } + if (c == ';') { + if (ds->cmd_started) { + fprintf(stderr, "Error: command not " + "finished:%s[%d](%s)\n", + ds->filename, ds->lineno, p); + exit(EXIT_FAILURE); + } + p++; + continue; + } + if (!ds->cmd_started && line_no == ds->lineno) { + fprintf(stderr, "warning: extra data at end " + "of line %s[%d](%s)\n", + ds->filename, ds->lineno, p); + p = NULL; + continue; + } + ds->p = p; + return 0; } }
-static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, - char *token, char *name, int lineno, int fld) +char *grab_token(char *dest, int size, char *src) { - int value; - - switch (fld) { - case CFG_COMMAND: - *cmd = get_table_entry_id(imximage_cmds, - "imximage commands", token); - if (*cmd < 0) { - fprintf(stderr, "Error: %s[%d] - Invalid command" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - break; - case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld); - break; - case CFG_REG_ADDRESS: - case CFG_REG_VALUE: - if (*cmd != CMD_DATA) - return; - - value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value); - if (p_entry > p_max_dcd) { - uint32_t size = (char *)p_max_dcd - (char *)imxhdr; - fprintf(stderr, "Error: %s[%d] -" - "header exceeds maximum size(%d)\n", - name, lineno, size); - exit(EXIT_FAILURE); - } - break; - default: - break; + while (size) { + char c = *src; + if ((c == ' ') || (c == '\t') || (c == '\r') || (c == '\n') + || (c == '#') || !c) + break; + *dest++ = c; + size--; + src++; + } + if (!size) + return NULL; + *dest = 0; + return src; +} + +static uint32_t get_cfg_value(struct data_src *ds, uint32_t *pval) +{ + char *endptr; + uint32_t value; + + if (skip_separators(ds)) + return -1; + errno = 0; + value = strtoul(ds->p, &endptr, 16); + if (errno || (ds->p == endptr)) + return -1; + *pval = value; + ds->p = endptr; + return 0; +} + +static int parse_cmd_data(struct data_src *ds) +{ + uint32_t data[3]; + int ret = get_cfg_value(ds, &data[0]); + + if (ret) + return ret; + ret = get_cfg_value(ds, &data[1]); + if (ret) + return ret; + ret = get_cfg_value(ds, &data[2]); + if (ret) + return ret; + ret = (*set_dcd_val)(ds->imxhdr, data); + if (ret) + return ret; + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_image_version(struct data_src *ds) +{ + int ret; + + ret = get_cfg_value(ds, &imximage_version); + if (ret) + return ret; + if (cmd_cnt) { + fprintf(stderr, "Error: IMAGE_VERSION command needs be " + "before other valid commands in the file\n"); + return -1; + } + set_hdr_func(ds->imxhdr); + return 0; +} + +int get_from_array(struct data_src *ds, + const table_entry_t *table, const char *table_name) +{ + int val; + char token[16]; + char *p; + + if (skip_separators(ds)) + return -1; + p = grab_token(token, sizeof(token), ds->p); + if (!p) + return -1; + val = get_table_entry_id(table, table_name, token); + if (val != -1) + ds->p = p; + return val; +} + +static int parse_boot_from(struct data_src *ds) +{ + g_flash_offset = get_from_array(ds, imximage_bootops, + "imximage boot option"); + if (g_flash_offset == -1) { + fprintf(stderr, "Error: Invalid boot device\n"); + return -1; } + return 0; } + +parse_fld_t cmd_table[] = { + parse_image_version, parse_boot_from, parse_cmd_data +}; + +static int parse_command(struct data_src *ds) +{ + int cmd = get_from_array(ds, imximage_cmds, "imximage commands"); + if (cmd < 0) + return cmd; + return cmd_table[cmd](ds); +} + static void parse_cfg_file(struct imx_header *imxhdr, char *name) { - FILE *fd = NULL; - char *line = NULL; - char *token, *saveptr1, *saveptr2; - int lineno = 0; - int fld; - size_t len; - int32_t cmd; - - fd = fopen(name, "r"); - if (fd == 0) { + struct data_src ds; + + ds.line = NULL; + ds.len = 0; + ds.lineno = 0; + ds.filename = name; + ds.fd = fopen(name, "r"); + ds.imxhdr = imxhdr; + ds.p = NULL; + if (ds.fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); exit(EXIT_FAILURE); } @@ -441,34 +497,22 @@ static void parse_cfg_file(struct imx_header *imxhdr, char *name) /* Very simple parsing, line starting with # are comments * and are dropped */ - while ((getline(&line, &len, fd)) > 0) { - lineno++; - - token = strtok_r(line, "\r\n", &saveptr1); - if (token == NULL) - continue; - - /* Check inside the single line */ - for (fld = CFG_COMMAND, cmd = CMD_INVALID, - line = token; ; line = NULL, fld++) { - token = strtok_r(line, " \t", &saveptr2); - if (token == NULL) - break; - - /* Drop all text starting with '#' as comments */ - if (token[0] == '#') - break; - - parse_cfg_fld(imxhdr, &cmd, token, name, - lineno, fld); + for (;;) { + ds.cmd_started = 0; + if (skip_separators(&ds)) + break; + ds.cmd_started = 1; + if (parse_command(&ds)) { + fprintf(stderr, "Error: invalid token " + "%s[%d](%s)\n", name, ds.lineno, ds.p); + exit(EXIT_FAILURE); } - + cmd_cnt++; } - fclose(fd); + fclose(ds.fd); return; }
- static int imximage_check_image_types(uint8_t type) { if (type == IH_TYPE_IMXIMAGE) @@ -557,12 +601,12 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, int imximage_check_params(struct mkimage_params *params) { if (!params) - return CFG_INVALID; + return -1; if (!strlen(params->imagename)) { fprintf(stderr, "Error: %s - Configuration file not specified, " "it is needed for imximage generation\n", params->cmdname); - return CFG_INVALID; + return -1; } /* * Check parameters: diff --git a/tools/imximage.h b/tools/imximage.h index 0319c02..efd249b 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -49,20 +49,11 @@ #define DCD_VERSION 0x40
enum imximage_cmd { - CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_DATA };
-enum imximage_fld_types { - CFG_INVALID = -1, - CFG_COMMAND, - CFG_REG_SIZE, - CFG_REG_ADDRESS, - CFG_REG_VALUE -}; - enum imximage_version { IMXIMAGE_VER_INVALID = -1, IMXIMAGE_V1 = 1, @@ -158,8 +149,20 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, char *name, - int lineno, int fld, uint32_t value); +struct data_src { + char *line; + size_t len; + FILE *fd; + int lineno; + char cmd_started; + char *filename; + struct imx_header *imxhdr; + char *p; +}; + +typedef int (*parse_fld_t)(struct data_src *ds); + +typedef int (*set_dcd_val_t)(struct imx_header *imxhdr, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, uint32_t flash_offset);
On 22/09/2012 04:39, Troy Kisky wrote:
Move to pulling tokens instead of pushing them. Remove need for switch statements to process commands. Add error messages such as "command not finished", "extra data at end of line", and "invalid token" Add ';' as command separator.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
you add code in previous patch and you remove it in this one. This makes quite difficult to review them.
Normally, we do do have this case, and code is not added and removed in the same patches series. Should you not squash patches together and / or rearrange them with different topic ?
Best regards, Stefano Babic
On 9/23/2012 4:08 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
Move to pulling tokens instead of pushing them. Remove need for switch statements to process commands. Add error messages such as "command not finished", "extra data at end of line", and "invalid token" Add ';' as command separator.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
you add code in previous patch and you remove it in this one. This makes quite difficult to review them.
Normally, we do do have this case, and code is not added and removed in the same patches series. Should you not squash patches together and / or rearrange them with different topic ?
Best regards, Stefano Babic
Yes, I should have done this. A lot of time passed between when I added it and when I removed it, so I forgot that I was the one that added it! I had finished the series and was debugging before I saw a better way.
Will fix.
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 172 ++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 1e120354..2c5a622 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -380,20 +380,172 @@ char *grab_token(char *dest, int size, char *src) return src; }
+char precedence[] = { + /* ( + - * / & ^ | ) */ + 0, 2, 2, 1, 1, 3, 4, 5, 6 +}; +char unary_operations[] = "(+-"; +char binary_operations[] = " +-*/&^|)"; + +uint32_t do_func(uint32_t val1, uint32_t val2, int op) +{ + switch (op) { + case 1: + return val1 + val2; + case 2: + return val1 - val2; + case 3: + return val1 * val2; + case 4: + return val1 / val2; + case 5: + return val1 & val2; + case 6: + return val1 ^ val2; + case 7: + return val1 | val2; + } + fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n", + __func__, val1, val2, op); + exit(EXIT_FAILURE); +} + +int find_op(char c, char *p) +{ + int i; + for (i = 0; ; i++) { + if (c == p[i]) + return i; + if (!p[i]) + break; + } + return -1; +} + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + static uint32_t get_cfg_value(struct data_src *ds, uint32_t *pval) { char *endptr; - uint32_t value; + int op_i = 0; + int val_i = 0; + unsigned char op[16]; + uint32_t val[16]; + int unary = 1; + char *p;
- if (skip_separators(ds)) - return -1; - errno = 0; - value = strtoul(ds->p, &endptr, 16); - if (errno || (ds->p == endptr)) - return -1; - *pval = value; - ds->p = endptr; - return 0; + p = ds->p; + for (;;) { + char c; + int i, j; + char *ops = unary ? unary_operations : binary_operations; + + if (unary) { + ds->p = p; + if (skip_separators(ds)) + return -1; + p = ds->p; + c = *p; + } else { + for (;;) { + c = *p; + if ((c != ' ') && (c != '\t')) + break; + p++; + } + } + i = find_op(c, ops); + debug("%d,%c,%d:%s\n", i, c, unary, p); + if ((i < 0) && unary) { + if (val_i >= ARRAY_SIZE(val)) + return -1; + errno = 0; + val[val_i++] = strtoul(p, &endptr, 16); + if (errno || (p == endptr)) { + ds->p = p; + return -1; + } + p = endptr; + unary = 0; + debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1], + op_i, val_i); +do_unary: + while (op_i) { + j = op[op_i - 1]; + if (!(j & 0x80)) + break; + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("un:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + continue; + } + if (i < 0) { + c = 0; + i = 8; + } else { + p++; + } + if (c == '(') { + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i; + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], + op_i, val_i); + unary = 1; + continue; + } + for (;;) { + if (!op_i || unary) + break; + j = op[op_i - 1]; + if (j == 0) { + if (c == ')') { + op_i--; + goto do_unary; + } + break; + } + if ((j & 0x80)) { + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("unary:%d,%x\n", val[val_i - 1], j); + continue; + } + if (precedence[i] < precedence[j]) + break; + if (val_i < 2) + return -1; + op_i--; + val[val_i - 2] = do_func(val[val_i - 2], + val[val_i - 1], j); + val_i--; + debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + if (c == ')') { + fprintf(stderr, "Error: unmatched parenthesis\n"); + return -1; + } + if (i == 8) { + if ((op_i != 0) || (val_i != 1)) { + fprintf(stderr, "Error: syntax %d %d\n", + op_i, val_i); + return -1; + } + ds->p = p; + *pval = val[0]; + return 0; + } + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i | (unary << 7); + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i); + unary = 1; + } }
static int parse_cmd_data(struct data_src *ds)
On 22/09/2012 04:39, Troy Kisky wrote:
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
tools/imximage.c | 172 ++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 1e120354..2c5a622 100644
I have some general considerations. First, if you plan to add support for expression evaluation, this feature should be available generally for mkimage, that means also other processors / architecture can profit of it. It should be moved away from imximage.c code.
Then, you want also let that the preprocesso can parse the imximage code. I can imagine that in such terms it could be then possible to define in imximage.cfg something like:
#define DDR_VAL (1 <<17 | 3 << 7) #define ADDRESS 0x0x53something
DATA 4 ADDRESS DDR_VAL
Else, why do we need the power of C preprocessor ?
If this is true, can you explain us which is the use case using the C preprocessor and which is the one for the expression evaluator ? And why do we need both ?
--- a/tools/imximage.c +++ b/tools/imximage.c @@ -380,20 +380,172 @@ char *grab_token(char *dest, int size, char *src) return src; }
+char precedence[] = {
- /* ( + - * / & ^ | ) */
0, 2, 2, 1, 1, 3, 4, 5, 6+}; +char unary_operations[] = "(+-"; +char binary_operations[] = " +-*/&^|)";
+uint32_t do_func(uint32_t val1, uint32_t val2, int op) +{
- switch (op) {
- case 1:
return val1 + val2;- case 2:
return val1 - val2;- case 3:
return val1 * val2;- case 4:
return val1 / val2;- case 5:
return val1 & val2;- case 6:
return val1 ^ val2;- case 7:
return val1 | val2;- }
- fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n",
__func__, val1, val2, op);- exit(EXIT_FAILURE);
+}
+int find_op(char c, char *p) +{
- int i;
- for (i = 0; ; i++) {
if (c == p[i])return i;if (!p[i])break;- }
- return -1;
+}
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
static uint32_t get_cfg_value(struct data_src *ds, uint32_t *pval) { char *endptr;
- uint32_t value;
- int op_i = 0;
- int val_i = 0;
- unsigned char op[16];
- uint32_t val[16];
- int unary = 1;
- char *p;
- if (skip_separators(ds))
return -1;- errno = 0;
- value = strtoul(ds->p, &endptr, 16);
- if (errno || (ds->p == endptr))
return -1;- *pval = value;
- ds->p = endptr;
- return 0;
- p = ds->p;
- for (;;) {
char c;int i, j;char *ops = unary ? unary_operations : binary_operations;if (unary) {ds->p = p;if (skip_separators(ds))return -1;p = ds->p;c = *p;} else {for (;;) {c = *p;if ((c != ' ') && (c != '\t'))break;p++;}}i = find_op(c, ops);debug("%d,%c,%d:%s\n", i, c, unary, p);if ((i < 0) && unary) {if (val_i >= ARRAY_SIZE(val))return -1;errno = 0;val[val_i++] = strtoul(p, &endptr, 16);if (errno || (p == endptr)) {ds->p = p;return -1;}p = endptr;unary = 0;debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1],op_i, val_i);+do_unary:
while (op_i) {j = op[op_i - 1];if (!(j & 0x80))break;op_i--;val[val_i - 1] = do_func(0,val[val_i - 1], j & 0x7f);debug("un:%d,%x,%d,%d\n", val[val_i - 1], j,op_i, val_i);}continue;}if (i < 0) {c = 0;i = 8;} else {p++;}if (c == '(') {if (op_i >= ARRAY_SIZE(op))return -1;op[op_i++] = i;debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1],op_i, val_i);unary = 1;continue;}for (;;) {if (!op_i || unary)break;j = op[op_i - 1];if (j == 0) {if (c == ')') {op_i--;goto do_unary;}break;}if ((j & 0x80)) {op_i--;val[val_i - 1] = do_func(0,val[val_i - 1], j & 0x7f);debug("unary:%d,%x\n", val[val_i - 1], j);continue;}if (precedence[i] < precedence[j])break;if (val_i < 2)return -1;op_i--;val[val_i - 2] = do_func(val[val_i - 2],val[val_i - 1], j);val_i--;debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j,op_i, val_i);}if (c == ')') {fprintf(stderr, "Error: unmatched parenthesis\n");return -1;}if (i == 8) {if ((op_i != 0) || (val_i != 1)) {fprintf(stderr, "Error: syntax %d %d\n",op_i, val_i);return -1;}ds->p = p;*pval = val[0];return 0;}if (op_i >= ARRAY_SIZE(op))return -1;op[op_i++] = i | (unary << 7);debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i);unary = 1;- }
}
Best regards, Stefano Babic
On 9/23/2012 7:56 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
tools/imximage.c | 172 ++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 1e120354..2c5a622 100644
I have some general considerations. First, if you plan to add support for expression evaluation, this feature should be available generally for mkimage, that means also other processors / architecture can profit of it. It should be moved away from imximage.c code.
That makes sense.
Then, you want also let that the preprocesso can parse the imximage code. I can imagine that in such terms it could be then possible to define in imximage.cfg something like:
#define DDR_VAL (1 <<17 | 3 << 7) #define ADDRESS 0x0x53something
DATA 4 ADDRESS DDR_VAL
Else, why do we need the power of C preprocessor ?
If this is true, can you explain us which is the use case using the C preprocessor and which is the one for the expression evaluator ? And why do we need both ?
I want to easily switch from plugins back to the normal DCD list method. #ifdef 's and and #define's make this possible.
Plus the cfg file is more readable with #define's.
But if plugins are rejected, expressions aren't as important. I can still see a cfg file doing
DATA 4, MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003 DATA 4, MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003
patch 09/21 mx6q_4x_mt41j128.cfg: use symbols instead of hardcoded constants
has
+#define MA(mx6q, mx6dl_solo, mx6sololite) ((mx6q / 4 & 0x3ff) | \ + ((mx6dl_solo / 4 & 0x3ff) * 0x400) | \ + ((mx6sololite / 4 & 0x3ff) * 0x100000)) + +#define IOM_DRAM_DQM0 MA(0x5ac, 0x470, 0x0)
+#define IOMUX_ADDR(addr, div) (IOMUXC_BASE_ADDR + \ + ((((addr) / (div)) & 0x3ff) * 4)) +#define IOMUX_ENTRY1(addr, q) DATA 4, IOMUX_ADDR(addr, _FOR_DIV), q +#define WRITE_ENTRY1(addr, q) DATA 4, addr, q +#ifdef FOR_MX6Q +#define _FOR_DIV 1 +#define IOMUX_ENTRY2(addr, q, dl) IOMUX_ENTRY1(addr, q) +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, q)
to choose which offset for IOM_DRAM_DQM0 should be selected.
Add commands plugin address filename iomux_entry addr, data1 [, data2, [, data3]] write_entry addr, data1 [, data2, [, data3]]
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 334 ++++++++++++++++++++++++++++++++++++++++++++---------- tools/imximage.h | 11 +- 2 files changed, 283 insertions(+), 62 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2c5a622..fae786a 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -31,7 +31,6 @@ #include "mkimage.h" #include <image.h> #include "imximage.h" - /* * Supported commands for configuration file */ @@ -39,6 +38,9 @@ static table_entry_t imximage_cmds[] = { {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_DATA, "DATA", "Reg Write Data", }, {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", }, + {CMD_PLUGIN, "plugin", "plugin addr,file", }, + {CMD_IOMUX_ENTRY, "iomux_entry", "Write iomux reg", }, + {CMD_WRITE_ENTRY, "write_entry", "Write register", }, {-1, "", "", }, };
@@ -69,8 +71,8 @@ static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_imx_hdr_t set_imx_hdr; -static set_imx_size_t set_imx_size; static uint32_t *p_max_dcd; +static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -88,8 +90,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */ - if ((fhdr_v2->header.tag == IVT_HEADER_TAG) && - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG)) + if ((fhdr_v2->header.tag == IVT_HEADER_TAG)) return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID; @@ -160,7 +161,7 @@ static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) }
static int set_imx_hdr_v1(struct imx_header *imxhdr, - uint32_t entry_point, uint32_t flash_offset) + uint32_t entry_point, uint32_t flash_offset, int plugin) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; @@ -180,22 +181,12 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; + header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); return header_length; }
-static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset) -{ - uint32_t *p = (uint32_t *)(((char *)imxhdr) - + imximage_params.header_size); - - /* The external flash header must be at the end of the DCD table */ - /* file_size includes header */ - p[-1] = file_size + flash_offset; -} - static int set_imx_hdr_v2(struct imx_header *imxhdr, - uint32_t entry_point, uint32_t flash_offset) + uint32_t entry_point, uint32_t flash_offset, int plugin) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; @@ -216,27 +207,20 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); hdr_v2->boot_data.start = hdr_base - flash_offset; + hdr_v2->boot_data.plugin = plugin;
/* Security feature are not supported */ fhdr_v2->csf = 0; + header_size_ptr = &hdr_v2->boot_data.size; return header_length; }
-static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset) -{ - imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; - /* file_size includes header */ - hdr_v2->boot_data.size = file_size + flash_offset; -} - static void set_hdr_func(struct imx_header *imxhdr) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_imx_hdr = set_imx_hdr_v1; - set_imx_size = set_imx_size_v1; p_entry = &imxhdr->header.hdr_v1.dcd_table.addr_data[0].type; p_max_dcd = &imxhdr->header.hdr_v1.dcd_table .addr_data[MAX_HW_CFG_SIZE_V1].type; @@ -245,7 +229,6 @@ static void set_hdr_func(struct imx_header *imxhdr) case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_imx_hdr = set_imx_hdr_v2; - set_imx_size = set_imx_size_v2; p_entry = (uint32_t *)&imxhdr->header.hdr_v2.dcd_table; p_max_dcd = (uint32_t *)((char *)imxhdr + MAX_HEADER_SIZE); break; @@ -283,31 +266,49 @@ static void print_hdr_v1(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector); }
-static void print_hdr_v2(struct imx_header *imx_hdr) +static void print_header_info2(struct imx_header *imx_hdr) { imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; + + printf("Data Size: "); + genimg_print_size(hdr_v2->boot_data.size); + printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr); + printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); +} + +static void print_hdr_v2(struct imx_header *imxhdr) +{ + imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table; uint32_t size, version;
- size = be16_to_cpu(dcd_v2->header.length) - 8; - if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { - fprintf(stderr, - "Error: Image corrupt DCD size %d exceed maximum %d\n", - (uint32_t)(size / sizeof(dcd_addr_data_t)), - MAX_HW_CFG_SIZE_V2); - exit(EXIT_FAILURE); + if (hdr_v2->fhdr.dcd_ptr) { + size = be16_to_cpu(dcd_v2->header.length) - 8; + if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { + fprintf(stderr, "Error: Image corrupt DCD size " + "%d exceed maximum %d\n", + (uint32_t)(size / sizeof(dcd_addr_data_t)), + MAX_HW_CFG_SIZE_V2); + exit(EXIT_FAILURE); + } } - - version = detect_imximage_version(imx_hdr); + version = detect_imximage_version(imxhdr);
printf("Image Type: Freescale IMX Boot Image\n"); printf("Image Ver: %x", version); printf("%s\n", get_table_entry_name(imximage_versions, NULL, version)); - printf("Data Size: "); - genimg_print_size(hdr_v2->boot_data.size); - printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr); - printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); + print_header_info2(imxhdr); + if (hdr_v2->boot_data.plugin) { + uint32_t flash_offset = + hdr_v2->fhdr.self - hdr_v2->boot_data.start; + /* The 1st size includes flash offset and the next header */ + uint32_t plugin_length = hdr_v2->boot_data.size - flash_offset + - offsetof(imx_header_v2_t, dcd_table); + + imxhdr = (struct imx_header *)((char *)imxhdr + plugin_length); + print_header_info2(imxhdr); + } }
static int cmd_cnt; @@ -363,6 +364,24 @@ int skip_separators(struct data_src *ds) } }
+int skip_comma(struct data_src *ds) +{ + char *p = ds->p; + + for (;;) { + char c = *p++; + if ((c == '#') || (c == '\r') || (c == '\n') || !c) + return 0; + if (c == ',') { + ds->p = p; + skip_separators(ds); + return 1; + } + if ((c != ' ') && (c == '\t')) + return 0; + } +} + char *grab_token(char *dest, int size, char *src) { while (size) { @@ -551,16 +570,18 @@ do_unary: static int parse_cmd_data(struct data_src *ds) { uint32_t data[3]; - int ret = get_cfg_value(ds, &data[0]); + int ret, i;
- if (ret) - return ret; - ret = get_cfg_value(ds, &data[1]); - if (ret) - return ret; - ret = get_cfg_value(ds, &data[2]); - if (ret) - return ret; + if (ds->plugin) { + fprintf(stderr, "DATA should be before plug command\n"); + return -1; + } + for (i = 0; i < 3; i++) { + int ret = get_cfg_value(ds, &data[i]); + if (ret) + return ret; + skip_comma(ds); /* comma is optional */ + } ret = (*set_dcd_val)(ds->imxhdr, data); if (ret) return ret; @@ -573,6 +594,99 @@ static int parse_cmd_data(struct data_src *ds) return 0; }
+static int get_data(struct data_src *ds, uint32_t *data, int cnt) +{ + int i = 0; + + if (!ds->plugin) { + fprintf(stderr, "missing plug command\n"); + return -1; + } + for (;;) { + int ret = get_cfg_value(ds, &data[i++]); + if (ret) + return ret; + if (i >= cnt) + break; + if (!skip_comma(ds)) + break; + } + if (i < 2) { + fprintf(stderr, "missing ','\n"); + return -1; + } + while (i < cnt) { + data[i] = data[i - 1]; + i++; + } + if ((data[1] == ds->prev[1]) && (data[2] == ds->prev[2]) + && (data[3] == ds->prev[3]) + && (data[4] == ds->prev[4])) + i = 0; + else if ((data[1] == data[2]) && (data[2] == data[3]) + && (data[3] == data[4])) + i = 1; + else if ((data[2] == data[3]) && (data[3] == data[4])) + i = 2; + else + i = 3; + return i; +} + +static int store_data(struct data_src *ds, uint32_t *data, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + *p_entry++ = data[i]; + + ds->prev[1] = data[1]; + ds->prev[2] = data[2]; + ds->prev[3] = data[3]; + ds->prev[4] = data[4]; + if (p_entry > p_max_dcd) { + uint32_t size = (char *)p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_iomux_entry(struct data_src *ds) +{ + uint32_t data[5]; + int i; + + i = get_data(ds, data, 5); + if (i < 0) + return i; + if (data[0] & (3 << 30)) { + fprintf(stderr, "bad 1st value\n"); + return -1; + } + if (i < 3) + i++; + data[0] |= (i << 30); + return store_data(ds, data, (i == 3) ? 5 : i); +} + +static int parse_write_entry(struct data_src *ds) +{ + uint32_t data[5]; + int i; + + i = get_data(ds, data, 5); + if (i < 0) + return i; + if (data[0] & 3) { + fprintf(stderr, "Address must be aligned on word boundary\n"); + return -1; + } + data[0] |= i; + return store_data(ds, data, (i == 3) ? 5 : (i + 1)); +} + static int parse_image_version(struct data_src *ds) { int ret; @@ -618,8 +732,82 @@ static int parse_boot_from(struct data_src *ds) return 0; }
+static int parse_plugin(struct data_src *ds) +{ + struct stat sbuf; + int plug_file; + unsigned char *ptr; + char *p; + char c; + int ret; + uint32_t plug_base; + uint32_t header_length; + + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { + fprintf(stderr, "Error: Place BOOT_FROM before plugin\n"); + return -1; + } + ret = get_cfg_value(ds, &plug_base); + if (ret) + return ret; + + if (skip_separators(ds)) + return -1; + p = ds->p; + for (;;) { + c = *p; + if (!c) + break; + if ((c == ' ') || (c == '\t') || (c == ';') || (c == '#') + || (c == '\r') || (c == '\n')) { + *p = 0; + break; + } + p++; + } + plug_file = open(ds->p, O_RDONLY|O_BINARY); + if (plug_file < 0) { + fprintf(stderr, "Can't open plugin file %s: %s\n", + ds->p, strerror(errno)); + *p = c; + return -1; + } + if (fstat(plug_file, &sbuf) < 0) { + fprintf(stderr, "Can't stat %s: %s\n", + ds->p, strerror(errno)); + close(plug_file); + return -1; + } + ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, plug_file, 0); + if (ptr == MAP_FAILED) { + fprintf(stderr, "Can't read %s: %s\n", + ds->p, strerror(errno)); + return -1; + } + *p = c; + ds->p = p; + /* Set the plugin header */ + header_length = (*set_imx_hdr)(ds->imxhdr, plug_base, + g_flash_offset, 1); + + p = ((char *)ds->imxhdr) + header_length; + if ((p + sbuf.st_size) >= (char *)p_max_dcd) { + fprintf(stderr, "Out of space\n"); + return -1; + } + + ds->plugin = 1; + memcpy(p, ptr, sbuf.st_size); + munmap((void *)ptr, sbuf.st_size); + close(plug_file); + + p_entry = (uint32_t *)(p + sbuf.st_size); + return 0; +} + parse_fld_t cmd_table[] = { - parse_image_version, parse_boot_from, parse_cmd_data + parse_image_version, parse_boot_from, parse_cmd_data, parse_plugin, + parse_iomux_entry, parse_write_entry };
static int parse_command(struct data_src *ds) @@ -630,9 +818,11 @@ static int parse_command(struct data_src *ds) return cmd_table[cmd](ds); }
-static void parse_cfg_file(struct imx_header *imxhdr, char *name) +static void parse_cfg_file(struct imx_header *imxhdr, char *name, + uint32_t entry_point) { struct data_src ds; + uint32_t plugin_length = 0;
ds.line = NULL; ds.len = 0; @@ -662,6 +852,35 @@ static void parse_cfg_file(struct imx_header *imxhdr, char *name) cmd_cnt++; } fclose(ds.fd); + + if (ds.plugin) { + uint32_t header_length, more; + struct imx_header *next_imxhdr; + + *p_entry++ = 0; + header_length = ((char *)p_entry) - ((char *)imxhdr); + plugin_length = ((header_length - 1) | 0x3f) + 1; + more = plugin_length - header_length; + if (more) + memset(p_entry, 0, more); + next_imxhdr = (struct imx_header *) + (((char *)imxhdr) + plugin_length); + p_entry = (imximage_version == IMXIMAGE_V1) ? (uint32_t *) + &next_imxhdr->header.hdr_v1.dcd_table.addr_data[0].type + : (uint32_t *)&next_imxhdr->header.hdr_v2.dcd_table; + if (p_entry > p_max_dcd) { + fprintf(stderr, "Out of space\n"); + exit(EXIT_FAILURE); + } + + /* Set the plugin size in header to include next header */ + *header_size_ptr = ((char *)p_entry) - ((char *)imxhdr) + + g_flash_offset; + imxhdr = next_imxhdr; + } + /* Set the imx header */ + imximage_params.header_size = (*set_imx_hdr)(imxhdr, entry_point, + g_flash_offset + plugin_length, 0) + plugin_length; return; }
@@ -727,7 +946,7 @@ int imximage_vrec_header(struct mkimage_params *params, set_hdr_func(imxhdr);
/* Parse dcd configuration file */ - parse_cfg_file(imxhdr, params->imagename); + parse_cfg_file(imxhdr, params->imagename, params->ep);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { @@ -735,9 +954,6 @@ int imximage_vrec_header(struct mkimage_params *params, params->imagename); exit(EXIT_FAILURE); } - /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, params->ep, - g_flash_offset); imximage_params.hdr = imxhdr; return 0; } @@ -746,8 +962,10 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, struct mkimage_params *params) { /* Set the size in header */ - (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size, - g_flash_offset); + uint32_t offset = (char *)header_size_ptr - (char *)imximage_params.hdr; + uint32_t *p = (uint32_t *)((char *)ptr + offset); + + *p = sbuf->st_size + g_flash_offset; }
int imximage_check_params(struct mkimage_params *params) diff --git a/tools/imximage.h b/tools/imximage.h index efd249b..7613386 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -51,7 +51,10 @@ enum imximage_cmd { CMD_IMAGE_VERSION, CMD_BOOT_FROM, - CMD_DATA + CMD_DATA, + CMD_PLUGIN, + CMD_IOMUX_ENTRY, + CMD_WRITE_ENTRY, };
enum imximage_version { @@ -158,6 +161,8 @@ struct data_src { char *filename; struct imx_header *imxhdr; char *p; + int plugin; + uint32_t prev[5]; };
typedef int (*parse_fld_t)(struct data_src *ds); @@ -165,8 +170,6 @@ typedef int (*parse_fld_t)(struct data_src *ds); typedef int (*set_dcd_val_t)(struct imx_header *imxhdr, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point, - uint32_t flash_offset); -typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size, - uint32_t flash_offset); + uint32_t flash_offset, int plugin);
#endif /* _IMXIMAGE_H_ */
On 22/09/2012 04:39, Troy Kisky wrote:
Add commands plugin address filename iomux_entry addr, data1 [, data2, [, data3]] write_entry addr, data1 [, data2, [, data3]]
Why do we need explicitely an IOMUX command ? As far as I can see, the program image defined in V2 defines a plugin, but not an iomux. I am expecting that the imximage generates a iMX header only, without moving some code from the initialization code directly here. In the manula there is a "Write Data" (what we have always had), a "Check data" and an "Unlock" commands.
If we start to add special commands, maybe we are staring again to reimplement U-Boot. We could have some SET_CLK, SET_CPU_FREQ, and so on. What I am really mising in this series is why you are moving a lot of things from U-Boot into the iMX header.
It seems to me we want to put much more code in the iMX header as what it is really required to boot the device.
Adding / modifying the syntax requires to update doc/README.imximage, too.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
tools/imximage.c | 334 ++++++++++++++++++++++++++++++++++++++++++++---------- tools/imximage.h | 11 +- 2 files changed, 283 insertions(+), 62 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2c5a622..fae786a 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -31,7 +31,6 @@ #include "mkimage.h" #include <image.h> #include "imximage.h"
/*
- Supported commands for configuration file
*/ @@ -39,6 +38,9 @@ static table_entry_t imximage_cmds[] = { {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_DATA, "DATA", "Reg Write Data", }, {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
- {CMD_PLUGIN, "plugin", "plugin addr,file", },
- {CMD_IOMUX_ENTRY, "iomux_entry", "Write iomux reg", },
- {CMD_WRITE_ENTRY, "write_entry", "Write register", }, {-1, "", "", },
};
@@ -69,8 +71,8 @@ static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_imx_hdr_t set_imx_hdr; -static set_imx_size_t set_imx_size; static uint32_t *p_max_dcd; +static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -88,8 +90,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */
- if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
(hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
- if ((fhdr_v2->header.tag == IVT_HEADER_TAG)) return IMXIMAGE_V2;
Help me to understand. I am reading i.MX6 manual and, even if the number of DCD entries could be variable, I do not see why the header tag of DCD is moving. At least, this is what I can see on picture 7-19, Image Vector table.
return IMXIMAGE_VER_INVALID; @@ -160,7 +161,7 @@ static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) }
static int set_imx_hdr_v1(struct imx_header *imxhdr,
uint32_t entry_point, uint32_t flash_offset)
uint32_t entry_point, uint32_t flash_offset, int plugin){ imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; @@ -180,22 +181,12 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
- header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); return header_length;
}
-static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset)-{
- uint32_t *p = (uint32_t *)(((char *)imxhdr)
+ imximage_params.header_size);- /* The external flash header must be at the end of the DCD table */
- /* file_size includes header */
- p[-1] = file_size + flash_offset;
-}
I think you have to squash some of your patches or to defines them in another way. You added this code previously, and you drop now. This makes more difficult to review your patches.
static int set_imx_hdr_v2(struct imx_header *imxhdr,
uint32_t entry_point, uint32_t flash_offset)
uint32_t entry_point, uint32_t flash_offset, int plugin){ imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; @@ -216,27 +207,20 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); hdr_v2->boot_data.start = hdr_base - flash_offset;
hdr_v2->boot_data.plugin = plugin;
/* Security feature are not supported */ fhdr_v2->csf = 0;
header_size_ptr = &hdr_v2->boot_data.size; return header_length;
}
-static void set_imx_size_v2(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset)-{
- imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
- /* file_size includes header */
- hdr_v2->boot_data.size = file_size + flash_offset;
-}
static void set_hdr_func(struct imx_header *imxhdr) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_imx_hdr = set_imx_hdr_v1;
set_imx_size = set_imx_size_v1;@@ -245,7 +229,6 @@ static void set_hdr_func(struct imx_header *imxhdr) case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_imx_hdr = set_imx_hdr_v2;
set_imx_size = set_imx_size_v2;@@ -283,31 +266,49 @@ static void print_hdr_v1(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector); }
-static void print_hdr_v2(struct imx_header *imx_hdr) +static void print_header_info2(struct imx_header *imx_hdr) { imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
- printf("Data Size: ");
- genimg_print_size(hdr_v2->boot_data.size);
- printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
- printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
+}
+static void print_hdr_v2(struct imx_header *imxhdr) +{
- imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table; uint32_t size, version;
- size = be16_to_cpu(dcd_v2->header.length) - 8;
- if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
fprintf(stderr,"Error: Image corrupt DCD size %d exceed maximum %d\n",(uint32_t)(size / sizeof(dcd_addr_data_t)),MAX_HW_CFG_SIZE_V2);exit(EXIT_FAILURE);
- if (hdr_v2->fhdr.dcd_ptr) {
size = be16_to_cpu(dcd_v2->header.length) - 8;if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {fprintf(stderr, "Error: Image corrupt DCD size ""%d exceed maximum %d\n",(uint32_t)(size / sizeof(dcd_addr_data_t)),MAX_HW_CFG_SIZE_V2);exit(EXIT_FAILURE);}
- version = detect_imximage_version(imx_hdr);
version = detect_imximage_version(imxhdr);
printf("Image Type: Freescale IMX Boot Image\n"); printf("Image Ver: %x", version); printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
- printf("Data Size: ");
- genimg_print_size(hdr_v2->boot_data.size);
- printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
- printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
- print_header_info2(imxhdr);
- if (hdr_v2->boot_data.plugin) {
uint32_t flash_offset =hdr_v2->fhdr.self - hdr_v2->boot_data.start;/* The 1st size includes flash offset and the next header */uint32_t plugin_length = hdr_v2->boot_data.size - flash_offset- offsetof(imx_header_v2_t, dcd_table);imxhdr = (struct imx_header *)((char *)imxhdr + plugin_length);print_header_info2(imxhdr);- }
}
static int cmd_cnt; @@ -363,6 +364,24 @@ int skip_separators(struct data_src *ds) } }
+int skip_comma(struct data_src *ds) +{
- char *p = ds->p;
- for (;;) {
char c = *p++;if ((c == '#') || (c == '\r') || (c == '\n') || !c)return 0;if (c == ',') {ds->p = p;skip_separators(ds);return 1;}if ((c != ' ') && (c == '\t'))return 0;- }
+}
char *grab_token(char *dest, int size, char *src) { while (size) { @@ -551,16 +570,18 @@ do_unary: static int parse_cmd_data(struct data_src *ds) { uint32_t data[3];
- int ret = get_cfg_value(ds, &data[0]);
- int ret, i;
- if (ret)
return ret;- ret = get_cfg_value(ds, &data[1]);
- if (ret)
return ret;- ret = get_cfg_value(ds, &data[2]);
- if (ret)
return ret;
- if (ds->plugin) {
fprintf(stderr, "DATA should be before plug command\n");return -1;- }
- for (i = 0; i < 3; i++) {
int ret = get_cfg_value(ds, &data[i]);if (ret)return ret;skip_comma(ds); /* comma is optional */- } ret = (*set_dcd_val)(ds->imxhdr, data); if (ret) return ret;
@@ -573,6 +594,99 @@ static int parse_cmd_data(struct data_src *ds) return 0; }
+static int get_data(struct data_src *ds, uint32_t *data, int cnt) +{
- int i = 0;
- if (!ds->plugin) {
fprintf(stderr, "missing plug command\n");return -1;- }
- for (;;) {
int ret = get_cfg_value(ds, &data[i++]);if (ret)return ret;if (i >= cnt)break;if (!skip_comma(ds))break;- }
- if (i < 2) {
fprintf(stderr, "missing ','\n");return -1;- }
- while (i < cnt) {
data[i] = data[i - 1];i++;- }
- if ((data[1] == ds->prev[1]) && (data[2] == ds->prev[2])
&& (data[3] == ds->prev[3])&& (data[4] == ds->prev[4]))i = 0;- else if ((data[1] == data[2]) && (data[2] == data[3])
&& (data[3] == data[4]))i = 1;- else if ((data[2] == data[3]) && (data[3] == data[4]))
i = 2;- else
i = 3;- return i;
+}
+static int store_data(struct data_src *ds, uint32_t *data, int cnt) +{
- int i;
- for (i = 0; i < cnt; i++)
*p_entry++ = data[i];- ds->prev[1] = data[1];
- ds->prev[2] = data[2];
- ds->prev[3] = data[3];
- ds->prev[4] = data[4];
- if (p_entry > p_max_dcd) {
uint32_t size = (char *)p_max_dcd - (char *)ds->imxhdr;fprintf(stderr, "Error: header exceeds maximum size(%d)\n",size);return -1;- }
- return 0;
+}
+static int parse_iomux_entry(struct data_src *ds) +{
- uint32_t data[5];
- int i;
- i = get_data(ds, data, 5);
- if (i < 0)
return i;- if (data[0] & (3 << 30)) {
fprintf(stderr, "bad 1st value\n");return -1;- }
- if (i < 3)
i++;- data[0] |= (i << 30);
- return store_data(ds, data, (i == 3) ? 5 : i);
+}
+static int parse_write_entry(struct data_src *ds) +{
- uint32_t data[5];
- int i;
- i = get_data(ds, data, 5);
- if (i < 0)
return i;- if (data[0] & 3) {
fprintf(stderr, "Address must be aligned on word boundary\n");return -1;- }
- data[0] |= i;
- return store_data(ds, data, (i == 3) ? 5 : (i + 1));
+}
static int parse_image_version(struct data_src *ds) { int ret; @@ -618,8 +732,82 @@ static int parse_boot_from(struct data_src *ds) return 0; }
+static int parse_plugin(struct data_src *ds) +{
- struct stat sbuf;
- int plug_file;
- unsigned char *ptr;
- char *p;
- char c;
- int ret;
- uint32_t plug_base;
- uint32_t header_length;
- if (g_flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Place BOOT_FROM before plugin\n");return -1;- }
- ret = get_cfg_value(ds, &plug_base);
- if (ret)
return ret;- if (skip_separators(ds))
return -1;- p = ds->p;
- for (;;) {
c = *p;if (!c)break;if ((c == ' ') || (c == '\t') || (c == ';') || (c == '#')|| (c == '\r') || (c == '\n')) {*p = 0;break;}p++;- }
- plug_file = open(ds->p, O_RDONLY|O_BINARY);
- if (plug_file < 0) {
fprintf(stderr, "Can't open plugin file %s: %s\n",ds->p, strerror(errno));*p = c;return -1;- }
- if (fstat(plug_file, &sbuf) < 0) {
fprintf(stderr, "Can't stat %s: %s\n",ds->p, strerror(errno));close(plug_file);return -1;- }
- ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, plug_file, 0);
- if (ptr == MAP_FAILED) {
fprintf(stderr, "Can't read %s: %s\n",ds->p, strerror(errno));return -1;- }
- *p = c;
- ds->p = p;
- /* Set the plugin header */
- header_length = (*set_imx_hdr)(ds->imxhdr, plug_base,
g_flash_offset, 1);- p = ((char *)ds->imxhdr) + header_length;
- if ((p + sbuf.st_size) >= (char *)p_max_dcd) {
fprintf(stderr, "Out of space\n");return -1;- }
- ds->plugin = 1;
- memcpy(p, ptr, sbuf.st_size);
- munmap((void *)ptr, sbuf.st_size);
- close(plug_file);
- p_entry = (uint32_t *)(p + sbuf.st_size);
- return 0;
+}
parse_fld_t cmd_table[] = {
- parse_image_version, parse_boot_from, parse_cmd_data
- parse_image_version, parse_boot_from, parse_cmd_data, parse_plugin,
- parse_iomux_entry, parse_write_entry
};
static int parse_command(struct data_src *ds) @@ -630,9 +818,11 @@ static int parse_command(struct data_src *ds) return cmd_table[cmd](ds); }
-static void parse_cfg_file(struct imx_header *imxhdr, char *name) +static void parse_cfg_file(struct imx_header *imxhdr, char *name,
uint32_t entry_point){ struct data_src ds;
uint32_t plugin_length = 0;
ds.line = NULL; ds.len = 0;
@@ -662,6 +852,35 @@ static void parse_cfg_file(struct imx_header *imxhdr, char *name) cmd_cnt++; } fclose(ds.fd);
- if (ds.plugin) {
uint32_t header_length, more;struct imx_header *next_imxhdr;*p_entry++ = 0;header_length = ((char *)p_entry) - ((char *)imxhdr);plugin_length = ((header_length - 1) | 0x3f) + 1;more = plugin_length - header_length;if (more)memset(p_entry, 0, more);next_imxhdr = (struct imx_header *)(((char *)imxhdr) + plugin_length);p_entry = (imximage_version == IMXIMAGE_V1) ? (uint32_t *)&next_imxhdr->header.hdr_v1.dcd_table.addr_data[0].type: (uint32_t *)&next_imxhdr->header.hdr_v2.dcd_table;if (p_entry > p_max_dcd) {fprintf(stderr, "Out of space\n");exit(EXIT_FAILURE);}/* Set the plugin size in header to include next header */*header_size_ptr = ((char *)p_entry) - ((char *)imxhdr)+ g_flash_offset;imxhdr = next_imxhdr;- }
- /* Set the imx header */
- imximage_params.header_size = (*set_imx_hdr)(imxhdr, entry_point,
g_flash_offset + plugin_length, 0) + plugin_length;}
@@ -727,7 +946,7 @@ int imximage_vrec_header(struct mkimage_params *params, set_hdr_func(imxhdr);
/* Parse dcd configuration file */
- parse_cfg_file(imxhdr, params->imagename);
parse_cfg_file(imxhdr, params->imagename, params->ep);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) {
@@ -735,9 +954,6 @@ int imximage_vrec_header(struct mkimage_params *params, params->imagename); exit(EXIT_FAILURE); }
- /* Set the imx header */
---> - imximage_params.header_size = (*set_imx_hdr)(imxhdr, params->ep,
g_flash_offset);} @@ -746,8 +962,10 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, struct mkimage_params *params) { /* Set the size in header */
- (*set_imx_size)((struct imx_header *)ptr, sbuf->st_size,
g_flash_offset);
- uint32_t offset = (char *)header_size_ptr - (char *)imximage_params.hdr;
- uint32_t *p = (uint32_t *)((char *)ptr + offset);
- *p = sbuf->st_size + g_flash_offset;
}
int imximage_check_params(struct mkimage_params *params) diff --git a/tools/imximage.h b/tools/imximage.h index efd249b..7613386 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -51,7 +51,10 @@ enum imximage_cmd { CMD_IMAGE_VERSION, CMD_BOOT_FROM,
- CMD_DATA
- CMD_DATA,
- CMD_PLUGIN,
- CMD_IOMUX_ENTRY,
- CMD_WRITE_ENTRY,
};
enum imximage_version { @@ -158,6 +161,8 @@ struct data_src { char *filename; struct imx_header *imxhdr; char *p;
- int plugin;
- uint32_t prev[5];
};
typedef int (*parse_fld_t)(struct data_src *ds); @@ -165,8 +170,6 @@ typedef int (*parse_fld_t)(struct data_src *ds); typedef int (*set_dcd_val_t)(struct imx_header *imxhdr, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t entry_point,
uint32_t flash_offset);-typedef void (*set_imx_size_t)(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset);
uint32_t flash_offset, int plugin);#endif /* _IMXIMAGE_H_ */
Best regards, Stefano Babic
On 9/23/2012 8:38 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
Add commands plugin address filename iomux_entry addr, data1 [, data2, [, data3]] write_entry addr, data1 [, data2, [, data3]]
Why do we need explicitely an IOMUX command ? As far as I can see, the program image defined in V2 defines a plugin, but not an iomux. I am expecting that the imximage generates a iMX header only, without moving some code from the initialization code directly here. In the manula there is a "Write Data" (what we have always had), a "Check data" and an "Unlock" commands.
The table built by iomux_entry and write_entry are not used by the ROM. The plugin.S file that I add will interpret these entries. I could have repurposed the "DATA" command if I didn't mind bloating the table. Having separate commands made it easy to generate small tables.
If we start to add special commands, maybe we are staring again to reimplement U-Boot. We could have some SET_CLK, SET_CPU_FREQ, and so on. What I am really mising in this series is why you are moving a lot of things from U-Boot into the iMX header.
The cfg file after this patch series does no more setup/initialization than before this series. I don't know what "moving" you are referring to.
It seems to me we want to put much more code in the iMX header as what it is really required to boot the device.
Adding / modifying the syntax requires to update doc/README.imximage, too.
Yes, if leaning toward acceptance I will add this.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
tools/imximage.c | 334 ++++++++++++++++++++++++++++++++++++++++++++---------- tools/imximage.h | 11 +- 2 files changed, 283 insertions(+), 62 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2c5a622..fae786a 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -31,7 +31,6 @@ #include "mkimage.h" #include <image.h> #include "imximage.h"
- /*
*/
- Supported commands for configuration file
@@ -39,6 +38,9 @@ static table_entry_t imximage_cmds[] = { {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_DATA, "DATA", "Reg Write Data", }, {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
- {CMD_PLUGIN, "plugin", "plugin addr,file", },
- {CMD_IOMUX_ENTRY, "iomux_entry", "Write iomux reg", },
- {CMD_WRITE_ENTRY, "write_entry", "Write register", }, {-1, "", "", }, };
@@ -69,8 +71,8 @@ static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_imx_hdr_t set_imx_hdr; -static set_imx_size_t set_imx_size; static uint32_t *p_max_dcd; +static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
static struct image_type_params imximage_params; @@ -88,8 +90,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */
- if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
(hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
- if ((fhdr_v2->header.tag == IVT_HEADER_TAG)) return IMXIMAGE_V2;
Help me to understand. I am reading i.MX6 manual and, even if the number of DCD entries could be variable, I do not see why the header tag of DCD is moving. At least, this is what I can see on picture 7-19, Image Vector table.
If the DCD table is missing, there is no DCD_HEADER_TAG. DCD table is not required, so there is no need to check for it.
return IMXIMAGE_VER_INVALID; @@ -160,7 +161,7 @@ static int set_dcd_val_v2(struct imx_header *imxhdr, uint32_t *data) }
static int set_imx_hdr_v1(struct imx_header *imxhdr,
uint32_t entry_point, uint32_t flash_offset)
uint32_t entry_point, uint32_t flash_offset, int plugin)@@ -180,22 +181,12 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
- header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); return header_length; }
-static void set_imx_size_v1(struct imx_header *imxhdr, uint32_t file_size,
uint32_t flash_offset)-{
- uint32_t *p = (uint32_t *)(((char *)imxhdr)
+ imximage_params.header_size);- /* The external flash header must be at the end of the DCD table */
- /* file_size includes header */
- p[-1] = file_size + flash_offset;
-}
I think you have to squash some of your patches or to defines them in another way. You added this code previously, and you drop now. This makes more difficult to review your patches.
I though this is what you were referring to in patch 4/21 response. So my agreement there, should have been here. Now I don't know what in 4/21 you were referring to, but I'll reexamine before next version.
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
diff --git a/Makefile b/Makefile index fe2f98c..edf647e 100644 --- a/Makefile +++ b/Makefile @@ -425,7 +425,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin - $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ + $(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx + $(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin diff --git a/board/esg/ima3-mx53/imximage.cfg b/board/esg/ima3-mx53/imximage.cfg index fa6b42d..fce7492 100644 --- a/board/esg/ima3-mx53/imximage.cfg +++ b/board/esg/ima3-mx53/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C) Copyright 2012 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2012 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM nor
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# IOMUX for RAM only +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* IOMUX for RAM only */ DATA 4 0x53fa8554 0x300020 DATA 4 0x53fa8560 0x300020 DATA 4 0x53fa8594 0x300020 @@ -72,37 +74,47 @@ DATA 4 0x53fa86fc 0x0 DATA 4 0x53fa86f4 0x0 DATA 4 0x53fa8714 0x0 DATA 4 0x53fa8724 0x4000000 -# -# DDR RAM + +/* DDR RAM */ DATA 4 0x63fd9088 0x40404040 DATA 4 0x63fd9090 0x40404040 DATA 4 0x63fd907C 0x01420143 DATA 4 0x63fd9080 0x01450146 DATA 4 0x63fd9018 0x00111740 DATA 4 0x63fd9000 0x84190000 -# esdcfgX + +/* esdcfgX */ DATA 4 0x63fd900C 0x9f5152e3 DATA 4 0x63fd9010 0xb68e8a63 DATA 4 0x63fd9014 0x01ff00db -# Read/Write command delay + +/* Read/Write command delay */ DATA 4 0x63fd902c 0x000026d2 -# Out of reset delays + +/* Out of reset delays */ DATA 4 0x63fd9030 0x00ff0e21 -# ESDCTL ODT timing control + +/* ESDCTL ODT timing control */ DATA 4 0x63fd9008 0x12273030 -# ESDCTL power down control + +/* ESDCTL power down control */ DATA 4 0x63fd9004 0x0002002d -# Set registers in DDR memory chips + +/* Set registers in DDR memory chips */ DATA 4 0x63fd901c 0x00008032 DATA 4 0x63fd901c 0x00008033 DATA 4 0x63fd901c 0x00028031 DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 -# ESDCTL refresh control + +/* ESDCTL refresh control */ DATA 4 0x63fd9020 0x00005800 -# PHY ZQ HW control + +/* PHY ZQ HW control */ DATA 4 0x63fd9040 0x05380003 -# PHY ODT control + +/* PHY ODT control */ DATA 4 0x63fd9058 0x00022222 -# start DDR3 + +/* start DDR3 */ DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 62498ab..c86cd40 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -154,7 +158,7 @@ DATA 4 0x021b48b8 0x00000800 DATA 4 0x021b001c 0x00000000 DATA 4 0x021b0404 0x00011006
-# set the default clock gate to save power +/* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 @@ -163,8 +167,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx25pdk/imximage.cfg b/board/freescale/mx25pdk/imximage.cfg index f7af7ff..c42a283 100644 --- a/board/freescale/mx25pdk/imximage.cfg +++ b/board/freescale/mx25pdk/imximage.cfg @@ -1,46 +1,49 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# EIM config-CS5 init -- CPLD +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* EIM config-CS5 init -- CPLD */ DATA 4 0xB8002050 0x0000D843 DATA 4 0xB8002054 0x22252521 DATA 4 0xB8002058 0x22220A00
-# DDR2 init +/* DDR2 init */ DATA 4 0xB8001004 0x0076E83A DATA 4 0xB8001010 0x00000204 DATA 4 0xB8001000 0x92210000 @@ -67,7 +70,7 @@ DATA 4 0x43FAC454 0x00001000
DATA 4 0x53F80008 0x20034000
-# Enable the clocks +/* Enable the clocks */ DATA 4 0x53f8000c 0x1fffffff DATA 4 0x53f80010 0xffffffff DATA 4 0x53f80014 0xfdfff diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg index a875e8f..3e141ee 100644 --- a/board/freescale/mx51evk/imximage.cfg +++ b/board/freescale/mx51evk/imximage.cfg @@ -1,46 +1,50 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */
-# Setting IOMUXC +/* Setting IOMUXC */ DATA 4 0x73FA88a0 0x200 DATA 4 0x73FA850c 0x20c5 DATA 4 0x73FA8510 0x20c5 @@ -65,22 +69,24 @@ DATA 4 0x73FA88a4 0x6 DATA 4 0x73FA88ac 0x6 DATA 4 0x73FA88b8 0x6
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83FD9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83FD9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83FD9010 0x000ad0d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83FD9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83FD900C 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83FD9014 0x04008008 DATA 4 0x83FD9014 0x0000801a DATA 4 0x83FD9014 0x0000801b @@ -94,7 +100,7 @@ DATA 4 0x83FD9014 0x03808019 DATA 4 0x83FD9014 0x00408019 DATA 4 0x83FD9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83FD9014 0x0400800c DATA 4 0x83FD9014 0x0000801e DATA 4 0x83FD9014 0x0000801f @@ -108,12 +114,12 @@ DATA 4 0x83FD9014 0x0380801d DATA 4 0x83FD9014 0x0040801d DATA 4 0x83FD9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83FD9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83FD9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83FD9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83FD9034 0x90000000 DATA 4 0x83FD9014 0x00000000 diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg index 915fb2c..1cd61d5 100644 --- a/board/freescale/mx53evk/imximage.cfg +++ b/board/freescale/mx53evk/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Setting IOMUXC +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* Setting IOMUXC */ DATA 4 0x53fa8554 0x00200000 DATA 4 0x53fa8560 0x00200000 DATA 4 0x53fa8594 0x00200000 diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index 2ce5f8d..e6b90c1 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -1,48 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index bf941a3..4ed211e 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -166,8 +170,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/genesi/mx51_efikamx/imximage_mx.cfg b/board/genesi/mx51_efikamx/imximage_mx.cfg index 38fa760..21ff6d6 100644 --- a/board/genesi/mx51_efikamx/imximage_mx.cfg +++ b/board/genesi/mx51_efikamx/imximage_mx.cfg @@ -1,52 +1,58 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Essential GPIO settings to be done as early as possible -# PCBIDn pad settings are all the defaults except #2 which needs HVE off +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* + * Essential GPIO settings to be done as early as possible + * PCBIDn pad settings are all the defaults except #2 which needs HVE off + */ DATA 4 0x73fa8134 0x3 # PCBID0 ALT3 GPIO 3_16 DATA 4 0x73fa8130 0x3 # PCBID1 ALT3 GPIO 3_17 DATA 4 0x73fa8128 0x3 # PCBID2 ALT3 GPIO 3_11 @@ -55,7 +61,7 @@ DATA 4 0x73fa8198 0x3 # LED0 ALT3 GPIO 3_13 DATA 4 0x73fa81c4 0x3 # LED1 ALT3 GPIO 3_14 DATA 4 0x73fa81c8 0x3 # LED2 ALT3 GPIO 3_15
-# DDR bus IOMUX PAD settings +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 DATA 4 0x73fa84ac 0xc5 # SDWE @@ -72,22 +78,24 @@ DATA 4 0x73fa84d8 0xc5 # DRAM_DQM1 DATA 4 0x73fa84dc 0xc5 # DRAM_DQM2 DATA 4 0x73fa84e0 0xc5 # DRAM_DQM3
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x3f3574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x3f3574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -101,7 +109,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -115,12 +123,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0040801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/genesi/mx51_efikamx/imximage_sb.cfg b/board/genesi/mx51_efikamx/imximage_sb.cfg index 26d259f..7ddd0b1 100644 --- a/board/genesi/mx51_efikamx/imximage_sb.cfg +++ b/board/genesi/mx51_efikamx/imximage_sb.cfg @@ -1,51 +1,55 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# DDR bus IOMUX PAD settings +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register +*/ +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa88a0 0x200 # GRP_INMODE1 DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 @@ -62,22 +66,24 @@ DATA 4 0x73fa84b4 0xe5 # SDCKE1 DATA 4 0x73fa84cc 0xe5 # DRAM_CS0 DATA 4 0x73fa84d0 0xe4 # DRAM_CS1
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -91,7 +97,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -105,12 +111,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0042801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/ttcontrol/vision2/imximage_hynix.cfg b/board/ttcontrol/vision2/imximage_hynix.cfg index ed531db..c1de94f 100644 --- a/board/ttcontrol/vision2/imximage_hynix.cfg +++ b/board/ttcontrol/vision2/imximage_hynix.cfg @@ -1,209 +1,228 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# (C) Copyright 2010 -# Klaus Steinhammer TTECH Control Gmbh kst@tttech.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, nand, onenand, sd - +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * (C) Copyright 2010 + * Klaus Steinhammer TTECH Control Gmbh kst@tttech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* + * Boot Device : one of + * spi, nand, onenand, sd + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -####################### -### Disable WDOG ### -####################### +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * ####################### + * ### Disable WDOG ### + * ####################### + */ DATA 2 0x73f98000 0x30
-####################### -### SET DDR Clk ### -####################### - -# CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) +/* + * ####################### + * ### SET DDR Clk ### + * ####################### + */ +/* CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) */ DATA 4 0x73FD4018 0x000024C0
-# DOUBLE SPI CLK (13MHz->26 MHz Clock) +/* DOUBLE SPI CLK (13MHz->26 MHz Clock) */ DATA 4 0x73FD4038 0x2010241
-#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8600 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8604 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8608 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa860c 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8614 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) +/* IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) */ DATA 4 0x73fa86a8 0x00000187
-####################### -### Settings IOMUXC ### -####################### - -# DDR IOMUX configuration -# Control, Data, Address pads are in their default state: HIGH DS, FAST SR. -# IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS +/* + * ####################### + * ### Settings IOMUXC ### + * ####################### + */ +/* + * DDR IOMUX configuration + * Control, Data, Address pads are in their default state: HIGH DS, FAST SR. + * IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS + */ DATA 4 0x73fa84b8 0x000000e7 -# PVTC MAX (at GPC, PGR reg) -#DATA 4 0x73FD8004 0x1fc00000 +/* PVTC MAX (at GPC, PGR reg) */ +/* DATA 4 0x73FD8004 0x1fc00000 */
-#DQM0 DS high slew rate slow +/* DQM0 DS high slew rate slow */ DATA 4 0x73fa84d4 0x000000e4 -#DQM1 DS high slew rate slow +/* DQM1 DS high slew rate slow */ DATA 4 0x73fa84d8 0x000000e4 -#DQM2 DS high slew rate slow +/* DQM2 DS high slew rate slow */ DATA 4 0x73fa84dc 0x000000e4 -#DQM3 DS high slew rate slow +/* DQM3 DS high slew rate slow */ DATA 4 0x73fa84e0 0x000000e4
-#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow */ DATA 4 0x73fa84bc 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow */ DATA 4 0x73fa84c0 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow */ DATA 4 0x73fa84c4 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow */ DATA 4 0x73fa84c8 0x000000c4
-#DRAM_DATA B0 +/* DRAM_DATA B0 */ DATA 4 0x73fa88a4 0x00000004 -#DRAM_DATA B1 +/* DRAM_DATA B1 */ DATA 4 0x73fa88ac 0x00000004 -#DRAM_DATA B2 +/* DRAM_DATA B2 */ DATA 4 0x73fa88b8 0x00000004 -#DRAM_DATA B3 +/* DRAM_DATA B3 */ DATA 4 0x73fa882c 0x00000004
-#DRAM_DATA B0 slew rate +/* DRAM_DATA B0 slew rate */ DATA 4 0x73fa8878 0x00000000 -#DRAM_DATA B1 slew rate +/* DRAM_DATA B1 slew rate */ DATA 4 0x73fa8880 0x00000000 -#DRAM_DATA B2 slew rate +/* DRAM_DATA B2 slew rate */ DATA 4 0x73fa888c 0x00000000 -#DRAM_DATA B3 slew rate +/* DRAM_DATA B3 slew rate */ DATA 4 0x73fa889c 0x00000000
-####################### -### Configure SDRAM ### -####################### +/* + * ####################### + * ### Configure SDRAM ### + * ####################### + */
-# Configure CS0 -####################### +/* Configure CS0 */ +/* ####################### */
-# ESDCTL0: Enable controller +/* ESDCTL0: Enable controller */ DATA 4 0x83fd9000 0x83220000
-# Init DRAM on CS0 -# ESDSCR: Precharge command +/* Init DRAM on CS0 / +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x04008008 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x00338018 -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801a -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008000
-# ESDSCR: EMR with full Drive strength -#DATA 4 0x83fd9014 0x0000801a +/* ESDSCR: EMR with full Drive strength */ +/* DATA 4 0x83fd9014 0x0000801a */
-# ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9000 0xC3220000
-# ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd9004 0xC33574AA - -#micron mDDR -# ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD9004 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd9004 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD9004 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD9004 0x704564a8
-# ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 +/* ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 */ DATA 4 0x83fd9010 0x000a1700
-# Configure CS1 -####################### +/* Configure CS1 */ +/* ####################### */
-# ESDCTL1: Enable controller +/* ESDCTL1: Enable controller */ DATA 4 0x83fd9008 0x83220000
-# Init DRAM on CS1 -# ESDSCR: Precharge command +/* Init DRAM on CS1 */ +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x0400800c -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x0033801c -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801e -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008004
-# ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9008 0xC3220000 - -# ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd900c 0xC33574AA - -#micron mDDR -# ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD900C 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd900c 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD900C 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD900C 0x704564a8
-# ESDSCR (mDRAM configuration finished) +/* ESDSCR (mDRAM configuration finished) */ DATA 4 0x83FD9014 0x00000004
-# ESDSCR - clear "configuration request" bit +/* ESDSCR - clear "configuration request" bit */ DATA 4 0x83fd9014 0x00000000
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 164 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + 3 files changed, 169 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..b1fce4e 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -33,11 +33,14 @@ SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) plugin.bin
$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))
+plugin.bin: plugin.o + $(OBJCOPY) -O binary --gap-fill 0xff $< $@ + #########################################################################
# defines $(obj).depend target diff --git a/arch/arm/cpu/armv7/mx6/plugin.S b/arch/arm/cpu/armv7/mx6/plugin.S new file mode 100644 index 0000000..99c6b20 --- /dev/null +++ b/arch/arm/cpu/armv7/mx6/plugin.S @@ -0,0 +1,164 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#include <config.h> +#include <asm/arch/imx-regs.h> + +#define HAB_RVT_ENTRY 0x98 +#define HAB_RVT_FAIL_SAFE_VECT 0xbc +#define HAB_RVT_LOAD_DATA 0xc8 + +#define HDR_SELF_PTR 0x14 +#define HDR_BOOT_DATA 0x20 +#define HDR_IMAGE_LEN 0x24 + +#define L2X0_CTRL 0x100 +#define SCU_CONFIG 0x004 + +/* + * Disable L2 cache because ROM will turn it on when a plugin is used. + * There are cache coherence problems if cache is on when Linux kernel + * expects it to be off. + */ +.macro disable_l2_cache + ldr r1, =L2_BASE_ADDR + mov r0, #0x0 + str r0, [r1, #L2X0_CTRL] +.endm + + +/* + * plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset) + */ +plugin_start: +/* Save the return address and the function arguments */ + push {r0-r8, lr} + +/* r0-r2 must be >= 0x100 and must be 4 byte aligned */ + cmp r0, #0x100 + cmphs r1, #0x100 + cmphs r2, #0x100 + +/* rCPU: 22 - mx6q, 12 - mx6dl, 12|0x100 - solo, 2 - sololite */ +#define rCPU r2 +#define rIomux r3 +#define rVal0 r4 /* mx6q value */ +#define rVal1 r5 /* mx6dl value */ +#define rVal2 r6 /* mx6solo value */ +#define rVal3 r7 /* mx6sololite value */ +#define rFlag lr +#define rTable r8 + + orr rFlag, r0, r1 + orr rFlag, rFlag, r2 + orrlo rFlag, rFlag, #1 + + mov rCPU, #22 /* mx6q */ + mov r1, #SCU_BASE_ADDR + ldr r0, [r1, #SCU_CONFIG] + and r0, r0, #3 + cmp r0, #3 /* is mx6q? */ + movne rCPU, #12 /* mx6dl */ + cmpne r0, #1 /* is mx6dl? */ + movne rCPU, #2 /* mx6 sololite */ + + ldrne r1, =ANATOP_BASE_ADDR + ldrne r0, [r1, #0x280] + movne r0, r0, LSR #16 + cmpne r0, #0x60 /* is mx6 Sololite? */ + movne rCPU, #12 | 0x100 /* Solo */ + + mov rVal0, #0 + mov rVal1, #0 + mov rVal2, #0 + mov rVal3, #0 + ldr rIomux, =IOMUXC_BASE_ADDR + adr rTable, mx6_table + b 3f + +1: movs r0, r1, LSR #30 + beq 2f + mov r1, r1, LSL rCPU + movs r1, r1, LSR #32-10 + addne r1, rIomux, r1, LSL #2 + cmp r0, #3 + subne r0, r0, #1 + orr r1, r1, r0 + +2: ands r0, r1, #3 + bic r1, r1, #3 + ldrne rVal0, [rTable], #4 + movne rVal1, rVal0 + movne rVal2, rVal0 + movne rVal3, rVal0 + subnes r0, r0, #1 + ldrne rVal1, [rTable], #4 + movne rVal2, rVal1 + movne rVal3, rVal1 + subnes r0, r0, #1 + ldrne rVal2, [rTable], #4 + ldrne rVal3, [rTable], #4 + + mov r0, rVal0 + cmp rCPU, #22 + movne r0, rVal1 + cmpne rCPU, #12 + movne r0, rVal2 + cmpne rCPU, #12|0x100 + movne r0, rVal3 + cmp r1, #0 + strne r0, [r1] +3: ldr r1, [rTable], #4 + cmp r1, #0 + bne 1b + + tst rFlag, #3 + bne 4f /* Branch if not called as plugin */ +/* Align end of table to 64 byte boundary */ + sub rTable, rTable, #1 + orr rTable, rTable, #0x3f + add rTable, rTable, #1 + ldr r2, [rTable, #HDR_SELF_PTR] + ldr r0, [rTable, #HDR_BOOT_DATA] + ldr r1, [rTable, #HDR_IMAGE_LEN] + sub rTable, r2, r0 + mov r2, r0 + mov r3, r1 + mov r4, #0 + push {r0-r4} + mov r0, #HAB_RVT_LOAD_DATA + ldr r4, [r0] + mov r0, sp + add r1, sp, #4 + add r2, sp, #8 + blx r4 + + disable_l2_cache + pop {r4, r5} + add sp, sp, #12 + pop {r0-r3} +/* + * Before returning to ROM, we need to fill the return values arguments + * to our function. + * plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset) + */ + + str r4, [r0] + str r5, [r1] + str rTable, [r2] + mov r0, #1 + pop {r4-r8, pc} + +/* Not called as plugin */ +4: popne {r0-r8, lr} + mov r0, #HAB_RVT_ENTRY + ldr lr, [r0] + blx lr + mov r0, #HAB_RVT_FAIL_SAFE_VECT + ldr lr, [r0] + blx lr + + .ltorg +mx6_table: diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 8834c59..5c133b2 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -48,6 +48,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_BASE_ADDR 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000
On 9/22/2012 8:09 AM, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
An explanation of what is "plugin" and what the file plugin.S does should be better. Not in the subject of the patch, you can place it as a README.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 164 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + 3 files changed, 169 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..b1fce4e 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -33,11 +33,14 @@ SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) plugin.bin
$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))
+plugin.bin: plugin.o
$(OBJCOPY) -O binary --gap-fill 0xff $< $@
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/armv7/mx6/plugin.S b/arch/arm/cpu/armv7/mx6/plugin.S new file mode 100644 index 0000000..99c6b20 --- /dev/null +++ b/arch/arm/cpu/armv7/mx6/plugin.S @@ -0,0 +1,164 @@ +/*
- Copyright (C) 2012 Boundary Devices Inc.
- Licensed under the GPL-2 or later.
- */
+#include<config.h> +#include<asm/arch/imx-regs.h>
+#define HAB_RVT_ENTRY 0x98 +#define HAB_RVT_FAIL_SAFE_VECT 0xbc +#define HAB_RVT_LOAD_DATA 0xc8
+#define HDR_SELF_PTR 0x14 +#define HDR_BOOT_DATA 0x20 +#define HDR_IMAGE_LEN 0x24
+#define L2X0_CTRL 0x100 +#define SCU_CONFIG 0x004
+/*
- Disable L2 cache because ROM will turn it on when a plugin is used.
- There are cache coherence problems if cache is on when Linux kernel
- expects it to be off.
- */
+.macro disable_l2_cache
- ldr r1, =L2_BASE_ADDR
- mov r0, #0x0
- str r0, [r1, #L2X0_CTRL]
+.endm
+/*
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
- */
+plugin_start: +/* Save the return address and the function arguments */
- push {r0-r8, lr}
+/* r0-r2 must be>= 0x100 and must be 4 byte aligned */
- cmp r0, #0x100
- cmphs r1, #0x100
- cmphs r2, #0x100
+/* rCPU: 22 - mx6q, 12 - mx6dl, 12|0x100 - solo, 2 - sololite */ +#define rCPU r2 +#define rIomux r3 +#define rVal0 r4 /* mx6q value */ +#define rVal1 r5 /* mx6dl value */ +#define rVal2 r6 /* mx6solo value */ +#define rVal3 r7 /* mx6sololite value */ +#define rFlag lr +#define rTable r8
- orr rFlag, r0, r1
- orr rFlag, rFlag, r2
- orrlo rFlag, rFlag, #1
- mov rCPU, #22 /* mx6q */
- mov r1, #SCU_BASE_ADDR
- ldr r0, [r1, #SCU_CONFIG]
- and r0, r0, #3
- cmp r0, #3 /* is mx6q? */
- movne rCPU, #12 /* mx6dl */
- cmpne r0, #1 /* is mx6dl? */
- movne rCPU, #2 /* mx6 sololite */
- ldrne r1, =ANATOP_BASE_ADDR
- ldrne r0, [r1, #0x280]
- movne r0, r0, LSR #16
- cmpne r0, #0x60 /* is mx6 Sololite? */
- movne rCPU, #12 | 0x100 /* Solo */
- mov rVal0, #0
- mov rVal1, #0
- mov rVal2, #0
- mov rVal3, #0
- ldr rIomux, =IOMUXC_BASE_ADDR
- adr rTable, mx6_table
- b 3f
+1: movs r0, r1, LSR #30
- beq 2f
- mov r1, r1, LSL rCPU
- movs r1, r1, LSR #32-10
- addne r1, rIomux, r1, LSL #2
- cmp r0, #3
- subne r0, r0, #1
- orr r1, r1, r0
+2: ands r0, r1, #3
- bic r1, r1, #3
- ldrne rVal0, [rTable], #4
- movne rVal1, rVal0
- movne rVal2, rVal0
- movne rVal3, rVal0
- subnes r0, r0, #1
- ldrne rVal1, [rTable], #4
- movne rVal2, rVal1
- movne rVal3, rVal1
- subnes r0, r0, #1
- ldrne rVal2, [rTable], #4
- ldrne rVal3, [rTable], #4
- mov r0, rVal0
- cmp rCPU, #22
- movne r0, rVal1
- cmpne rCPU, #12
- movne r0, rVal2
- cmpne rCPU, #12|0x100
- movne r0, rVal3
- cmp r1, #0
- strne r0, [r1]
+3: ldr r1, [rTable], #4
- cmp r1, #0
- bne 1b
- tst rFlag, #3
- bne 4f /* Branch if not called as plugin */
+/* Align end of table to 64 byte boundary */
- sub rTable, rTable, #1
- orr rTable, rTable, #0x3f
- add rTable, rTable, #1
- ldr r2, [rTable, #HDR_SELF_PTR]
- ldr r0, [rTable, #HDR_BOOT_DATA]
- ldr r1, [rTable, #HDR_IMAGE_LEN]
- sub rTable, r2, r0
- mov r2, r0
- mov r3, r1
- mov r4, #0
- push {r0-r4}
- mov r0, #HAB_RVT_LOAD_DATA
- ldr r4, [r0]
- mov r0, sp
- add r1, sp, #4
- add r2, sp, #8
- blx r4
- disable_l2_cache
- pop {r4, r5}
- add sp, sp, #12
- pop {r0-r3}
+/*
- Before returning to ROM, we need to fill the return values arguments
- to our function.
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
- */
- str r4, [r0]
- str r5, [r1]
- str rTable, [r2]
- mov r0, #1
- pop {r4-r8, pc}
+/* Not called as plugin */ +4: popne {r0-r8, lr}
- mov r0, #HAB_RVT_ENTRY
- ldr lr, [r0]
- blx lr
- mov r0, #HAB_RVT_FAIL_SAFE_VECT
- ldr lr, [r0]
- blx lr
- .ltorg
+mx6_table: diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 8834c59..5c133b2 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -48,6 +48,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_BASE_ADDR 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Now that we have some basis, why do we need this mechanism to boot this board ? Is it not possible to make the same initialization directly in u-boot ?
In principle, this adds stil some code that is not so easy to maintain.
arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 164 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + 3 files changed, 169 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..b1fce4e 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -33,11 +33,14 @@ SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) plugin.bin
$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))
+plugin.bin: plugin.o
- $(OBJCOPY) -O binary --gap-fill 0xff $< $@
If we add a plugin mechanism, we can have several plugins (booting directly from Net, maybe ?). We should then have a general mechanism. A directory "plugins" here can contain the code, and it is compiled only if a CONFIG_ is set or better if required from imximage.cfg
#########################################################################
# defines $(obj).depend target diff --git a/arch/arm/cpu/armv7/mx6/plugin.S b/arch/arm/cpu/armv7/mx6/plugin.S new file mode 100644 index 0000000..99c6b20 --- /dev/null +++ b/arch/arm/cpu/armv7/mx6/plugin.S @@ -0,0 +1,164 @@ +/*
- Copyright (C) 2012 Boundary Devices Inc.
- Licensed under the GPL-2 or later.
- */
+#include <config.h> +#include <asm/arch/imx-regs.h>
+#define HAB_RVT_ENTRY 0x98 +#define HAB_RVT_FAIL_SAFE_VECT 0xbc +#define HAB_RVT_LOAD_DATA 0xc8
+#define HDR_SELF_PTR 0x14 +#define HDR_BOOT_DATA 0x20 +#define HDR_IMAGE_LEN 0x24
+#define L2X0_CTRL 0x100 +#define SCU_CONFIG 0x004
+/*
- Disable L2 cache because ROM will turn it on when a plugin is used.
- There are cache coherence problems if cache is on when Linux kernel
- expects it to be off.
- */
+.macro disable_l2_cache
- ldr r1, =L2_BASE_ADDR
- mov r0, #0x0
- str r0, [r1, #L2X0_CTRL]
+.endm
+/*
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
- */
+plugin_start: +/* Save the return address and the function arguments */
- push {r0-r8, lr}
+/* r0-r2 must be >= 0x100 and must be 4 byte aligned */
- cmp r0, #0x100
- cmphs r1, #0x100
- cmphs r2, #0x100
+/* rCPU: 22 - mx6q, 12 - mx6dl, 12|0x100 - solo, 2 - sololite */ +#define rCPU r2 +#define rIomux r3 +#define rVal0 r4 /* mx6q value */ +#define rVal1 r5 /* mx6dl value */ +#define rVal2 r6 /* mx6solo value */ +#define rVal3 r7 /* mx6sololite value */ +#define rFlag lr +#define rTable r8
- orr rFlag, r0, r1
- orr rFlag, rFlag, r2
- orrlo rFlag, rFlag, #1
- mov rCPU, #22 /* mx6q */
- mov r1, #SCU_BASE_ADDR
- ldr r0, [r1, #SCU_CONFIG]
- and r0, r0, #3
- cmp r0, #3 /* is mx6q? */
- movne rCPU, #12 /* mx6dl */
- cmpne r0, #1 /* is mx6dl? */
- movne rCPU, #2 /* mx6 sololite */
- ldrne r1, =ANATOP_BASE_ADDR
- ldrne r0, [r1, #0x280]
- movne r0, r0, LSR #16
- cmpne r0, #0x60 /* is mx6 Sololite? */
- movne rCPU, #12 | 0x100 /* Solo */
Ok - until here you have checked which processor is running. Now the more obscure code:
- mov rVal0, #0
- mov rVal1, #0
- mov rVal2, #0
- mov rVal3, #0
- ldr rIomux, =IOMUXC_BASE_ADDR
- adr rTable, mx6_table
- b 3f
+1: movs r0, r1, LSR #30
- beq 2f
- mov r1, r1, LSL rCPU
- movs r1, r1, LSR #32-10
- addne r1, rIomux, r1, LSL #2
- cmp r0, #3
- subne r0, r0, #1
- orr r1, r1, r0
The reason is to write GPR12 ? But why do we need a plugin for that ? I do not understand why we cannot do it in the initialization code of the SOC, as we usually do.
+2: ands r0, r1, #3
- bic r1, r1, #3
- ldrne rVal0, [rTable], #4
- movne rVal1, rVal0
- movne rVal2, rVal0
- movne rVal3, rVal0
- subnes r0, r0, #1
- ldrne rVal1, [rTable], #4
- movne rVal2, rVal1
- movne rVal3, rVal1
- subnes r0, r0, #1
- ldrne rVal2, [rTable], #4
- ldrne rVal3, [rTable], #4
- mov r0, rVal0
- cmp rCPU, #22
- movne r0, rVal1
- cmpne rCPU, #12
- movne r0, rVal2
- cmpne rCPU, #12|0x100
- movne r0, rVal3
- cmp r1, #0
- strne r0, [r1]
+3: ldr r1, [rTable], #4
- cmp r1, #0
- bne 1b
- tst rFlag, #3
- bne 4f /* Branch if not called as plugin */
+/* Align end of table to 64 byte boundary */
- sub rTable, rTable, #1
- orr rTable, rTable, #0x3f
- add rTable, rTable, #1
- ldr r2, [rTable, #HDR_SELF_PTR]
- ldr r0, [rTable, #HDR_BOOT_DATA]
- ldr r1, [rTable, #HDR_IMAGE_LEN]
- sub rTable, r2, r0
- mov r2, r0
- mov r3, r1
- mov r4, #0
- push {r0-r4}
- mov r0, #HAB_RVT_LOAD_DATA
- ldr r4, [r0]
- mov r0, sp
- add r1, sp, #4
- add r2, sp, #8
- blx r4
Sorry, I need help to understand this code
- disable_l2_cache
- pop {r4, r5}
- add sp, sp, #12
- pop {r0-r3}
+/*
- Before returning to ROM, we need to fill the return values arguments
- to our function.
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
As the i.MX and the API suggest, it should be possible to write C code for a plugin. Or am I wrong ?
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 8834c59..5c133b2 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -48,6 +48,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_BASE_ADDR 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000
This is useful in any case. I suggest you put this define in a separate patch, that can flow independently into mainline.
Best regards, Stefano Babic
On 09/23/2012 03:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Hi Stefano,
It seems that there's some general confusion on the list, so I think a little more background and commentary is in order.
The primary rationale for plugins is to allow separate link maps in a single image loaded by the BootROM.
The idea is to allow first-level code to initialize resources (usually DDR) while running in internal RAM, then return to the boot rom for further image loading (typically into DDR). This prevents the need for the first-level code to support all boot sources (SPI-NOR, NAND, SD card, etc) and allows it to focus on machine setup.
The feature is normally needed to allow the first level to access a PMIC. I'm surprised that the 51evk and 53Loco boards aren't using it.
Troy's rationale for using it now is to enable a single image on i.MX6Quad, Dual lite and Solo processors, which have very slight initialization differences. The 6Solo processor has 32-bit DDR bus, so it would otherwise require a separate binary.
By doing this in code (plugin), we can introduce a conditional based on processor type and have a single image that will boot on any of the three.
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6Q
Note that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
Regards,
Eric
On 23/09/2012 18:23, Eric Nelson wrote:
On 09/23/2012 03:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Hi Stefano,
It seems that there's some general confusion on the list, so I think a little more background and commentary is in order.
Well, it is - thanks for explanation.
The primary rationale for plugins is to allow separate link maps in a single image loaded by the BootROM.
The idea is to allow first-level code to initialize resources (usually DDR) while running in internal RAM, then return to the boot rom for further image loading (typically into DDR). This prevents the need for the first-level code to support all boot sources (SPI-NOR, NAND, SD card, etc) and allows it to focus on machine setup.
The feature is normally needed to allow the first level to access a PMIC. I'm surprised that the 51evk and 53Loco boards aren't using it.
The mx51 uses a V1 header and the plugin feature is not supported at all. So, it can't, simply. The mx53 can, but it is not needed. Both boards boot without plugin. So it seem we have a misunderstanding, and thanks to raise this issue ;-)
The setup is done by the SOC interpreting the DCD data into the iMX header. After this setup, that in any case cannot be very long, the control is still taken by the bootROM, that copies data from the media device to the DDR according to the values set into the iMX header. Still without plugin. After the copy, the bootROM gives the control to U-Boot for the rest that starts with the usual initialization.
There is no need to setup the pMIC on mx51evk and mx53qsb to get the DDR running. However, even if we need it, we can do it in another way, as I will explain now.
Troy's rationale for using it now is to enable a single image on i.MX6Quad, Dual lite and Solo processors, which have very slight initialization differences. The 6Solo processor has 32-bit DDR bus, so it would otherwise require a separate binary.
By doing this in code (plugin), we can introduce a conditional based on processor type and have a single image that will boot on any of the three.
Ok - but why cannot this check be done directly by U-Boot ?
My understanding is that you want to add a plugin written in assembly to allow different setup of the DDR controller. Let's see how we can do with standard U-Boot code.
Core of the startup is that the SOC copies itself some code into the internal RAM and started. This is done by bootROM, running is own code and running the plugin.
We have already this mechanism with the SPL framework. The big advantage for this approach is that the same mechanism can be used on SOC of different vendors, while the one in this series is a solution strictly bound with (some) Freescale's SOC.
The imx header can be still adapted to copy the SPL code into the internal RAM. When SPL is running, you have all freedom to check which is the CPU running and to adjust your DDR setting, and everything is C code. Both MX5 and MX6 have plenty of internal RAM to do this, because SPL requires ~30KB.
I think the goal to have the same U-Boot binary can be reached using the SPL framework. As you are running U-Boot code, you have the possibility to do whatever you want.
So my question is: if the main reason is to have a single image for all your iMX6 boards, why cannot we do it in a standard way using SPL ?
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6QNote that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
However, you can do it with this approach:
- you have a general imx header, that does not write into IOMUX It is your choice if this should set the DDR or not. You could also decide to have an empty DCD table. - your imx Header is generated for your SPL code, and the destination address for the SPL code is put into internal RAM - the bootROM will start reading the iMX header and DCD data and copies data from media (NAND, SPI, ..) into iRAM. There is no need for any special setup because the iRAM is always available. Then it gives the control to the SPL. - the SPL starts and performs the setup of the DDR, checking the SOC if it is required. The usual SOC initialization is done here. - At the end, the SPL loads from media the U-Boot or directly the kernel and starts it. Or whatever image you want.
The further advantage we can have with this approach is that we can profit for further development in u-boot. What I mean really is using TPL, that means putting u-boot into a UBL volume, see:
http://lists.celinuxforum.org/pipermail/celinux-dev/2012-April/000543.html
I know there is not yet activity on this topic, but it does not mean we have not in future.
Best regards, Stefano Babic
On 09/23/2012 10:08 AM, Stefano Babic wrote:
On 23/09/2012 18:23, Eric Nelson wrote:
On 09/23/2012 03:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Hi Stefano,
It seems that there's some general confusion on the list, so I think a little more background and commentary is in order.
Well, it is - thanks for explanation.
The primary rationale for plugins is to allow separate link maps in a single image loaded by the BootROM.
The idea is to allow first-level code to initialize resources (usually DDR) while running in internal RAM, then return to the boot rom for further image loading (typically into DDR). This prevents the need for the first-level code to support all boot sources (SPI-NOR, NAND, SD card, etc) and allows it to focus on machine setup.
The feature is normally needed to allow the first level to access a PMIC. I'm surprised that the 51evk and 53Loco boards aren't using it.
The mx51 uses a V1 header and the plugin feature is not supported at all. So, it can't, simply. The mx53 can, but it is not needed. Both boards boot without plugin. So it seem we have a misunderstanding, and thanks to raise this issue ;-)
The setup is done by the SOC interpreting the DCD data into the iMX header. After this setup, that in any case cannot be very long, the control is still taken by the bootROM, that copies data from the media device to the DDR according to the values set into the iMX header. Still without plugin. After the copy, the bootROM gives the control to U-Boot for the rest that starts with the usual initialization.
There is no need to setup the pMIC on mx51evk and mx53qsb to get the DDR running. However, even if we need it, we can do it in another way, as I will explain now.
Troy's rationale for using it now is to enable a single image on i.MX6Quad, Dual lite and Solo processors, which have very slight initialization differences. The 6Solo processor has 32-bit DDR bus, so it would otherwise require a separate binary.
By doing this in code (plugin), we can introduce a conditional based on processor type and have a single image that will boot on any of the three.
Ok - but why cannot this check be done directly by U-Boot ?
My understanding is that you want to add a plugin written in assembly to allow different setup of the DDR controller. Let's see how we can do with standard U-Boot code.
Core of the startup is that the SOC copies itself some code into the internal RAM and started. This is done by bootROM, running is own code and running the plugin.
We have already this mechanism with the SPL framework. The big advantage for this approach is that the same mechanism can be used on SOC of different vendors, while the one in this series is a solution strictly bound with (some) Freescale's SOC.
The imx header can be still adapted to copy the SPL code into the internal RAM. When SPL is running, you have all freedom to check which is the CPU running and to adjust your DDR setting, and everything is C code. Both MX5 and MX6 have plenty of internal RAM to do this, because SPL requires ~30KB.
This is the part that gets interesting.
You're right that SPL **can** do the job, but only if it supports the boot media. For the most part, it's reasonable to expect the code to be written in U-Boot for that, since the boot media may also be used to load kernels, RAM disks and the like.
But what about the serial boot modes (especially USB)? We likely wouldn't implement them (we haven't yet pulled in USB slave support) and to paraphrase US bumper stickers:
You can take imx_usb away from me when you pry it from my cold dead hands ;)
If you're not aware of imx_usb, it's a utility that Troy wrote to allow download over the boot ROM's USB protocol.
Some commentary is here: http://boundarydevices.com/unbricking-nitrogen6x-sabre-lite-i-mx6-board/
The sources are here (requires libusb): https://github.com/boundarydevices/imx_usb_loader
I think the goal to have the same U-Boot binary can be reached using the SPL framework. As you are running U-Boot code, you have the possibility to do whatever you want.
So my question is: if the main reason is to have a single image for all your iMX6 boards, why cannot we do it in a standard way using SPL ?
The related question is whether or not the benefits of a single image is worth the carrying cost.
This is probably more useful for those who boot directly to SD card, where the cost of creation or modification of the SD card is high.
Since our boards are booting to SPI-NOR, I'm not completely convinced.
It seems that simply creating three targets for each is okay, since we know what processor we placed on the board and our boot mode switches make it relatively easy to recover from a screw-up.
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6QNote that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
However, you can do it with this approach:
- you have a general imx header, that does not write into IOMUX
It is your choice if this should set the DDR or not. You could also decide to have an empty DCD table.
- your imx Header is generated for your SPL code, and the destination
address for the SPL code is put into internal RAM
- the bootROM will start reading the iMX header and DCD data and copies
data from media (NAND, SPI, ..) into iRAM. There is no need for any special setup because the iRAM is always available. Then it gives the control to the SPL.
- the SPL starts and performs the setup of the DDR, checking the SOC if
it is required. The usual SOC initialization is done here.
- At the end, the SPL loads from media the U-Boot or directly the kernel
and starts it. Or whatever image you want.
The further advantage we can have with this approach is that we can profit for further development in u-boot. What I mean really is using TPL, that means putting u-boot into a UBL volume, see:
http://lists.celinuxforum.org/pipermail/celinux-dev/2012-April/000543.html
I know there is not yet activity on this topic, but it does not mean we have not in future.
This is a good conversation to have.
Regards,
Eric
On 24/09/2012 01:29, Eric Nelson wrote:
This is the part that gets interesting.
You're right that SPL **can** do the job, but only if it supports the boot media. For the most part, it's reasonable to expect the code to be written in U-Boot for that, since the boot media may also be used to load kernels, RAM disks and the like.
But what about the serial boot modes (especially USB)? We likely wouldn't implement them (we haven't yet pulled in USB slave support) and to paraphrase US bumper stickers:
You can take imx_usb away from me when you pry it from my cold dead hands ;)If you're not aware of imx_usb, it's a utility that Troy wrote to allow download over the boot ROM's USB protocol.
Some commentary is here: http://boundarydevices.com/unbricking-nitrogen6x-sabre-lite-i-mx6-board/
The sources are here (requires libusb): https://github.com/boundarydevices/imx_usb_loader
Nice job ! This is very valuable tool !
But I do not get the connection with the imximage and the need for the plugin. If the SOC boots with "Serial Downloader", it polls the USB OTG waiting for command as specified in the protocol. With your tool you set the registers you need and you can download the file you want, independently from the structure of the imxImage.
By the way, I have missed that Troy had implemented this tool - thanks for the tipp and to share it !
I think the goal to have the same U-Boot binary can be reached using the SPL framework. As you are running U-Boot code, you have the possibility to do whatever you want.
So my question is: if the main reason is to have a single image for all your iMX6 boards, why cannot we do it in a standard way using SPL ?
The related question is whether or not the benefits of a single image is worth the carrying cost.
I have interpreted from your answers that it was a goal for you. I think the costs are higher than the benefits.
This is probably more useful for those who boot directly to SD card, where the cost of creation or modification of the SD card is high.
Since our boards are booting to SPI-NOR, I'm not completely convinced.
It seems that simply creating three targets for each is okay, since we know what processor we placed on the board and our boot mode switches make it relatively easy to recover from a screw-up.
Fully agree.
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6QNote that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
However, you can do it with this approach:
- you have a general imx header, that does not write into IOMUX
It is your choice if this should set the DDR or not. You could also decide to have an empty DCD table.
- your imx Header is generated for your SPL code, and the destination
address for the SPL code is put into internal RAM
- the bootROM will start reading the iMX header and DCD data and copies
data from media (NAND, SPI, ..) into iRAM. There is no need for any special setup because the iRAM is always available. Then it gives the control to the SPL.
- the SPL starts and performs the setup of the DDR, checking the SOC if
it is required. The usual SOC initialization is done here.
- At the end, the SPL loads from media the U-Boot or directly the kernel
and starts it. Or whatever image you want.
The further advantage we can have with this approach is that we can profit for further development in u-boot. What I mean really is using TPL, that means putting u-boot into a UBL volume, see:
http://lists.celinuxforum.org/pipermail/celinux-dev/2012-April/000543.html
I know there is not yet activity on this topic, but it does not mean we have not in future.
This is a good conversation to have.
Best regards, Stefano
Hi Stefano,
On 09/24/2012 12:22 AM, Stefano Babic wrote:
On 24/09/2012 01:29, Eric Nelson wrote:
This is the part that gets interesting.
You're right that SPL **can** do the job, but only if it supports the boot media. For the most part, it's reasonable to expect the code to be written in U-Boot for that, since the boot media may also be used to load kernels, RAM disks and the like.
But what about the serial boot modes (especially USB)? We likely wouldn't implement them (we haven't yet pulled in USB slave support) and to paraphrase US bumper stickers:
You can take imx_usb away from me when you pry it from my cold dead hands ;)If you're not aware of imx_usb, it's a utility that Troy wrote to allow download over the boot ROM's USB protocol.
Some commentary is here: http://boundarydevices.com/unbricking-nitrogen6x-sabre-lite-i-mx6-board/
The sources are here (requires libusb): https://github.com/boundarydevices/imx_usb_loader
Nice job ! This is very valuable tool !
But I do not get the connection with the imximage and the need for the plugin. If the SOC boots with "Serial Downloader", it polls the USB OTG waiting for command as specified in the protocol. With your tool you set the registers you need and you can download the file you want, independently from the structure of the imxImage.
The relationship is this: if we build a combined SPL image for a universal i.MX6 U-Boot, how would it know/decide that it's being loaded via USB and how would it support this?
imx_usb supports plugins, so we can use it directly with that approach.
By the way, I have missed that Troy had implemented this tool - thanks for the tipp and to share it !
NP.
It really helps the compile/test cycle time, especially when used with the 'bmode usb' command.
I think the goal to have the same U-Boot binary can be reached using the SPL framework. As you are running U-Boot code, you have the possibility to do whatever you want.
So my question is: if the main reason is to have a single image for all your iMX6 boards, why cannot we do it in a standard way using SPL ?
The related question is whether or not the benefits of a single image is worth the carrying cost.
I have interpreted from your answers that it was a goal for you. I think the costs are higher than the benefits.
This is probably more useful for those who boot directly to SD card, where the cost of creation or modification of the SD card is high.
Since our boards are booting to SPI-NOR, I'm not completely convinced.
It seems that simply creating three targets for each is okay, since we know what processor we placed on the board and our boot mode switches make it relatively easy to recover from a screw-up.
Fully agree.
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6QNote that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
However, you can do it with this approach:
- you have a general imx header, that does not write into IOMUX
It is your choice if this should set the DDR or not. You could also decide to have an empty DCD table.
- your imx Header is generated for your SPL code, and the destination
address for the SPL code is put into internal RAM
- the bootROM will start reading the iMX header and DCD data and copies
data from media (NAND, SPI, ..) into iRAM. There is no need for any special setup because the iRAM is always available. Then it gives the control to the SPL.
- the SPL starts and performs the setup of the DDR, checking the SOC if
it is required. The usual SOC initialization is done here.
- At the end, the SPL loads from media the U-Boot or directly the kernel
and starts it. Or whatever image you want.
The further advantage we can have with this approach is that we can profit for further development in u-boot. What I mean really is using TPL, that means putting u-boot into a UBL volume, see:
http://lists.celinuxforum.org/pipermail/celinux-dev/2012-April/000543.html
I know there is not yet activity on this topic, but it does not mean we have not in future.
This is a good conversation to have.
Best regards, Stefano
On 24/09/2012 15:48, Eric Nelson wrote:
Hi Stefano,
Hi Eric,
But I do not get the connection with the imximage and the need for the plugin. If the SOC boots with "Serial Downloader", it polls the USB OTG waiting for command as specified in the protocol. With your tool you set the registers you need and you can download the file you want, independently from the structure of the imxImage.
The relationship is this: if we build a combined SPL image for a universal i.MX6 U-Boot, how would it know/decide that it's being loaded via USB and how would it support this?
imx_usb supports plugins, so we can use it directly with that approach.
But this seems to me an implementation choice rather a constraint of the SOC. As I see in your code, imx_usb parses the iMX header making decisions according to it. Then there is a hard dependency between imx_usb and u-boot code.
The other way is that they are independently, let's say, openOCD approach ;-).
imx_usb could get an independent file to configure the DDR controller (for example, but it is not limited to), and then load a u-boot (or SPL, or...) where you want. Then there is no strict dependency with the imx_usb tool. The SOC allows this approach, too.
Best regards, Stefano
On 9/23/2012 10:08 AM, Stefano Babic wrote:
On 23/09/2012 18:23, Eric Nelson wrote:
On 09/23/2012 03:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Hi Stefano,
It seems that there's some general confusion on the list, so I think a little more background and commentary is in order.
Well, it is - thanks for explanation.
The primary rationale for plugins is to allow separate link maps in a single image loaded by the BootROM.
The idea is to allow first-level code to initialize resources (usually DDR) while running in internal RAM, then return to the boot rom for further image loading (typically into DDR). This prevents the need for the first-level code to support all boot sources (SPI-NOR, NAND, SD card, etc) and allows it to focus on machine setup.
The feature is normally needed to allow the first level to access a PMIC. I'm surprised that the 51evk and 53Loco boards aren't using it.
The mx51 uses a V1 header and the plugin feature is not supported at all. So, it can't, simply. The mx53 can, but it is not needed. Both boards boot without plugin. So it seem we have a misunderstanding, and thanks to raise this issue ;-)
The setup is done by the SOC interpreting the DCD data into the iMX header. After this setup, that in any case cannot be very long, the control is still taken by the bootROM, that copies data from the media device to the DDR according to the values set into the iMX header. Still without plugin. After the copy, the bootROM gives the control to U-Boot for the rest that starts with the usual initialization.
There is no need to setup the pMIC on mx51evk and mx53qsb to get the DDR running. However, even if we need it, we can do it in another way, as I will explain now.
Troy's rationale for using it now is to enable a single image on i.MX6Quad, Dual lite and Solo processors, which have very slight initialization differences. The 6Solo processor has 32-bit DDR bus, so it would otherwise require a separate binary.
By doing this in code (plugin), we can introduce a conditional based on processor type and have a single image that will boot on any of the three.
Ok - but why cannot this check be done directly by U-Boot ?
My understanding is that you want to add a plugin written in assembly to allow different setup of the DDR controller. Let's see how we can do with standard U-Boot code.
Core of the startup is that the SOC copies itself some code into the internal RAM and started. This is done by bootROM, running is own code and running the plugin.
We have already this mechanism with the SPL framework. The big advantage for this approach is that the same mechanism can be used on SOC of different vendors, while the one in this series is a solution strictly bound with (some) Freescale's SOC.
The imx header can be still adapted to copy the SPL code into the internal RAM. When SPL is running, you have all freedom to check which is the CPU running and to adjust your DDR setting, and everything is C code. Both MX5 and MX6 have plenty of internal RAM to do this, because SPL requires ~30KB.
I think the goal to have the same U-Boot binary can be reached using the SPL framework. As you are running U-Boot code, you have the possibility to do whatever you want.
So my question is: if the main reason is to have a single image for all your iMX6 boards, why cannot we do it in a standard way using SPL ?
The other key change for these processors is the location of the iomux controller (moved on 6Solo/Duallite from 6Quad).
6Solo has 32-bit DDR and iomux controller moved from 6Q 6Duallite has 64-bit DDR but same iomux location as 6QNote that this highlights a slight down side to the plugin approach.
Because of the movement of the iomux controller, we can't use a universal i.MX6 image header to write any IOMUX registers through imximage.cfg.
However, you can do it with this approach:
- you have a general imx header, that does not write into IOMUX
It is your choice if this should set the DDR or not. You could also decide to have an empty DCD table.
- your imx Header is generated for your SPL code, and the destination
address for the SPL code is put into internal RAM
- the bootROM will start reading the iMX header and DCD data and copies
data from media (NAND, SPI, ..) into iRAM. There is no need for any special setup because the iRAM is always available. Then it gives the control to the SPL.
- the SPL starts and performs the setup of the DDR, checking the SOC if
it is required. The usual SOC initialization is done here.
- At the end, the SPL loads from media the U-Boot or directly the kernel
and starts it. Or whatever image you want.
The further advantage we can have with this approach is that we can profit for further development in u-boot. What I mean really is using TPL, that means putting u-boot into a UBL volume, see:
http://lists.celinuxforum.org/pipermail/celinux-dev/2012-April/000543.html
I know there is not yet activity on this topic, but it does not mean we have not in future.
Best regards, Stefano Babic
The advantages of a plugin over spl are 1. smaller code 0x190 bytes, plus the table. relying on the ROM to do the heavy lifting.
2. support all boot modes that the ROM does. NOR/NAND/ONENAND/MMC/eMMC Hard Disk and SSD devices using SATA Serial ROM through SPI/I2C
3. Easy to switch back to previous DCD tables for debugging or permanently. I can see that many people will never use either plugin or SPL and will stick with the current method, or have separate cfg files for each processor type. I could still have the separate cfg files #include a common file. ie #define FOR_MX6Q #include "imx-common.cfg" ------------ #define FOR_MX6DL #include "imx-common.cfg"
4. plugin method is already working.
Let me know which features might make it to mainline 1. variable length headers 2. parsing of cfg to pull the file, instead of push 3. C preprocessor 4. expression evaluation. 5 plugins
and I'll post a new series.
Thanks Troy
On 25/09/2012 00:23, Troy Kisky wrote:
The advantages of a plugin over spl are
- smaller code 0x190 bytes, plus the table.
relying on the ROM to do the heavy lifting.
This is true. However, as you are writing in the next line, the bootROM boots from devices having much more space as some bytes. Even on small SPI-NOR (the smallest device I used with MX5), this was not an issue.
On the other side, you cannot influence the behavior of the bootROM, and much more job is let to the bootROM, less possibilities to fix some things. SPL is part of U-Boot, all sources are availbale and it is easier to fix.
- support all boot modes that the ROM does. NOR/NAND/ONENAND/MMC/eMMC
Hard Disk and SSD devices using SATA Serial ROM through SPI/I2C
I do not know about booting from SATA, if a plugin is a must - but this means that it fixes a problem in the bootROM. Apart of that, there are no hardware limitation that avoi to use SPL with these media devices.
- Easy to switch back to previous DCD tables
for debugging or permanently. I can see that many people will never use either plugin or SPL
I think you are talking specifically about mainlined i.MX boards. This is correct, because patches to make SPL available will be merged now. But if we see U-Boot in its globality, quite all TI's boards have a SPL.
and will stick with the current method, or have separate cfg files for each processor type. I could still have the separate cfg files #include a common file. ie #define FOR_MX6Q #include "imx-common.cfg"
Using common file is a practice we should improve, definitely. But it has nothing to do with plugin. Agree that similar boards and / or SOCs should better share code.
#define FOR_MX6DL #include "imx-common.cfg"
- plugin method is already working.
ok, this is right
Let me know which features might make it to mainline
- variable length headers
Absolutely yes !
- parsing of cfg to pull the file, instead of push
- C preprocessor
Yes, I agree with you that it is useful. As you said, using #define make it more readable.
- expression evaluation.
As you posted previously, this depends on plugin.
5 plugins
Currently, I do not see that plugin is strictly required and can move iMX away from the rest of U-Boot development.
and I'll post a new series.
Ok, thanks.
Best regards, Stefano
On 9/23/2012 3:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Now that we have some basis, why do we need this mechanism to boot this board ? Is it not possible to make the same initialization directly in u-boot ?
In principle, this adds stil some code that is not so easy to maintain.
I can add to README.imximage. But I'm beginning to doubt if plugins are going to be accepted at all.
arch/arm/cpu/armv7/mx6/Makefile | 5 +- arch/arm/cpu/armv7/mx6/plugin.S | 164 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + 3 files changed, 169 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/mx6/plugin.S
diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..b1fce4e 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -33,11 +33,14 @@ SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) plugin.bin
$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))
+plugin.bin: plugin.o
- $(OBJCOPY) -O binary --gap-fill 0xff $< $@
If we add a plugin mechanism, we can have several plugins (booting directly from Net, maybe ?). We should then have a general mechanism. A directory "plugins" here can contain the code, and it is compiled only if a CONFIG_ is set or better if required from imximage.cfg
CONFIG_xx I understand, but can you describe an implementation from imximage.cfg?
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/armv7/mx6/plugin.S b/arch/arm/cpu/armv7/mx6/plugin.S new file mode 100644 index 0000000..99c6b20 --- /dev/null +++ b/arch/arm/cpu/armv7/mx6/plugin.S @@ -0,0 +1,164 @@ +/*
- Copyright (C) 2012 Boundary Devices Inc.
- Licensed under the GPL-2 or later.
- */
+#include <config.h> +#include <asm/arch/imx-regs.h>
+#define HAB_RVT_ENTRY 0x98 +#define HAB_RVT_FAIL_SAFE_VECT 0xbc +#define HAB_RVT_LOAD_DATA 0xc8
+#define HDR_SELF_PTR 0x14 +#define HDR_BOOT_DATA 0x20 +#define HDR_IMAGE_LEN 0x24
+#define L2X0_CTRL 0x100 +#define SCU_CONFIG 0x004
+/*
- Disable L2 cache because ROM will turn it on when a plugin is used.
- There are cache coherence problems if cache is on when Linux kernel
- expects it to be off.
- */
+.macro disable_l2_cache
- ldr r1, =L2_BASE_ADDR
- mov r0, #0x0
- str r0, [r1, #L2X0_CTRL]
+.endm
+/*
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
- */
+plugin_start: +/* Save the return address and the function arguments */
- push {r0-r8, lr}
+/* r0-r2 must be >= 0x100 and must be 4 byte aligned */
- cmp r0, #0x100
- cmphs r1, #0x100
- cmphs r2, #0x100
+/* rCPU: 22 - mx6q, 12 - mx6dl, 12|0x100 - solo, 2 - sololite */ +#define rCPU r2 +#define rIomux r3 +#define rVal0 r4 /* mx6q value */ +#define rVal1 r5 /* mx6dl value */ +#define rVal2 r6 /* mx6solo value */ +#define rVal3 r7 /* mx6sololite value */ +#define rFlag lr +#define rTable r8
- orr rFlag, r0, r1
- orr rFlag, rFlag, r2
- orrlo rFlag, rFlag, #1
- mov rCPU, #22 /* mx6q */
- mov r1, #SCU_BASE_ADDR
- ldr r0, [r1, #SCU_CONFIG]
- and r0, r0, #3
- cmp r0, #3 /* is mx6q? */
- movne rCPU, #12 /* mx6dl */
- cmpne r0, #1 /* is mx6dl? */
- movne rCPU, #2 /* mx6 sololite */
- ldrne r1, =ANATOP_BASE_ADDR
- ldrne r0, [r1, #0x280]
- movne r0, r0, LSR #16
- cmpne r0, #0x60 /* is mx6 Sololite? */
- movne rCPU, #12 | 0x100 /* Solo */
Ok - until here you have checked which processor is running. Now the more obscure code:
- mov rVal0, #0
- mov rVal1, #0
- mov rVal2, #0
- mov rVal3, #0
- ldr rIomux, =IOMUXC_BASE_ADDR
- adr rTable, mx6_table
- b 3f
+1: movs r0, r1, LSR #30
- beq 2f
- mov r1, r1, LSL rCPU
- movs r1, r1, LSR #32-10
- addne r1, rIomux, r1, LSL #2
- cmp r0, #3
- subne r0, r0, #1
- orr r1, r1, r0
The reason is to write GPR12 ? But why do we need a plugin for that ? I do not understand why we cannot do it in the initialization code of the SOC, as we usually do.
This is not GPR12. The address value from the cfg file is actually 3 addresses. One for mx6q, one for mx6 duallite/solo, one for mx6 sololite. Each is specified as a 10 bit field which we use as a 12 bit offset within IOMUXC_BASE_ADDR (A0/A1 forced to 0).
+2: ands r0, r1, #3
- bic r1, r1, #3
- ldrne rVal0, [rTable], #4
- movne rVal1, rVal0
- movne rVal2, rVal0
- movne rVal3, rVal0
- subnes r0, r0, #1
- ldrne rVal1, [rTable], #4
- movne rVal2, rVal1
- movne rVal3, rVal1
- subnes r0, r0, #1
- ldrne rVal2, [rTable], #4
- ldrne rVal3, [rTable], #4
- mov r0, rVal0
- cmp rCPU, #22
- movne r0, rVal1
- cmpne rCPU, #12
- movne r0, rVal2
- cmpne rCPU, #12|0x100
- movne r0, rVal3
- cmp r1, #0
- strne r0, [r1]
+3: ldr r1, [rTable], #4
- cmp r1, #0
- bne 1b
- tst rFlag, #3
- bne 4f /* Branch if not called as plugin */
+/* Align end of table to 64 byte boundary */
- sub rTable, rTable, #1
- orr rTable, rTable, #0x3f
- add rTable, rTable, #1
- ldr r2, [rTable, #HDR_SELF_PTR]
- ldr r0, [rTable, #HDR_BOOT_DATA]
- ldr r1, [rTable, #HDR_IMAGE_LEN]
- sub rTable, r2, r0
- mov r2, r0
- mov r3, r1
- mov r4, #0
- push {r0-r4}
- mov r0, #HAB_RVT_LOAD_DATA
- ldr r4, [r0]
- mov r0, sp
- add r1, sp, #4
- add r2, sp, #8
- blx r4
Sorry, I need help to understand this code
Now that DDR is initialized, this is calling back into the ROM code so that it can finish loading u-boot.
- disable_l2_cache
- pop {r4, r5}
- add sp, sp, #12
- pop {r0-r3}
+/*
- Before returning to ROM, we need to fill the return values arguments
- to our function.
- plugin_start(void **start, size_t *bytes, UINT32 *ivt_offset)
As the i.MX and the API suggest, it should be possible to write C code for a plugin. Or am I wrong ?
I don't see why not. But this code is currently position independent. It would be nice to maintain that.
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 8834c59..5c133b2 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -48,6 +48,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_BASE_ADDR 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000
This is useful in any case. I suggest you put this define in a separate patch, that can flow independently into mainline.
Best regards, Stefano Babic
Hmm, do you suggest moving the L2 disable code to another spot as well ?
On 24/09/2012 22:46, Troy Kisky wrote:
On 9/23/2012 3:17 AM, Stefano Babic wrote:
On 22/09/2012 04:39, Troy Kisky wrote:
The "plugin" command of mkimage can take this file as an argument.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
I agree with Vikram that a better explanation of what a plugin is can help to understand without reading deeply into the i.MX6 manual.
So a "plugin" is a chunk of code that can be called directly by the BootROM of i.MX processors supporting V2 version of the i.MX header. In my understanding, this is supported by i.MX53, too. After the plugin run, the control is returned to the BootROM.
Now that we have some basis, why do we need this mechanism to boot this board ? Is it not possible to make the same initialization directly in u-boot ?
In principle, this adds stil some code that is not so easy to maintain.
I can add to README.imximage. But I'm beginning to doubt if plugins are going to be accepted at all.
I have several doubts about using the plugin. First at all, this make the development of new iMX completely different as the rest of U-boot. Plugin ist a feature so strictly bounded to the Freescale's iMX. The risk here is that U-Boot imx diverges from the other SOCs, while we are currently in a phase where we want to uniform as much as possible the behavior with different architectures.
I am also not convinced why introducing the plugin is strictly required. Reading Eric's answer, I get that costs for having and maintaing a single image U-boot for different boards overcomes the benefits, and I fully agree with him. But reading your patch and from your explanation of plugin code, I understand that the plugin is used to detect which CPU is running, and then to set differently registers, because offsets are different. So the goal is again to have a single image.
+1: movs r0, r1, LSR #30
- beq 2f
- mov r1, r1, LSL rCPU
- movs r1, r1, LSR #32-10
- addne r1, rIomux, r1, LSL #2
- cmp r0, #3
- subne r0, r0, #1
- orr r1, r1, r0
The reason is to write GPR12 ? But why do we need a plugin for that ? I do not understand why we cannot do it in the initialization code of the SOC, as we usually do.
This is not GPR12. The address value from the cfg file is actually 3 addresses. One for mx6q, one for mx6 duallite/solo, one for mx6 sololite. Each is specified as a 10 bit field which we use as a 12 bit offset within IOMUXC_BASE_ADDR (A0/A1 forced to 0).
Ok, thanks for explanation - I had not understood before.
@@ -48,6 +48,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_BASE_ADDR 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000
This is useful in any case. I suggest you put this define in a separate patch, that can flow independently into mainline.
Hmm, do you suggest moving the L2 disable code to another spot as well ?
Easier - I suggest you put this define in a separate patch, because it can be accessed by other U-Boot code as well.
Best regards, Stefano Babic
This allows us to generate plugin data or DCD rom style data simply by defining USE_PLUGIN
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 177 ++++++++++++++++++ board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 248 +++++++++++++------------- 2 files changed, 304 insertions(+), 121 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h
diff --git a/arch/arm/include/asm/arch-mx6/imx-mkimage.h b/arch/arm/include/asm/arch-mx6/imx-mkimage.h new file mode 100644 index 0000000..be71983 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/imx-mkimage.h @@ -0,0 +1,177 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#ifndef __ASM_ARCH_IMX_MKIMAGE_H__ +#define __ASM_ARCH_IMX_MKIMAGE_H__ + +/* mx6 duallite and solo have same offsets */ +/* + * Bits 31:30 : + * 0 : 29:2 absolute address, 1:0 # of data values, + * followed by 0,1,2,4 data values + * 0 means repeat last data value + * 1 : iomuxc relative address, 9:0 mx6q offset, 19:10 mx6dl/solo offset, + * 29:20 mx6_sololite offset, 0 offset means skip if this processor + * previous data repeated + * 2 : same as 1, but single data value follows + * 3 : same as 1, but 4 data values follow + * + * data order is mx6q, mx6dl, mx6solo, mx6_sololite + * if no data given, repeat previous line data + * if not all data given, repeat prior value + */ +#define MA(mx6q, mx6dl_solo, mx6sololite) ((mx6q / 4 & 0x3ff) | \ + ((mx6dl_solo / 4 & 0x3ff) * 0x400) | \ + ((mx6sololite / 4 & 0x3ff) * 0x100000)) + +#define IOM_DRAM_DQM0 MA(0x5ac, 0x470, 0x0) +#define IOM_DRAM_DQM1 MA(0x5b4, 0x474, 0x0) +#define IOM_DRAM_DQM2 MA(0x528, 0x478, 0x0) +#define IOM_DRAM_DQM3 MA(0x520, 0x47c, 0x0) +#define IOM_DRAM_DQM4 MA(0x514, 0x480, 0x0) +#define IOM_DRAM_DQM5 MA(0x510, 0x484, 0x0) +#define IOM_DRAM_DQM6 MA(0x5bc, 0x488, 0x0) +#define IOM_DRAM_DQM7 MA(0x5c4, 0x48c, 0x0) + +#define IOM_DRAM_CAS MA(0x56c, 0x464, 0x0) +#define IOM_DRAM_RAS MA(0x578, 0x490, 0x0) +#define IOM_DRAM_RESET MA(0x57c, 0x494, 0x0) +#define IOM_DRAM_SDCLK_0 MA(0x588, 0x4ac, 0x0) +#define IOM_DRAM_SDCLK_1 MA(0x594, 0x4b0, 0x0) +#define IOM_DRAM_SDBA2 MA(0x58c, 0x4a0, 0x0) +#define IOM_DRAM_SDCKE0 MA(0x590, 0x4a4, 0x0) +#define IOM_DRAM_SDCKE1 MA(0x598, 0x4a8, 0x0) +#define IOM_DRAM_SDODT0 MA(0x59c, 0x4b4, 0x0) +#define IOM_DRAM_SDODT1 MA(0x5a0, 0x4b8, 0x0) + +#define IOM_DRAM_SDQS0 MA(0x5a8, 0x4bc, 0x0) +#define IOM_DRAM_SDQS1 MA(0x5b0, 0x4c0, 0x0) +#define IOM_DRAM_SDQS2 MA(0x524, 0x4c4, 0x0) +#define IOM_DRAM_SDQS3 MA(0x51c, 0x4c8, 0x0) +#define IOM_DRAM_SDQS4 MA(0x518, 0x4cc, 0x0) +#define IOM_DRAM_SDQS5 MA(0x50c, 0x4d0, 0x0) +#define IOM_DRAM_SDQS6 MA(0x5b8, 0x4d4, 0x0) +#define IOM_DRAM_SDQS7 MA(0x5c0, 0x4d8, 0x0) + +#define IOM_GRP_B0DS MA(0x784, 0x764, 0x0) +#define IOM_GRP_B1DS MA(0x788, 0x770, 0x0) +#define IOM_GRP_B2DS MA(0x794, 0x778, 0x0) +#define IOM_GRP_B3DS MA(0x79c, 0x77c, 0x0) +#define IOM_GRP_B4DS MA(0x7a0, 0x780, 0x0) +#define IOM_GRP_B5DS MA(0x7a4, 0x784, 0x0) +#define IOM_GRP_B6DS MA(0x7a8, 0x78c, 0x0) +#define IOM_GRP_B7DS MA(0x748, 0x748, 0x0) +#define IOM_GRP_ADDDS MA(0x74c, 0x74c, 0x0) +#define IOM_DDRMODE_CTL MA(0x750, 0x750, 0x0) +#define IOM_GRP_DDRPKE MA(0x758, 0x754, 0x0) +#define IOM_GRP_DDRMODE MA(0x774, 0x760, 0x0) +#define IOM_GRP_CTLDS MA(0x78c, 0x76c, 0x0) +#define IOM_GRP_DDR_TYPE MA(0x798, 0x774, 0x0) + +#define MMDC_P0 0x021b0000 +#define MMDC_P1 0x021b4000 +#define IOMUXC_BASE_ADDR 0x020e0000 +#define CCM_BASE 0x020C4000 +#define IRAM_FREE_START 0x00907000 + +#define IOMUXC_GPR4 (IOMUXC_BASE_ADDR + 0x010) +#define IOMUXC_GPR6 (IOMUXC_BASE_ADDR + 0x018) +#define IOMUXC_GPR7 (IOMUXC_BASE_ADDR + 0x01c) + +#define MMDC_MDCTL 0x000 +#define MMDC_MDPDC 0x004 +#define MMDC_MDOTC 0x008 +#define MMDC_MDCFG0 0x00c +#define MMDC_MDCFG1 0x010 +#define MMDC_MDCFG2 0x014 +#define MMDC_MDMISC 0x018 +#define MMDC_MDSCR 0x01c +#define MMDC_MDREF 0x020 +#define MMDC_MDRWD 0x02c +#define MMDC_MDOR 0x030 +#define MMDC_MDASP 0x040 +#define MMDC_MAPSR 0x404 +#define MMDC_MPZQHWCTRL 0x800 +#define MMDC_MPWLDECTRL0 0x80c +#define MMDC_MPWLDECTRL1 0x810 +#define MMDC_MPODTCTRL 0x818 +#define MMDC_MPRDDQBY0DL 0x81c +#define MMDC_MPRDDQBY1DL 0x820 +#define MMDC_MPRDDQBY2DL 0x824 +#define MMDC_MPRDDQBY3DL 0x828 +#define MMDC_MPDGCTRL0 0x83c +#define MMDC_MPDGCTRL1 0x840 +#define MMDC_MPRDDLCTL 0x848 +#define MMDC_MPWRDLCTL 0x850 +#define MMDC_MPMUR0 0x8b8 + +#define CCM_CCGR0 0x068 +#define CCM_CCGR1 0x06c +#define CCM_CCGR2 0x070 +#define CCM_CCGR3 0x074 +#define CCM_CCGR4 0x078 +#define CCM_CCGR5 0x07c +#define CCM_CCGR6 0x080 + + +#ifdef USE_PLUGIN +#define IOMUX_ENTRY(addr, args...) iomux_entry addr, args +#define IOMUX_ENTRY1(addr, q) IOMUX_ENTRY(addr, q) +#define IOMUX_ENTRY2(addr, q, dl) IOMUX_ENTRY(addr, q, dl) +#define IOMUX_ENTRY3(addr, q, dl, solo) IOMUX_ENTRY(addr, q, dl, solo) +#define IOMUX_ENTRY4(addr, q, dl, solo, sl) IOMUX_ENTRY(addr, q, dl, solo, sl) +#define WRITE_ENTRY(addr, args...) write_entry addr, args +#define WRITE_ENTRY1(addr, q) WRITE_ENTRY(addr, q) +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY(addr, q, dl) +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY(addr, q, dl, solo) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY(addr, q, dl, solo, sl) +#else + +#define IOMUX_ADDR(addr, div) (IOMUXC_BASE_ADDR + \ + ((((addr) / (div)) & 0x3ff) * 4)) +#define IOMUX_ENTRY1(addr, q) DATA 4, IOMUX_ADDR(addr, _FOR_DIV), q +#define WRITE_ENTRY1(addr, q) DATA 4, addr, q +#ifdef FOR_MX6Q +#define _FOR_DIV 1 +#define IOMUX_ENTRY2(addr, q, dl) IOMUX_ENTRY1(addr, q) +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, q) +#define IOMUX_ENTRY3(addr, q, dl, solo) IOMUX_ENTRY1(addr, q) +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, q) +#define IOMUX_ENTRY4(addr, q, dl, solo, sl) IOMUX_ENTRY1(addr, q) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, q) +#else + +#define IOMUX_ENTRY2(addr, q, dl) IOMUX_ENTRY1(addr, dl) +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, dl) +#ifdef FOR_MX6DL +#define _FOR_DIV 0x400 +#define IOMUX_ENTRY3(addr, q, dl, solo) IOMUX_ENTRY1(addr, dl) +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, dl) +#define IOMUX_ENTRY4(addr, q, dl, solo, sl) IOMUX_ENTRY1(addr, dl) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, dl) +#else + +#define IOMUX_ENTRY3(addr, q, dl, solo) IOMUX_ENTRY1(addr, solo) +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, solo) +#ifdef FOR_MX6SOLO +#define _FOR_DIV 0x400 +#define IOMUX_ENTRY4(addr, q, dl, solo, sl) IOMUX_ENTRY1(addr, solo) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, solo) +#else + +#define IOMUX_ENTRY4(addr, q, dl, solo, sl) IOMUX_ENTRY1(addr, sl) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, sl) +#ifdef FOR_MX6SOLOLITE +#define _FOR_DIV 0x100000 +#else + +#error "Please select cpu" +#endif /* FOR_MX6SOLOLITE */ +#endif /* FOR_MX6SOLO */ +#endif /* FOR_MX6DL */ +#endif /* FOR_MX6Q */ +#endif /* USE_PLUGIN */ + +#endif /*__ASM_ARCH_IMX_MKIMAGE_H__ */ diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index c86cd40..a95831f 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -25,6 +25,9 @@ * * The syntax is taken as close as possible with the kwbimage */ +#define FOR_MX6Q + +#include <asm/arch/imx-mkimage.h>
/* image version */ IMAGE_VERSION 2 @@ -35,6 +38,9 @@ IMAGE_VERSION 2 */ BOOT_FROM sd
+#ifdef USE_PLUGIN + plugin IRAM_FREE_START+0x42c arch/arm/cpu/armv7/mx6/plugin.bin +#endif /* * Device Configuration Data (DCD) * @@ -46,129 +52,129 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ -DATA 4 0x020e05a8 0x00000030 -DATA 4 0x020e05b0 0x00000030 -DATA 4 0x020e0524 0x00000030 -DATA 4 0x020e051c 0x00000030 - -DATA 4 0x020e0518 0x00000030 -DATA 4 0x020e050c 0x00000030 -DATA 4 0x020e05b8 0x00000030 -DATA 4 0x020e05c0 0x00000030 - -DATA 4 0x020e05ac 0x00020030 -DATA 4 0x020e05b4 0x00020030 -DATA 4 0x020e0528 0x00020030 -DATA 4 0x020e0520 0x00020030 - -DATA 4 0x020e0514 0x00020030 -DATA 4 0x020e0510 0x00020030 -DATA 4 0x020e05bc 0x00020030 -DATA 4 0x020e05c4 0x00020030 - -DATA 4 0x020e056c 0x00020030 -DATA 4 0x020e0578 0x00020030 -DATA 4 0x020e0588 0x00020030 -DATA 4 0x020e0594 0x00020030 - -DATA 4 0x020e057c 0x00020030 -DATA 4 0x020e0590 0x00003000 -DATA 4 0x020e0598 0x00003000 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e0788 0x00000030 - -DATA 4 0x020e0794 0x00000030 -DATA 4 0x020e079c 0x00000030 -DATA 4 0x020e07a0 0x00000030 -DATA 4 0x020e07a4 0x00000030 - -DATA 4 0x020e07a8 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 - -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 - -DATA 4 0x021b0018 0x00081740 - -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7975 -DATA 4 0x021b0010 0xFF538E64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x005B0E21 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 - -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x0408803A -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x0000803B -DATA 4 0x021b001c 0x00428031 -DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x09408030 -DATA 4 0x021b001c 0x09408038 - -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b001c 0x04008048 -DATA 4 0x021b0800 0xA1380003 -DATA 4 0x021b4800 0xA1380003 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00022227 -DATA 4 0x021b4818 0x00022227 - -DATA 4 0x021b083c 0x434B0350 -DATA 4 0x021b0840 0x034C0359 -DATA 4 0x021b483c 0x434B0350 -DATA 4 0x021b4840 0x03650348 -DATA 4 0x021b0848 0x4436383B -DATA 4 0x021b4848 0x39393341 -DATA 4 0x021b0850 0x35373933 -DATA 4 0x021b4850 0x48254A36 - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x00440044 -DATA 4 0x021b4810 0x00440044 - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b001c 0x00000000 -DATA 4 0x021b0404 0x00011006 +IOMUX_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS3, 0x00000030) + +IOMUX_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) +IOMUX_ENTRY1(IOM_DRAM_SDQS7, 0x00000030) + +IOMUX_ENTRY1(IOM_DRAM_DQM0, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM1, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM2, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM3, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_DQM4, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM5, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM6, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_DQM7, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_CAS, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_RAS, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030) + +IOMUX_ENTRY1(IOM_DRAM_RESET, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) +IOMUX_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) +IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000) + +IOMUX_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) +IOMUX_ENTRY1(IOM_DRAM_SDODT1, 0x00003030) +IOMUX_ENTRY1(IOM_GRP_B0DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B1DS, 0x00000030) + +IOMUX_ENTRY1(IOM_GRP_B2DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B3DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B4DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B5DS, 0x00000030) + +IOMUX_ENTRY1(IOM_GRP_B6DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B7DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +IOMUX_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) + +IOMUX_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +IOMUX_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) +IOMUX_ENTRY1(IOM_GRP_CTLDS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG0, 0x555A7975) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG2, 0x01FF00DB) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDRWD, 0x000026D2) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDOR, 0x005B0E21) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDOTC, 0x09444040) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00025576) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDASP, 0x00000027) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCTL, 0x831A0000) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04088032) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0408803A) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0000803B) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428031) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428039) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408038) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008048) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDREF, 0x00005800) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPODTCTRL, 0x00022227) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F) + +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MPMUR0, 0x00000800) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPMUR0, 0x00000800) + +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00000000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MAPSR, 0x00011006)
/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF +WRITE_ENTRY1(CCM_BASE + CCM_CCGR0, 0x00C03F3F) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR1, 0x0030FC03) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR2, 0x0FFFC000) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR3, 0x3FF00000) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR4, 0x00FFF300) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR5, 0x0F0000C3) +WRITE_ENTRY1(CCM_BASE + CCM_CCGR6, 0x000003FF)
/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF +WRITE_ENTRY1(IOMUXC_GPR4, 0xF00000CF) /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F +WRITE_ENTRY1(IOMUXC_GPR6, 0x007F007F) +WRITE_ENTRY1(IOMUXC_GPR7, 0x007F007F)
Enabling plugin mode seems to require this additional memory write for ddr3 initialization.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index a95831f..eea8d3a 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -111,6 +111,8 @@ WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333) +/* MDPDC - CKE pulse width = 3 cycles. CKSRE = 6 cycles, CKSRX = 6 cycles */ +WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00020036)
WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740)
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index eea8d3a..2af4265 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -26,7 +26,7 @@ * The syntax is taken as close as possible with the kwbimage */ #define FOR_MX6Q - +#define USE_PLUGIN #include <asm/arch/imx-mkimage.h>
/* image version */
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 56 ++++++++++++++++++++++---- 1 file changed, 48 insertions(+), 8 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 2af4265..3a1f1bc 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -56,7 +56,6 @@ IOMUX_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS3, 0x00000030) - IOMUX_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) @@ -66,7 +65,6 @@ IOMUX_ENTRY1(IOM_DRAM_DQM0, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM1, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM2, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM3, 0x00020030) - IOMUX_ENTRY1(IOM_DRAM_DQM4, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM5, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM6, 0x00020030) @@ -84,67 +82,108 @@ IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
IOMUX_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) IOMUX_ENTRY1(IOM_DRAM_SDODT1, 0x00003030) + IOMUX_ENTRY1(IOM_GRP_B0DS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_B1DS, 0x00000030) - IOMUX_ENTRY1(IOM_GRP_B2DS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_B3DS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_B4DS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_B5DS, 0x00000030) - IOMUX_ENTRY1(IOM_GRP_B6DS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_B7DS, 0x00000030) + IOMUX_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +/* (differential input) */ IOMUX_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) - +/* disable ddr pullups */ IOMUX_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +/* (differential input) */ IOMUX_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ IOMUX_ENTRY1(IOM_GRP_CTLDS, 0x00000030) IOMUX_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000)
+/* Read data DQ Byte0-3 delay */ WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY3DL, 0x33333333) - WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333) + /* MDPDC - CKE pulse width = 3 cycles. CKSRE = 6 cycles, CKSRX = 6 cycles */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00020036)
+/* + * MDMISC, mirroring, interleaved (row/bank/col) + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740)
+/* + * MDSCR, con_req + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008000) +/* + * MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks + * tXP=4 clocks, tXPDLL=13 clocks + * tFAW=24 clocks, cas=8 cycles + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG0, 0x555A7975) +/* + * MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8 + * tMRD=4, tCWL=6 + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64) +/* + * MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4 + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0 + MMDC_MDRWD, 0x000026D2)
WRITE_ENTRY1(MMDC_P0 + MMDC_MDOR, 0x005B0E21) WRITE_ENTRY1(MMDC_P0 + MMDC_MDOTC, 0x09444040) WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00025576) + +/* + * Mx6Q - 64 bit wide ddr + * last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) = + * 1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27 + */ +/* MDASP, CS0_END */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDASP, 0x00000027) +/* + * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8, width=64/32bit + * mx6q : row+col+bank+width=14+10+3+3=30 = 1G + */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCTL, 0x831A0000)
+/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04088032) WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0408803A) +/* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033) WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0000803B) +/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428031) WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428039) +/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030) WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408038)
+/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008048) WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003) WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003) + +/* MDREF, 32KHz refresh, 4 refeshes each */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDREF, 0x00005800) WRITE_ENTRY1(MMDC_P0 + MMDC_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227)
+/* MPDGCTRL0/1 DQS GATE*/ WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350) WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350) @@ -153,17 +192,18 @@ WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341) WRITE_ENTRY1(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933) WRITE_ENTRY1(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36) - WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F) WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F) - WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044) WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044)
+/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0 + MMDC_MPMUR0, 0x00000800) WRITE_ENTRY1(MMDC_P1 + MMDC_MPMUR0, 0x00000800)
+/* MDSCR, enable ddr */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00000000) +/* MAPSR, 1024 cycles idle before self-refresh */ WRITE_ENTRY1(MMDC_P0 + MMDC_MAPSR, 0x00011006)
/* set the default clock gate to save power */
Bits 19-18 of IOMUXC_IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET should be 3 for DDR3 mode. The current value of 0 is reserved in TRM.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 3a1f1bc..904276a 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -75,7 +75,7 @@ IOMUX_ENTRY1(IOM_DRAM_RAS, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030)
-IOMUX_ENTRY1(IOM_DRAM_RESET, 0x00020030) +IOMUX_ENTRY1(IOM_DRAM_RESET, 0x000e0030) IOMUX_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) IOMUX_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
Sabrelite does not have memory associated with CS1
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 904276a..18cdb7b 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -161,20 +161,15 @@ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCTL, 0x831A0000)
/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04088032) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0408803A) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x0000803B) /* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428031) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428039) /* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408038)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008048) WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003) WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003)
Repeating data values can be stored more efficiently.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 31 +++++++++++++------------- 1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 18cdb7b..00712c6 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -60,6 +60,17 @@ IOMUX_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS7, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B0DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B1DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B2DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B3DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B4DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B5DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B6DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_B7DS, 0x00000030) +IOMUX_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +IOMUX_ENTRY1(IOM_GRP_CTLDS, 0x00000030)
IOMUX_ENTRY1(IOM_DRAM_DQM0, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_DQM1, 0x00020030) @@ -78,29 +89,17 @@ IOMUX_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030) IOMUX_ENTRY1(IOM_DRAM_RESET, 0x000e0030) IOMUX_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) IOMUX_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) -IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
IOMUX_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) IOMUX_ENTRY1(IOM_DRAM_SDODT1, 0x00003030)
-IOMUX_ENTRY1(IOM_GRP_B0DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B1DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B2DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B3DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B4DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B5DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B6DS, 0x00000030) -IOMUX_ENTRY1(IOM_GRP_B7DS, 0x00000030) - -IOMUX_ENTRY1(IOM_GRP_ADDDS, 0x00000030) /* (differential input) */ IOMUX_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) -/* disable ddr pullups */ -IOMUX_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) /* (differential input) */ IOMUX_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) -/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ -IOMUX_ENTRY1(IOM_GRP_CTLDS, 0x00000030) +/* disable ddr pullups */ +IOMUX_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +IOMUX_ENTRY1(IOM_DRAM_SDBA2, 0x00000000) IOMUX_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000)
/* Read data DQ Byte0-3 delay */ @@ -180,8 +179,8 @@ WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348) WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341)
Hi Troy,
On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Repeating data values can be stored more efficiently.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
I am not a ddr init expert, but my understanding is that the DDR init sequence is important and probably we should keep it as is.
Regards,
Fabio Estevam
On 9/22/2012 10:27 AM, Fabio Estevam wrote:
Hi Troy,
On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Repeating data values can be stored more efficiently.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
I am not a ddr init expert, but my understanding is that the DDR init sequence is important and probably we should keep it as is.
Regards,
Fabio Estevam
The order of writes to IOMUXC registers is not important, other than to be finished before accessing the DDR chips.
Troy
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 00712c6..60eae86 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -169,8 +169,8 @@ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1380003) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1390003) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1390003)
/* MDREF, 32KHz refresh, 4 refeshes each */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDREF, 0x00005800)
Add function to return the processor type.
i.e. MX6Q, MX6DL, MX6SOLO, MX6SOLOLITE
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/cpu/armv7/mx6/soc.c | 26 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/sys_proto.h | 6 ++++++ 2 files changed, 32 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 7380ffe..5fce682 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -44,6 +44,32 @@ u32 get_cpu_rev(void) return system_rev; }
+struct scu_regs { + uint32_t ctrl; + uint32_t config; + uint32_t status; + uint32_t invalidate; + uint32_t fpga_rev; +}; + +signed char cpu_type[] = {MXC_CPU_MX6SOLO, MXC_CPU_MX6DL, -1, MXC_CPU_MX6Q}; + +int get_cpu_type(void) +{ + struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR; + uint32_t reg = readl(&scu->config) & 3; + int type = cpu_type[reg]; + + if (!reg) { + u32 cpu_type = readl(ANATOP_BASE_ADDR + 0x280); + + cpu_type >>= 16; + if (cpu_type == 0x60) + type = MXC_CPU_MX6SL; /* this is a soloLite */ + } + return type; +} + void init_aips(void) { struct aipstz_regs *aips1, *aips2; diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 711b30d..997fc8e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -28,6 +28,12 @@
u32 get_cpu_rev(void);
+#define MXC_CPU_MX6SL 60 +#define MXC_CPU_MX6DL 61 +#define MXC_CPU_MX6SOLO 62 +#define MXC_CPU_MX6Q 63 + +int get_cpu_type(void); void set_vddsoc(u32 mv);
/*
Hi Troy,
On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Add function to return the processor type.
i.e. MX6Q, MX6DL, MX6SOLO, MX6SOLOLITE
On arch/arm/imx-common/cpu.c we have:
static const char *get_imx_type(u32 imxtype) { switch (imxtype) { case 0x63: return "6Q"; /* Quad-core version of the mx6 */ case 0x61: return "6DS"; /* Dual/Solo version of the mx6 */ case 0x60: return "6SL"; /* Solo-Lite version of the mx6 */ case 0x51: return "51"; case 0x53: return "53"; default: return "??"; } }
,which seems to serve the same purpose.
Regards,
Fabio Estevam
On 9/21/2012 7:50 PM, Fabio Estevam wrote:
Hi Troy,
On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Add function to return the processor type.
i.e. MX6Q, MX6DL, MX6SOLO, MX6SOLOLITE
On arch/arm/imx-common/cpu.c we have:
static const char *get_imx_type(u32 imxtype) { switch (imxtype) { case 0x63: return "6Q"; /* Quad-core version of the mx6 */ case 0x61: return "6DS"; /* Dual/Solo version of the mx6 */ case 0x60: return "6SL"; /* Solo-Lite version of the mx6 */ case 0x51: return "51"; case 0x53: return "53"; default: return "??"; } }
,which seems to serve the same purpose.
Regards,
Fabio Estevam
No, not similar to get_imx_type, but it is similar to get_cpu_rev.
I guess I should fix get_imx_type, and get_cpu_rev, instead of adding a new one.
Thanks for the heads up! Troy
On 22/09/2012 19:07, Troy Kisky wrote:
On 9/21/2012 7:50 PM, Fabio Estevam wrote:
Hi Troy,
On Fri, Sep 21, 2012 at 11:39 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Add function to return the processor type.
i.e. MX6Q, MX6DL, MX6SOLO, MX6SOLOLITE
On arch/arm/imx-common/cpu.c we have:
static const char *get_imx_type(u32 imxtype) { switch (imxtype) { case 0x63: return "6Q"; /* Quad-core version of the mx6 */ case 0x61: return "6DS"; /* Dual/Solo version of the mx6 */ case 0x60: return "6SL"; /* Solo-Lite version of the mx6 */ case 0x51: return "51"; case 0x53: return "53"; default: return "??"; } }
,which seems to serve the same purpose.
Regards,
Fabio Estevam
No, not similar to get_imx_type, but it is similar to get_cpu_rev.
I guess I should fix get_imx_type, and get_cpu_rev, instead of adding a new one.
Indeed. Try to use as much as possible code in imx-common, avoiding to duplicate code.
Best regards, Stefano
Only the values used in the sabrelite board are added currently. Add more as other boards use them.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h new file mode 100644 index 0000000..5848013 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h @@ -0,0 +1,118 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + */ + +#ifndef __ASM_ARCH_MX6_MX6DL_PINS_H__ +#define __ASM_ARCH_MX6_MX6DL_PINS_H__ + +#include <asm/imx-common/iomux-v3.h> + +/* Use to set PAD control */ +#define PAD_CTL_HYS (1 << 16) +#define PAD_CTL_PUS_100K_DOWN (0 << 14) +#define PAD_CTL_PUS_47K_UP (1 << 14) +#define PAD_CTL_PUS_100K_UP (2 << 14) +#define PAD_CTL_PUS_22K_UP (3 << 14) + +#define PAD_CTL_PUE (1 << 13) +#define PAD_CTL_PKE (1 << 12) +#define PAD_CTL_ODE (1 << 11) +#define PAD_CTL_SPEED_LOW (1 << 6) +#define PAD_CTL_SPEED_MED (2 << 6) +#define PAD_CTL_SPEED_HIGH (3 << 6) +#define PAD_CTL_DSE_DISABLE (0 << 3) +#define PAD_CTL_DSE_240ohm (1 << 3) +#define PAD_CTL_DSE_120ohm (2 << 3) +#define PAD_CTL_DSE_80ohm (3 << 3) +#define PAD_CTL_DSE_60ohm (4 << 3) +#define PAD_CTL_DSE_48ohm (5 << 3) +#define PAD_CTL_DSE_40ohm (6 << 3) +#define PAD_CTL_DSE_34ohm (7 << 3) +#define PAD_CTL_SRE_FAST (1 << 0) +#define PAD_CTL_SRE_SLOW (0 << 0) + +#define IOMUX_CONFIG_SION 0x10 +#define NO_MUX_I 0 +#define NO_PAD_I 0 +enum { + MX6DL_PAD_EIM_D16__ECSPI1_SCLK = IOMUX_PAD(0x0514, 0x0144, 1, 0x07D8, 2, 0), + MX6DL_PAD_EIM_D17__ECSPI1_MISO = IOMUX_PAD(0x0518, 0x0148, 1, 0x07DC, 2, 0), + MX6DL_PAD_EIM_D18__ECSPI1_MOSI = IOMUX_PAD(0x051C, 0x014C, 1, 0x07E0, 2, 0), + MX6DL_PAD_EIM_D19__GPIO_3_19 = IOMUX_PAD(0x0520, 0x0150, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D21__GPIO_3_21 = IOMUX_PAD(0x0528, 0x0158, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D21__I2C1_SCL = IOMUX_PAD(0x0528, 0x0158, 6 | IOMUX_CONFIG_SION, 0x0868, 1, 0), + MX6DL_PAD_EIM_D23__GPIO_3_23 = IOMUX_PAD(0x0530, 0x0160, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D26__UART2_TXD = IOMUX_PAD(0x053C, 0x016C, 4, 0x0000, 0, 0), + MX6DL_PAD_EIM_D27__UART2_RXD = IOMUX_PAD(0x0540, 0x0170, 4, 0x0904, 1, 0), + MX6DL_PAD_EIM_D28__I2C1_SDA = IOMUX_PAD(0x0544, 0x0174, 1 | IOMUX_CONFIG_SION, 0x086C, 1, 0), + MX6DL_PAD_EIM_D28__GPIO_3_28 = IOMUX_PAD(0x0544, 0x0174, 5, 0x0000, 0, 0), + MX6DL_PAD_ENET_MDC__ENET_MDC = IOMUX_PAD(0x05B8, 0x01E8, 1, 0x0000, 0, 0), + MX6DL_PAD_ENET_MDIO__ENET_MDIO = IOMUX_PAD(0x05BC, 0x01EC, 1, 0x0810, 0, 0), + MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK = IOMUX_PAD(0x05C0, 0x01F0, 1, 0x0000, 0, 0), + MX6DL_PAD_ENET_RXD0__GPIO_1_27 = IOMUX_PAD(0x05C8, 0x01F8, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_16__GPIO_7_11 = IOMUX_PAD(0x05E4, 0x0214, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_16__I2C3_SDA = IOMUX_PAD(0x05E4, 0x0214, 6 | IOMUX_CONFIG_SION, 0x087C, 1, 0), + MX6DL_PAD_GPIO_17__GPIO_7_12 = IOMUX_PAD(0x05E8, 0x0218, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_18__GPIO_7_13 = IOMUX_PAD(0x05EC, 0x021C, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_19__GPIO_4_5 = IOMUX_PAD(0x05F0, 0x0220, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_5__GPIO_1_5 = IOMUX_PAD(0x0600, 0x0230, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_5__I2C3_SCL = IOMUX_PAD(0x0600, 0x0230, 6 | IOMUX_CONFIG_SION, 0x0878, 2, 0), + MX6DL_PAD_KEY_COL3__I2C2_SCL = IOMUX_PAD(0x0638, 0x0250, 4 | IOMUX_CONFIG_SION, 0x0870, 1, 0), + MX6DL_PAD_KEY_COL3__GPIO_4_12 = IOMUX_PAD(0x0638, 0x0250, 5, 0x0000, 0, 0), + MX6DL_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x064C, 0x0264, 4 | IOMUX_CONFIG_SION, 0x0874, 1, 0), + MX6DL_PAD_KEY_ROW3__GPIO_4_13 = IOMUX_PAD(0x064C, 0x0264, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D1__GPIO_2_1 = IOMUX_PAD(0x0670, 0x0288, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D2__GPIO_2_2 = IOMUX_PAD(0x0674, 0x028C, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D3__GPIO_2_3 = IOMUX_PAD(0x0678, 0x0290, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D4__GPIO_2_4 = IOMUX_PAD(0x067C, 0x0294, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D6__GPIO_2_6 = IOMUX_PAD(0x0684, 0x029C, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD0__ENET_RGMII_RD0 = IOMUX_PAD(0x0694, 0x02AC, 1, 0x0818, 1, 0), + MX6DL_PAD_RGMII_RD0__GPIO_6_25 = IOMUX_PAD(0x0694, 0x02AC, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD1__ENET_RGMII_RD1 = IOMUX_PAD(0x0698, 0x02B0, 1, 0x081C, 1, 0), + MX6DL_PAD_RGMII_RD1__GPIO_6_27 = IOMUX_PAD(0x0698, 0x02B0, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD2__ENET_RGMII_RD2 = IOMUX_PAD(0x069C, 0x02B4, 1, 0x0820, 1, 0), + MX6DL_PAD_RGMII_RD2__GPIO_6_28 = IOMUX_PAD(0x069C, 0x02B4, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD3__ENET_RGMII_RD3 = IOMUX_PAD(0x06A0, 0x02B8, 1, 0x0824, 1, 0), + MX6DL_PAD_RGMII_RD3__GPIO_6_29 = IOMUX_PAD(0x06A0, 0x02B8, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL = IOMUX_PAD(0x06A4, 0x02BC, 1, 0x0828, 1, 0), + MX6DL_PAD_RGMII_RX_CTL__GPIO_6_24 = IOMUX_PAD(0x06A4, 0x02BC, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RXC__ENET_RGMII_RXC = IOMUX_PAD(0x06A8, 0x02C0, 1, 0x0814, 1, 0), + MX6DL_PAD_RGMII_RXC__GPIO_6_30 = IOMUX_PAD(0x06A8, 0x02C0, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD0__ENET_RGMII_TD0 = IOMUX_PAD(0x06AC, 0x02C4, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD1__ENET_RGMII_TD1 = IOMUX_PAD(0x06B0, 0x02C8, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD2__ENET_RGMII_TD2 = IOMUX_PAD(0x06B4, 0x02CC, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD3__ENET_RGMII_TD3 = IOMUX_PAD(0x06B8, 0x02D0, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL = IOMUX_PAD(0x06BC, 0x02D4, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TXC__ENET_RGMII_TXC = IOMUX_PAD(0x06C0, 0x02D8, 1, 0x0000, 0, 0), + MX6DL_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x06F4, 0x030C, 0, 0x0934, 1, 0), + MX6DL_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x06F8, 0x0310, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x06FC, 0x0314, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 = IOMUX_PAD(0x0700, 0x0318, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 = IOMUX_PAD(0x0704, 0x031C, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 = IOMUX_PAD(0x0708, 0x0320, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT5__GPIO_7_0 = IOMUX_PAD(0x0710, 0x0328, 5, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT6__UART1_RXD = IOMUX_PAD(0x0714, 0x032C, 1, 0x08FC, 2, 0), + MX6DL_PAD_SD3_DAT7__UART1_TXD = IOMUX_PAD(0x0718, 0x0330, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_CLK__USDHC4_CLK = IOMUX_PAD(0x0720, 0x0338, 0, 0x0938, 1, 0), + MX6DL_PAD_SD4_CMD__USDHC4_CMD = IOMUX_PAD(0x0724, 0x033C, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 = IOMUX_PAD(0x0728, 0x0340, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 = IOMUX_PAD(0x072C, 0x0344, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 = IOMUX_PAD(0x0730, 0x0348, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 = IOMUX_PAD(0x0734, 0x034C, 1, 0x0000, 0, 0), +}; +#endif /* __ASM_ARCH_MX6_MX6DL_PINS_H__ */
On 9/22/2012 8:09 AM, Troy Kisky wrote:
Only the values used in the sabrelite board are added currently. Add more as other boards use them.
Though there are no users, better add it for completeness. This should also avoid people patching this file often.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h new file mode 100644 index 0000000..5848013 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h @@ -0,0 +1,118 @@ +/*
- Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
+#ifndef __ASM_ARCH_MX6_MX6DL_PINS_H__ +#define __ASM_ARCH_MX6_MX6DL_PINS_H__
+#include<asm/imx-common/iomux-v3.h>
+/* Use to set PAD control */ +#define PAD_CTL_HYS (1<< 16) +#define PAD_CTL_PUS_100K_DOWN (0<< 14) +#define PAD_CTL_PUS_47K_UP (1<< 14) +#define PAD_CTL_PUS_100K_UP (2<< 14) +#define PAD_CTL_PUS_22K_UP (3<< 14)
+#define PAD_CTL_PUE (1<< 13) +#define PAD_CTL_PKE (1<< 12) +#define PAD_CTL_ODE (1<< 11) +#define PAD_CTL_SPEED_LOW (1<< 6) +#define PAD_CTL_SPEED_MED (2<< 6) +#define PAD_CTL_SPEED_HIGH (3<< 6) +#define PAD_CTL_DSE_DISABLE (0<< 3) +#define PAD_CTL_DSE_240ohm (1<< 3) +#define PAD_CTL_DSE_120ohm (2<< 3) +#define PAD_CTL_DSE_80ohm (3<< 3) +#define PAD_CTL_DSE_60ohm (4<< 3) +#define PAD_CTL_DSE_48ohm (5<< 3) +#define PAD_CTL_DSE_40ohm (6<< 3) +#define PAD_CTL_DSE_34ohm (7<< 3) +#define PAD_CTL_SRE_FAST (1<< 0) +#define PAD_CTL_SRE_SLOW (0<< 0)
+#define IOMUX_CONFIG_SION 0x10 +#define NO_MUX_I 0 +#define NO_PAD_I 0 +enum {
- MX6DL_PAD_EIM_D16__ECSPI1_SCLK = IOMUX_PAD(0x0514, 0x0144, 1, 0x07D8, 2, 0),
- MX6DL_PAD_EIM_D17__ECSPI1_MISO = IOMUX_PAD(0x0518, 0x0148, 1, 0x07DC, 2, 0),
- MX6DL_PAD_EIM_D18__ECSPI1_MOSI = IOMUX_PAD(0x051C, 0x014C, 1, 0x07E0, 2, 0),
- MX6DL_PAD_EIM_D19__GPIO_3_19 = IOMUX_PAD(0x0520, 0x0150, 5, 0x0000, 0, 0),
- MX6DL_PAD_EIM_D21__GPIO_3_21 = IOMUX_PAD(0x0528, 0x0158, 5, 0x0000, 0, 0),
- MX6DL_PAD_EIM_D21__I2C1_SCL = IOMUX_PAD(0x0528, 0x0158, 6 | IOMUX_CONFIG_SION, 0x0868, 1, 0),
- MX6DL_PAD_EIM_D23__GPIO_3_23 = IOMUX_PAD(0x0530, 0x0160, 5, 0x0000, 0, 0),
- MX6DL_PAD_EIM_D26__UART2_TXD = IOMUX_PAD(0x053C, 0x016C, 4, 0x0000, 0, 0),
- MX6DL_PAD_EIM_D27__UART2_RXD = IOMUX_PAD(0x0540, 0x0170, 4, 0x0904, 1, 0),
- MX6DL_PAD_EIM_D28__I2C1_SDA = IOMUX_PAD(0x0544, 0x0174, 1 | IOMUX_CONFIG_SION, 0x086C, 1, 0),
- MX6DL_PAD_EIM_D28__GPIO_3_28 = IOMUX_PAD(0x0544, 0x0174, 5, 0x0000, 0, 0),
- MX6DL_PAD_ENET_MDC__ENET_MDC = IOMUX_PAD(0x05B8, 0x01E8, 1, 0x0000, 0, 0),
- MX6DL_PAD_ENET_MDIO__ENET_MDIO = IOMUX_PAD(0x05BC, 0x01EC, 1, 0x0810, 0, 0),
- MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK = IOMUX_PAD(0x05C0, 0x01F0, 1, 0x0000, 0, 0),
- MX6DL_PAD_ENET_RXD0__GPIO_1_27 = IOMUX_PAD(0x05C8, 0x01F8, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_16__GPIO_7_11 = IOMUX_PAD(0x05E4, 0x0214, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_16__I2C3_SDA = IOMUX_PAD(0x05E4, 0x0214, 6 | IOMUX_CONFIG_SION, 0x087C, 1, 0),
- MX6DL_PAD_GPIO_17__GPIO_7_12 = IOMUX_PAD(0x05E8, 0x0218, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_18__GPIO_7_13 = IOMUX_PAD(0x05EC, 0x021C, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_19__GPIO_4_5 = IOMUX_PAD(0x05F0, 0x0220, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_5__GPIO_1_5 = IOMUX_PAD(0x0600, 0x0230, 5, 0x0000, 0, 0),
- MX6DL_PAD_GPIO_5__I2C3_SCL = IOMUX_PAD(0x0600, 0x0230, 6 | IOMUX_CONFIG_SION, 0x0878, 2, 0),
- MX6DL_PAD_KEY_COL3__I2C2_SCL = IOMUX_PAD(0x0638, 0x0250, 4 | IOMUX_CONFIG_SION, 0x0870, 1, 0),
- MX6DL_PAD_KEY_COL3__GPIO_4_12 = IOMUX_PAD(0x0638, 0x0250, 5, 0x0000, 0, 0),
- MX6DL_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x064C, 0x0264, 4 | IOMUX_CONFIG_SION, 0x0874, 1, 0),
- MX6DL_PAD_KEY_ROW3__GPIO_4_13 = IOMUX_PAD(0x064C, 0x0264, 5, 0x0000, 0, 0),
- MX6DL_PAD_NANDF_D1__GPIO_2_1 = IOMUX_PAD(0x0670, 0x0288, 5, 0x0000, 0, 0),
- MX6DL_PAD_NANDF_D2__GPIO_2_2 = IOMUX_PAD(0x0674, 0x028C, 5, 0x0000, 0, 0),
- MX6DL_PAD_NANDF_D3__GPIO_2_3 = IOMUX_PAD(0x0678, 0x0290, 5, 0x0000, 0, 0),
- MX6DL_PAD_NANDF_D4__GPIO_2_4 = IOMUX_PAD(0x067C, 0x0294, 5, 0x0000, 0, 0),
- MX6DL_PAD_NANDF_D6__GPIO_2_6 = IOMUX_PAD(0x0684, 0x029C, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RD0__ENET_RGMII_RD0 = IOMUX_PAD(0x0694, 0x02AC, 1, 0x0818, 1, 0),
- MX6DL_PAD_RGMII_RD0__GPIO_6_25 = IOMUX_PAD(0x0694, 0x02AC, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RD1__ENET_RGMII_RD1 = IOMUX_PAD(0x0698, 0x02B0, 1, 0x081C, 1, 0),
- MX6DL_PAD_RGMII_RD1__GPIO_6_27 = IOMUX_PAD(0x0698, 0x02B0, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RD2__ENET_RGMII_RD2 = IOMUX_PAD(0x069C, 0x02B4, 1, 0x0820, 1, 0),
- MX6DL_PAD_RGMII_RD2__GPIO_6_28 = IOMUX_PAD(0x069C, 0x02B4, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RD3__ENET_RGMII_RD3 = IOMUX_PAD(0x06A0, 0x02B8, 1, 0x0824, 1, 0),
- MX6DL_PAD_RGMII_RD3__GPIO_6_29 = IOMUX_PAD(0x06A0, 0x02B8, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL = IOMUX_PAD(0x06A4, 0x02BC, 1, 0x0828, 1, 0),
- MX6DL_PAD_RGMII_RX_CTL__GPIO_6_24 = IOMUX_PAD(0x06A4, 0x02BC, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_RXC__ENET_RGMII_RXC = IOMUX_PAD(0x06A8, 0x02C0, 1, 0x0814, 1, 0),
- MX6DL_PAD_RGMII_RXC__GPIO_6_30 = IOMUX_PAD(0x06A8, 0x02C0, 5, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TD0__ENET_RGMII_TD0 = IOMUX_PAD(0x06AC, 0x02C4, 1, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TD1__ENET_RGMII_TD1 = IOMUX_PAD(0x06B0, 0x02C8, 1, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TD2__ENET_RGMII_TD2 = IOMUX_PAD(0x06B4, 0x02CC, 1, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TD3__ENET_RGMII_TD3 = IOMUX_PAD(0x06B8, 0x02D0, 1, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL = IOMUX_PAD(0x06BC, 0x02D4, 1, 0x0000, 0, 0),
- MX6DL_PAD_RGMII_TXC__ENET_RGMII_TXC = IOMUX_PAD(0x06C0, 0x02D8, 1, 0x0000, 0, 0),
- MX6DL_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x06F4, 0x030C, 0, 0x0934, 1, 0),
- MX6DL_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x06F8, 0x0310, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x06FC, 0x0314, 0, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 = IOMUX_PAD(0x0700, 0x0318, 0, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 = IOMUX_PAD(0x0704, 0x031C, 0, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 = IOMUX_PAD(0x0708, 0x0320, 0, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT5__GPIO_7_0 = IOMUX_PAD(0x0710, 0x0328, 5, 0x0000, 0, 0),
- MX6DL_PAD_SD3_DAT6__UART1_RXD = IOMUX_PAD(0x0714, 0x032C, 1, 0x08FC, 2, 0),
- MX6DL_PAD_SD3_DAT7__UART1_TXD = IOMUX_PAD(0x0718, 0x0330, 1, 0x0000, 0, 0),
- MX6DL_PAD_SD4_CLK__USDHC4_CLK = IOMUX_PAD(0x0720, 0x0338, 0, 0x0938, 1, 0),
- MX6DL_PAD_SD4_CMD__USDHC4_CMD = IOMUX_PAD(0x0724, 0x033C, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0),
- MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 = IOMUX_PAD(0x0728, 0x0340, 1, 0x0000, 0, 0),
- MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 = IOMUX_PAD(0x072C, 0x0344, 1, 0x0000, 0, 0),
- MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 = IOMUX_PAD(0x0730, 0x0348, 1, 0x0000, 0, 0),
- MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 = IOMUX_PAD(0x0734, 0x034C, 1, 0x0000, 0, 0),
+}; +#endif /* __ASM_ARCH_MX6_MX6DL_PINS_H__ */
On 9/21/2012 9:10 PM, Vikram Narayanan wrote:
On 9/22/2012 8:09 AM, Troy Kisky wrote:
Only the values used in the sabrelite board are added currently. Add more as other boards use them.
Though there are no users, better add it for completeness. This should also avoid people patching this file often.
U-boot has a policy of not adding dead code. One patch per added board will not cause a burden. Also, since the entries are sorted, merge conflicts should be rare.
Troy
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 231 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++ 2 files changed, 226 insertions(+), 177 deletions(-) create mode 100644 board/freescale/mx6qsabrelite/pads.h
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 4b4e89b..ad2347d 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -26,6 +26,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> #include <asm/arch/mx6x_pins.h> +#include <asm/arch/mx6dl_pins.h> +#include <asm/arch/sys_proto.h> #include <asm/errno.h> #include <asm/gpio.h> #include <asm/imx-common/iomux-v3.h> @@ -38,163 +40,46 @@ #include <netdev.h> DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#include "pads.h" +#define FOR_DL_SOLO +#include "pads.h"
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) +int cpu_is_mx6q(void) +{ + return get_cpu_type() == MXC_CPU_MX6Q; +}
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list))
-#define SPI_PAD_CTRL (PAD_CTL_HYS | \ - PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = cpu_is_mx6q(); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt;
-#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + return imx_iomux_v3_setup_multiple_pads(p, cnt); +}
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) +static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2};
int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); - - return 0; + unsigned mdctl = readl(MMDC_P0_BASE_ADDR + 0x000); + unsigned mdmisc = readl(MMDC_P0_BASE_ADDR + 0x018); + int bits = 11 + 0 + 0 + 1; /* row+col+bank+width */ + + bits += (mdctl >> 24) & 7; /* row */ + bits += col_lookup[(mdctl >> 20) & 7]; /* col */ + bits += bank_lookup[(mdmisc >> 5) & 1]; /* bank */ + bits += (mdctl >> 16) & 3; /* width */ + bits += (mdctl >> 30) & 1; /* cs1 enabled*/ + gd->ram_size = 1 << bits; + return 0; }
-iomux_v3_cfg_t uart1_pads[] = { - MX6Q_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6Q_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -iomux_v3_cfg_t uart2_pads[] = { - MX6Q_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) - -/* I2C1, SGTL5000 */ -struct i2c_pads_info i2c_pad_info0 = { - .scl = { - .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } -}; - -/* I2C2 Camera, MIPI */ -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } -}; - -/* I2C3, J15 - RGB connector */ -struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, - .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp = IMX_GPIO_NR(1, 5) - }, - .sda = { - .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, - .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp = IMX_GPIO_NR(7, 11) - } -}; - -iomux_v3_cfg_t usdhc3_pads[] = { - MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT5__GPIO_7_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -iomux_v3_cfg_t usdhc4_pads[] = { - MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -iomux_v3_cfg_t enet_pads1[] = { - MX6Q_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* pin 35 - 1 (PHY_AD2) on reset */ - MX6Q_PAD_RGMII_RXC__GPIO_6_30 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 32 - 1 - (MODE0) all */ - MX6Q_PAD_RGMII_RD0__GPIO_6_25 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 31 - 1 - (MODE1) all */ - MX6Q_PAD_RGMII_RD1__GPIO_6_27 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 28 - 1 - (MODE2) all */ - MX6Q_PAD_RGMII_RD2__GPIO_6_28 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 27 - 1 - (MODE3) all */ - MX6Q_PAD_RGMII_RD3__GPIO_6_29 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ - MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 42 PHY nRST */ - MX6Q_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -iomux_v3_cfg_t enet_pads2[] = { - MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; - -/* Button assignments for J14 */ -static iomux_v3_cfg_t button_pads[] = { - /* Menu */ - MX6Q_PAD_NANDF_D1__GPIO_2_1 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Back */ - MX6Q_PAD_NANDF_D2__GPIO_2_2 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Labelled Search (mapped to Power under Android) */ - MX6Q_PAD_NANDF_D3__GPIO_2_3 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Home */ - MX6Q_PAD_NANDF_D4__GPIO_2_4 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Volume Down */ - MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Volume Up */ - MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), -}; - static void setup_iomux_enet(void) { gpio_direction_output(IMX_GPIO_NR(3, 23), 0); @@ -203,30 +88,26 @@ static void setup_iomux_enet(void) gpio_direction_output(IMX_GPIO_NR(6, 27), 1); gpio_direction_output(IMX_GPIO_NR(6, 28), 1); gpio_direction_output(IMX_GPIO_NR(6, 29), 1); - imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + IOMUX_SETUP(enet_pads1); gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
/* Need delay 10ms according to KSZ9021 spec */ udelay(1000 * 10); gpio_set_value(IMX_GPIO_NR(3, 23), 1);
- imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + IOMUX_SETUP(enet_pads2); }
-iomux_v3_cfg_t usb_pads[] = { - MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static void setup_iomux_uart(void) { - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); + IOMUX_SETUP(uart1_pads); + IOMUX_SETUP(uart2_pads); }
#ifdef CONFIG_USB_EHCI_MX6 int board_ehci_hcd_init(int port) { - imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + IOMUX_SETUP(usb_pads);
/* Reset USB hub */ gpio_direction_output(IMX_GPIO_NR(7, 12), 0); @@ -267,12 +148,10 @@ int board_mmc_init(bd_t *bis) for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { switch (index) { case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + IOMUX_SETUP(usdhc3_pads); break; case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + IOMUX_SETUP(usdhc4_pads); break; default: printf("Warning: you configured more USDHC controllers" @@ -294,19 +173,10 @@ u32 get_board_rev(void) }
#ifdef CONFIG_MXC_SPI -iomux_v3_cfg_t ecspi1_pads[] = { - /* SS1 */ - MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), -}; - void setup_spi(void) { gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, - ARRAY_SIZE(ecspi1_pads)); + IOMUX_SETUP(ecspi1_pads); } #endif
@@ -342,8 +212,7 @@ int board_eth_init(bd_t *bis)
static void setup_buttons(void) { - imx_iomux_v3_setup_multiple_pads(button_pads, - ARRAY_SIZE(button_pads)); + IOMUX_SETUP(button_pads); }
#ifdef CONFIG_CMD_SATA @@ -382,15 +251,18 @@ int board_early_init_f(void)
int board_init(void) { + struct i2c_pads_info *p = cpu_is_mx6q() ? mx6q_i2c_pad_info : + mx6dl_solo_i2c_pad_info; + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_MXC_SPI setup_spi(); #endif - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]);
#ifdef CONFIG_CMD_SATA setup_sata(); @@ -401,9 +273,14 @@ int board_init(void)
int checkboard(void) { - puts("Board: MX6Q-Sabre Lite\n"); + int cpu_type = get_cpu_type();
- return 0; + puts("Board: MX6"); + puts((cpu_type == MXC_CPU_MX6Q) ? "Q" : + (cpu_type == MXC_CPU_MX6DL) ? "DL" : "SOLO"); + puts("-Sabre Lite\n"); + + return 0; }
struct button_key { diff --git a/board/freescale/mx6qsabrelite/pads.h b/board/freescale/mx6qsabrelite/pads.h new file mode 100644 index 0000000..e7ffe21 --- /dev/null +++ b/board/freescale/mx6qsabrelite/pads.h @@ -0,0 +1,172 @@ +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +iomux_v3_cfg_t MX6NAME(uart1_pads)[] = { + MX6PAD(SD3_DAT6__UART1_RXD) | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6PAD(SD3_DAT7__UART1_TXD) | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(uart2_pads)[] = { + MX6PAD(EIM_D26__UART2_TXD) | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6PAD(EIM_D27__UART2_RXD) | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { + { + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = MX6PAD(EIM_D21__I2C1_SCL) | PC, + .gpio_mode = MX6PAD(EIM_D21__GPIO_3_21) | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6PAD(EIM_D28__I2C1_SDA) | PC, + .gpio_mode = MX6PAD(EIM_D28__GPIO_3_28) | PC, + .gp = IMX_GPIO_NR(3, 28) + } + }, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6PAD(KEY_COL3__I2C2_SCL) | PC, + .gpio_mode = MX6PAD(KEY_COL3__GPIO_4_12) | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6PAD(KEY_ROW3__I2C2_SDA) | PC, + .gpio_mode = MX6PAD(KEY_ROW3__GPIO_4_13) | PC, + .gp = IMX_GPIO_NR(4, 13) + } + }, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6PAD(GPIO_5__I2C3_SCL) | PC, + .gpio_mode = MX6PAD(GPIO_5__GPIO_1_5) | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6PAD(GPIO_16__I2C3_SDA) | PC, + .gpio_mode = MX6PAD(GPIO_16__GPIO_7_11) | PC, + .gp = IMX_GPIO_NR(7, 11) + } + } +}; + +iomux_v3_cfg_t MX6NAME(usdhc3_pads)[] = { + MX6PAD(SD3_CLK__USDHC3_CLK) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_CMD__USDHC3_CMD) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT0__USDHC3_DAT0) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT1__USDHC3_DAT1) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT2__USDHC3_DAT2) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT3__USDHC3_DAT3) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT5__GPIO_7_0) | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t MX6NAME(usdhc4_pads)[] = { + MX6PAD(SD4_CLK__USDHC4_CLK) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_CMD__USDHC4_CMD) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT0__USDHC4_DAT0) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT1__USDHC4_DAT1) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT2__USDHC4_DAT2) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT3__USDHC4_DAT3) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(NANDF_D6__GPIO_2_6) | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t MX6NAME(enet_pads1)[] = { + MX6PAD(ENET_MDIO__ENET_MDIO) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(ENET_MDC__ENET_MDC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TXC__ENET_RGMII_TXC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD0__ENET_RGMII_TD0) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD1__ENET_RGMII_TD1) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD2__ENET_RGMII_TD2) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD3__ENET_RGMII_TD3) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TX_CTL__RGMII_TX_CTL) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(ENET_REF_CLK__ENET_TX_CLK) | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6PAD(RGMII_RXC__GPIO_6_30) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6PAD(RGMII_RD0__GPIO_6_25) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6PAD(RGMII_RD1__GPIO_6_27) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6PAD(RGMII_RD2__GPIO_6_28) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6PAD(RGMII_RD3__GPIO_6_29) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6PAD(RGMII_RX_CTL__GPIO_6_24) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6PAD(EIM_D23__GPIO_3_23) | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(enet_pads2)[] = { + MX6PAD(RGMII_RXC__ENET_RGMII_RXC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD0__ENET_RGMII_RD0) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD1__ENET_RGMII_RD1) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD2__ENET_RGMII_RD2) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD3__ENET_RGMII_RD3) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RX_CTL__RGMII_RX_CTL) | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +/* Button assignments for J14 */ +static iomux_v3_cfg_t MX6NAME(button_pads)[] = { + /* Menu */ + MX6PAD(NANDF_D1__GPIO_2_1) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6PAD(NANDF_D2__GPIO_2_2) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6PAD(NANDF_D3__GPIO_2_3) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6PAD(NANDF_D4__GPIO_2_4) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6PAD(GPIO_19__GPIO_4_5) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6PAD(GPIO_18__GPIO_7_13) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(usb_pads)[] = { + MX6PAD(GPIO_17__GPIO_7_12) | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t MX6NAME(ecspi1_pads)[] = { + /* SS1 */ + MX6PAD(EIM_D19__GPIO_3_19) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D17__ECSPI1_MISO) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D18__ECSPI1_MOSI) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D16__ECSPI1_SCLK) | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; +#endif
On 9/22/2012 8:09 AM, Troy Kisky wrote:
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 231 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++ 2 files changed, 226 insertions(+), 177 deletions(-) create mode 100644 board/freescale/mx6qsabrelite/pads.h
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 4b4e89b..ad2347d 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -26,6 +26,8 @@ #include<asm/arch/imx-regs.h> #include<asm/arch/iomux.h> #include<asm/arch/mx6x_pins.h> +#include<asm/arch/mx6dl_pins.h> +#include<asm/arch/sys_proto.h> #include<asm/errno.h> #include<asm/gpio.h> #include<asm/imx-common/iomux-v3.h> @@ -38,163 +40,46 @@ #include<netdev.h> DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)+#include "pads.h" +#define FOR_DL_SOLO +#include "pads.h"
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)+int cpu_is_mx6q(void) +{
- return get_cpu_type() == MXC_CPU_MX6Q;
+}
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \
mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list))-#define SPI_PAD_CTRL (PAD_CTL_HYS | \
- PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt,
iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt)+{
- int mx6q = cpu_is_mx6q();
- iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list;
- int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt;
-#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
- return imx_iomux_v3_setup_multiple_pads(p, cnt);
+}
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2};
int dram_init(void) {
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);return 0;
- unsigned mdctl = readl(MMDC_P0_BASE_ADDR + 0x000);
- unsigned mdmisc = readl(MMDC_P0_BASE_ADDR + 0x018);
- int bits = 11 + 0 + 0 + 1; /* row+col+bank+width */
- bits += (mdctl>> 24)& 7; /* row */
- bits += col_lookup[(mdctl>> 20)& 7]; /* col */
- bits += bank_lookup[(mdmisc>> 5)& 1]; /* bank */
- bits += (mdctl>> 16)& 3; /* width */
- bits += (mdctl>> 30)& 1; /* cs1 enabled*/
- gd->ram_size = 1<< bits;
- return 0; }
No magic numbers please. Replace it with macros.
Regards, Vikram
On 9/21/2012 9:12 PM, Vikram Narayanan wrote:
On 9/22/2012 8:09 AM, Troy Kisky wrote:
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 231 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++ 2 files changed, 226 insertions(+), 177 deletions(-) create mode 100644 board/freescale/mx6qsabrelite/pads.h
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 4b4e89b..ad2347d 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -26,6 +26,8 @@ #include<asm/arch/imx-regs.h> #include<asm/arch/iomux.h> #include<asm/arch/mx6x_pins.h> +#include<asm/arch/mx6dl_pins.h> +#include<asm/arch/sys_proto.h> #include<asm/errno.h> #include<asm/gpio.h> #include<asm/imx-common/iomux-v3.h> @@ -38,163 +40,46 @@ #include<netdev.h> DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)+#include "pads.h" +#define FOR_DL_SOLO +#include "pads.h"
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)+int cpu_is_mx6q(void) +{
- return get_cpu_type() == MXC_CPU_MX6Q;
+}
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \
mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list))-#define SPI_PAD_CTRL (PAD_CTL_HYS | \
- PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt,
iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt)+{
- int mx6q = cpu_is_mx6q();
- iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list;
- int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt;
-#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
- return imx_iomux_v3_setup_multiple_pads(p, cnt);
+}
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2};
int dram_init(void) {
gd->ram_size = get_ram_size((void *)PHYS_SDRAM,PHYS_SDRAM_SIZE);
return 0;
- unsigned mdctl = readl(MMDC_P0_BASE_ADDR + 0x000);
- unsigned mdmisc = readl(MMDC_P0_BASE_ADDR + 0x018);
- int bits = 11 + 0 + 0 + 1; /* row+col+bank+width */
- bits += (mdctl>> 24)& 7; /* row */
- bits += col_lookup[(mdctl>> 20)& 7]; /* col */
- bits += bank_lookup[(mdmisc>> 5)& 1]; /* bank */
- bits += (mdctl>> 16)& 3; /* width */
- bits += (mdctl>> 30)& 1; /* cs1 enabled*/
- gd->ram_size = 1<< bits;
- return 0; }
No magic numbers please. Replace it with macros.
Right, will move to a common file as well so that other may use it.
Troy
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 127 +++++++++++++++++++------- 1 file changed, 92 insertions(+), 35 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 60eae86..46fd1dc 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -52,6 +52,15 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz, currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits, x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits, x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits, x16/x32 + */ IOMUX_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) IOMUX_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) @@ -112,8 +121,12 @@ WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333)
-/* MDPDC - CKE pulse width = 3 cycles. CKSRE = 6 cycles, CKSRX = 6 cycles */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00020036) +/* + * MDPDC - [17:16](2) => CKE pulse width = 3 cycles. + * MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6 cycles + * MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5 cycles + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDPDC, 0x00020036, 0x0002002D)
/* * MDMISC, mirroring, interleaved (row/bank/col) @@ -124,48 +137,92 @@ WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740) * MDSCR, con_req */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008000) + /* - * MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks - * tXP=4 clocks, tXPDLL=13 clocks - * tFAW=24 clocks, cas=8 cycles + * MDCFG0, + * MX6Q: + * tRFC=0x56 clocks, tXS=0x5b clocks, tXP=4 clocks, tXPDLL=13 clocks + * tFAW=24 clocks, cas=8 cycles + * MX6DL/SOLO: + * tRFC=0x6a clocks, tXS=0x6e clocks, tXP=3 clocks, tXPDLL=10 clocks + * tFAW=19 clocks, cas=6 cycles */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG0, 0x555A7975) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDCFG0, 0x555A7975, 0x696D5323) + /* - * MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8 - * tMRD=4, tCWL=6 + * MDCFG1, + * MX6Q: + * tRDC=8, tRP=8, tRC=27, tRAS=20, tRPA=tRP+1, tWR=8, tMRD=4, tCWL=6 + * MX6DL/SOLO: + * tRDC=6, tRP=6, tRC=20, tRAS=15, tRPA=tRP+1, tWR=7, tMRD=4, tCWL=5 */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64, 0xB66E8C63) + /* * MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0 + MMDC_MDRWD, 0x000026D2) - WRITE_ENTRY1(MMDC_P0 + MMDC_MDOR, 0x005B0E21) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDOTC, 0x09444040) -WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00025576)
/* - * Mx6Q - 64 bit wide ddr + * MMDC_MDOTC, + * MX6Q: + * tAOFPD=2 cycles, tAONPD=2, tANPD=5, tAXPD=5, tODTLon=5, tODT_idle_off=5 + * MX6DL/SOLO: + * tAOFPD=1 cycles, tAONPD=1, tANPD=4, tAXPD=4, tODTLon=4, tODT_idle_off=4 + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDOTC, 0x09444040, 0x00333030) + +/* + * MDPDC - [17:16](2) => CKE pulse width = 3 cycles. + * [15:12](5) => PWDT_1 = 256 cycles + * [11:8](5) =>PWDR_0 = 256 cycles + * MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6 cycles + * MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5 cycles + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDPDC, 0x00025576, 0x0002556D) + +/* + * MX6Q/DL - 64 bit wide ddr * last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) = * 1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27 */ +/* + * MX6SOLO - 32 bit wide ddr + * last address is (1<<28 (base) + 1<<29 - 1) / (1<<25) = + * 1<<3 + 1<<4 - 1 = 8 + 0x10 -1 = 0x17 + */ /* MDASP, CS0_END */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDASP, 0x00000027) +WRITE_ENTRY3(MMDC_P0 + MMDC_MDASP, 0x00000027, 0x00000027, 0x00000017) /* - * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8, width=64/32bit - * mx6q : row+col+bank+width=14+10+3+3=30 = 1G + * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8 + * MX6Q/DL: width=64bit row+col+bank+width=14+10+3+3=30 = 1G + * MX6SOLO: width=32bit row+col+bank+width=14+10+3+2=29 = 512M */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDCTL, 0x831A0000) +WRITE_ENTRY3(MMDC_P0 + MMDC_MDCTL, 0x831A0000, 0x831A0000, 0x83190000)
-/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04088032) +/* + * LOAD MR2: MDSCR, con_req, CS0, A10 set - RZQ/2 + * MX6Q: A3 set(CAS Write=6) + * MX6DL/SOLO: (CAS Write=5) + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x04088032, 0x04008032) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033) -/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00428031) -/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ -WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x09408030) + +/* + * LOAD MR1, CS0 + * MX6Q: A6 set: Rtt=RZQ/2, A1 set: ODI=RZQ/7 + * MX6DL/SOLO: A2 set: Rtt=RZQ/4, ODI=RZQ/6 + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x00428031, 0x00048031) + +/* LOAD MR0, CS0 A8 set: DLL Reset + * MX6Q: A6 set: CAS=8 A11 set: WR=8 + * MX6DL/SOLO: A4 set: CAS=5, A9,A10 set: WR=7 + */ +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x09408030, 0x07208030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) @@ -178,18 +235,18 @@ WRITE_ENTRY1(MMDC_P0 + MMDC_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ -WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F) -WRITE_ENTRY1(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044) -WRITE_ENTRY1(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359, 0x021A0218) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348, 0x021A0218) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F, 0x0040003C) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F, 0x0032003E) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044, 0x0040003C) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044, 0x0032003E)
/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0 + MMDC_MPMUR0, 0x00000800)
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- include/configs/mx6qsabrelite.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 72d0154..98fbb8d 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -182,7 +182,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > " +#define CONFIG_SYS_PROMPT "U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256
Hi Troy,
On 22.09.2012 04:38, Troy Kisky wrote:
After this series the same binary will run on a Saberlite board using any of the pin compatible processors mx6 quad, mx6 duallite, or mx6 solo. This is accomplished using a plugin and a table built by mkimage.
Could you briefly explain or give a link to some documentation how this does work? It sounds to me that the plugin concept is something the boot ROM has to understand? Or in other words: How does the boot ROM decide on which processor it runs and which DCD table to execute then?
Sorry if I misunderstood something, I'm not so familiar with the boot ROM options.
Many thanks
Dirk
On 9/21/2012 11:21 PM, Dirk Behme wrote:
Hi Troy,
On 22.09.2012 04:38, Troy Kisky wrote:
After this series the same binary will run on a Saberlite board using any of the pin compatible processors mx6 quad, mx6 duallite, or mx6 solo. This is accomplished using a plugin and a table built by mkimage.
Could you briefly explain or give a link to some documentation how this does work? It sounds to me that the plugin concept is something the boot ROM has to understand? Or in other words: How does the boot ROM decide on which processor it runs and which DCD table to execute then?
Sorry if I misunderstood something, I'm not so familiar with the boot ROM options.
Many thanks
Dirk
The table generated by mkimage for use with the plugin is not a standard ROM decodable table. Only the plugin itself will decode the table. After it processes the table to initialize memory, it calls back into the ROM to finish the u-boot load.
see file arch/arm/include/asm/arch-mx6/imx-mkimage.h
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
The 1st 16 patches perform cleanup on imximage
The final 2 patches add support for expressions to mkimage. If found not to be worth the effort, they can be omitted.
Troy Kisky (32): imximage: check dcd_len as entries added imximage: remove redundant setting of app_dest_ptr imximage: move flash_offset check to common location imximage: fix size of image to load. imximage: delay setting of image size imximage: change parameters to set_imx_hdr imximage: make set_imx_hdr_v1/v2 easier to read imximage: make header variable length imximage: remove static imximage_version imximage: prepare to move static variables to struct data_src imximage: change parameters for set_dcd_val/set_imx_hdr imximage: move set_imx_hdr to struct data_src imximage: move set_dcd_val to struct data_src imximage: enable word writes for version2 header tools: add parse_helper file imximage: use parse_helper functions imximage.cfg: run files through C preprocessor mx6q_4x_mt41j128.cfg: use symbols instead of hardcoded constants mx6q_4x_mt41j128.cfg: add comments mx6q_4x_mt41j128.cfg: use ddr3 mode for reset mx6q_4x_mt41j128.cfg: skip initiailizing non-existent memory mx6q_4x_mt41j128.cfg: force ZQ calibration mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite mx6: use CONFIG_MX6 instead of CONFIG_MX6Q imx-common: cpu: add imx_ddr_size arch-mx6: add mx6dl_pins.h mx6qsabrelite: add support for mx6 solo/duallite mx6q_4x_mt41j128.cfg: add mx6 solo/duallite support Add boards for sabrelite variants mx6s(solo) and mx6dl(duallite) mx6qsabrelite: change CONFIG_SYS_PROMPT parse_helper: add expression evaluation imx-mkimage.h: use base + offset syntax
Makefile | 3 +- arch/arm/cpu/armv7/mx6/soc.c | 32 +- arch/arm/imx-common/cpu.c | 66 +++- arch/arm/include/asm/arch-mx5/sys_proto.h | 10 +- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 133 +++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 2 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++ arch/arm/include/asm/arch-mx6/sys_proto.h | 10 +- board/esg/ima3-mx53/imximage.cfg | 120 +++--- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 425 ++++++++++++--------- board/freescale/mx25pdk/imximage.cfg | 77 ++-- board/freescale/mx51evk/imximage.cfg | 114 +++--- board/freescale/mx53ard/imximage_dd3.cfg | 83 +++-- board/freescale/mx53evk/imximage.cfg | 86 ++--- board/freescale/mx53loco/imximage.cfg | 83 +++-- board/freescale/mx53smd/imximage.cfg | 83 +++-- board/freescale/mx6qarm2/imximage.cfg | 88 ++--- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 +++--------- board/freescale/mx6qsabrelite/pads.h | 172 +++++++++ board/genesi/mx51_efikamx/imximage_mx.cfg | 132 +++---- board/genesi/mx51_efikamx/imximage_sb.cfg | 126 ++++--- board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++------- boards.cfg | 4 +- drivers/gpio/mxc_gpio.c | 6 +- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 4 +- tools/Makefile | 2 + tools/imximage.c | 487 ++++++++++--------------- tools/imximage.h | 39 +- tools/parse_helper.c | 325 +++++++++++++++++ tools/parse_helper.h | 28 ++ 33 files changed, 2106 insertions(+), 1286 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h create mode 100644 board/freescale/mx6qsabrelite/pads.h create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
Before the len was checked after the entire file was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3 changed to the 1st patch of the series --- tools/imximage.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 03a7716..c917036 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -71,6 +71,7 @@ static uint32_t imximage_version; static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; +static uint32_t max_dcd_entries;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -170,13 +171,6 @@ static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V1) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V1); - exit(EXIT_FAILURE); - } - dcd_v1->preamble.barker = DCD_BARKER; dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); } @@ -190,13 +184,6 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- if (dcd_len > MAX_HW_CFG_SIZE_V2) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, MAX_HW_CFG_SIZE_V2); - exit(EXIT_FAILURE); - } - dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.length = cpu_to_be16( dcd_len * sizeof(dcd_addr_data_t) + 8); @@ -295,11 +282,13 @@ static void set_hdr_func(struct imx_header *imxhdr) set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; set_imx_hdr = set_imx_hdr_v1; + max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; set_imx_hdr = set_imx_hdr_v2; + max_dcd_entries = MAX_HW_CFG_SIZE_V2; break; default: err_imximage_version(imximage_version); @@ -426,8 +415,15 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, value = get_cfg_value(token, name, lineno); (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
- if (fld == CFG_REG_VALUE) + if (fld == CFG_REG_VALUE) { (*dcd_len)++; + if (*dcd_len > max_dcd_entries) { + fprintf(stderr, "Error: %s[%d] -" + "DCD table exceeds maximum size(%d)\n", + name, lineno, max_dcd_entries); + exit(EXIT_FAILURE); + } + } break; default: break;
Am 04/10/2012 03:47, schrieb Troy Kisky:
Before the len was checked after the entire file was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into its own patch --- tools/imximage.c | 1 - 1 file changed, 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index c917036..bda1a75 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -213,7 +213,6 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr; fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - sizeof(struct imx_header); fhdr_v1->app_code_jump_vector = params->ep;
On 04/10/2012 03:47, Troy Kisky wrote:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
tools/imximage.c | 1 - 1 file changed, 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index c917036..bda1a75 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -213,7 +213,6 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr; fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - sizeof(struct imx_header); fhdr_v1->app_code_jump_vector = params->ep;
I think we do not need to discuss on this. I put in in my -next queue and I will apply it soon.
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
Am 04/10/2012 03:47, schrieb Troy Kisky:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
tools/imximage.c | 1 - 1 file changed, 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index c917036..bda1a75 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -213,7 +213,6 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->addr; fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - sizeof(struct imx_header); fhdr_v1->app_code_jump_vector = params->ep;
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into its own patch --- tools/imximage.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index bda1a75..3e9ee6a 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -203,13 +203,6 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t base_offset;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } - /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
@@ -243,13 +236,6 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { - fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n", - params->imagename); - exit(EXIT_FAILURE); - } - /* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); @@ -475,6 +461,11 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd);
+ /* Exit if there is no BOOT_FROM field specifying the flash_offset */ + if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { + fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); + exit(EXIT_FAILURE); + } return dcd_len; }
On 04/10/2012 03:47, Troy Kisky wrote:
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
tools/imximage.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index bda1a75..3e9ee6a 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -203,13 +203,6 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t base_offset;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v1: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
- /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
@@ -243,13 +236,6 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if(imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: Header v2: No BOOT_FROM tag in %s\n",params->imagename);exit(EXIT_FAILURE);- }
- /* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
@@ -475,6 +461,11 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd);
- /* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);exit(EXIT_FAILURE);- } return dcd_len;
}
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
On 10/8/2012 6:19 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
tools/imximage.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-)
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
Are you going to apply this(and 1/32, 2/23) now, or should I resend in the next version with your ack?
Thanks Troy
Am 18/10/2012 20:40, schrieb Troy Kisky:
On 10/8/2012 6:19 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
tools/imximage.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-)
Acked-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic
Are you going to apply this(and 1/32, 2/23) now, or should I resend in the next version with your ack?
Hi Troy,
I think the best way to proceed would be if I apply the patches for the fixes, so that you have not to resend even the patches that will be not touched. And maybe in this "incremental" way we can speed up the whole process.
In my ready-to-be-applied list I marked already the patches from 1/32 up to 5/32. My way to do this is to set them as "under reviewed" in patchworks, because there is not a "ready-to-be-merged" state.
IMHO even patches up to 9/32 can be applied, they are free of comments and we discussed about them in your previous posting. So please wait, I will apply the first set of patches.
Best regards, Stefano
Am 04/10/2012 03:47, schrieb Troy Kisky:
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
sbuf->st_size already includes sizeof(struct imx_header), so remove extra addition.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into its own patch --- tools/imximage.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 3e9ee6a..7dbf36c 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -221,8 +221,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
/* The external flash header must be at the end of the DCD table */ dcd_v1->addr_data[dcd_len].type = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + imxhdr->flash_offset;
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; @@ -253,8 +252,7 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset; hdr_v2->boot_data.size = sbuf->st_size + - imxhdr->flash_offset + - sizeof(struct imx_header); + imxhdr->flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0;
Am 04/10/2012 03:47, schrieb Troy Kisky:
sbuf->st_size already includes sizeof(struct imx_header), so remove extra addition.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
When later we change to variable length header, we won't know the file size when set_imx_hdr is called. So this is prep work.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into its own patch --- tools/imximage.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 7dbf36c..bed53f0 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -72,6 +72,7 @@ static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; +static uint32_t *header_size_ptr;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -202,6 +203,8 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t base_offset; + uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) + - ((char *)imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -219,13 +222,10 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v1->dcd_ptr = base_offset + offsetof(imx_header_v1_t, dcd_table);
- /* The external flash header must be at the end of the DCD table */ - dcd_v1->addr_data[dcd_len].type = sbuf->st_size + - imxhdr->flash_offset; - /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; + header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); }
static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, @@ -251,11 +251,10 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, offsetof(imx_header_v2_t, boot_data);
hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset; - hdr_v2->boot_data.size = sbuf->st_size + - imxhdr->flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0; + header_size_ptr = &hdr_v2->boot_data.size; }
static void set_hdr_func(struct imx_header *imxhdr) @@ -526,6 +525,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
/* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params); + *header_size_ptr = sbuf->st_size + imxhdr->flash_offset; }
int imximage_check_params(struct mkimage_params *params)
Am 04/10/2012 03:47, schrieb Troy Kisky:
When later we change to variable length header, we won't know the file size when set_imx_hdr is called. So this is prep work.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into its own patch
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Call with the value the function will use instead of going through a pointer.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into its own patch --- tools/imximage.c | 20 +++++++++----------- tools/imximage.h | 6 ++---- 2 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index bed53f0..87a6b59 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -196,8 +196,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, }
static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) + uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; @@ -209,11 +208,11 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = params->ep - imxhdr->flash_offset - + fhdr_v1->app_dest_ptr = entry_point - flash_offset - sizeof(struct imx_header); - fhdr_v1->app_code_jump_vector = params->ep; + fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + imxhdr->flash_offset ; + base_offset = fhdr_v1->app_dest_ptr + flash_offset; fhdr_v1->dcd_ptr_ptr = (uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) - offsetof(flash_header_v1_t, app_code_jump_vector) + @@ -229,8 +228,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, }
static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params) + uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; @@ -240,9 +238,9 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t)); fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
- fhdr_v2->entry = params->ep; + fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = params->ep - sizeof(struct imx_header); + fhdr_v2->self = entry_point - sizeof(struct imx_header);
fhdr_v2->dcd_ptr = fhdr_v2->self + offsetof(imx_header_v2_t, dcd_table); @@ -250,7 +248,7 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v2->boot_data_ptr = fhdr_v2->self + offsetof(imx_header_v2_t, boot_data);
- hdr_v2->boot_data.start = fhdr_v2->self - imxhdr->flash_offset; + hdr_v2->boot_data.start = fhdr_v2->self - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0; @@ -524,7 +522,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Set the imx header */ - (*set_imx_hdr)(imxhdr, dcd_len, sbuf, params); + (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset); *header_size_ptr = sbuf->st_size + imxhdr->flash_offset; }
diff --git a/tools/imximage.h b/tools/imximage.h index 34f293d..42b6090 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -168,9 +168,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - struct stat *sbuf, - struct mkimage_params *params); +typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, + uint32_t entry_point, uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
Am 04/10/2012 03:47, schrieb Troy Kisky:
Call with the value the function will use instead of going through a pointer.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: split into own patch --- tools/imximage.c | 30 +++++++++++------------------- 1 file changed, 11 insertions(+), 19 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 87a6b59..63f88b6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -201,25 +201,19 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; - uint32_t base_offset; + uint32_t hdr_base; uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - ((char *)imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- fhdr_v1->app_dest_ptr = entry_point - flash_offset - - sizeof(struct imx_header); + hdr_base = entry_point - sizeof(struct imx_header); + fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point;
- base_offset = fhdr_v1->app_dest_ptr + flash_offset; - fhdr_v1->dcd_ptr_ptr = - (uint32_t) (offsetof(flash_header_v1_t, dcd_ptr) - - offsetof(flash_header_v1_t, app_code_jump_vector) + - base_offset); - - fhdr_v1->dcd_ptr = base_offset + - offsetof(imx_header_v1_t, dcd_table); + fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr); + fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
/* Security feature are not supported */ fhdr_v1->app_code_csf = 0; @@ -232,6 +226,7 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; + uint32_t hdr_base;
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -240,15 +235,12 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = entry_point - sizeof(struct imx_header); - - fhdr_v2->dcd_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, dcd_table); - - fhdr_v2->boot_data_ptr = fhdr_v2->self + - offsetof(imx_header_v2_t, boot_data); + fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header);
- hdr_v2->boot_data.start = fhdr_v2->self - flash_offset; + fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table); + fhdr_v2->boot_data_ptr = hdr_base + + offsetof(imx_header_v2_t, boot_data); + hdr_v2->boot_data.start = hdr_base - flash_offset;
/* Security feature are not supported */ fhdr_v2->csf = 0;
Am 04/10/2012 03:47, schrieb Troy Kisky:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v3: split into own patch
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
This makes the dcd table options as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000 * 0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
---
v3: other patches split from this one --- tools/imximage.c | 61 +++++++++++++++++++++++++++++++++++++----------------- tools/imximage.h | 4 ++-- 2 files changed, 44 insertions(+), 21 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 63f88b6..1365b1e 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; @@ -73,6 +72,9 @@ static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; +static uint32_t g_flash_offset; + +static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -102,8 +104,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */ - if ((fhdr_v2->header.tag == IVT_HEADER_TAG) && - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG)) + if (fhdr_v2->header.tag == IVT_HEADER_TAG) return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID; @@ -195,7 +196,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; @@ -208,7 +209,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- hdr_base = entry_point - sizeof(struct imx_header); + hdr_base = entry_point - header_length; fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point;
@@ -219,14 +220,18 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); + return header_length; }
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; + uint32_t header_length = (dcd_len) ? + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) + : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -235,9 +240,10 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header); + fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table); + fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); hdr_v2->boot_data.start = hdr_base - flash_offset; @@ -245,6 +251,7 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v2->csf = 0; header_size_ptr = &hdr_v2->boot_data.size; + return header_length; }
static void set_hdr_func(struct imx_header *imxhdr) @@ -342,9 +349,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM: - imxhdr->flash_offset = get_table_entry_id(imximage_bootops, + g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token); - if (imxhdr->flash_offset == -1) { + if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE); @@ -449,7 +456,7 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); exit(EXIT_FAILURE); } @@ -494,12 +501,17 @@ static void imximage_print_header(const void *ptr) } }
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) +int imximage_vrec_header(struct mkimage_params *params, + struct image_type_params *tparams) { - struct imx_header *imxhdr = (struct imx_header *)ptr; + struct imx_header *imxhdr; uint32_t dcd_len;
+ imxhdr = calloc(1, MAX_HEADER_SIZE); + if (!imxhdr) { + fprintf(stderr, "Error: out of memory\n"); + exit(EXIT_FAILURE); + } /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -507,15 +519,27 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ - imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED; + g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Set the imx header */ - (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset); - *header_size_ptr = sbuf->st_size + imxhdr->flash_offset; + imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, + params->ep, g_flash_offset); + imximage_params.hdr = imxhdr; + return 0; +} + +static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /* Set the size in header */ + uint32_t offset = (char *)header_size_ptr - (char *)imximage_params.hdr; + uint32_t *p = (uint32_t *)((char *)ptr + offset); + + *p = sbuf->st_size + g_flash_offset; }
int imximage_check_params(struct mkimage_params *params) @@ -545,8 +569,7 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support", - .header_size = sizeof(struct imx_header), - .hdr = (void *)&imximage_header, + .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header, diff --git a/tools/imximage.h b/tools/imximage.h index 42b6090..0f39447 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header; - uint32_t flash_offset; };
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,7 +168,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
Am 04/10/2012 03:47, schrieb Troy Kisky:
This makes the dcd table options as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000
0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
my test with this patch was not successful. I have tested it on a mx53loco, and the board cannot boot. It stops after printing the RAM size:
U-Boot 2012.10-00226-g673b6b8 (Oct 20 2012 - 17:40:07)
Board: MX53 LOCO I2C: ready DRAM: 1 GiB
Everything works fine without the patch (patches 1-7 already applied, too). I wanted to test on V1 SOCs, too, but I stopped after seeing that on a MX53 is not working.
Best regards, Stefano Babic
On 10/20/2012 8:52 AM, Stefano Babic wrote:
Am 04/10/2012 03:47, schrieb Troy Kisky:
This makes the dcd table options as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch we have 000000 402000d1 17800000 00000000 177ffc2c 000010 177ffc20 177ffc00 00000000 00000000 000020 177ff800 00042b58 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 00000000 00000000 00000000 000360 00000000 00000000 00000000 00000000
0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have 000000 402000d1 17800000 00000000 177ffcd8 000010 177ffccc 177ffcac 00000000 00000000 000020 177ff8ac 000426ac 00000000 402803d2 000030 042403cc a8050e02 30000000 b0050e02 ... more DCD table 000340 cf0000f0 18000e02 7f007f00 1c000e02 000350 7f007f00 ea000014 e59ff014 e59ff014 000360 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x354 and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
my test with this patch was not successful. I have tested it on a mx53loco, and the board cannot boot. It stops after printing the RAM size:
U-Boot 2012.10-00226-g673b6b8 (Oct 20 2012 - 17:40:07)
Board: MX53 LOCO I2C: ready DRAM: 1 GiB
Everything works fine without the patch (patches 1-7 already applied, too). I wanted to test on V1 SOCs, too, but I stopped after seeing that on a MX53 is not working.
Best regards, Stefano Babic
I've tested this patch on a mx51 boards as well and it worked fine there.
For testing purposes, can you see if this change helps any? Perhaps the rom isn't loading all the code, and this will load a little more.
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..4b303f1 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -86,6 +86,12 @@ SECTIONS __bss_end__ = .; }
+ .zdata1 : { + . = ALIGN(512); + LONG(0xdeadbeef); + FILL(0xefbeadde); + . = ALIGN(512); + } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) }
Am 21/10/2012 03:31, schrieb Troy Kisky:
I've tested this patch on a mx51 boards as well and it worked fine there.
Fine, thanks, this saves me time - I will not test it on that SOC.
For testing purposes, can you see if this change helps any? Perhaps the rom isn't loading all the code, and this will load a little more.
I had the same feeling.
In fact, increasing artificially the size with the zdata1 section helps. It boots. There should be an error by computing the total length of the image.
Best regards, Stefano
On 10/21/2012 1:35 AM, Stefano Babic wrote:
Am 21/10/2012 03:31, schrieb Troy Kisky:
I've tested this patch on a mx51 boards as well and it worked fine there.
Fine, thanks, this saves me time - I will not test it on that SOC.
For testing purposes, can you see if this change helps any? Perhaps the rom isn't loading all the code, and this will load a little more.
I had the same feeling.
In fact, increasing artificially the size with the zdata1 section helps. It boots. There should be an error by computing the total length of the image.
Best regards, Stefano
Oops, my previous test patch was after bss instead of before. With this patch
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..8352c7c 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -78,6 +78,12 @@ SECTIONS .mmutable : { *(.mmutable) } + .zdata1 : { + . = ALIGN(512); + LONG(0xdeadbeef); + FILL(0xefbeadde); + . = ALIGN(512); + }
.bss __rel_dyn_start (OVERLAY) : { __bss_start = .;
My mx51 board shows
U-Boot > mw.l 97841000 12345678 2000000 U-Boot > reset resetting ...
U-Boot 2012.10-01232-g2919aa2-dirty (Oct 22 2012 - 13:17:26)
CPU: Freescale i.MX51 rev3.0 at 800 MHz Reset cause: WDOG Board: Nitrogen dram_init dram_init exit DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: FEC Warning: failed to set MAC address
Hit any key to stop autoboot: 0 U-Boot > md.l 97841000 97841000: deadbeef deadbeef deadbeef deadbeef ................ 97841010: deadbeef deadbeef deadbeef deadbeef ................ 97841020: deadbeef deadbeef deadbeef deadbeef ................ 97841030: deadbeef deadbeef deadbeef deadbeef ................ 97841040: deadbeef deadbeef deadbeef deadbeef ................ 97841050: deadbeef deadbeef deadbeef deadbeef ................ 97841060: deadbeef deadbeef deadbeef deadbeef ................ 97841070: deadbeef deadbeef deadbeef deadbeef ................ 97841080: deadbeef deadbeef deadbeef deadbeef ................ 97841090: deadbeef deadbeef deadbeef deadbeef ................ 978410a0: deadbeef deadbeef deadbeef deadbeef ................ 978410b0: deadbeef deadbeef deadbeef deadbeef ................ 978410c0: deadbeef deadbeef deadbeef deadbeef ................ 978410d0: deadbeef deadbeef deadbeef deadbeef ................ 978410e0: deadbeef deadbeef deadbeef deadbeef ................ 978410f0: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 97841100: deadbeef deadbeef deadbeef deadbeef ................ 97841110: deadbeef deadbeef deadbeef deadbeef ................ 97841120: deadbeef deadbeef deadbeef deadbeef ................ 97841130: deadbeef deadbeef deadbeef deadbeef ................ 97841140: deadbeef deadbeef deadbeef deadbeef ................ 97841150: deadbeef deadbeef deadbeef deadbeef ................ 97841160: deadbeef deadbeef deadbeef deadbeef ................ 97841170: deadbeef deadbeef deadbeef deadbeef ................ 97841180: deadbeef deadbeef deadbeef deadbeef ................ 97841190: deadbeef deadbeef deadbeef deadbeef ................ 978411a0: deadbeef deadbeef deadbeef deadbeef ................ 978411b0: deadbeef deadbeef deadbeef deadbeef ................ 978411c0: deadbeef deadbeef deadbeef deadbeef ................ 978411d0: deadbeef deadbeef deadbeef deadbeef ................ 978411e0: deadbeef deadbeef deadbeef deadbeef ................ 978411f0: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 97841200: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841210: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841220: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841230: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841240: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841250: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841260: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841270: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841280: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 97841290: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412a0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412b0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412c0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412d0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412e0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 978412f0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. U-Boot >
Showing that exactly the correct number of bytes where loaded.
_________________________________________________________ _________________________________________________________
My mx6q board shows
U-Boot > mw.l 1784e000 12345678 2000000 U-Boot > reset resetting ...
U-Boot 2012.10-01232-g2919aa2-dirty (Oct 22 2012 - 13:45:52)
CPU: Freescale i.MX6Q rev1.0 at 792 MHz Reset cause: WDOG Board: MX6Q-Sabre Lite DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB No panel detected: default to HDMI unsupported panel HDMI In: serial Out: serial Err: serial Net: FEC Warning: FEC using MAC address from net device
Hit any key to stop autoboot: 0 U-Boot > md.l 1784e000 1784e000: deadbeef deadbeef deadbeef deadbeef ................ 1784e010: deadbeef deadbeef deadbeef deadbeef ................ 1784e020: deadbeef deadbeef deadbeef deadbeef ................ 1784e030: deadbeef deadbeef deadbeef deadbeef ................ 1784e040: deadbeef deadbeef deadbeef deadbeef ................ 1784e050: deadbeef deadbeef deadbeef deadbeef ................ 1784e060: deadbeef deadbeef deadbeef deadbeef ................ 1784e070: deadbeef deadbeef deadbeef deadbeef ................ 1784e080: deadbeef deadbeef deadbeef deadbeef ................ 1784e090: deadbeef deadbeef deadbeef deadbeef ................ 1784e0a0: deadbeef deadbeef deadbeef deadbeef ................ 1784e0b0: deadbeef deadbeef deadbeef deadbeef ................ 1784e0c0: deadbeef deadbeef deadbeef deadbeef ................ 1784e0d0: deadbeef deadbeef deadbeef deadbeef ................ 1784e0e0: deadbeef deadbeef deadbeef deadbeef ................ 1784e0f0: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 1784e100: deadbeef deadbeef deadbeef deadbeef ................ 1784e110: deadbeef deadbeef deadbeef deadbeef ................ 1784e120: deadbeef deadbeef deadbeef deadbeef ................ 1784e130: deadbeef deadbeef deadbeef deadbeef ................ 1784e140: deadbeef deadbeef deadbeef deadbeef ................ 1784e150: deadbeef deadbeef deadbeef deadbeef ................ 1784e160: deadbeef deadbeef deadbeef deadbeef ................ 1784e170: deadbeef deadbeef deadbeef deadbeef ................ 1784e180: deadbeef deadbeef deadbeef deadbeef ................ 1784e190: deadbeef deadbeef deadbeef deadbeef ................ 1784e1a0: deadbeef deadbeef deadbeef deadbeef ................ 1784e1b0: deadbeef deadbeef deadbeef deadbeef ................ 1784e1c0: deadbeef deadbeef deadbeef deadbeef ................ 1784e1d0: deadbeef deadbeef deadbeef deadbeef ................ 1784e1e0: deadbeef deadbeef deadbeef deadbeef ................ 1784e1f0: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 1784e200: 02000000 46200600 00202000 00000000 ...... F. ..... 1784e210: 00000010 00004020 00000000 00004222 .... @......"B.. 1784e220: 02000000 00000040 00000000 00000000 ....@........... 1784e230: 00000000 00000400 00020002 00000000 ................ 1784e240: 00140000 00000000 00100000 00008080 ................ 1784e250: 00100200 00410080 00004020 18000110 ......A. @...... 1784e260: 00000000 80000a00 00000000 00000000 ................ 1784e270: 00000280 08029980 00000000 00001080 ................ 1784e280: 40000000 00800002 02802404 02a00200 ...@.....$...... 1784e290: 08002000 00000000 00808400 40200200 . ............ @ 1784e2a0: 40000000 00000000 00000000 00000020 ...@........ ... 1784e2b0: 00000000 00200020 00008000 00000000 .... . ......... 1784e2c0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e2d0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e2e0: 00000200 00010001 00000201 10000000 ................ 1784e2f0: 14000000 00000000 00000001 08000011 ................ U-Boot > 1784e300: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e310: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e320: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e330: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e340: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e350: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e360: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e370: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e380: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e390: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3a0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3b0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3c0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3d0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3e0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. 1784e3f0: 12345678 12345678 12345678 12345678 xV4.xV4.xV4.xV4. U-Boot >
Showing that an extra 0x100 bytes were written.
U-Boot > sf probe SF: Detected SST25VF016B with page size 4 KiB, total 2 MiB U-Boot > sf read 10800000 400 50000 U-Boot > md.l 1084e334 1084e334: deadbeef deadbeef deadbeef deadbeef ................ 1084e344: deadbeef deadbeef deadbeef deadbeef ................ 1084e354: deadbeef deadbeef deadbeef deadbeef ................ 1084e364: deadbeef deadbeef deadbeef deadbeef ................ 1084e374: deadbeef deadbeef deadbeef deadbeef ................ 1084e384: deadbeef deadbeef deadbeef deadbeef ................ 1084e394: deadbeef deadbeef deadbeef deadbeef ................ 1084e3a4: deadbeef deadbeef deadbeef deadbeef ................ 1084e3b4: deadbeef deadbeef deadbeef deadbeef ................ 1084e3c4: deadbeef deadbeef deadbeef deadbeef ................ 1084e3d4: deadbeef deadbeef deadbeef deadbeef ................ 1084e3e4: deadbeef deadbeef deadbeef deadbeef ................ 1084e3f4: deadbeef deadbeef deadbeef deadbeef ................ 1084e404: deadbeef deadbeef deadbeef deadbeef ................ 1084e414: deadbeef deadbeef deadbeef deadbeef ................ 1084e424: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 1084e434: deadbeef deadbeef deadbeef deadbeef ................ 1084e444: deadbeef deadbeef deadbeef deadbeef ................ 1084e454: deadbeef deadbeef deadbeef deadbeef ................ 1084e464: deadbeef deadbeef deadbeef deadbeef ................ 1084e474: deadbeef deadbeef deadbeef deadbeef ................ 1084e484: deadbeef deadbeef deadbeef deadbeef ................ 1084e494: deadbeef deadbeef deadbeef deadbeef ................ 1084e4a4: deadbeef deadbeef deadbeef deadbeef ................ 1084e4b4: deadbeef deadbeef deadbeef deadbeef ................ 1084e4c4: deadbeef deadbeef deadbeef deadbeef ................ 1084e4d4: deadbeef deadbeef deadbeef deadbeef ................ 1084e4e4: deadbeef deadbeef deadbeef deadbeef ................ 1084e4f4: deadbeef deadbeef deadbeef deadbeef ................ 1084e504: deadbeef deadbeef deadbeef deadbeef ................ 1084e514: deadbeef deadbeef deadbeef deadbeef ................ 1084e524: deadbeef deadbeef deadbeef deadbeef ................ U-Boot > 1084e534: ffffffff ffffffff ffffffff ffffffff ................ 1084e544: ffffffff ffffffff ffffffff ffffffff ................ 1084e554: ffffffff ffffffff ffffffff ffffffff ................ 1084e564: ffffffff ffffffff ffffffff ffffffff ................ 1084e574: ffffffff ffffffff ffffffff ffffffff ................ 1084e584: ffffffff ffffffff ffffffff ffffffff ................ 1084e594: ffffffff ffffffff ffffffff ffffffff ................ 1084e5a4: ffffffff ffffffff ffffffff ffffffff ................ 1084e5b4: ffffffff ffffffff ffffffff ffffffff ................ 1084e5c4: ffffffff ffffffff ffffffff ffffffff ................ 1084e5d4: ffffffff ffffffff ffffffff ffffffff ................ 1084e5e4: ffffffff ffffffff ffffffff ffffffff ................ 1084e5f4: ffffffff ffffffff ffffffff ffffffff ................ 1084e604: ffffffff ffffffff ffffffff ffffffff ................ 1084e614: ffffffff ffffffff ffffffff ffffffff ................ 1084e624: ffffffff ffffffff ffffffff ffffffff ................
And those extra 0x100 bytes are garbage, not from the eprom.
Troy
This series make the file imximage.c easier to read, as well as produces a slightly smaller file.
Only the 1st two patches are different from version 3. The 1st is a new patch which addresses an mx53 ROM bug. The 2nd is slight changes due to rebase on 1st.
Troy Kisky (11): imximage: mx53 needs transfer length a multiple of 512 imximage: make header variable length imximage: remove static imximage_version imximage: prepare to move static variables to struct data_src imximage: change parameters for set_dcd_val/set_imx_hdr imximage: move set_imx_hdr to struct data_src imximage: move set_dcd_val to struct data_src imximage: enable word writes for version2 header tools: add parse_helper file imximage: use parse_helper functions parse_helper: add expression evaluation
tools/Makefile | 2 + tools/imximage.c | 437 ++++++++++++++++++++++---------------------------- tools/imximage.h | 37 ++--- tools/parse_helper.c | 325 +++++++++++++++++++++++++++++++++++++ tools/parse_helper.h | 28 ++++ 5 files changed, 564 insertions(+), 265 deletions(-) create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
The mx53 ROM will truncate the length at a multiple of 512. Transferring too much is not a problem, so round up.
Problem reported by Stefano Babic.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 63f88b6..7e54e97 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -494,6 +494,8 @@ static void imximage_print_header(const void *ptr) } }
+#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1)) + static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, struct mkimage_params *params) { @@ -515,7 +517,13 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
/* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset); - *header_size_ptr = sbuf->st_size + imxhdr->flash_offset; + /* + * ROM bug alert + * mx53 only loads 512 byte multiples. + * The remaining fraction of a block bytes would + * not be loaded. + */ + *header_size_ptr = ALIGN(sbuf->st_size + imxhdr->flash_offset, 512); }
int imximage_check_params(struct mkimage_params *params)
Dear Troy Kisky,
In message 1354066303-29762-2-git-send-email-troy.kisky@boundarydevices.com you wrote:
The mx53 ROM will truncate the length at a multiple of 512. Transferring too much is not a problem, so round up.
What about other SoCs using the same code?
+#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1))
NAK. This macro is mis-named; it has nothing to do with alignment - you write yourself: "round up".
And you don't have to re-invent the wheel. Please use the existing macros for this purpose.
Best regards,
Wolfgang Denk
On 11/28/2012 2:27 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-2-git-send-email-troy.kisky@boundarydevices.com you wrote:
The mx53 ROM will truncate the length at a multiple of 512. Transferring too much is not a problem, so round up.
What about other SoCs using the same code?
+#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1))
NAK. This macro is mis-named; it has nothing to do with alignment - you write yourself: "round up".
And you don't have to re-invent the wheel. Please use the existing macros for this purpose.
Best regards,
Wolfgang Denk
Oddly enough, I originally called it ROUND_UP. But then I saw these lines in include/common.h
#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
So, I deleted my definition of ROUND_UP and used ALIGN. But imximage.c did not automatically include common.h. Instead of trying to include common.h and all the files it pulled in, I added the ALIGN definition.
Troy
Dear Troy Kisky,
In message 50B65583.1070309@boundarydevices.com you wrote:
Oddly enough, I originally called it ROUND_UP. But then I saw these lines in include/common.h
And why didn't you find (and use) ROUND() in include/common.h ?
Best regards,
Wolfgang Denk
On 11/28/2012 1:25 PM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 50B65583.1070309@boundarydevices.com you wrote:
Oddly enough, I originally called it ROUND_UP. But then I saw these lines in include/common.h
And why didn't you find (and use) ROUND() in include/common.h ?
Best regards,
Wolfgang Denk
I did also find ROUND, so I checked to see what Linux did. Linux does not have ROUND, but it does have ALIGN.
But I personally prefer ROUND, or even better ROUND_UP. I just wanted to use the most common form. u-boot seems to use ROUND in config files and ALIGN in .c files
But the reason I didn't include common.h is because of the target specific files that it also includes. Would you mind if I moved
_________________________ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#define ROUND(a,b) (((a) + (b) - 1) & ~((b) - 1)) #define DIV_ROUND(n,d) (((n) + ((d)/2)) / (d)) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) #define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) -------------------------------------
from common.h to a new file common_macro.h
and included common_macro.h instead?
Perhaps you have a better alternative?
Thanks Troy
Dear Troy Kisky,
In message 50B67C99.8080609@boundarydevices.com you wrote:
But the reason I didn't include common.h is because of the target specific files that it also includes. Would you mind if I moved
Why would these hurt? They don't anywhere else.
and included common_macro.h instead?
I see no benefit for that.
Best regards,
Wolfgang Denk
On 11/28/2012 2:35 PM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 50B67C99.8080609@boundarydevices.com you wrote:
But the reason I didn't include common.h is because of the target specific files that it also includes. Would you mind if I moved
Why would these hurt? They don't anywhere else.
I'm not saying that including common.h wouldn't work. I'm saying that it seems wrong to include target specific include files in an executable that should generate the same code regardless of the target selected.
I really don't care enough to argue. I just want you to understand why I did it the way I did. It wasn't because I was crazy, or lazy. We just hold different priorities.
Would you like to see the Linux way of ALIGN, or ROUND?
Now, back to the other topic you raised. Should I apply the bug work-around for all version 2 headers, or find a way to distinguish mx53/mx6?
Thanks Troy
Dear Troy Kisky,
In message 50B6CB79.4030007@boundarydevices.com you wrote:
Would you like to see the Linux way of ALIGN, or ROUND?
Do you align some buffer or similar, or do you round (up) a size?
Now, back to the other topic you raised. Should I apply the bug work-around for all version 2 headers, or find a way to distinguish mx53/mx6?
I cannot tell. Stefano, what do you think?
Best regards,
Wolfgang Denk
On 29/11/2012 06:28, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 50B6CB79.4030007@boundarydevices.com you wrote:
Would you like to see the Linux way of ALIGN, or ROUND?
Do you align some buffer or similar, or do you round (up) a size?
Now, back to the other topic you raised. Should I apply the bug work-around for all version 2 headers, or find a way to distinguish mx53/mx6?
I cannot tell. Stefano, what do you think?
Well, I am thinking about which are the real benefits. If we always round up the size to 512 bytes for V2 header, *maybe* we constrain the i.MX6 to load some bytes more, but it is the only drawback. And this if the i.MX6 does not suffer of the same problem found on i.MX53.
On the other side, having two different versions of V2 header is confusing. It is then undocumented by Freescale, and maybe it is possible to find a note in some errata. Having the same interface without special hacking for each SOC overcomes the increment in the footprint for the i.MX6 (in worst case 511 bytes - and not a lot compared to current size of U-Boot for MX5/MX6, usually several hundred of KB).
Best regards, Stefano Babic
On 28/11/2012 22:35, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 50B67C99.8080609@boundarydevices.com you wrote:
But the reason I didn't include common.h is because of the target specific files that it also includes. Would you mind if I moved
Why would these hurt? They don't anywhere else.
Personally, I think that mkimage as generic tool should not include common.h. Doing that, it does not allow to compile mkimage without running config, and let's think that we need a different mkimage for each target, and that is not true. This will break also support from distros, because their packages (for example, u-boot-tools, uboot-mkimage under Ubuntu) are compiled without configuring u-boot - and I think it is correct.
IMHO we are discussing about a single macro. We can let it in mkimage as in patch and move it in a general file only if we will have a use case with a bunch of macros.
Best regards, Stefano Babic
On 11/28/2012 2:27 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-2-git-send-email-troy.kisky@boundarydevices.com you wrote:
The mx53 ROM will truncate the length at a multiple of 512. Transferring too much is not a problem, so round up.
What about other SoCs using the same code?
It would be easy to add a version 2 header test, but that would not distinguish between mx53 and mx6. Should I create a version 2bug header that I can specify in mx53's config file?
Thanks Troy
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 01/11] imximage: mx53 needs transfer length a multiple of 512
The mx53 ROM will truncate the length at a multiple of 512. Transferring too much is not a problem, so round up.
Problem reported by Stefano Babic.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
tools/imximage.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 63f88b6..7e54e97 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -494,6 +494,8 @@ static void imximage_print_header(const void *ptr) } }
+#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1))
static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, struct mkimage_params *params) { @@ -515,7 +517,13 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
/* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset);
- *header_size_ptr = sbuf->st_size + imxhdr->flash_offset;
- /*
* ROM bug alert* mx53 only loads 512 byte multiples.* The remaining fraction of a block bytes would* not be loaded.*/- *header_size_ptr = ALIGN(sbuf->st_size + imxhdr->flash_offset, 512);
}
int imximage_check_params(struct mkimage_params *params)
1.7.9.5
This makes the dcd table optional as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch mx53loco_config produces
000000 402000d1 77800000 00000000 777ffc2c 000010 777ffc20 777ffc00 00000000 00000000 000020 777ff800 0004b200 00000000 40a001d2 000030 049c01cc 5485fa53 00003000 5885fa53 ... more DCD table 0001c0 27220200 1c90fd63 00000000 00000000 0001d0 00000000 00000000 00000000 00000000 * 0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have
000000 402000d1 77800000 00000000 777ffe60 000010 777ffe54 777ffe34 00000000 00000000 000020 777ffa34 0004b000 00000000 40a001d2 000030 049c01cc 5485fa53 00003000 5885fa53 ... more DCD table 0001c0 27220200 1c90fd63 00000000 ea000014 0001d0 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x1cc and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
---
v4: updated commit log, minor change to rebase on previous patch v3: other patches split from this one --- tools/imximage.c | 65 ++++++++++++++++++++++++++++++++++++------------------ tools/imximage.h | 4 ++-- 2 files changed, 46 insertions(+), 23 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 7e54e97..8457c8e 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; @@ -73,6 +72,9 @@ static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; +static uint32_t g_flash_offset; + +static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -102,8 +104,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */ - if ((fhdr_v2->header.tag == IVT_HEADER_TAG) && - (hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG)) + if (fhdr_v2->header.tag == IVT_HEADER_TAG) return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID; @@ -195,7 +196,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; @@ -208,7 +209,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- hdr_base = entry_point - sizeof(struct imx_header); + hdr_base = entry_point - header_length; fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point;
@@ -219,14 +220,18 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); + return header_length; }
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; + uint32_t header_length = (dcd_len) ? + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) + : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -235,9 +240,10 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; - fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header); + fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table); + fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); hdr_v2->boot_data.start = hdr_base - flash_offset; @@ -245,6 +251,7 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v2->csf = 0; header_size_ptr = &hdr_v2->boot_data.size; + return header_length; }
static void set_hdr_func(struct imx_header *imxhdr) @@ -342,9 +349,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM: - imxhdr->flash_offset = get_table_entry_id(imximage_bootops, + g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token); - if (imxhdr->flash_offset == -1) { + if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE); @@ -449,7 +456,7 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ - if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) { + if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); exit(EXIT_FAILURE); } @@ -494,14 +501,17 @@ static void imximage_print_header(const void *ptr) } }
-#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1)) - -static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) +int imximage_vrec_header(struct mkimage_params *params, + struct image_type_params *tparams) { - struct imx_header *imxhdr = (struct imx_header *)ptr; + struct imx_header *imxhdr; uint32_t dcd_len;
+ imxhdr = calloc(1, MAX_HEADER_SIZE); + if (!imxhdr) { + fprintf(stderr, "Error: out of memory\n"); + exit(EXIT_FAILURE); + } /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -509,21 +519,35 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ - imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED; + g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Set the imx header */ - (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset); + imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, + params->ep, g_flash_offset); + imximage_params.hdr = imxhdr; + return 0; +} + +#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1)) + +static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, + struct mkimage_params *params) +{ + /* Set the size in header */ + uint32_t offset = (char *)header_size_ptr - (char *)imximage_params.hdr; + uint32_t *p = (uint32_t *)((char *)ptr + offset); + /* * ROM bug alert * mx53 only loads 512 byte multiples. * The remaining fraction of a block bytes would * not be loaded. */ - *header_size_ptr = ALIGN(sbuf->st_size + imxhdr->flash_offset, 512); + *p = ALIGN(sbuf->st_size + g_flash_offset, 512); }
int imximage_check_params(struct mkimage_params *params) @@ -553,8 +577,7 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support", - .header_size = sizeof(struct imx_header), - .hdr = (void *)&imximage_header, + .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header, diff --git a/tools/imximage.h b/tools/imximage.h index 42b6090..0f39447 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header; - uint32_t flash_offset; };
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,7 +168,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 02/11] imximage: make header variable length
This makes the dcd table optional as well for v2. Also, the header offset is no longer right before the code starts.
Before this patch mx53loco_config produces
000000 402000d1 77800000 00000000 777ffc2c 000010 777ffc20 777ffc00 00000000 00000000 000020 777ff800 0004b200 00000000 40a001d2 000030 049c01cc 5485fa53 00003000 5885fa53 ... more DCD table 0001c0 27220200 1c90fd63 00000000 00000000 0001d0 00000000 00000000 00000000 00000000
0003f0 00000000 00000000 00000000 00000400 000400 ea000014 e59ff014 e59ff014 e59ff014
Notice offset 3fc contains 0x400. This is the header offset. There is no reason for this to be in the file, and I have removed it.
After this patch we have
000000 402000d1 77800000 00000000 777ffe60 000010 777ffe54 777ffe34 00000000 00000000 000020 777ffa34 0004b000 00000000 40a001d2 000030 049c01cc 5485fa53 00003000 5885fa53 ... more DCD table 0001c0 27220200 1c90fd63 00000000 ea000014 0001d0 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x1cc and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
v4: updated commit log, minor change to rebase on previous patch v3: other patches split from this one
tools/imximage.c | 65 ++++++++++++++++++++++++++++++++++++--------------
tools/imximage.h | 4 ++-- 2 files changed, 46 insertions(+), 23 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 7e54e97..8457c8e 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static struct imx_header imximage_header; static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; @@ -73,6 +72,9 @@ static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; +static uint32_t g_flash_offset;
+static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ - 102,8 +104,7 @@ static uint32_t detect_imximage_version(struct imx_header *imx_hdr) return IMXIMAGE_V1;
/* Try to detect V2 */
- if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
(hdr_v2->dcd_table.header.tag == DCD_HEADER_TAG))
if (fhdr_v2->header.tag == IVT_HEADER_TAG) return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID;
@@ -195,7 +196,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; @@ -208,7 +209,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER;
- hdr_base = entry_point - sizeof(struct imx_header);
- hdr_base = entry_point - header_length; fhdr_v1->app_dest_ptr = hdr_base - flash_offset; fhdr_v1->app_code_jump_vector = entry_point;
@@ -219,14 +220,18 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
- return header_length;
}
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base;
- uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] -((char*)imxhdr)
: offsetof(imx_header_v2_t, dcd_table);/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -235,9
+240,10 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
fhdr_v2->entry = entry_point; fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0;
- fhdr_v2->self = hdr_base = entry_point - sizeof(struct imx_header);
- fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table);
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base
+ offsetof(imx_header_v2_t, dcd_table) : 0;@@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v2->csf = 0; header_size_ptr = &hdr_v2->boot_data.size;
- return header_length;
}
static void set_hdr_func(struct imx_header *imxhdr) @@ -342,9 +349,9 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, set_hdr_func(imxhdr); break; case CMD_BOOT_FROM:
imxhdr->flash_offset = get_table_entry_id(imximage_bootops,
g_flash_offset = get_table_entry_id(imximage_bootops, "imximage boot option", token);
if (imxhdr->flash_offset == -1) {
if (g_flash_offset == -1) { fprintf(stderr, "Error: %s[%d] -Invalid boot device" "(%s)\n", name, lineno, token); exit(EXIT_FAILURE);@@ -449,7 +456,7 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
- if (imxhdr->flash_offset == FLASH_OFFSET_UNDEFINED) {
- if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); exit(EXIT_FAILURE); }
@@ -494,14 +501,17 @@ static void imximage_print_header(const void *ptr) } }
-#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1))
-static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+int imximage_vrec_header(struct mkimage_params *params,
struct image_type_params *tparams){
- struct imx_header *imxhdr = (struct imx_header *)ptr;
struct imx_header *imxhdr; uint32_t dcd_len;
imxhdr = calloc(1, MAX_HEADER_SIZE);
if (!imxhdr) {
fprintf(stderr, "Error: out of memory\n");exit(EXIT_FAILURE);} /*
- In order to not change the old imx cfg file
- by adding VERSION command into it, here need @@ -509,21
+519,35 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, */ imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */
- imxhdr->flash_offset = FLASH_OFFSET_UNDEFINED;
g_flash_offset = FLASH_OFFSET_UNDEFINED; set_hdr_func(imxhdr);
/* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
/* Set the imx header */
- (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imxhdr->flash_offset);
- imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len,
params->ep, g_flash_offset);- imximage_params.hdr = imxhdr;
- return 0;
+}
+#define ALIGN(a, b) (((a) + (b) - 1) & ~((b) - 1))
+static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)+{
- /* Set the size in header */
- uint32_t offset = (char *)header_size_ptr - (char
*)imximage_params.hdr;
- uint32_t *p = (uint32_t *)((char *)ptr + offset);
- /*
*/
- ROM bug alert
- mx53 only loads 512 byte multiples.
- The remaining fraction of a block bytes would
- not be loaded.
- *header_size_ptr = ALIGN(sbuf->st_size + imxhdr->flash_offset, 512);
- *p = ALIGN(sbuf->st_size + g_flash_offset, 512);
}
int imximage_check_params(struct mkimage_params *params) @@ -553,8 +577,7 @@ int imximage_check_params(struct mkimage_params *params) */ static struct image_type_params imximage_params = { .name = "Freescale i.MX 5x Boot Image support",
- .header_size = sizeof(struct imx_header),
- .hdr = (void *)&imximage_header,
- .vrec_header = imximage_vrec_header, .check_image_type = imximage_check_image_types, .verify_header = imximage_verify_header, .print_header = imximage_print_header,
diff --git a/tools/imximage.h b/tools/imximage.h index 42b6090..0f39447 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -30,6 +30,7 @@ #define DCD_BARKER 0xB17219E9
#define HEADER_OFFSET 0x400 +#define MAX_HEADER_SIZE (16 << 10)
#define CMD_DATA_STR "DATA" #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF @@ -156,7 +157,6 @@ struct imx_header { imx_header_v1_t hdr_v1; imx_header_v2_t hdr_v2; } header;
- uint32_t flash_offset;
};
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, @@ -168,7 +168,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t +dcd_len, uint32_t entry_point, uint32_t flash_offset);
#endif /* _IMXIMAGE_H_ */
1.7.9.5
This variable does not need to have file scope.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 8457c8e..97e5c4b 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static uint32_t imximage_version; - static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; @@ -254,7 +252,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr) +static void set_hdr_func(struct imx_header *imxhdr, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: @@ -335,6 +333,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, { int value; static int cmd_ver_first = ~0; + uint32_t imximage_version;
switch (cmd) { case CMD_IMAGE_VERSION: @@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(imxhdr); + set_hdr_func(imxhdr, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -419,6 +418,12 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int dcd_len = 0; int32_t cmd;
+ /* + * In order to not change the old imx cfg file + * by adding VERSION command into it, here need + * set up function ptr group to V1 by default. + */ + set_hdr_func(imxhdr, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -512,16 +517,8 @@ int imximage_vrec_header(struct mkimage_params *params, fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); } - /* - * In order to not change the old imx cfg file - * by adding VERSION command into it, here need - * set up function ptr group to V1 by default. - */ - imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED; - set_hdr_func(imxhdr); - /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 03/11] imximage: remove static imximage_version
This variable does not need to have file scope.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
tools/imximage.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 8457c8e..97e5c4b 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static uint32_t imximage_version;
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; @@ -254,7 +252,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr) +static void set_hdr_func(struct imx_header *imxhdr, uint32_t +imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: @@ -335,6 +333,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, { int value; static int cmd_ver_first = ~0;
uint32_t imximage_version;
switch (cmd) { case CMD_IMAGE_VERSION:
@@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1;
set_hdr_func(imxhdr);
set_hdr_func(imxhdr, imximage_version);@@ -419,6 +418,12 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int dcd_len = 0; int32_t cmd;
- /*
* In order to not change the old imx cfg file* by adding VERSION command into it, here need* set up function ptr group to V1 by default.*/- set_hdr_func(imxhdr, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -
512,16 +517,8 @@ int imximage_vrec_header(struct mkimage_params *params, fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); }
- /*
* In order to not change the old imx cfg file* by adding VERSION command into it, here need* set up function ptr group to V1 by default.*/- imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED;
- set_hdr_func(imxhdr);
- /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
-- 1.7.9.5
Need to move accesses to the static variables to a function where struct data_src is used.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 24 +++++++++++++----------- tools/imximage.h | 3 +++ 2 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 97e5c4b..3a010a6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -407,8 +407,11 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, break; } } -static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) + +static int parse_cfg_file(struct imx_header *imxhdr, char *name, + uint32_t entry_point) { + struct data_src ds; FILE *fd = NULL; char *line = NULL; char *token, *saveptr1, *saveptr2; @@ -418,6 +421,10 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int dcd_len = 0; int32_t cmd;
+ /* Be able to detect if the cfg file has no BOOT_FROM tag */ + g_flash_offset = FLASH_OFFSET_UNDEFINED; + memset(&ds, 0, sizeof(struct data_src)); + ds.imxhdr = imxhdr; /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -465,10 +472,10 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); exit(EXIT_FAILURE); } - return dcd_len; + /* Set the imx header */ + return (*set_imx_hdr)(imxhdr, dcd_len, entry_point, g_flash_offset); }
- static int imximage_check_image_types(uint8_t type) { if (type == IH_TYPE_IMXIMAGE) @@ -510,21 +517,16 @@ int imximage_vrec_header(struct mkimage_params *params, struct image_type_params *tparams) { struct imx_header *imxhdr; - uint32_t dcd_len;
imxhdr = calloc(1, MAX_HEADER_SIZE); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); } - /* Be able to detect if the cfg file has no BOOT_FROM tag */ - g_flash_offset = FLASH_OFFSET_UNDEFINED; - /* Parse dcd configuration file */ - dcd_len = parse_cfg_file(imxhdr, params->imagename);
- /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, - params->ep, g_flash_offset); + /* Parse dcd configuration file */ + imximage_params.header_size = parse_cfg_file(imxhdr, params->imagename, + params->ep); imximage_params.hdr = imxhdr; return 0; } diff --git a/tools/imximage.h b/tools/imximage.h index 0f39447..2895378 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -171,4 +171,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
+struct data_src { + struct imx_header *imxhdr; +}; #endif /* _IMXIMAGE_H_ */
Dear Troy Kisky,
In message 1354066303-29762-5-git-send-email-troy.kisky@boundarydevices.com you wrote:
Need to move accesses to the static variables to a function where struct data_src is used.
Could you please elucidate why exactly this is _needed_?
- /* Be able to detect if the cfg file has no BOOT_FROM tag */
- g_flash_offset = FLASH_OFFSET_UNDEFINED;
- memset(&ds, 0, sizeof(struct data_src));
Is this initialization really needed?
Best regards,
Wolfgang Denk
On 11/28/2012 2:38 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-5-git-send-email-troy.kisky@boundarydevices.com you wrote:
Need to move accesses to the static variables to a function where struct data_src is used.
Could you please elucidate why exactly this is _needed_?
My goal was to reduce the number of static variables, but strictly speaking it has little benefit other than giving me a warm fuzzy feeling.
I'm not that only one that dislikes static though.
- /* Be able to detect if the cfg file has no BOOT_FROM tag */
- g_flash_offset = FLASH_OFFSET_UNDEFINED;
- memset(&ds, 0, sizeof(struct data_src));
Is this initialization really needed?
Best regards,
Wolfgang Denk
ds is on the stack, and even if not needed now, I like to avoid future random bugs.
Troy
Dear Troy Kisky,
In message 50B659AD.9090704@boundarydevices.com you wrote:
Could you please elucidate why exactly this is _needed_?
My goal was to reduce the number of static variables, but strictly speaking it has little benefit other than giving me a warm fuzzy feeling.
I'm not that only one that dislikes static though.
...
ds is on the stack, and even if not needed now, I like to avoid future random bugs.
Did you check the impact of your changes on the memory footprint?
Changing code that uses a static variable initialized (implicitly or explicitly) to zero [which results in allocation of the BSS segment, i. e. zero space in the code or in the image file] into real code is something that is a bit of expensive just for satisfying random "dislikes".
I think you should better leave that as is. The code is pretty efficent that way, and you increase it for little or no benefit.
Best regards,
Wolfgang Denk
Change 1st argument of set_imx_hdr/set_dcd_val to struct data_src.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 41 +++++++++++++++++++++-------------------- tools/imximage.h | 5 +++-- 2 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 3a010a6..ddac95f 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -116,10 +116,10 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) { - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; + dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
switch (fld) { case CFG_REG_SIZE: @@ -144,10 +144,10 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } }
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) { - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) { case CFG_REG_ADDRESS: @@ -194,15 +194,15 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { - imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; + imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)imxhdr)); + - ((char *)ds->imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -217,19 +217,20 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; - header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); + header_size_ptr = (uint32_t *)(((char *)ds->imxhdr) + + header_length - 4); return header_length; }
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { - imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; + imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) - : offsetof(imx_header_v2_t, dcd_table); + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - + ((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -328,7 +329,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, +static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, char *name, int lineno, int fld, int dcd_len) { int value; @@ -345,7 +346,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(imxhdr, imximage_version); + set_hdr_func(ds->imxhdr, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -360,14 +361,14 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); + (*set_dcd_val)(ds, name, lineno, fld, value, dcd_len); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; } }
-static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, +static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, char *token, char *name, int lineno, int fld, int *dcd_len) { int value; @@ -383,7 +384,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -391,7 +392,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len); + (*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE) { (*dcd_len)++; @@ -458,7 +459,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, if (token[0] == '#') break;
- parse_cfg_fld(imxhdr, &cmd, token, name, + parse_cfg_fld(&ds, &cmd, token, name, lineno, fld, &dcd_len); }
@@ -473,7 +474,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*set_imx_hdr)(imxhdr, dcd_len, entry_point, g_flash_offset); + return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 2895378..3054d55 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -159,7 +159,8 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, +struct data_src; +typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off); @@ -168,7 +169,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
struct data_src {
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 05/11] imximage: change parameters for set_dcd_val/set_imx_hdr
Change 1st argument of set_imx_hdr/set_dcd_val to struct data_src.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
tools/imximage.c | 41 +++++++++++++++++++++-------------------- tools/imximage.h | 5 +++-- 2 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 3a010a6..ddac95f 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -116,10 +116,10 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) {
- dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
switch (fld) { case CFG_REG_SIZE:
@@ -144,10 +144,10 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } }
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) {
- dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) { case CFG_REG_ADDRESS:
@@ -194,15 +194,15 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) {
- imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
- imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; uint32_t header_length = (((char *)&dcd_v1-
addr_data[dcd_len].addr)
- ((char *)imxhdr));
- ((char *)ds->imxhdr));/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -217,19
+217,20 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0;
- header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
- header_size_ptr = (uint32_t *)(((char *)ds->imxhdr) +
header_length - 4);}
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) {
- imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
- imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] -((char*)imxhdr)
: offsetof(imx_header_v2_t, dcd_table);
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] -((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table);/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -328,7
+329,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, +static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char +*token, char *name, int lineno, int fld, int dcd_len) { int value; @@ -345,7 +346,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1;
set_hdr_func(imxhdr, imximage_version);
set_hdr_func(ds->imxhdr, imximage_version);@@ -360,14 +361,14 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno);
(*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
(*set_dcd_val)(ds, name, lineno, fld, value, dcd_len);}
-static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, +static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, char *token, char *name, int lineno, int fld, int *dcd_len) { int value; @@ -383,7 +384,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, } break; case CFG_REG_SIZE:
parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld,*dcd_len);
parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len);@@ -391,7 +392,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno);
(*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len);
(*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);if (fld == CFG_REG_VALUE) { (*dcd_len)++;
@@ -458,7 +459,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, if (token[0] == '#') break;
parse_cfg_fld(imxhdr, &cmd, token, name,
parse_cfg_fld(&ds, &cmd, token, name, lineno, fld, &dcd_len);@@ -473,7 +474,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */
- return (*set_imx_hdr)(imxhdr, dcd_len, entry_point, g_flash_offset);
- return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset);
}
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 2895378..3054d55 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -159,7 +159,8 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, +struct data_src; +typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off); @@ -168,7 +169,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
struct data_src {
1.7.9.5
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 13 ++++++------- tools/imximage.h | 1 + 2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index ddac95f..30f3c81 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -67,7 +67,6 @@ static table_entry_t imximage_versions[] = {
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; -static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset; @@ -253,19 +252,19 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr, uint32_t imximage_version) +static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; - set_imx_hdr = set_imx_hdr_v1; + ds->set_imx_hdr = set_imx_hdr_v1; max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; - set_imx_hdr = set_imx_hdr_v2; + ds->set_imx_hdr = set_imx_hdr_v2; max_dcd_entries = MAX_HW_CFG_SIZE_V2; break; default: @@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(ds->imxhdr, imximage_version); + set_hdr_func(ds, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -431,7 +430,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, * by adding VERSION command into it, here need * set up function ptr group to V1 by default. */ - set_hdr_func(imxhdr, IMXIMAGE_V1); + set_hdr_func(&ds, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -474,7 +473,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); + return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 3054d55..f27a2ef 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -174,5 +174,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len,
struct data_src { struct imx_header *imxhdr; + set_imx_hdr_t set_imx_hdr; }; #endif /* _IMXIMAGE_H_ */
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 06/11] imximage: move set_imx_hdr to struct data_src
It's better to not let the commit log empty.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
v3: new patch
tools/imximage.c | 13 ++++++------- tools/imximage.h | 1 + 2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index ddac95f..30f3c81 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -67,7 +67,6 @@ static table_entry_t imximage_versions[] = {
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; -static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset; @@ -253,19 +252,19 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr, uint32_t imximage_version) +static void set_hdr_func(struct data_src *ds, uint32_t +imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1;
set_imx_hdr = set_imx_hdr_v1;
ds->set_imx_hdr = set_imx_hdr_v1;
set_imx_hdr = set_imx_hdr_v2;
ds->set_imx_hdr = set_imx_hdr_v2;@@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1;
set_hdr_func(ds->imxhdr, imximage_version);
set_hdr_func(ds, imximage_version);@@ -431,7 +430,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, * by adding VERSION command into it, here need * set up function ptr group to V1 by default. */
- set_hdr_func(imxhdr, IMXIMAGE_V1);
- set_hdr_func(&ds, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -
474,7 +473,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */
- return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset);
- return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset);
}
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 3054d55..f27a2ef 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -174,5 +174,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len,
struct data_src { struct imx_header *imxhdr;
- set_imx_hdr_t set_imx_hdr;
};
#endif /* _IMXIMAGE_H_ */
1.7.9.5
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 9 ++++----- tools/imximage.h | 1 + 2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 30f3c81..6d5cfa7 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; @@ -256,13 +255,13 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: - set_dcd_val = set_dcd_val_v1; + ds->set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; ds->set_imx_hdr = set_imx_hdr_v1; max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: - set_dcd_val = set_dcd_val_v2; + ds->set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; ds->set_imx_hdr = set_imx_hdr_v2; max_dcd_entries = MAX_HW_CFG_SIZE_V2; @@ -360,7 +359,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(ds, name, lineno, fld, value, dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -391,7 +390,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE) { (*dcd_len)++; diff --git a/tools/imximage.h b/tools/imximage.h index f27a2ef..444ddce 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -175,5 +175,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr; + set_dcd_val_t set_dcd_val; }; #endif /* _IMXIMAGE_H_ */
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 07/11] imximage: move set_dcd_val to struct data_src
It's better to not let the commit log empty.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
v3: new patch
tools/imximage.c | 9 ++++----- tools/imximage.h | 1 + 2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 30f3c81..6d5cfa7 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; @@ -256,13 +255,13 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1:
set_dcd_val = set_dcd_val_v1;
ds->set_dcd_val = set_dcd_val_v1;
set_dcd_val = set_dcd_val_v2;
ds->set_dcd_val = set_dcd_val_v2;@@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno);
(*set_dcd_val)(ds, name, lineno, fld, value, dcd_len);
(*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len);@@ -391,7 +390,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno);
(*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
(*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);if (fld == CFG_REG_VALUE) { (*dcd_len)++;
diff --git a/tools/imximage.h b/tools/imximage.h index f27a2ef..444ddce 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -175,5 +175,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr;
- set_dcd_val_t set_dcd_val;
};
#endif /* _IMXIMAGE_H_ */
1.7.9.5
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: moved static variables together --- tools/imximage.c | 143 ++++++++++++++++++++++++++---------------------------- tools/imximage.h | 18 +++---- 2 files changed, 76 insertions(+), 85 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 6d5cfa7..2f5ee14 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_rst_t set_dcd_rst; -static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
@@ -115,7 +113,7 @@ static void err_imximage_version(int version) }
static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
@@ -128,13 +126,15 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, name, lineno, value); exit(EXIT_FAILURE); } - dcd_v1->addr_data[off].type = value; + *ds->p_entry++ = value; break; case CFG_REG_ADDRESS: - dcd_v1->addr_data[off].addr = value; + *ds->p_entry++ = value; break; case CFG_REG_VALUE: - dcd_v1->addr_data[off].value = value; + *ds->p_entry++ = value; + dcd_v1->preamble.length = (char *)ds->p_entry + - (char *)&dcd_v1->addr_data[0].type; break; default: break; @@ -143,16 +143,42 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, }
static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { + uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) { + case CFG_REG_SIZE: + /* Byte, halfword, word */ + if ((value != 1) && (value != 2) && (value != 4)) { + fprintf(stderr, "Error: %s[%d] - " + "Invalid register size " "(%d)\n", + name, lineno, value); + exit(EXIT_FAILURE); + } + if (ds->p_dcd && (ds->p_dcd->param == value)) + break; + if (!ds->p_dcd) { + dcd_v2->header.tag = DCD_HEADER_TAG; + dcd_v2->header.version = DCD_VERSION; + ds->p_dcd = &dcd_v2->write_dcd_command; + } else { + ds->p_dcd = (write_dcd_command_t *)ds->p_entry; + } + ds->p_dcd->param = value; + ds->p_dcd->tag = DCD_COMMAND_TAG; + ds->p_entry = (uint32_t *)(ds->p_dcd + 1); + break; case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + *ds->p_entry++ = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + *ds->p_entry++ = cpu_to_be32(value); + len = (char *)ds->p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)ds->p_entry - (char *)ds->p_dcd; + ds->p_dcd->length = cpu_to_be16(len); break; default: break; @@ -160,47 +186,14 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } }
-/* - * Complete setting up the rest field of DCD of V1 - * such as barker code and DCD data length. - */ -static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; - - dcd_v1->preamble.barker = DCD_BARKER; - dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); -} - -/* - * Complete setting up the reset field of DCD of V2 - * such as DCD tag, version, length, etc. - */ -static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; - - dcd_v2->header.tag = DCD_HEADER_TAG; - dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); - dcd_v2->header.version = DCD_VERSION; - dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; -} - -static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; - dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; - uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)ds->imxhdr)); + uint32_t header_length = ((char *)ds->p_entry) + 4 + - ((char *)ds->imxhdr);
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -220,15 +213,13 @@ static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; - uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - - ((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table); + uint32_t header_length = ((char *)ds->p_entry) - ((char *)ds->imxhdr);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -239,7 +230,7 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + fhdr_v2->dcd_ptr = (ds->p_dcd) ? hdr_base + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); @@ -256,15 +247,20 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) switch (imximage_version) { case IMXIMAGE_V1: ds->set_dcd_val = set_dcd_val_v1; - set_dcd_rst = set_dcd_rst_v1; ds->set_imx_hdr = set_imx_hdr_v1; - max_dcd_entries = MAX_HW_CFG_SIZE_V1; + ds->p_entry = &ds->imxhdr->header.hdr_v1.dcd_table + .addr_data[0].type; + ds->p_max_dcd = &ds->imxhdr->header.hdr_v1.dcd_table + .addr_data[MAX_HW_CFG_SIZE_V1].type; + ds->imxhdr->header.hdr_v1.dcd_table.preamble.barker = + DCD_BARKER; break; case IMXIMAGE_V2: ds->set_dcd_val = set_dcd_val_v2; - set_dcd_rst = set_dcd_rst_v2; ds->set_imx_hdr = set_imx_hdr_v2; - max_dcd_entries = MAX_HW_CFG_SIZE_V2; + ds->p_entry = (uint32_t *)&ds->imxhdr->header.hdr_v2.dcd_table; + ds->p_max_dcd = (uint32_t *) + ((char *)ds->imxhdr + MAX_HEADER_SIZE); break; default: err_imximage_version(imximage_version); @@ -328,7 +324,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) }
static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, - char *name, int lineno, int fld, int dcd_len) + char *name, int lineno, int fld) { int value; static int cmd_ver_first = ~0; @@ -359,7 +355,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -367,7 +363,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, }
static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, - char *token, char *name, int lineno, int fld, int *dcd_len) + char *token, char *name, int lineno, int fld) { int value;
@@ -382,7 +378,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(ds, *cmd, token, name, lineno, fld); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -390,16 +386,14 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len); - - if (fld == CFG_REG_VALUE) { - (*dcd_len)++; - if (*dcd_len > max_dcd_entries) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, max_dcd_entries); - exit(EXIT_FAILURE); - } + (*ds->set_dcd_val)(ds, name, lineno, fld, value); + if (ds->p_entry > ds->p_max_dcd) { + uint32_t size = (char *)ds->p_max_dcd - + (char *)ds->imxhdr; + fprintf(stderr, "Error: %s[%d] -" + "header exceeds maximum size(%d)\n", + name, lineno, size); + exit(EXIT_FAILURE); } break; default: @@ -417,7 +411,6 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, int lineno = 0; int fld; size_t len; - int dcd_len = 0; int32_t cmd;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ @@ -458,12 +451,10 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, break;
parse_cfg_fld(&ds, &cmd, token, name, - lineno, fld, &dcd_len); + lineno, fld); }
} - - (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ @@ -472,7 +463,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); + return (*ds.set_imx_hdr)(&ds, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) @@ -517,7 +508,11 @@ int imximage_vrec_header(struct mkimage_params *params, { struct imx_header *imxhdr;
- imxhdr = calloc(1, MAX_HEADER_SIZE); + /* + * A little extra space to avoid access violation on dcd table overflow. + * Overflow is checked after entry is added. + */ + imxhdr = calloc(1, MAX_HEADER_SIZE + 32); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); diff --git a/tools/imximage.h b/tools/imximage.h index 444ddce..196bb51 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -47,7 +47,6 @@ #define DCD_HEADER_TAG 0xD2 #define DCD_COMMAND_TAG 0xCC #define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4
enum imximage_cmd { CMD_INVALID, @@ -160,21 +159,18 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds, - char *name, int lineno, - int fld, uint32_t value, - uint32_t off); +typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, + int lineno, int fld, uint32_t value);
-typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - char *name, int lineno); - -typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, - uint32_t entry_point, uint32_t flash_offset); +typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point, + uint32_t flash_offset);
struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val; + uint32_t *p_max_dcd; + uint32_t *p_entry; + write_dcd_command_t *p_dcd; }; #endif /* _IMXIMAGE_H_ */
Dear Troy Kisky,
In message 1354066303-29762-9-git-send-email-troy.kisky@boundarydevices.com you wrote:
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
I cannot see how the Subject: and the actual commit message (and code) are related.
Best regards,
Wolfgang Denk
On 11/28/2012 2:39 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-9-git-send-email-troy.kisky@boundarydevices.com you wrote:
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
I cannot see how the Subject: and the actual commit message (and code) are related.
Best regards,
Wolfgang Denk
How about this for the commit message
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
i.e. before this patch, the sequence DATA 4 0x83FD9014 0x00000000 DATA 2 0x83FC8000 0x00fe
was only valid for Version 1 headers, now it is valid for Version 2 headers as well.
Parameters were changed for set_dcd_val_t to accomplish this. So, set_dcd_val_v1 for version 1 was also slightly modified. But no new functionality was added for version 1.
No current config files use this functionality, but this patch removes more lines than it adds. _________________________________________________________
On 28/11/2012 21:40, Troy Kisky wrote:
On 11/28/2012 2:39 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-9-git-send-email-troy.kisky@boundarydevices.com you wrote:
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
I cannot see how the Subject: and the actual commit message (and code) are related.
Best regards,
Wolfgang Denk
How about this for the commit message
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
i.e. before this patch, the sequence DATA 4 0x83FD9014 0x00000000 DATA 2 0x83FC8000 0x00fe
was only valid for Version 1 headers, now it is valid for Version 2 headers as well.
Much better ! Maybe you can also change the title of the patch, telling that you are fixing a bug (the fact that first parameter was not correctly interpreted for V2 *is* a bug). And the example explains very well the issue.
Parameters were changed for set_dcd_val_t to accomplish this. So, set_dcd_val_v1 for version 1 was also slightly modified. But no new functionality was added for version 1.
No current config files use this functionality, but this patch removes more lines than it adds.
Best regards, Stefano Babic
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 08/11] imximage: enable word writes for version2 header
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
v3: moved static variables together
tools/imximage.c | 143 ++++++++++++++++++++++++++---------------------------- tools/imximage.h | 18 +++---- 2 files changed, 76 insertions(+), 85 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 6d5cfa7..2f5ee14 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_rst_t set_dcd_rst; -static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
@@ -115,7 +113,7 @@ static void err_imximage_version(int version) }
static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value, uint32_t off)
int fld, uint32_t value){ dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
@@ -128,13 +126,15 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, name, lineno, value); exit(EXIT_FAILURE); }
dcd_v1->addr_data[off].type = value;
*ds->p_entry++ = value;
dcd_v1->addr_data[off].addr = value;
*ds->p_entry++ = value;
dcd_v1->addr_data[off].value = value;
*ds->p_entry++ = value;dcd_v1->preamble.length = (char *)ds->p_entry- (char *)&dcd_v1->addr_data[0].type;@@ -143,16 +143,42 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, }
static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value, uint32_t off)
int fld, uint32_t value){
uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) {
case CFG_REG_SIZE:
/* Byte, halfword, word */if ((value != 1) && (value != 2) && (value != 4)) {fprintf(stderr, "Error: %s[%d] - ""Invalid register size " "(%d)\n",name, lineno, value);exit(EXIT_FAILURE);}if (ds->p_dcd && (ds->p_dcd->param == value))break;if (!ds->p_dcd) {dcd_v2->header.tag = DCD_HEADER_TAG;dcd_v2->header.version = DCD_VERSION;ds->p_dcd = &dcd_v2->write_dcd_command;} else {ds->p_dcd = (write_dcd_command_t *)ds->p_entry;}ds->p_dcd->param = value;ds->p_dcd->tag = DCD_COMMAND_TAG;ds->p_entry = (uint32_t *)(ds->p_dcd + 1);break;case CFG_REG_ADDRESS:
dcd_v2->addr_data[off].addr = cpu_to_be32(value);
*ds->p_entry++ = cpu_to_be32(value);
dcd_v2->addr_data[off].value = cpu_to_be32(value);
*ds->p_entry++ = cpu_to_be32(value);len = (char *)ds->p_entry - (char *)&dcd_v2->header;dcd_v2->header.length = cpu_to_be16(len);len = (char *)ds->p_entry - (char *)ds->p_dcd;ds->p_dcd->length = cpu_to_be16(len);@@ -160,47 +186,14 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } }
-/*
- Complete setting up the rest field of DCD of V1
- such as barker code and DCD data length.
- */
-static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
char *name, int lineno)-{
- dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
- dcd_v1->preamble.barker = DCD_BARKER;
- dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
-}
-/*
- Complete setting up the reset field of DCD of V2
- such as DCD tag, version, length, etc.
- */
-static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
char *name, int lineno)-{
- dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table;
- dcd_v2->header.tag = DCD_HEADER_TAG;
- dcd_v2->header.length = cpu_to_be16(
dcd_len * sizeof(dcd_addr_data_t) + 8);- dcd_v2->header.version = DCD_VERSION;
- dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG;
- dcd_v2->write_dcd_command.length = cpu_to_be16(
dcd_len * sizeof(dcd_addr_data_t) + 4);- dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM;
-}
-static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
- dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base;
- uint32_t header_length = (((char *)&dcd_v1-
addr_data[dcd_len].addr)
- ((char *)ds->imxhdr));
uint32_t header_length = ((char *)ds->p_entry) + 4
- ((char *)ds->imxhdr);/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -220,15
+213,13 @@ static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base;
- uint32_t header_length = (dcd_len) ?
(char *)&hdr_v2->dcd_table.addr_data[dcd_len] -((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table);
uint32_t header_length = ((char *)ds->p_entry) - ((char *)ds->imxhdr);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -239,7
+230,7 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base
- fhdr_v2->dcd_ptr = (ds->p_dcd) ? hdr_base + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); @@ -256,15
+247,20 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) switch (imximage_version) { case IMXIMAGE_V1: ds->set_dcd_val = set_dcd_val_v1;
set_dcd_rst = set_dcd_rst_v1;max_dcd_entries = MAX_HW_CFG_SIZE_V1;
ds->p_entry = &ds->imxhdr->header.hdr_v1.dcd_table.addr_data[0].type;ds->p_max_dcd = &ds->imxhdr->header.hdr_v1.dcd_table.addr_data[MAX_HW_CFG_SIZE_V1].type;ds->imxhdr->header.hdr_v1.dcd_table.preamble.barker =DCD_BARKER;
set_dcd_rst = set_dcd_rst_v2;max_dcd_entries = MAX_HW_CFG_SIZE_V2;
ds->p_entry = (uint32_t *)&ds->imxhdr-header.hdr_v2.dcd_table;
ds->p_max_dcd = (uint32_t *)((char *)ds->imxhdr + MAX_HEADER_SIZE);@@ -328,7 +324,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) }
static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token,
char *name, int lineno, int fld, int dcd_len)
char *name, int lineno, int fld){ int value; static int cmd_ver_first = ~0; @@ -359,7 +355,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno);
(*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len);
(*ds->set_dcd_val)(ds, name, lineno, fld, value);@@ -367,7 +363,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, }
static void parse_cfg_fld(struct data_src *ds, int32_t *cmd,
char *token, char *name, int lineno, int fld, int *dcd_len)
char *token, char *name, int lineno, int fld){ int value;
@@ -382,7 +378,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, } break; case CFG_REG_SIZE:
parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len);
parse_cfg_cmd(ds, *cmd, token, name, lineno, fld);@@ -390,16 +386,14 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno);
(*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);if (fld == CFG_REG_VALUE) {(*dcd_len)++;if (*dcd_len > max_dcd_entries) {fprintf(stderr, "Error: %s[%d] -""DCD table exceeds maximum size(%d)\n",name, lineno, max_dcd_entries);exit(EXIT_FAILURE);}
(*ds->set_dcd_val)(ds, name, lineno, fld, value);if (ds->p_entry > ds->p_max_dcd) {uint32_t size = (char *)ds->p_max_dcd -(char *)ds->imxhdr;fprintf(stderr, "Error: %s[%d] -""header exceeds maximum size(%d)\n",name, lineno, size);exit(EXIT_FAILURE);@@ -417,7 +411,6 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, int lineno = 0; int fld; size_t len;
int dcd_len = 0; int32_t cmd;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ @@ -
458,12 +451,10 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, break;
parse_cfg_fld(&ds, &cmd, token, name,
lineno, fld, &dcd_len);
lineno, fld);}
}
(*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */
@@ -472,7 +463,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */
- return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset);
- return (*ds.set_imx_hdr)(&ds, entry_point, g_flash_offset);
}
static int imximage_check_image_types(uint8_t type) @@ -517,7 +508,11 @@ int imximage_vrec_header(struct mkimage_params *params, { struct imx_header *imxhdr;
- imxhdr = calloc(1, MAX_HEADER_SIZE);
- /*
* A little extra space to avoid access violation on dcd table overflow.* Overflow is checked after entry is added.*/- imxhdr = calloc(1, MAX_HEADER_SIZE + 32); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE);
diff --git a/tools/imximage.h b/tools/imximage.h index 444ddce..196bb51 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -47,7 +47,6 @@ #define DCD_HEADER_TAG 0xD2 #define DCD_COMMAND_TAG 0xCC #define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4
enum imximage_cmd { CMD_INVALID, @@ -160,21 +159,18 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds,
char *name, int lineno,int fld, uint32_t value,uint32_t off);+typedef void (*set_dcd_val_t)(struct data_src *ds, char *name,
int lineno, int fld, uint32_t value);-typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
uint32_t dcd_len,char *name, int lineno);-typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset);+typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point,
uint32_t flash_offset);struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val;
- uint32_t *p_max_dcd;
- uint32_t *p_entry;
- write_dcd_command_t *p_dcd;
};
#endif /* _IMXIMAGE_H_ */
1.7.9.5
This file can help you parse configuration files.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/Makefile | 2 + tools/parse_helper.c | 173 ++++++++++++++++++++++++++++++++++++++++++++++++++ tools/parse_helper.h | 28 ++++++++ 3 files changed, 203 insertions(+) create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
diff --git a/tools/Makefile b/tools/Makefile index 686840a..db3b247 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -94,6 +94,7 @@ NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y += kwbimage.o NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += imximage.o +NOPED_OBJ_FILES-y += parse_helper.o NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkenvimage.o NOPED_OBJ_FILES-y += mkimage.o @@ -208,6 +209,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \ $(obj)fit_image.o \ $(obj)image.o \ $(obj)imximage.o \ + $(obj)parse_helper.o \ $(obj)kwbimage.o \ $(obj)pblimage.o \ $(obj)md5.o \ diff --git a/tools/parse_helper.c b/tools/parse_helper.c new file mode 100644 index 0000000..0a5c5f6 --- /dev/null +++ b/tools/parse_helper.c @@ -0,0 +1,173 @@ +/* + * (C) Copyright 20012 Boundary Devices Inc, troy.kisky@boundarydevices.com + * + * Licensed under the GPL-2 or later. + */ + +/* Required to obtain the getline prototype from stdio.h */ +#define _GNU_SOURCE + +#include "mkimage.h" +#include <image.h> +#include "parse_helper.h" + +int ph_open(struct parse_helper *ph, char *filename) +{ + ph->line = NULL; + ph->len = 0; + ph->fd = fopen(filename, "r"); + ph->lineno = 0; + ph->cmd_started = 0; + ph->filename = filename; + ph->p = NULL; + return (!ph->fd) ? -1 : 0; +} + +void ph_close(struct parse_helper *ph) +{ + fclose(ph->fd); + ph->fd = NULL; +} + +int ph_skip_separators(struct parse_helper *ph) +{ + int line_no = ph->lineno; + char *p = ph->p; + + for (;;) { + char c; + if (!p) { + if (getline(&ph->line, &ph->len, ph->fd) <= 0) + return -1; + ph->lineno++; + p = ph->line; + if (ph->cmd_started) { + fprintf(stderr, "warning: continuing command on" + " next line, line %s[%d](%s)\n", + ph->filename, ph->lineno, p); + } + } + c = *p; + if ((c == ' ') || (c == '\t')) { + p++; + continue; + } + /* Drop all text starting with '#' as comments */ + if ((c == '#') || (c == '\r') || (c == '\n') + || !c) { + p = NULL; + continue; + } + if (c == ';') { + if (ph->cmd_started) { + fprintf(stderr, "Error: command not " + "finished:%s[%d](%s)\n", + ph->filename, ph->lineno, p); + exit(EXIT_FAILURE); + } + p++; + continue; + } + if (!ph->cmd_started && line_no == ph->lineno) { + fprintf(stderr, "Error: extra data at end " + "of line %s[%d](%s)\n", + ph->filename, ph->lineno, p); + exit(EXIT_FAILURE); + } + ph->p = p; + return 0; + } +} + +int ph_skip_comma(struct parse_helper *ph) +{ + char *p = ph->p; + + for (;;) { + char c = *p++; + if ((c == '#') || (c == '\r') || (c == '\n') || !c) + return 0; + if (c == ',') { + ph->p = p; + ph_skip_separators(ph); + return 1; + } + if ((c != ' ') && (c == '\t')) + return 0; + } +} + +int ph_get_value(struct parse_helper *ph, uint32_t *pval) +{ + char *endptr; + uint32_t value; + + if (ph_skip_separators(ph)) + return -1; + errno = 0; + value = strtoul(ph->p, &endptr, 16); + if (errno || (ph->p == endptr)) + return -1; + *pval = value; + ph->p = endptr; + return 0; +} + +/* + * Comma separator optional + * Input: + * ph - input source + * data - array to fill in + * cnt - exact number of elements to parse + * Return: number of elements parsed, or error + */ +int ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt) +{ + int i = 0; + + for (;;) { + int ret = ph_get_value(ph, &data[i++]); + if (ret) + return ret; + if (i >= cnt) + break; + ph_skip_comma(ph); /* comma is optional */ + } + return i; +} + +static char *grab_token(char *dest, int size, char *src) +{ + while (size) { + char c = *src; + if ((c == ' ') || (c == '\t') || (c == '\r') || (c == '\n') + || (c == '#') || !c) + break; + *dest++ = c; + size--; + src++; + } + if (!size) + return NULL; + *dest = 0; + return src; +} + +int ph_get_table_entry_id(struct parse_helper *ph, + const table_entry_t *table, const char *table_name) +{ + int val; + char token[16]; + char *p; + + if (ph_skip_separators(ph)) + return -1; + p = grab_token(token, sizeof(token), ph->p); + if (!p) + return -1; + val = get_table_entry_id(table, table_name, token); + if (val != -1) + ph->p = p; + return val; +} + diff --git a/tools/parse_helper.h b/tools/parse_helper.h new file mode 100644 index 0000000..1ff98a3 --- /dev/null +++ b/tools/parse_helper.h @@ -0,0 +1,28 @@ +/* + * (C) Copyright 20012 Boundary Devices Inc, troy.kisky@boundarydevices.com + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _PARSE_HELPER_H_ +#define _PARSE_HELPER_H_ + +struct parse_helper { + char *line; + size_t len; + FILE *fd; + int lineno; + char cmd_started; + char *filename; + char *p; +}; + +int ph_open(struct parse_helper *ph, char *filename); +void ph_close(struct parse_helper *ph); +int ph_skip_separators(struct parse_helper *ph); +int ph_skip_comma(struct parse_helper *ph); +int ph_get_value(struct parse_helper *ph, uint32_t *pval); +int ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt); +int ph_get_table_entry_id(struct parse_helper *ph, + const table_entry_t *table, const char *table_name); +#endif
Dear Troy Kisky,
In message 1354066303-29762-10-git-send-email-troy.kisky@boundarydevices.com you wrote:
This file can help you parse configuration files.
If this is intended to be useful, you need to add documentation, for example what your definition of "configuration files" is, and which data format[s] is/are supported, etc.
As is, this cannot be reused.
Best regards,
Wolfgang Denk
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 09/11] tools: add parse_helper file
This file can help you parse configuration files.
One line is enough. :)
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
tools/Makefile | 2 + tools/parse_helper.c | 173 ++++++++++++++++++++++++++++++++++++++++++++++++++ tools/parse_helper.h | 28 ++++++++ 3 files changed, 203 insertions(+) create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
diff --git a/tools/Makefile b/tools/Makefile index 686840a..db3b247 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -94,6 +94,7 @@ NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y += kwbimage.o NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += imximage.o +NOPED_OBJ_FILES-y += parse_helper.o NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkenvimage.o NOPED_OBJ_FILES-y += mkimage.o @@ -208,6 +209,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \ $(obj)fit_image.o \ $(obj)image.o \ $(obj)imximage.o \
$(obj)parse_helper.o \ $(obj)kwbimage.o \ $(obj)pblimage.o \ $(obj)md5.o \diff --git a/tools/parse_helper.c b/tools/parse_helper.c new file mode 100644 index 0000000..0a5c5f6 --- /dev/null +++ b/tools/parse_helper.c @@ -0,0 +1,173 @@ +/*
- (C) Copyright 20012 Boundary Devices Inc,
+troy.kisky@boundarydevices.com
- Licensed under the GPL-2 or later.
- */
+/* Required to obtain the getline prototype from stdio.h */ #define +_GNU_SOURCE
+#include "mkimage.h" +#include <image.h> +#include "parse_helper.h"
+int ph_open(struct parse_helper *ph, char *filename) {
- ph->line = NULL;
- ph->len = 0;
- ph->fd = fopen(filename, "r");
- ph->lineno = 0;
- ph->cmd_started = 0;
- ph->filename = filename;
- ph->p = NULL;
- return (!ph->fd) ? -1 : 0;
+}
+void ph_close(struct parse_helper *ph) +{
- fclose(ph->fd);
- ph->fd = NULL;
+}
+int ph_skip_separators(struct parse_helper *ph) {
- int line_no = ph->lineno;
- char *p = ph->p;
- for (;;) {
char c;if (!p) {if (getline(&ph->line, &ph->len, ph->fd) <= 0)return -1;ph->lineno++;p = ph->line;if (ph->cmd_started) {fprintf(stderr, "warning: continuing commandon"
" next line, line %s[%d](%s)\n",ph->filename, ph->lineno, p);}}c = *p;if ((c == ' ') || (c == '\t')) {p++;continue;}/* Drop all text starting with '#' as comments */if ((c == '#') || (c == '\r') || (c == '\n')|| !c) {p = NULL;continue;}if (c == ';') {if (ph->cmd_started) {fprintf(stderr, "Error: command not ""finished:%s[%d](%s)\n",ph->filename, ph->lineno, p);exit(EXIT_FAILURE);}p++;continue;}if (!ph->cmd_started && line_no == ph->lineno) {fprintf(stderr, "Error: extra data at end ""of line %s[%d](%s)\n",ph->filename, ph->lineno, p);exit(EXIT_FAILURE);}ph->p = p;return 0;- }
+}
+int ph_skip_comma(struct parse_helper *ph) {
- char *p = ph->p;
- for (;;) {
char c = *p++;if ((c == '#') || (c == '\r') || (c == '\n') || !c)return 0;if (c == ',') {ph->p = p;ph_skip_separators(ph);return 1;}if ((c != ' ') && (c == '\t'))return 0;- }
+}
+int ph_get_value(struct parse_helper *ph, uint32_t *pval) {
- char *endptr;
- uint32_t value;
- if (ph_skip_separators(ph))
return -1;- errno = 0;
- value = strtoul(ph->p, &endptr, 16);
- if (errno || (ph->p == endptr))
return -1;- *pval = value;
- ph->p = endptr;
- return 0;
+}
+/*
- Comma separator optional
- Input:
- ph - input source
- data - array to fill in
- cnt - exact number of elements to parse
- Return: number of elements parsed, or error */ int
+ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt) {
- int i = 0;
- for (;;) {
int ret = ph_get_value(ph, &data[i++]);if (ret)return ret;if (i >= cnt)break;ph_skip_comma(ph); /* comma is optional */- }
- return i;
+}
+static char *grab_token(char *dest, int size, char *src) {
- while (size) {
char c = *src;if ((c == ' ') || (c == '\t') || (c == '\r') || (c == '\n')|| (c == '#') || !c)break;*dest++ = c;size--;src++;- }
- if (!size)
return NULL;- *dest = 0;
- return src;
+}
+int ph_get_table_entry_id(struct parse_helper *ph,
const table_entry_t *table, const char *table_name) {- int val;
- char token[16];
- char *p;
- if (ph_skip_separators(ph))
return -1;- p = grab_token(token, sizeof(token), ph->p);
- if (!p)
return -1;- val = get_table_entry_id(table, table_name, token);
- if (val != -1)
ph->p = p;- return val;
+}
diff --git a/tools/parse_helper.h b/tools/parse_helper.h new file mode 100644 index 0000000..1ff98a3 --- /dev/null +++ b/tools/parse_helper.h @@ -0,0 +1,28 @@ +/*
- (C) Copyright 20012 Boundary Devices Inc,
+troy.kisky@boundarydevices.com
- Licensed under the GPL-2 or later.
- */
+#ifndef _PARSE_HELPER_H_ +#define _PARSE_HELPER_H_
+struct parse_helper {
- char *line;
- size_t len;
- FILE *fd;
- int lineno;
- char cmd_started;
- char *filename;
- char *p;
+};
+int ph_open(struct parse_helper *ph, char *filename); void +ph_close(struct parse_helper *ph); int ph_skip_separators(struct +parse_helper *ph); int ph_skip_comma(struct parse_helper *ph); int +ph_get_value(struct parse_helper *ph, uint32_t *pval); int +ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt); int +ph_get_table_entry_id(struct parse_helper *ph,
const table_entry_t *table, const char *table_name); #endif-- 1.7.9.5
Use parse_helper functions to pulling tokens instead of pushing them. Remove need for switch statements to process commands.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v2: uses file parse_helper added in previous patch changed patch subject, was cleanup parsing --- tools/imximage.c | 267 +++++++++++++++++++----------------------------------- tools/imximage.h | 17 ++-- 2 files changed, 101 insertions(+), 183 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2f5ee14..5147989 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -25,9 +25,6 @@ * MA 02111-1307 USA */
-/* Required to obtain the getline prototype from stdio.h */ -#define _GNU_SOURCE - #include "mkimage.h" #include <image.h> #include "imximage.h" @@ -70,21 +67,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{ - char *endptr; - uint32_t value; - - errno = 0; - value = strtoul(token, &endptr, 16); - if (errno || (token == endptr)) { - fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n", - name, linenr, token); - exit(EXIT_FAILURE); - } - return value; -} - static uint32_t detect_imximage_version(struct imx_header *imx_hdr) { imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1; @@ -112,53 +94,36 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v1(struct data_src *ds, uint32_t *data) { dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - *ds->p_entry++ = value; - break; - case CFG_REG_ADDRESS: - *ds->p_entry++ = value; - break; - case CFG_REG_VALUE: - *ds->p_entry++ = value; - dcd_v1->preamble.length = (char *)ds->p_entry - - (char *)&dcd_v1->addr_data[0].type; - break; - default: - break; - + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; } + *ds->p_entry++ = val; + *ds->p_entry++ = *data++; + *ds->p_entry++ = *data++; + dcd_v1->preamble.length = (char *)ds->p_entry - (char *)&dcd_v1-> + addr_data[0].type; + return 0; }
-static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v2(struct data_src *ds, uint32_t *data) { uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - if (ds->p_dcd && (ds->p_dcd->param == value)) - break; + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; + } + if (!(ds->p_dcd && (ds->p_dcd->param == val))) { if (!ds->p_dcd) { dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.version = DCD_VERSION; @@ -166,24 +131,19 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } else { ds->p_dcd = (write_dcd_command_t *)ds->p_entry; } - ds->p_dcd->param = value; + ds->p_dcd->param = val; ds->p_dcd->tag = DCD_COMMAND_TAG; ds->p_entry = (uint32_t *)(ds->p_dcd + 1); - break; - case CFG_REG_ADDRESS: - *ds->p_entry++ = cpu_to_be32(value); - break; - case CFG_REG_VALUE: - *ds->p_entry++ = cpu_to_be32(value); - len = (char *)ds->p_entry - (char *)&dcd_v2->header; - dcd_v2->header.length = cpu_to_be16(len); - len = (char *)ds->p_entry - (char *)ds->p_dcd; - ds->p_dcd->length = cpu_to_be16(len); - break; - default: - break; - } + val = *data++; + *ds->p_entry++ = cpu_to_be32(val); + val = *data++; + *ds->p_entry++ = cpu_to_be32(val); + len = (char *)ds->p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)ds->p_entry - (char *)ds->p_dcd; + ds->p_dcd->length = cpu_to_be16(len); + return 0; }
static int set_imx_hdr_v1(struct data_src *ds, @@ -323,95 +283,71 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, - char *name, int lineno, int fld) +static int parse_cmd_data(struct data_src *ds) +{ + uint32_t data[3]; + int ret = ph_get_array(&ds->ph, data, 3); + + if (ret < 0) + return ret; + ret = (*ds->set_dcd_val)(ds, data); + if (ret) + return ret; + if (ds->p_entry > ds->p_max_dcd) { + uint32_t size = (char *)ds->p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_image_version(struct data_src *ds) { - int value; - static int cmd_ver_first = ~0; + int ret; uint32_t imximage_version;
- switch (cmd) { - case CMD_IMAGE_VERSION: - imximage_version = get_cfg_value(token, name, lineno); - if (cmd_ver_first == 0) { - fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION " - "command need be the first before other " - "valid command in the file\n", name, lineno); - exit(EXIT_FAILURE); - } - cmd_ver_first = 1; - set_hdr_func(ds, imximage_version); - break; - case CMD_BOOT_FROM: - g_flash_offset = get_table_entry_id(imximage_bootops, - "imximage boot option", token); - if (g_flash_offset == -1) { - fprintf(stderr, "Error: %s[%d] -Invalid boot device" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; - case CMD_DATA: - value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value); - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; + ret = ph_get_value(&ds->ph, &imximage_version); + if (ret) + return ret; + if (ds->cmd_cnt) { + fprintf(stderr, "Error: IMAGE_VERSION command needs be " + "before other valid commands in the file\n"); + return -1; } + set_hdr_func(ds, imximage_version); + return 0; }
-static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, - char *token, char *name, int lineno, int fld) +static int parse_boot_from(struct data_src *ds) { - int value; - - switch (fld) { - case CFG_COMMAND: - *cmd = get_table_entry_id(imximage_cmds, - "imximage commands", token); - if (*cmd < 0) { - fprintf(stderr, "Error: %s[%d] - Invalid command" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - break; - case CFG_REG_SIZE: - parse_cfg_cmd(ds, *cmd, token, name, lineno, fld); - break; - case CFG_REG_ADDRESS: - case CFG_REG_VALUE: - if (*cmd != CMD_DATA) - return; - - value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value); - if (ds->p_entry > ds->p_max_dcd) { - uint32_t size = (char *)ds->p_max_dcd - - (char *)ds->imxhdr; - fprintf(stderr, "Error: %s[%d] -" - "header exceeds maximum size(%d)\n", - name, lineno, size); - exit(EXIT_FAILURE); - } - break; - default: - break; + g_flash_offset = ph_get_table_entry_id(&ds->ph, imximage_bootops, + "imximage boot option"); + if (g_flash_offset == -1) { + fprintf(stderr, "Error: Invalid boot device\n"); + return -1; } + return 0; +} + +static const parse_fld_t cmd_table[] = { + parse_image_version, parse_boot_from, parse_cmd_data +}; + +static int parse_command(struct data_src *ds) +{ + int cmd = ph_get_table_entry_id(&ds->ph, imximage_cmds, + "imximage commands"); + if (cmd < 0) + return cmd; + return cmd_table[cmd](ds); }
static int parse_cfg_file(struct imx_header *imxhdr, char *name, uint32_t entry_point) { struct data_src ds; - FILE *fd = NULL; - char *line = NULL; - char *token, *saveptr1, *saveptr2; - int lineno = 0; - int fld; - size_t len; - int32_t cmd; + struct parse_helper *ph = &ds.ph;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED; @@ -423,8 +359,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, * set up function ptr group to V1 by default. */ set_hdr_func(&ds, IMXIMAGE_V1); - fd = fopen(name, "r"); - if (fd == 0) { + if (ph_open(ph, name)) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); exit(EXIT_FAILURE); } @@ -432,31 +367,19 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, /* Very simple parsing, line starting with # are comments * and are dropped */ - while ((getline(&line, &len, fd)) > 0) { - lineno++; - - token = strtok_r(line, "\r\n", &saveptr1); - if (token == NULL) - continue; - - /* Check inside the single line */ - for (fld = CFG_COMMAND, cmd = CMD_INVALID, - line = token; ; line = NULL, fld++) { - token = strtok_r(line, " \t", &saveptr2); - if (token == NULL) - break; - - /* Drop all text starting with '#' as comments */ - if (token[0] == '#') - break; - - parse_cfg_fld(&ds, &cmd, token, name, - lineno, fld); + for (;;) { + ph->cmd_started = 0; + if (ph_skip_separators(ph)) + break; + ph->cmd_started = 1; + if (parse_command(&ds)) { + fprintf(stderr, "Error: invalid token %s[%d](%s)\n", + name, ph->lineno, ph->p); + exit(EXIT_FAILURE); } - + ds.cmd_cnt++; } - fclose(fd); - + ph_close(ph); /* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); @@ -546,12 +469,12 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, int imximage_check_params(struct mkimage_params *params) { if (!params) - return CFG_INVALID; + return -1; if (!strlen(params->imagename)) { fprintf(stderr, "Error: %s - Configuration file not specified, " "it is needed for imximage generation\n", params->cmdname); - return CFG_INVALID; + return -1; } /* * Check parameters: diff --git a/tools/imximage.h b/tools/imximage.h index 196bb51..6bcd082 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -23,6 +23,7 @@
#ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ +#include "parse_helper.h"
#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ @@ -49,20 +50,11 @@ #define DCD_VERSION 0x40
enum imximage_cmd { - CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_DATA };
-enum imximage_fld_types { - CFG_INVALID = -1, - CFG_COMMAND, - CFG_REG_SIZE, - CFG_REG_ADDRESS, - CFG_REG_VALUE -}; - enum imximage_version { IMXIMAGE_VER_INVALID = -1, IMXIMAGE_V1 = 1, @@ -159,14 +151,17 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, - int lineno, int fld, uint32_t value); +typedef int (*parse_fld_t)(struct data_src *ds); + +typedef int (*set_dcd_val_t)(struct data_src *ds, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset);
struct data_src { + struct parse_helper ph; struct imx_header *imxhdr; + int cmd_cnt; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val; uint32_t *p_max_dcd;
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 10/11] imximage: use parse_helper functions
Use parse_helper functions to pulling tokens instead of pushing them. Remove need for switch statements to process commands.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
v2: uses file parse_helper added in previous patch changed patch subject, was cleanup parsing
tools/imximage.c | 267 +++++++++++++++++++----------------------------------- tools/imximage.h | 17 ++-- 2 files changed, 101 insertions(+), 183 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2f5ee14..5147989 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -25,9 +25,6 @@
- MA 02111-1307 USA
*/
-/* Required to obtain the getline prototype from stdio.h */ -#define _GNU_SOURCE
#include "mkimage.h" #include <image.h> #include "imximage.h" @@ -70,21 +67,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{
- char *endptr;
- uint32_t value;
- errno = 0;
- value = strtoul(token, &endptr, 16);
- if (errno || (token == endptr)) {
fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",name, linenr, token);exit(EXIT_FAILURE);- }
- return value;
-}
static uint32_t detect_imximage_version(struct imx_header *imx_hdr) { imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1; @@ -112,53 +94,36 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value)+static int set_dcd_val_v1(struct data_src *ds, uint32_t *data) { dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
- uint32_t val = *data++;
- switch (fld) {
- case CFG_REG_SIZE:
/* Byte, halfword, word */if ((value != 1) && (value != 2) && (value != 4)) {fprintf(stderr, "Error: %s[%d] - ""Invalid register size " "(%d)\n",name, lineno, value);exit(EXIT_FAILURE);}*ds->p_entry++ = value;break;- case CFG_REG_ADDRESS:
*ds->p_entry++ = value;break;- case CFG_REG_VALUE:
*ds->p_entry++ = value;dcd_v1->preamble.length = (char *)ds->p_entry- (char *)&dcd_v1->addr_data[0].type;break;- default:
break;
- /* Byte, halfword, word */
- if ((val != 1) && (val != 2) && (val != 4)) {
fprintf(stderr, "Error: Invalid register size (%d)\n", val);return -1;- *ds->p_entry++ = val;
- *ds->p_entry++ = *data++;
- *ds->p_entry++ = *data++;
- dcd_v1->preamble.length = (char *)ds->p_entry - (char *)&dcd_v1->
addr_data[0].type;- return 0;
}
-static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value)+static int set_dcd_val_v2(struct data_src *ds, uint32_t *data) { uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
- uint32_t val = *data++;
- switch (fld) {
- case CFG_REG_SIZE:
/* Byte, halfword, word */if ((value != 1) && (value != 2) && (value != 4)) {fprintf(stderr, "Error: %s[%d] - ""Invalid register size " "(%d)\n",name, lineno, value);exit(EXIT_FAILURE);}if (ds->p_dcd && (ds->p_dcd->param == value))break;
- /* Byte, halfword, word */
- if ((val != 1) && (val != 2) && (val != 4)) {
fprintf(stderr, "Error: Invalid register size (%d)\n", val);return -1;- }
- if (!(ds->p_dcd && (ds->p_dcd->param == val))) { if (!ds->p_dcd) { dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.version = DCD_VERSION; @@ -166,24
+131,19 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } else { ds->p_dcd = (write_dcd_command_t *)ds->p_entry; }
ds->p_dcd->param = value;
ds->p_dcd->param = val;
break;- case CFG_REG_ADDRESS:
*ds->p_entry++ = cpu_to_be32(value);break;- case CFG_REG_VALUE:
*ds->p_entry++ = cpu_to_be32(value);len = (char *)ds->p_entry - (char *)&dcd_v2->header;dcd_v2->header.length = cpu_to_be16(len);len = (char *)ds->p_entry - (char *)ds->p_dcd;ds->p_dcd->length = cpu_to_be16(len);break;- default:
break;- }
- val = *data++;
- *ds->p_entry++ = cpu_to_be32(val);
- val = *data++;
- *ds->p_entry++ = cpu_to_be32(val);
- len = (char *)ds->p_entry - (char *)&dcd_v2->header;
- dcd_v2->header.length = cpu_to_be16(len);
- len = (char *)ds->p_entry - (char *)ds->p_dcd;
- ds->p_dcd->length = cpu_to_be16(len);
- return 0;
}
static int set_imx_hdr_v1(struct data_src *ds, @@ -323,95 +283,71 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token,
char *name, int lineno, int fld)+static int parse_cmd_data(struct data_src *ds) {
- uint32_t data[3];
- int ret = ph_get_array(&ds->ph, data, 3);
- if (ret < 0)
return ret;- ret = (*ds->set_dcd_val)(ds, data);
- if (ret)
return ret;- if (ds->p_entry > ds->p_max_dcd) {
uint32_t size = (char *)ds->p_max_dcd - (char *)ds->imxhdr;fprintf(stderr, "Error: header exceeds maximum size(%d)\n",size);return -1;- }
- return 0;
+}
+static int parse_image_version(struct data_src *ds) {
- int value;
- static int cmd_ver_first = ~0;
- int ret; uint32_t imximage_version;
- switch (cmd) {
- case CMD_IMAGE_VERSION:
imximage_version = get_cfg_value(token, name, lineno);if (cmd_ver_first == 0) {fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION ""command need be the first before other ""valid command in the file\n", name, lineno);exit(EXIT_FAILURE);}cmd_ver_first = 1;set_hdr_func(ds, imximage_version);break;- case CMD_BOOT_FROM:
g_flash_offset = get_table_entry_id(imximage_bootops,"imximage boot option", token);if (g_flash_offset == -1) {fprintf(stderr, "Error: %s[%d] -Invalid boot device""(%s)\n", name, lineno, token);exit(EXIT_FAILURE);}if (unlikely(cmd_ver_first != 1))cmd_ver_first = 0;break;- case CMD_DATA:
value = get_cfg_value(token, name, lineno);(*ds->set_dcd_val)(ds, name, lineno, fld, value);if (unlikely(cmd_ver_first != 1))cmd_ver_first = 0;break;
- ret = ph_get_value(&ds->ph, &imximage_version);
- if (ret)
return ret;- if (ds->cmd_cnt) {
fprintf(stderr, "Error: IMAGE_VERSION command needs be ""before other valid commands in the file\n");return -1;- set_hdr_func(ds, imximage_version);
- return 0;
}
-static void parse_cfg_fld(struct data_src *ds, int32_t *cmd,
char *token, char *name, int lineno, int fld)+static int parse_boot_from(struct data_src *ds) {
- int value;
- switch (fld) {
- case CFG_COMMAND:
*cmd = get_table_entry_id(imximage_cmds,"imximage commands", token);if (*cmd < 0) {fprintf(stderr, "Error: %s[%d] - Invalid command""(%s)\n", name, lineno, token);exit(EXIT_FAILURE);}break;- case CFG_REG_SIZE:
parse_cfg_cmd(ds, *cmd, token, name, lineno, fld);break;- case CFG_REG_ADDRESS:
- case CFG_REG_VALUE:
if (*cmd != CMD_DATA)return;value = get_cfg_value(token, name, lineno);(*ds->set_dcd_val)(ds, name, lineno, fld, value);if (ds->p_entry > ds->p_max_dcd) {uint32_t size = (char *)ds->p_max_dcd -(char *)ds->imxhdr;fprintf(stderr, "Error: %s[%d] -""header exceeds maximum size(%d)\n",name, lineno, size);exit(EXIT_FAILURE);}break;- default:
break;
- g_flash_offset = ph_get_table_entry_id(&ds->ph, imximage_bootops,
"imximage boot option");- if (g_flash_offset == -1) {
fprintf(stderr, "Error: Invalid boot device\n");return -1;- return 0;
+}
+static const parse_fld_t cmd_table[] = {
- parse_image_version, parse_boot_from, parse_cmd_data };
+static int parse_command(struct data_src *ds) {
- int cmd = ph_get_table_entry_id(&ds->ph, imximage_cmds,
"imximage commands");- if (cmd < 0)
return cmd;- return cmd_table[cmd](ds);
}
static int parse_cfg_file(struct imx_header *imxhdr, char *name, uint32_t entry_point) { struct data_src ds;
- FILE *fd = NULL;
- char *line = NULL;
- char *token, *saveptr1, *saveptr2;
- int lineno = 0;
- int fld;
- size_t len;
- int32_t cmd;
struct parse_helper *ph = &ds.ph;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED; @@ -423,8 +359,7 @@
static int parse_cfg_file(struct imx_header *imxhdr, char *name, * set up function ptr group to V1 by default. */ set_hdr_func(&ds, IMXIMAGE_V1);
- fd = fopen(name, "r");
- if (fd == 0) {
- if (ph_open(ph, name)) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); exit(EXIT_FAILURE); }
@@ -432,31 +367,19 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, /* Very simple parsing, line starting with # are comments * and are dropped */
- while ((getline(&line, &len, fd)) > 0) {
lineno++;token = strtok_r(line, "\r\n", &saveptr1);if (token == NULL)continue;/* Check inside the single line */for (fld = CFG_COMMAND, cmd = CMD_INVALID,line = token; ; line = NULL, fld++) {token = strtok_r(line, " \t", &saveptr2);if (token == NULL)break;/* Drop all text starting with '#' as comments */if (token[0] == '#')break;parse_cfg_fld(&ds, &cmd, token, name,lineno, fld);
- for (;;) {
ph->cmd_started = 0;if (ph_skip_separators(ph))break;ph->cmd_started = 1;if (parse_command(&ds)) {fprintf(stderr, "Error: invalid token %s[%d](%s)\n",name, ph->lineno, ph->p);exit(EXIT_FAILURE);
ds.cmd_cnt++;
- fclose(fd);
- ph_close(ph); /* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); @@
-546,12 +469,12 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, int imximage_check_params(struct mkimage_params *params) { if (!params)
return CFG_INVALID;
return -1;
return CFG_INVALID;
return -1;
- Check parameters:
diff --git a/tools/imximage.h b/tools/imximage.h index 196bb51..6bcd082 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -23,6 +23,7 @@
#ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ +#include "parse_helper.h"
#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ @@ -49,20 +50,11 @@ #define DCD_VERSION 0x40
enum imximage_cmd {
- CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_DATA
};
-enum imximage_fld_types {
- CFG_INVALID = -1,
- CFG_COMMAND,
- CFG_REG_SIZE,
- CFG_REG_ADDRESS,
- CFG_REG_VALUE
-};
enum imximage_version { IMXIMAGE_VER_INVALID = -1, IMXIMAGE_V1 = 1, @@ -159,14 +151,17 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds, char *name,
int lineno, int fld, uint32_t value);+typedef int (*parse_fld_t)(struct data_src *ds);
+typedef int (*set_dcd_val_t)(struct data_src *ds, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset);
struct data_src {
- struct parse_helper ph; struct imx_header *imxhdr;
- int cmd_cnt; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val; uint32_t *p_max_dcd;
-- 1.7.9.5
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/parse_helper.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/parse_helper.c b/tools/parse_helper.c index 0a5c5f6..50be832 100644 --- a/tools/parse_helper.c +++ b/tools/parse_helper.c @@ -97,20 +97,172 @@ int ph_skip_comma(struct parse_helper *ph) } }
+static const char precedence[] = { + /* ( + - * / & ^ | ) */ + 0, 2, 2, 1, 1, 3, 4, 5, 6 +}; +static const char unary_operations[] = "(+-"; +static const char binary_operations[] = " +-*/&^|)"; + +static uint32_t do_func(uint32_t val1, uint32_t val2, int op) +{ + switch (op) { + case 1: + return val1 + val2; + case 2: + return val1 - val2; + case 3: + return val1 * val2; + case 4: + return val1 / val2; + case 5: + return val1 & val2; + case 6: + return val1 ^ val2; + case 7: + return val1 | val2; + } + fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n", + __func__, val1, val2, op); + exit(EXIT_FAILURE); +} + +static int find_op(char c, const char *p) +{ + int i; + for (i = 0; ; i++) { + if (c == p[i]) + return i; + if (!p[i]) + break; + } + return -1; +} + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + int ph_get_value(struct parse_helper *ph, uint32_t *pval) { char *endptr; - uint32_t value; + int op_i = 0; + int val_i = 0; + unsigned char op[16]; + uint32_t val[16]; + int unary = 1; + char *p;
- if (ph_skip_separators(ph)) - return -1; - errno = 0; - value = strtoul(ph->p, &endptr, 16); - if (errno || (ph->p == endptr)) - return -1; - *pval = value; - ph->p = endptr; - return 0; + p = ph->p; + for (;;) { + char c; + int i, j; + const char *ops = unary ? unary_operations : binary_operations; + + if (unary) { + ph->p = p; + if (ph_skip_separators(ph)) + return -1; + p = ph->p; + c = *p; + } else { + for (;;) { + c = *p; + if ((c != ' ') && (c != '\t')) + break; + p++; + } + } + i = find_op(c, ops); + debug("%d,%c,%d:%s\n", i, c, unary, p); + if ((i < 0) && unary) { + if (val_i >= ARRAY_SIZE(val)) + return -1; + errno = 0; + val[val_i++] = strtoul(p, &endptr, 16); + if (errno || (p == endptr)) { + ph->p = p; + return -1; + } + p = endptr; + unary = 0; + debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1], + op_i, val_i); +do_unary: + while (op_i) { + j = op[op_i - 1]; + if (!(j & 0x80)) + break; + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("un:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + continue; + } + if (i < 0) { + c = 0; + i = 8; + } else { + p++; + } + if (c == '(') { + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i; + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], + op_i, val_i); + unary = 1; + continue; + } + for (;;) { + if (!op_i || unary) + break; + j = op[op_i - 1]; + if (j == 0) { + if (c == ')') { + op_i--; + goto do_unary; + } + break; + } + if ((j & 0x80)) { + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("unary:%d,%x\n", val[val_i - 1], j); + continue; + } + if (precedence[i] < precedence[j]) + break; + if (val_i < 2) + return -1; + op_i--; + val[val_i - 2] = do_func(val[val_i - 2], + val[val_i - 1], j); + val_i--; + debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + if (c == ')') { + fprintf(stderr, "Error: unmatched parenthesis\n"); + return -1; + } + if (i == 8) { + if ((op_i != 0) || (val_i != 1)) { + fprintf(stderr, "Error: syntax %d %d\n", + op_i, val_i); + return -1; + } + ph->p = p; + *pval = val[0]; + return 0; + } + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i | (unary << 7); + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i); + unary = 1; + } }
/*
-----Original Message----- From: Troy Kisky [mailto:troy.kisky@boundarydevices.com] Sent: Wednesday, November 28, 2012 9:32 AM To: sbabic@denx.de Cc: dirk.behme@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343; festevam@gmail.com; Troy Kisky Subject: [PATCH V4 11/11] parse_helper: add expression evaluation
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Acked-by: Jason Liu r64343@freescale.com
tools/parse_helper.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/parse_helper.c b/tools/parse_helper.c index 0a5c5f6..50be832 100644 --- a/tools/parse_helper.c +++ b/tools/parse_helper.c @@ -97,20 +97,172 @@ int ph_skip_comma(struct parse_helper *ph) } }
+static const char precedence[] = {
- /* ( + - * / & ^ | ) */
0, 2, 2, 1, 1, 3, 4, 5, 6+}; +static const char unary_operations[] = "(+-"; static const char +binary_operations[] = " +-*/&^|)";
+static uint32_t do_func(uint32_t val1, uint32_t val2, int op) {
- switch (op) {
- case 1:
return val1 + val2;- case 2:
return val1 - val2;- case 3:
return val1 * val2;- case 4:
return val1 / val2;- case 5:
return val1 & val2;- case 6:
return val1 ^ val2;- case 7:
return val1 | val2;- }
- fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n",
__func__, val1, val2, op);- exit(EXIT_FAILURE);
+}
+static int find_op(char c, const char *p) {
- int i;
- for (i = 0; ; i++) {
if (c == p[i])return i;if (!p[i])break;- }
- return -1;
+}
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
int ph_get_value(struct parse_helper *ph, uint32_t *pval) { char *endptr;
- uint32_t value;
- int op_i = 0;
- int val_i = 0;
- unsigned char op[16];
- uint32_t val[16];
- int unary = 1;
- char *p;
- if (ph_skip_separators(ph))
return -1;- errno = 0;
- value = strtoul(ph->p, &endptr, 16);
- if (errno || (ph->p == endptr))
return -1;- *pval = value;
- ph->p = endptr;
- return 0;
- p = ph->p;
- for (;;) {
char c;int i, j;const char *ops = unary ? unary_operations :binary_operations;
if (unary) {ph->p = p;if (ph_skip_separators(ph))return -1;p = ph->p;c = *p;} else {for (;;) {c = *p;if ((c != ' ') && (c != '\t'))break;p++;}}i = find_op(c, ops);debug("%d,%c,%d:%s\n", i, c, unary, p);if ((i < 0) && unary) {if (val_i >= ARRAY_SIZE(val))return -1;errno = 0;val[val_i++] = strtoul(p, &endptr, 16);if (errno || (p == endptr)) {ph->p = p;return -1;}p = endptr;unary = 0;debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1],op_i, val_i);+do_unary:
while (op_i) {j = op[op_i - 1];if (!(j & 0x80))break;op_i--;val[val_i - 1] = do_func(0,val[val_i - 1], j & 0x7f);debug("un:%d,%x,%d,%d\n", val[val_i - 1], j,op_i, val_i);}continue;}if (i < 0) {c = 0;i = 8;} else {p++;}if (c == '(') {if (op_i >= ARRAY_SIZE(op))return -1;op[op_i++] = i;debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1],op_i, val_i);unary = 1;continue;}for (;;) {if (!op_i || unary)break;j = op[op_i - 1];if (j == 0) {if (c == ')') {op_i--;goto do_unary;}break;}if ((j & 0x80)) {op_i--;val[val_i - 1] = do_func(0,val[val_i - 1], j & 0x7f);debug("unary:%d,%x\n", val[val_i - 1], j);continue;}if (precedence[i] < precedence[j])break;if (val_i < 2)return -1;op_i--;val[val_i - 2] = do_func(val[val_i - 2],val[val_i - 1], j);val_i--;debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j,op_i, val_i);}if (c == ')') {fprintf(stderr, "Error: unmatched parenthesis\n");return -1;}if (i == 8) {if ((op_i != 0) || (val_i != 1)) {fprintf(stderr, "Error: syntax %d %d\n",op_i, val_i);return -1;}ph->p = p;*pval = val[0];return 0;}if (op_i >= ARRAY_SIZE(op))return -1;op[op_i++] = i | (unary << 7);debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i);unary = 1;- }
}
/*
1.7.9.5
Dear Troy Kisky,
In message 1354066303-29762-1-git-send-email-troy.kisky@boundarydevices.com you wrote:
This series make the file imximage.c easier to read, as well as produces a slightly smaller file.
Only the 1st two patches are different from version 3. The 1st is a new patch which addresses an mx53 ROM bug. The 2nd is slight changes due to rebase on 1st.
Would it make sense to use this opportunity to integrate this tool into mkimage ?
Best regards,
Wolfgang Denk
On 11/28/2012 2:30 AM, Wolfgang Denk wrote:
Dear Troy Kisky,
In message 1354066303-29762-1-git-send-email-troy.kisky@boundarydevices.com you wrote:
This series make the file imximage.c easier to read, as well as produces a slightly smaller file.
Only the 1st two patches are different from version 3. The 1st is a new patch which addresses an mx53 ROM bug. The 2nd is slight changes due to rebase on 1st.
Would it make sense to use this opportunity to integrate this tool into mkimage ?
Best regards,
Wolfgang Denk
I did not mean to imply that it wasn't already in mkimage, but I can see that interpretation. It is part of mkimage.
Troy
This variable does not need to have file scope.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 1365b1e..10ccfa9 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static uint32_t imximage_version; - static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t set_imx_hdr; @@ -254,7 +252,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr) +static void set_hdr_func(struct imx_header *imxhdr, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: @@ -335,6 +333,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, { int value; static int cmd_ver_first = ~0; + uint32_t imximage_version;
switch (cmd) { case CMD_IMAGE_VERSION: @@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(imxhdr); + set_hdr_func(imxhdr, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -419,6 +418,12 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int dcd_len = 0; int32_t cmd;
+ /* + * In order to not change the old imx cfg file + * by adding VERSION command into it, here need + * set up function ptr group to V1 by default. + */ + set_hdr_func(imxhdr, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -512,16 +517,8 @@ int imximage_vrec_header(struct mkimage_params *params, fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); } - /* - * In order to not change the old imx cfg file - * by adding VERSION command into it, here need - * set up function ptr group to V1 by default. - */ - imximage_version = IMXIMAGE_V1; /* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED; - set_hdr_func(imxhdr); - /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename);
Need to move accesses to the static variables to a function where struct data_src is used.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 24 +++++++++++++----------- tools/imximage.h | 3 +++ 2 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 10ccfa9..a2460d6 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -407,8 +407,11 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, break; } } -static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) + +static int parse_cfg_file(struct imx_header *imxhdr, char *name, + uint32_t entry_point) { + struct data_src ds; FILE *fd = NULL; char *line = NULL; char *token, *saveptr1, *saveptr2; @@ -418,6 +421,10 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int dcd_len = 0; int32_t cmd;
+ /* Be able to detect if the cfg file has no BOOT_FROM tag */ + g_flash_offset = FLASH_OFFSET_UNDEFINED; + memset(&ds, 0, sizeof(struct data_src)); + ds.imxhdr = imxhdr; /* * In order to not change the old imx cfg file * by adding VERSION command into it, here need @@ -465,10 +472,10 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); exit(EXIT_FAILURE); } - return dcd_len; + /* Set the imx header */ + return (*set_imx_hdr)(imxhdr, dcd_len, entry_point, g_flash_offset); }
- static int imximage_check_image_types(uint8_t type) { if (type == IH_TYPE_IMXIMAGE) @@ -510,21 +517,16 @@ int imximage_vrec_header(struct mkimage_params *params, struct image_type_params *tparams) { struct imx_header *imxhdr; - uint32_t dcd_len;
imxhdr = calloc(1, MAX_HEADER_SIZE); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); } - /* Be able to detect if the cfg file has no BOOT_FROM tag */ - g_flash_offset = FLASH_OFFSET_UNDEFINED; - /* Parse dcd configuration file */ - dcd_len = parse_cfg_file(imxhdr, params->imagename);
- /* Set the imx header */ - imximage_params.header_size = (*set_imx_hdr)(imxhdr, dcd_len, - params->ep, g_flash_offset); + /* Parse dcd configuration file */ + imximage_params.header_size = parse_cfg_file(imxhdr, params->imagename, + params->ep); imximage_params.hdr = imxhdr; return 0; } diff --git a/tools/imximage.h b/tools/imximage.h index 0f39447..2895378 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -171,4 +171,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
+struct data_src { + struct imx_header *imxhdr; +}; #endif /* _IMXIMAGE_H_ */
Change 1st argument of set_imx_hdr/set_dcd_val to struct data_src.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/imximage.c | 41 +++++++++++++++++++++-------------------- tools/imximage.h | 5 +++-- 2 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index a2460d6..85d3753 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -116,10 +116,10 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) { - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; + dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
switch (fld) { case CFG_REG_SIZE: @@ -144,10 +144,10 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } }
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, +static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off) { - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) { case CFG_REG_ADDRESS: @@ -194,15 +194,15 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; }
-static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { - imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1; + imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)imxhdr)); + - ((char *)ds->imxhdr));
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -217,19 +217,20 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, /* Security feature are not supported */ fhdr_v1->app_code_csf = 0; fhdr_v1->super_root_key = 0; - header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4); + header_size_ptr = (uint32_t *)(((char *)ds->imxhdr) + + header_length - 4); return header_length; }
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset) { - imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2; + imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - ((char*)imxhdr) - : offsetof(imx_header_v2_t, dcd_table); + (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - + ((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -328,7 +329,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, +static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, char *name, int lineno, int fld, int dcd_len) { int value; @@ -345,7 +346,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(imxhdr, imximage_version); + set_hdr_func(ds->imxhdr, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -360,14 +361,14 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); + (*set_dcd_val)(ds, name, lineno, fld, value, dcd_len); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; } }
-static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, +static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, char *token, char *name, int lineno, int fld, int *dcd_len) { int value; @@ -383,7 +384,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -391,7 +392,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len); + (*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE) { (*dcd_len)++; @@ -458,7 +459,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, if (token[0] == '#') break;
- parse_cfg_fld(imxhdr, &cmd, token, name, + parse_cfg_fld(&ds, &cmd, token, name, lineno, fld, &dcd_len); }
@@ -473,7 +474,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*set_imx_hdr)(imxhdr, dcd_len, entry_point, g_flash_offset); + return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 2895378..3054d55 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -159,7 +159,8 @@ struct imx_header { } header; };
-typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, +struct data_src; +typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, int lineno, int fld, uint32_t value, uint32_t off); @@ -168,7 +169,7 @@ typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);
-typedef int (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, +typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, uint32_t entry_point, uint32_t flash_offset);
struct data_src {
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 13 ++++++------- tools/imximage.h | 1 + 2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 85d3753..eb1ab62 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -67,7 +67,6 @@ static table_entry_t imximage_versions[] = {
static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; -static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset; @@ -253,19 +252,19 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static void set_hdr_func(struct imx_header *imxhdr, uint32_t imximage_version) +static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; - set_imx_hdr = set_imx_hdr_v1; + ds->set_imx_hdr = set_imx_hdr_v1; max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; - set_imx_hdr = set_imx_hdr_v2; + ds->set_imx_hdr = set_imx_hdr_v2; max_dcd_entries = MAX_HW_CFG_SIZE_V2; break; default: @@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, exit(EXIT_FAILURE); } cmd_ver_first = 1; - set_hdr_func(ds->imxhdr, imximage_version); + set_hdr_func(ds, imximage_version); break; case CMD_BOOT_FROM: g_flash_offset = get_table_entry_id(imximage_bootops, @@ -431,7 +430,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, * by adding VERSION command into it, here need * set up function ptr group to V1 by default. */ - set_hdr_func(imxhdr, IMXIMAGE_V1); + set_hdr_func(&ds, IMXIMAGE_V1); fd = fopen(name, "r"); if (fd == 0) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); @@ -474,7 +473,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); + return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) diff --git a/tools/imximage.h b/tools/imximage.h index 3054d55..f27a2ef 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -174,5 +174,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len,
struct data_src { struct imx_header *imxhdr; + set_imx_hdr_t set_imx_hdr; }; #endif /* _IMXIMAGE_H_ */
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: new patch --- tools/imximage.c | 9 ++++----- tools/imximage.h | 1 + 2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index eb1ab62..6fcb6ee 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_val_t set_dcd_val; static set_dcd_rst_t set_dcd_rst; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; @@ -256,13 +255,13 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) { switch (imximage_version) { case IMXIMAGE_V1: - set_dcd_val = set_dcd_val_v1; + ds->set_dcd_val = set_dcd_val_v1; set_dcd_rst = set_dcd_rst_v1; ds->set_imx_hdr = set_imx_hdr_v1; max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: - set_dcd_val = set_dcd_val_v2; + ds->set_dcd_val = set_dcd_val_v2; set_dcd_rst = set_dcd_rst_v2; ds->set_imx_hdr = set_imx_hdr_v2; max_dcd_entries = MAX_HW_CFG_SIZE_V2; @@ -360,7 +359,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(ds, name, lineno, fld, value, dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -391,7 +390,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE) { (*dcd_len)++; diff --git a/tools/imximage.h b/tools/imximage.h index f27a2ef..444ddce 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -175,5 +175,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr; + set_dcd_val_t set_dcd_val; }; #endif /* _IMXIMAGE_H_ */
Before, only 1 write_dcd_command table was built. Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v3: moved static variables together --- tools/imximage.c | 143 ++++++++++++++++++++++++++---------------------------- tools/imximage.h | 18 +++---- 2 files changed, 76 insertions(+), 85 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 6fcb6ee..29a12bc 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = { {-1, "", " (Invalid)", }, };
-static set_dcd_rst_t set_dcd_rst; -static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t g_flash_offset;
@@ -115,7 +113,7 @@ static void err_imximage_version(int version) }
static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table;
@@ -128,13 +126,15 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, name, lineno, value); exit(EXIT_FAILURE); } - dcd_v1->addr_data[off].type = value; + *ds->p_entry++ = value; break; case CFG_REG_ADDRESS: - dcd_v1->addr_data[off].addr = value; + *ds->p_entry++ = value; break; case CFG_REG_VALUE: - dcd_v1->addr_data[off].value = value; + *ds->p_entry++ = value; + dcd_v1->preamble.length = (char *)ds->p_entry + - (char *)&dcd_v1->addr_data[0].type; break; default: break; @@ -143,16 +143,42 @@ static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, }
static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, uint32_t value) { + uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table;
switch (fld) { + case CFG_REG_SIZE: + /* Byte, halfword, word */ + if ((value != 1) && (value != 2) && (value != 4)) { + fprintf(stderr, "Error: %s[%d] - " + "Invalid register size " "(%d)\n", + name, lineno, value); + exit(EXIT_FAILURE); + } + if (ds->p_dcd && (ds->p_dcd->param == value)) + break; + if (!ds->p_dcd) { + dcd_v2->header.tag = DCD_HEADER_TAG; + dcd_v2->header.version = DCD_VERSION; + ds->p_dcd = &dcd_v2->write_dcd_command; + } else { + ds->p_dcd = (write_dcd_command_t *)ds->p_entry; + } + ds->p_dcd->param = value; + ds->p_dcd->tag = DCD_COMMAND_TAG; + ds->p_entry = (uint32_t *)(ds->p_dcd + 1); + break; case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + *ds->p_entry++ = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + *ds->p_entry++ = cpu_to_be32(value); + len = (char *)ds->p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)ds->p_entry - (char *)ds->p_dcd; + ds->p_dcd->length = cpu_to_be16(len); break; default: break; @@ -160,47 +186,14 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } }
-/* - * Complete setting up the rest field of DCD of V1 - * such as barker code and DCD data length. - */ -static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; - - dcd_v1->preamble.barker = DCD_BARKER; - dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t); -} - -/* - * Complete setting up the reset field of DCD of V2 - * such as DCD tag, version, length, etc. - */ -static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, - char *name, int lineno) -{ - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; - - dcd_v2->header.tag = DCD_HEADER_TAG; - dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); - dcd_v2->header.version = DCD_VERSION; - dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; -} - -static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v1(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v1_t *hdr_v1 = &ds->imxhdr->header.hdr_v1; flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr; - dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table; uint32_t hdr_base; - uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr) - - ((char *)ds->imxhdr)); + uint32_t header_length = ((char *)ds->p_entry) + 4 + - ((char *)ds->imxhdr);
/* Set magic number */ fhdr_v1->app_code_barker = APP_CODE_BARKER; @@ -220,15 +213,13 @@ static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len, return header_length; }
-static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, +static int set_imx_hdr_v2(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset) { imx_header_v2_t *hdr_v2 = &ds->imxhdr->header.hdr_v2; flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr; uint32_t hdr_base; - uint32_t header_length = (dcd_len) ? - (char *)&hdr_v2->dcd_table.addr_data[dcd_len] - - ((char *)ds->imxhdr) : offsetof(imx_header_v2_t, dcd_table); + uint32_t header_length = ((char *)ds->p_entry) - ((char *)ds->imxhdr);
/* Set magic number */ fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -239,7 +230,7 @@ static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len, fhdr_v2->reserved1 = fhdr_v2->reserved2 = 0; fhdr_v2->self = hdr_base = entry_point - header_length;
- fhdr_v2->dcd_ptr = (dcd_len) ? hdr_base + fhdr_v2->dcd_ptr = (ds->p_dcd) ? hdr_base + offsetof(imx_header_v2_t, dcd_table) : 0; fhdr_v2->boot_data_ptr = hdr_base + offsetof(imx_header_v2_t, boot_data); @@ -256,15 +247,20 @@ static void set_hdr_func(struct data_src *ds, uint32_t imximage_version) switch (imximage_version) { case IMXIMAGE_V1: ds->set_dcd_val = set_dcd_val_v1; - set_dcd_rst = set_dcd_rst_v1; ds->set_imx_hdr = set_imx_hdr_v1; - max_dcd_entries = MAX_HW_CFG_SIZE_V1; + ds->p_entry = &ds->imxhdr->header.hdr_v1.dcd_table + .addr_data[0].type; + ds->p_max_dcd = &ds->imxhdr->header.hdr_v1.dcd_table + .addr_data[MAX_HW_CFG_SIZE_V1].type; + ds->imxhdr->header.hdr_v1.dcd_table.preamble.barker = + DCD_BARKER; break; case IMXIMAGE_V2: ds->set_dcd_val = set_dcd_val_v2; - set_dcd_rst = set_dcd_rst_v2; ds->set_imx_hdr = set_imx_hdr_v2; - max_dcd_entries = MAX_HW_CFG_SIZE_V2; + ds->p_entry = (uint32_t *)&ds->imxhdr->header.hdr_v2.dcd_table; + ds->p_max_dcd = (uint32_t *) + ((char *)ds->imxhdr + MAX_HEADER_SIZE); break; default: err_imximage_version(imximage_version); @@ -328,7 +324,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr) }
static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, - char *name, int lineno, int fld, int dcd_len) + char *name, int lineno, int fld) { int value; static int cmd_ver_first = ~0; @@ -359,7 +355,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value, dcd_len); + (*ds->set_dcd_val)(ds, name, lineno, fld, value); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -367,7 +363,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, }
static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, - char *token, char *name, int lineno, int fld, int *dcd_len) + char *token, char *name, int lineno, int fld) { int value;
@@ -382,7 +378,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, } break; case CFG_REG_SIZE: - parse_cfg_cmd(ds, *cmd, token, name, lineno, fld, *dcd_len); + parse_cfg_cmd(ds, *cmd, token, name, lineno, fld); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: @@ -390,16 +386,14 @@ static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, return;
value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value, *dcd_len); - - if (fld == CFG_REG_VALUE) { - (*dcd_len)++; - if (*dcd_len > max_dcd_entries) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, max_dcd_entries); - exit(EXIT_FAILURE); - } + (*ds->set_dcd_val)(ds, name, lineno, fld, value); + if (ds->p_entry > ds->p_max_dcd) { + uint32_t size = (char *)ds->p_max_dcd - + (char *)ds->imxhdr; + fprintf(stderr, "Error: %s[%d] -" + "header exceeds maximum size(%d)\n", + name, lineno, size); + exit(EXIT_FAILURE); } break; default: @@ -417,7 +411,6 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, int lineno = 0; int fld; size_t len; - int dcd_len = 0; int32_t cmd;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ @@ -458,12 +451,10 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, break;
parse_cfg_fld(&ds, &cmd, token, name, - lineno, fld, &dcd_len); + lineno, fld); }
} - - (*set_dcd_rst)(imxhdr, dcd_len, name, lineno); fclose(fd);
/* Exit if there is no BOOT_FROM field specifying the flash_offset */ @@ -472,7 +463,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, exit(EXIT_FAILURE); } /* Set the imx header */ - return (*ds.set_imx_hdr)(&ds, dcd_len, entry_point, g_flash_offset); + return (*ds.set_imx_hdr)(&ds, entry_point, g_flash_offset); }
static int imximage_check_image_types(uint8_t type) @@ -517,7 +508,11 @@ int imximage_vrec_header(struct mkimage_params *params, { struct imx_header *imxhdr;
- imxhdr = calloc(1, MAX_HEADER_SIZE); + /* + * A little extra space to avoid access violation on dcd table overflow. + * Overflow is checked after entry is added. + */ + imxhdr = calloc(1, MAX_HEADER_SIZE + 32); if (!imxhdr) { fprintf(stderr, "Error: out of memory\n"); exit(EXIT_FAILURE); diff --git a/tools/imximage.h b/tools/imximage.h index 444ddce..196bb51 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -47,7 +47,6 @@ #define DCD_HEADER_TAG 0xD2 #define DCD_COMMAND_TAG 0xCC #define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4
enum imximage_cmd { CMD_INVALID, @@ -160,21 +159,18 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds, - char *name, int lineno, - int fld, uint32_t value, - uint32_t off); +typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, + int lineno, int fld, uint32_t value);
-typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, - uint32_t dcd_len, - char *name, int lineno); - -typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t dcd_len, - uint32_t entry_point, uint32_t flash_offset); +typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point, + uint32_t flash_offset);
struct data_src { struct imx_header *imxhdr; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val; + uint32_t *p_max_dcd; + uint32_t *p_entry; + write_dcd_command_t *p_dcd; }; #endif /* _IMXIMAGE_H_ */
This file can help you parse configuration files.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/Makefile | 2 + tools/parse_helper.c | 173 ++++++++++++++++++++++++++++++++++++++++++++++++++ tools/parse_helper.h | 28 ++++++++ 3 files changed, 203 insertions(+) create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
diff --git a/tools/Makefile b/tools/Makefile index c31437e..a540274 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -94,6 +94,7 @@ NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y += kwbimage.o NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += imximage.o +NOPED_OBJ_FILES-y += parse_helper.o NOPED_OBJ_FILES-y += omapimage.o NOPED_OBJ_FILES-y += mkenvimage.o NOPED_OBJ_FILES-y += mkimage.o @@ -208,6 +209,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \ $(obj)fit_image.o \ $(obj)image.o \ $(obj)imximage.o \ + $(obj)parse_helper.o \ $(obj)kwbimage.o \ $(obj)pblimage.o \ $(obj)md5.o \ diff --git a/tools/parse_helper.c b/tools/parse_helper.c new file mode 100644 index 0000000..0a5c5f6 --- /dev/null +++ b/tools/parse_helper.c @@ -0,0 +1,173 @@ +/* + * (C) Copyright 20012 Boundary Devices Inc, troy.kisky@boundarydevices.com + * + * Licensed under the GPL-2 or later. + */ + +/* Required to obtain the getline prototype from stdio.h */ +#define _GNU_SOURCE + +#include "mkimage.h" +#include <image.h> +#include "parse_helper.h" + +int ph_open(struct parse_helper *ph, char *filename) +{ + ph->line = NULL; + ph->len = 0; + ph->fd = fopen(filename, "r"); + ph->lineno = 0; + ph->cmd_started = 0; + ph->filename = filename; + ph->p = NULL; + return (!ph->fd) ? -1 : 0; +} + +void ph_close(struct parse_helper *ph) +{ + fclose(ph->fd); + ph->fd = NULL; +} + +int ph_skip_separators(struct parse_helper *ph) +{ + int line_no = ph->lineno; + char *p = ph->p; + + for (;;) { + char c; + if (!p) { + if (getline(&ph->line, &ph->len, ph->fd) <= 0) + return -1; + ph->lineno++; + p = ph->line; + if (ph->cmd_started) { + fprintf(stderr, "warning: continuing command on" + " next line, line %s[%d](%s)\n", + ph->filename, ph->lineno, p); + } + } + c = *p; + if ((c == ' ') || (c == '\t')) { + p++; + continue; + } + /* Drop all text starting with '#' as comments */ + if ((c == '#') || (c == '\r') || (c == '\n') + || !c) { + p = NULL; + continue; + } + if (c == ';') { + if (ph->cmd_started) { + fprintf(stderr, "Error: command not " + "finished:%s[%d](%s)\n", + ph->filename, ph->lineno, p); + exit(EXIT_FAILURE); + } + p++; + continue; + } + if (!ph->cmd_started && line_no == ph->lineno) { + fprintf(stderr, "Error: extra data at end " + "of line %s[%d](%s)\n", + ph->filename, ph->lineno, p); + exit(EXIT_FAILURE); + } + ph->p = p; + return 0; + } +} + +int ph_skip_comma(struct parse_helper *ph) +{ + char *p = ph->p; + + for (;;) { + char c = *p++; + if ((c == '#') || (c == '\r') || (c == '\n') || !c) + return 0; + if (c == ',') { + ph->p = p; + ph_skip_separators(ph); + return 1; + } + if ((c != ' ') && (c == '\t')) + return 0; + } +} + +int ph_get_value(struct parse_helper *ph, uint32_t *pval) +{ + char *endptr; + uint32_t value; + + if (ph_skip_separators(ph)) + return -1; + errno = 0; + value = strtoul(ph->p, &endptr, 16); + if (errno || (ph->p == endptr)) + return -1; + *pval = value; + ph->p = endptr; + return 0; +} + +/* + * Comma separator optional + * Input: + * ph - input source + * data - array to fill in + * cnt - exact number of elements to parse + * Return: number of elements parsed, or error + */ +int ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt) +{ + int i = 0; + + for (;;) { + int ret = ph_get_value(ph, &data[i++]); + if (ret) + return ret; + if (i >= cnt) + break; + ph_skip_comma(ph); /* comma is optional */ + } + return i; +} + +static char *grab_token(char *dest, int size, char *src) +{ + while (size) { + char c = *src; + if ((c == ' ') || (c == '\t') || (c == '\r') || (c == '\n') + || (c == '#') || !c) + break; + *dest++ = c; + size--; + src++; + } + if (!size) + return NULL; + *dest = 0; + return src; +} + +int ph_get_table_entry_id(struct parse_helper *ph, + const table_entry_t *table, const char *table_name) +{ + int val; + char token[16]; + char *p; + + if (ph_skip_separators(ph)) + return -1; + p = grab_token(token, sizeof(token), ph->p); + if (!p) + return -1; + val = get_table_entry_id(table, table_name, token); + if (val != -1) + ph->p = p; + return val; +} + diff --git a/tools/parse_helper.h b/tools/parse_helper.h new file mode 100644 index 0000000..1ff98a3 --- /dev/null +++ b/tools/parse_helper.h @@ -0,0 +1,28 @@ +/* + * (C) Copyright 20012 Boundary Devices Inc, troy.kisky@boundarydevices.com + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _PARSE_HELPER_H_ +#define _PARSE_HELPER_H_ + +struct parse_helper { + char *line; + size_t len; + FILE *fd; + int lineno; + char cmd_started; + char *filename; + char *p; +}; + +int ph_open(struct parse_helper *ph, char *filename); +void ph_close(struct parse_helper *ph); +int ph_skip_separators(struct parse_helper *ph); +int ph_skip_comma(struct parse_helper *ph); +int ph_get_value(struct parse_helper *ph, uint32_t *pval); +int ph_get_array(struct parse_helper *ph, uint32_t *data, int cnt); +int ph_get_table_entry_id(struct parse_helper *ph, + const table_entry_t *table, const char *table_name); +#endif
Use parse_helper functions to pulling tokens instead of pushing them. Remove need for switch statements to process commands.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v2: uses file parse_helper added in previous patch changed patch subject, was cleanup parsing --- tools/imximage.c | 267 +++++++++++++++++++----------------------------------- tools/imximage.h | 17 ++-- 2 files changed, 101 insertions(+), 183 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 29a12bc..c13fee1 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -25,9 +25,6 @@ * MA 02111-1307 USA */
-/* Required to obtain the getline prototype from stdio.h */ -#define _GNU_SOURCE - #include "mkimage.h" #include <image.h> #include "imximage.h" @@ -70,21 +67,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{ - char *endptr; - uint32_t value; - - errno = 0; - value = strtoul(token, &endptr, 16); - if (errno || (token == endptr)) { - fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n", - name, linenr, token); - exit(EXIT_FAILURE); - } - return value; -} - static uint32_t detect_imximage_version(struct imx_header *imx_hdr) { imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1; @@ -112,53 +94,36 @@ static void err_imximage_version(int version) exit(EXIT_FAILURE); }
-static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v1(struct data_src *ds, uint32_t *data) { dcd_v1_t *dcd_v1 = &ds->imxhdr->header.hdr_v1.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - *ds->p_entry++ = value; - break; - case CFG_REG_ADDRESS: - *ds->p_entry++ = value; - break; - case CFG_REG_VALUE: - *ds->p_entry++ = value; - dcd_v1->preamble.length = (char *)ds->p_entry - - (char *)&dcd_v1->addr_data[0].type; - break; - default: - break; - + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; } + *ds->p_entry++ = val; + *ds->p_entry++ = *data++; + *ds->p_entry++ = *data++; + dcd_v1->preamble.length = (char *)ds->p_entry - (char *)&dcd_v1-> + addr_data[0].type; + return 0; }
-static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, - int fld, uint32_t value) +static int set_dcd_val_v2(struct data_src *ds, uint32_t *data) { uint32_t len; dcd_v2_t *dcd_v2 = &ds->imxhdr->header.hdr_v2.dcd_table; + uint32_t val = *data++;
- switch (fld) { - case CFG_REG_SIZE: - /* Byte, halfword, word */ - if ((value != 1) && (value != 2) && (value != 4)) { - fprintf(stderr, "Error: %s[%d] - " - "Invalid register size " "(%d)\n", - name, lineno, value); - exit(EXIT_FAILURE); - } - if (ds->p_dcd && (ds->p_dcd->param == value)) - break; + /* Byte, halfword, word */ + if ((val != 1) && (val != 2) && (val != 4)) { + fprintf(stderr, "Error: Invalid register size (%d)\n", val); + return -1; + } + if (!(ds->p_dcd && (ds->p_dcd->param == val))) { if (!ds->p_dcd) { dcd_v2->header.tag = DCD_HEADER_TAG; dcd_v2->header.version = DCD_VERSION; @@ -166,24 +131,19 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno, } else { ds->p_dcd = (write_dcd_command_t *)ds->p_entry; } - ds->p_dcd->param = value; + ds->p_dcd->param = val; ds->p_dcd->tag = DCD_COMMAND_TAG; ds->p_entry = (uint32_t *)(ds->p_dcd + 1); - break; - case CFG_REG_ADDRESS: - *ds->p_entry++ = cpu_to_be32(value); - break; - case CFG_REG_VALUE: - *ds->p_entry++ = cpu_to_be32(value); - len = (char *)ds->p_entry - (char *)&dcd_v2->header; - dcd_v2->header.length = cpu_to_be16(len); - len = (char *)ds->p_entry - (char *)ds->p_dcd; - ds->p_dcd->length = cpu_to_be16(len); - break; - default: - break; - } + val = *data++; + *ds->p_entry++ = cpu_to_be32(val); + val = *data++; + *ds->p_entry++ = cpu_to_be32(val); + len = (char *)ds->p_entry - (char *)&dcd_v2->header; + dcd_v2->header.length = cpu_to_be16(len); + len = (char *)ds->p_entry - (char *)ds->p_dcd; + ds->p_dcd->length = cpu_to_be16(len); + return 0; }
static int set_imx_hdr_v1(struct data_src *ds, @@ -323,95 +283,71 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry); }
-static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token, - char *name, int lineno, int fld) +static int parse_cmd_data(struct data_src *ds) +{ + uint32_t data[3]; + int ret = ph_get_array(&ds->ph, data, 3); + + if (ret < 0) + return ret; + ret = (*ds->set_dcd_val)(ds, data); + if (ret) + return ret; + if (ds->p_entry > ds->p_max_dcd) { + uint32_t size = (char *)ds->p_max_dcd - (char *)ds->imxhdr; + fprintf(stderr, "Error: header exceeds maximum size(%d)\n", + size); + return -1; + } + return 0; +} + +static int parse_image_version(struct data_src *ds) { - int value; - static int cmd_ver_first = ~0; + int ret; uint32_t imximage_version;
- switch (cmd) { - case CMD_IMAGE_VERSION: - imximage_version = get_cfg_value(token, name, lineno); - if (cmd_ver_first == 0) { - fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION " - "command need be the first before other " - "valid command in the file\n", name, lineno); - exit(EXIT_FAILURE); - } - cmd_ver_first = 1; - set_hdr_func(ds, imximage_version); - break; - case CMD_BOOT_FROM: - g_flash_offset = get_table_entry_id(imximage_bootops, - "imximage boot option", token); - if (g_flash_offset == -1) { - fprintf(stderr, "Error: %s[%d] -Invalid boot device" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; - case CMD_DATA: - value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value); - if (unlikely(cmd_ver_first != 1)) - cmd_ver_first = 0; - break; + ret = ph_get_value(&ds->ph, &imximage_version); + if (ret) + return ret; + if (ds->cmd_cnt) { + fprintf(stderr, "Error: IMAGE_VERSION command needs be " + "before other valid commands in the file\n"); + return -1; } + set_hdr_func(ds, imximage_version); + return 0; }
-static void parse_cfg_fld(struct data_src *ds, int32_t *cmd, - char *token, char *name, int lineno, int fld) +static int parse_boot_from(struct data_src *ds) { - int value; - - switch (fld) { - case CFG_COMMAND: - *cmd = get_table_entry_id(imximage_cmds, - "imximage commands", token); - if (*cmd < 0) { - fprintf(stderr, "Error: %s[%d] - Invalid command" - "(%s)\n", name, lineno, token); - exit(EXIT_FAILURE); - } - break; - case CFG_REG_SIZE: - parse_cfg_cmd(ds, *cmd, token, name, lineno, fld); - break; - case CFG_REG_ADDRESS: - case CFG_REG_VALUE: - if (*cmd != CMD_DATA) - return; - - value = get_cfg_value(token, name, lineno); - (*ds->set_dcd_val)(ds, name, lineno, fld, value); - if (ds->p_entry > ds->p_max_dcd) { - uint32_t size = (char *)ds->p_max_dcd - - (char *)ds->imxhdr; - fprintf(stderr, "Error: %s[%d] -" - "header exceeds maximum size(%d)\n", - name, lineno, size); - exit(EXIT_FAILURE); - } - break; - default: - break; + g_flash_offset = ph_get_table_entry_id(&ds->ph, imximage_bootops, + "imximage boot option"); + if (g_flash_offset == -1) { + fprintf(stderr, "Error: Invalid boot device\n"); + return -1; } + return 0; +} + +static const parse_fld_t cmd_table[] = { + parse_image_version, parse_boot_from, parse_cmd_data +}; + +static int parse_command(struct data_src *ds) +{ + int cmd = ph_get_table_entry_id(&ds->ph, imximage_cmds, + "imximage commands"); + if (cmd < 0) + return cmd; + return cmd_table[cmd](ds); }
static int parse_cfg_file(struct imx_header *imxhdr, char *name, uint32_t entry_point) { struct data_src ds; - FILE *fd = NULL; - char *line = NULL; - char *token, *saveptr1, *saveptr2; - int lineno = 0; - int fld; - size_t len; - int32_t cmd; + struct parse_helper *ph = &ds.ph;
/* Be able to detect if the cfg file has no BOOT_FROM tag */ g_flash_offset = FLASH_OFFSET_UNDEFINED; @@ -423,8 +359,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, * set up function ptr group to V1 by default. */ set_hdr_func(&ds, IMXIMAGE_V1); - fd = fopen(name, "r"); - if (fd == 0) { + if (ph_open(ph, name)) { fprintf(stderr, "Error: %s - Can't open DCD file\n", name); exit(EXIT_FAILURE); } @@ -432,31 +367,19 @@ static int parse_cfg_file(struct imx_header *imxhdr, char *name, /* Very simple parsing, line starting with # are comments * and are dropped */ - while ((getline(&line, &len, fd)) > 0) { - lineno++; - - token = strtok_r(line, "\r\n", &saveptr1); - if (token == NULL) - continue; - - /* Check inside the single line */ - for (fld = CFG_COMMAND, cmd = CMD_INVALID, - line = token; ; line = NULL, fld++) { - token = strtok_r(line, " \t", &saveptr2); - if (token == NULL) - break; - - /* Drop all text starting with '#' as comments */ - if (token[0] == '#') - break; - - parse_cfg_fld(&ds, &cmd, token, name, - lineno, fld); + for (;;) { + ph->cmd_started = 0; + if (ph_skip_separators(ph)) + break; + ph->cmd_started = 1; + if (parse_command(&ds)) { + fprintf(stderr, "Error: invalid token %s[%d](%s)\n", + name, ph->lineno, ph->p); + exit(EXIT_FAILURE); } - + ds.cmd_cnt++; } - fclose(fd); - + ph_close(ph); /* Exit if there is no BOOT_FROM field specifying the flash_offset */ if (g_flash_offset == FLASH_OFFSET_UNDEFINED) { fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name); @@ -538,12 +461,12 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, int imximage_check_params(struct mkimage_params *params) { if (!params) - return CFG_INVALID; + return -1; if (!strlen(params->imagename)) { fprintf(stderr, "Error: %s - Configuration file not specified, " "it is needed for imximage generation\n", params->cmdname); - return CFG_INVALID; + return -1; } /* * Check parameters: diff --git a/tools/imximage.h b/tools/imximage.h index 196bb51..6bcd082 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -23,6 +23,7 @@
#ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ +#include "parse_helper.h"
#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ @@ -49,20 +50,11 @@ #define DCD_VERSION 0x40
enum imximage_cmd { - CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_DATA };
-enum imximage_fld_types { - CFG_INVALID = -1, - CFG_COMMAND, - CFG_REG_SIZE, - CFG_REG_ADDRESS, - CFG_REG_VALUE -}; - enum imximage_version { IMXIMAGE_VER_INVALID = -1, IMXIMAGE_V1 = 1, @@ -159,14 +151,17 @@ struct imx_header { };
struct data_src; -typedef void (*set_dcd_val_t)(struct data_src *ds, char *name, - int lineno, int fld, uint32_t value); +typedef int (*parse_fld_t)(struct data_src *ds); + +typedef int (*set_dcd_val_t)(struct data_src *ds, uint32_t *data);
typedef int (*set_imx_hdr_t)(struct data_src *ds, uint32_t entry_point, uint32_t flash_offset);
struct data_src { + struct parse_helper ph; struct imx_header *imxhdr; + int cmd_cnt; set_imx_hdr_t set_imx_hdr; set_dcd_val_t set_dcd_val; uint32_t *p_max_dcd;
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin - $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ + $(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx + $(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin diff --git a/board/esg/ima3-mx53/imximage.cfg b/board/esg/ima3-mx53/imximage.cfg index fa6b42d..fce7492 100644 --- a/board/esg/ima3-mx53/imximage.cfg +++ b/board/esg/ima3-mx53/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C) Copyright 2012 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2012 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM nor
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# IOMUX for RAM only +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* IOMUX for RAM only */ DATA 4 0x53fa8554 0x300020 DATA 4 0x53fa8560 0x300020 DATA 4 0x53fa8594 0x300020 @@ -72,37 +74,47 @@ DATA 4 0x53fa86fc 0x0 DATA 4 0x53fa86f4 0x0 DATA 4 0x53fa8714 0x0 DATA 4 0x53fa8724 0x4000000 -# -# DDR RAM + +/* DDR RAM */ DATA 4 0x63fd9088 0x40404040 DATA 4 0x63fd9090 0x40404040 DATA 4 0x63fd907C 0x01420143 DATA 4 0x63fd9080 0x01450146 DATA 4 0x63fd9018 0x00111740 DATA 4 0x63fd9000 0x84190000 -# esdcfgX + +/* esdcfgX */ DATA 4 0x63fd900C 0x9f5152e3 DATA 4 0x63fd9010 0xb68e8a63 DATA 4 0x63fd9014 0x01ff00db -# Read/Write command delay + +/* Read/Write command delay */ DATA 4 0x63fd902c 0x000026d2 -# Out of reset delays + +/* Out of reset delays */ DATA 4 0x63fd9030 0x00ff0e21 -# ESDCTL ODT timing control + +/* ESDCTL ODT timing control */ DATA 4 0x63fd9008 0x12273030 -# ESDCTL power down control + +/* ESDCTL power down control */ DATA 4 0x63fd9004 0x0002002d -# Set registers in DDR memory chips + +/* Set registers in DDR memory chips */ DATA 4 0x63fd901c 0x00008032 DATA 4 0x63fd901c 0x00008033 DATA 4 0x63fd901c 0x00028031 DATA 4 0x63fd901c 0x052080b0 DATA 4 0x63fd901c 0x04008040 -# ESDCTL refresh control + +/* ESDCTL refresh control */ DATA 4 0x63fd9020 0x00005800 -# PHY ZQ HW control + +/* PHY ZQ HW control */ DATA 4 0x63fd9040 0x05380003 -# PHY ODT control + +/* PHY ODT control */ DATA 4 0x63fd9058 0x00022222 -# start DDR3 + +/* start DDR3 */ DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 62498ab..c86cd40 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -154,7 +158,7 @@ DATA 4 0x021b48b8 0x00000800 DATA 4 0x021b001c 0x00000000 DATA 4 0x021b0404 0x00011006
-# set the default clock gate to save power +/* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 @@ -163,8 +167,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx25pdk/imximage.cfg b/board/freescale/mx25pdk/imximage.cfg index f7af7ff..c42a283 100644 --- a/board/freescale/mx25pdk/imximage.cfg +++ b/board/freescale/mx25pdk/imximage.cfg @@ -1,46 +1,49 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# EIM config-CS5 init -- CPLD +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* EIM config-CS5 init -- CPLD */ DATA 4 0xB8002050 0x0000D843 DATA 4 0xB8002054 0x22252521 DATA 4 0xB8002058 0x22220A00
-# DDR2 init +/* DDR2 init */ DATA 4 0xB8001004 0x0076E83A DATA 4 0xB8001010 0x00000204 DATA 4 0xB8001000 0x92210000 @@ -67,7 +70,7 @@ DATA 4 0x43FAC454 0x00001000
DATA 4 0x53F80008 0x20034000
-# Enable the clocks +/* Enable the clocks */ DATA 4 0x53f8000c 0x1fffffff DATA 4 0x53f80010 0xffffffff DATA 4 0x53f80014 0xfdfff diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg index a875e8f..3e141ee 100644 --- a/board/freescale/mx51evk/imximage.cfg +++ b/board/freescale/mx51evk/imximage.cfg @@ -1,46 +1,50 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */
-# Setting IOMUXC +/* Setting IOMUXC */ DATA 4 0x73FA88a0 0x200 DATA 4 0x73FA850c 0x20c5 DATA 4 0x73FA8510 0x20c5 @@ -65,22 +69,24 @@ DATA 4 0x73FA88a4 0x6 DATA 4 0x73FA88ac 0x6 DATA 4 0x73FA88b8 0x6
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83FD9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83FD9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83FD9010 0x000ad0d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83FD9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83FD900C 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83FD9014 0x04008008 DATA 4 0x83FD9014 0x0000801a DATA 4 0x83FD9014 0x0000801b @@ -94,7 +100,7 @@ DATA 4 0x83FD9014 0x03808019 DATA 4 0x83FD9014 0x00408019 DATA 4 0x83FD9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83FD9014 0x0400800c DATA 4 0x83FD9014 0x0000801e DATA 4 0x83FD9014 0x0000801f @@ -108,12 +114,12 @@ DATA 4 0x83FD9014 0x0380801d DATA 4 0x83FD9014 0x0040801d DATA 4 0x83FD9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83FD9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83FD9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83FD9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83FD9034 0x90000000 DATA 4 0x83FD9014 0x00000000 diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg index 915fb2c..1cd61d5 100644 --- a/board/freescale/mx53evk/imximage.cfg +++ b/board/freescale/mx53evk/imximage.cfg @@ -1,50 +1,52 @@ -# -# (C Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Setting IOMUXC +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* Setting IOMUXC */ DATA 4 0x53fa8554 0x00200000 DATA 4 0x53fa8560 0x00200000 DATA 4 0x53fa8594 0x00200000 diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index 2ce5f8d..e6b90c1 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -1,48 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 614d29e..4633e4d 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -1,48 +1,51 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
+/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x53fa8554 0x00300000 DATA 4 0x53fa8558 0x00300040 DATA 4 0x53fa8560 0x00300000 diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index bf941a3..4ed211e 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -1,47 +1,51 @@ -# Copyright (C) 2011 Freescale Semiconductor, Inc. -# Jason Liu r64343@freescale.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# image version - +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ IMAGE_VERSION 2
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) - +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM sd
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ DATA 4 0x020e05a8 0x00000030 DATA 4 0x020e05b0 0x00000030 DATA 4 0x020e0524 0x00000030 @@ -166,8 +170,8 @@ DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF
-# enable AXI cache for VDOA/VPU/IPU +/* enable AXI cache for VDOA/VPU/IPU */ DATA 4 0x020e0010 0xF00000CF -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/genesi/mx51_efikamx/imximage_mx.cfg b/board/genesi/mx51_efikamx/imximage_mx.cfg index 38fa760..21ff6d6 100644 --- a/board/genesi/mx51_efikamx/imximage_mx.cfg +++ b/board/genesi/mx51_efikamx/imximage_mx.cfg @@ -1,52 +1,58 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Essential GPIO settings to be done as early as possible -# PCBIDn pad settings are all the defaults except #2 which needs HVE off +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +/* + * Essential GPIO settings to be done as early as possible + * PCBIDn pad settings are all the defaults except #2 which needs HVE off + */ DATA 4 0x73fa8134 0x3 # PCBID0 ALT3 GPIO 3_16 DATA 4 0x73fa8130 0x3 # PCBID1 ALT3 GPIO 3_17 DATA 4 0x73fa8128 0x3 # PCBID2 ALT3 GPIO 3_11 @@ -55,7 +61,7 @@ DATA 4 0x73fa8198 0x3 # LED0 ALT3 GPIO 3_13 DATA 4 0x73fa81c4 0x3 # LED1 ALT3 GPIO 3_14 DATA 4 0x73fa81c8 0x3 # LED2 ALT3 GPIO 3_15
-# DDR bus IOMUX PAD settings +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 DATA 4 0x73fa84ac 0xc5 # SDWE @@ -72,22 +78,24 @@ DATA 4 0x73fa84d8 0xc5 # DRAM_DQM1 DATA 4 0x73fa84dc 0xc5 # DRAM_DQM2 DATA 4 0x73fa84e0 0xc5 # DRAM_DQM3
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x3f3574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x3f3574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -101,7 +109,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -115,12 +123,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0040801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/genesi/mx51_efikamx/imximage_sb.cfg b/board/genesi/mx51_efikamx/imximage_sb.cfg index 26d259f..7ddd0b1 100644 --- a/board/genesi/mx51_efikamx/imximage_sb.cfg +++ b/board/genesi/mx51_efikamx/imximage_sb.cfg @@ -1,51 +1,55 @@ -# -# Copyright (C) 2009 Pegatron Corporation -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# Copyright (C) 2009-2012 Genesi USA, Inc. -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage +/* + * Copyright (C) 2009 Pegatron Corporation + * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * BASED ON: imx51evk + * + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */
-# Boot Device : one of -# spi, sd (the board has no nand neither onenand) +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# DDR bus IOMUX PAD settings +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register +*/ +/* DDR bus IOMUX PAD settings */ DATA 4 0x73fa88a0 0x200 # GRP_INMODE1 DATA 4 0x73fa850c 0x20c5 # SDODT1 DATA 4 0x73fa8510 0x20c5 # SDODT0 @@ -62,22 +66,24 @@ DATA 4 0x73fa84b4 0xe5 # SDCKE1 DATA 4 0x73fa84cc 0xe5 # DRAM_CS0 DATA 4 0x73fa84d0 0xe4 # DRAM_CS1
-# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 +/* + * Setting DDR for micron + * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model + * CAS=3 BL=4 + */ +/* ESDCTL_ESDCTL0 */ DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 +/* ESDCTL_ESDCTL1 */ DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC +/* ESDCTL_ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 +/* ESDCTL_ESDCFG0 */ DATA 4 0x83fd9004 0x333574aa -# ESDCTL_ESDCFG1 +/* ESDCTL_ESDCFG1 */ DATA 4 0x83fd900c 0x333574aa
-# Init DRAM on CS0 -# ESDCTL_ESDSCR +/* Init DRAM on CS0 */ +/* ESDCTL_ESDSCR */ DATA 4 0x83fd9014 0x04008008 DATA 4 0x83fd9014 0x0000801a DATA 4 0x83fd9014 0x0000801b @@ -91,7 +97,7 @@ DATA 4 0x83fd9014 0x03808019 DATA 4 0x83fd9014 0x00408019 DATA 4 0x83fd9014 0x00008000
-# Init DRAM on CS1 +/* Init DRAM on CS1 */ DATA 4 0x83fd9014 0x0400800c DATA 4 0x83fd9014 0x0000801e DATA 4 0x83fd9014 0x0000801f @@ -105,12 +111,12 @@ DATA 4 0x83fd9014 0x0380801d DATA 4 0x83fd9014 0x0042801d DATA 4 0x83fd9014 0x00008004
-# Write to CTL0 +/* Write to CTL0 */ DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 +/* Write to CTL1 */ DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC +/* ESDMISC */ DATA 4 0x83fd9010 0xcaaaf6d0 -#ESDCTL_ESDCDLYGD +/* ESDCTL_ESDCDLYGD */ DATA 4 0x83fd9034 0x90000000 DATA 4 0x83fd9014 0x00000000 diff --git a/board/ttcontrol/vision2/imximage_hynix.cfg b/board/ttcontrol/vision2/imximage_hynix.cfg index ed531db..c1de94f 100644 --- a/board/ttcontrol/vision2/imximage_hynix.cfg +++ b/board/ttcontrol/vision2/imximage_hynix.cfg @@ -1,209 +1,228 @@ -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# (C) Copyright 2010 -# Klaus Steinhammer TTECH Control Gmbh kst@tttech.com -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, nand, onenand, sd - +/* + * (C) Copyright 2009 + * Stefano Babic DENX Software Engineering sbabic@denx.de. + * + * (C) Copyright 2010 + * Klaus Steinhammer TTECH Control Gmbh kst@tttech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* + * Boot Device : one of + * spi, nand, onenand, sd + */ BOOT_FROM spi
-# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -####################### -### Disable WDOG ### -####################### +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * ####################### + * ### Disable WDOG ### + * ####################### + */ DATA 2 0x73f98000 0x30
-####################### -### SET DDR Clk ### -####################### - -# CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) +/* + * ####################### + * ### SET DDR Clk ### + * ####################### + */ +/* CCM: CBMCR - ddr_clk_sel: axi_b (133MHz) */ DATA 4 0x73FD4018 0x000024C0
-# DOUBLE SPI CLK (13MHz->26 MHz Clock) +/* DOUBLE SPI CLK (13MHz->26 MHz Clock) */ DATA 4 0x73FD4038 0x2010241
-#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MOSI HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8600 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_MISO HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8604 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS0 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8608 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SS1 HYS_ENABLE | PKE_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa860c 0x00000187 -#IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST +/* IOMUXC_SW_PAD_CTL_PAD_CSPI1_SCLK HYS_ENABLE | DRV_MAX | SRE_FAST */ DATA 4 0x73fa8614 0x00000107 -#IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) +/* IOMUXC_SW_PAD_CTL_PAD_DI1_PIN11 HYS_ENABLE | DRV_MAX | SRE_FAST (CSPI1_SS2) */ DATA 4 0x73fa86a8 0x00000187
-####################### -### Settings IOMUXC ### -####################### - -# DDR IOMUX configuration -# Control, Data, Address pads are in their default state: HIGH DS, FAST SR. -# IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS +/* + * ####################### + * ### Settings IOMUXC ### + * ####################### + */ +/* + * DDR IOMUX configuration + * Control, Data, Address pads are in their default state: HIGH DS, FAST SR. + * IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK MAX DS + */ DATA 4 0x73fa84b8 0x000000e7 -# PVTC MAX (at GPC, PGR reg) -#DATA 4 0x73FD8004 0x1fc00000 +/* PVTC MAX (at GPC, PGR reg) */ +/* DATA 4 0x73FD8004 0x1fc00000 */
-#DQM0 DS high slew rate slow +/* DQM0 DS high slew rate slow */ DATA 4 0x73fa84d4 0x000000e4 -#DQM1 DS high slew rate slow +/* DQM1 DS high slew rate slow */ DATA 4 0x73fa84d8 0x000000e4 -#DQM2 DS high slew rate slow +/* DQM2 DS high slew rate slow */ DATA 4 0x73fa84dc 0x000000e4 -#DQM3 DS high slew rate slow +/* DQM3 DS high slew rate slow */ DATA 4 0x73fa84e0 0x000000e4
-#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 DS high & SLEW slow */ DATA 4 0x73fa84bc 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 DS high & SLEW slow */ DATA 4 0x73fa84c0 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 DS high & SLEW slow */ DATA 4 0x73fa84c4 0x000000c4 -#IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow +/* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 DS high & SLEW slow */ DATA 4 0x73fa84c8 0x000000c4
-#DRAM_DATA B0 +/* DRAM_DATA B0 */ DATA 4 0x73fa88a4 0x00000004 -#DRAM_DATA B1 +/* DRAM_DATA B1 */ DATA 4 0x73fa88ac 0x00000004 -#DRAM_DATA B2 +/* DRAM_DATA B2 */ DATA 4 0x73fa88b8 0x00000004 -#DRAM_DATA B3 +/* DRAM_DATA B3 */ DATA 4 0x73fa882c 0x00000004
-#DRAM_DATA B0 slew rate +/* DRAM_DATA B0 slew rate */ DATA 4 0x73fa8878 0x00000000 -#DRAM_DATA B1 slew rate +/* DRAM_DATA B1 slew rate */ DATA 4 0x73fa8880 0x00000000 -#DRAM_DATA B2 slew rate +/* DRAM_DATA B2 slew rate */ DATA 4 0x73fa888c 0x00000000 -#DRAM_DATA B3 slew rate +/* DRAM_DATA B3 slew rate */ DATA 4 0x73fa889c 0x00000000
-####################### -### Configure SDRAM ### -####################### +/* + * ####################### + * ### Configure SDRAM ### + * ####################### + */
-# Configure CS0 -####################### +/* Configure CS0 */ +/* ####################### */
-# ESDCTL0: Enable controller +/* ESDCTL0: Enable controller */ DATA 4 0x83fd9000 0x83220000
-# Init DRAM on CS0 -# ESDSCR: Precharge command +/* Init DRAM on CS0 / +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x04008008 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008010 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x00338018 -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801a -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008000
-# ESDSCR: EMR with full Drive strength -#DATA 4 0x83fd9014 0x0000801a +/* ESDSCR: EMR with full Drive strength */ +/* DATA 4 0x83fd9014 0x0000801a */
-# ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL0: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9000 0xC3220000
-# ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd9004 0xC33574AA - -#micron mDDR -# ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD9004 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG0: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd9004 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG0: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD9004 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD9004 0x704564a8
-# ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 +/* ESDMISC: AP=10, Bank interleaving on, MIF3 en, RALAT=2 */ DATA 4 0x83fd9010 0x000a1700
-# Configure CS1 -####################### +/* Configure CS1 */ +/* ####################### */
-# ESDCTL1: Enable controller +/* ESDCTL1: Enable controller */ DATA 4 0x83fd9008 0x83220000
-# Init DRAM on CS1 -# ESDSCR: Precharge command +/* Init DRAM on CS1 */ +/* ESDSCR: Precharge command */ DATA 4 0x83fd9014 0x0400800c -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: Refresh command +/* ESDSCR: Refresh command */ DATA 4 0x83fd9014 0x00008014 -# ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) +/* ESDSCR: LMR with CAS=3 and BL=3 (Burst Length = 8) */ DATA 4 0x83fd9014 0x0033801c -# ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) +/* ESDSCR: EMR with half Drive strength (= medium strength @ i.MX51) */ DATA 4 0x83fd9014 0x0020801e -# ESDSCR +/* ESDSCR */ DATA 4 0x83fd9014 0x00008004
-# ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 +/* ESDCTL1: 14 ROW, 10 COL, 32Bit, SREF=8 */ DATA 4 0x83fd9008 0xC3220000 - -# ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks -#DATA 4 0x83fd900c 0xC33574AA - -#micron mDDR -# ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks -#DATA 4 0x83FD900C 0x101564a8 - -#hynix mDDR -# ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks -# tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks +/* + * ESDCFG1: tRFC:22clks, tXSR:28clks, tXP:2clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:8clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:11clks + * DATA 4 0x83fd900c 0xC33574AA + */ +/* + * micron mDDR + * ESDCFG1: tRFC:11clks, tXSR:19clks, tXP:1clks, tWTR:2clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + * DATA 4 0x83FD900C 0x101564a8 + */ +/* + * hynix mDDR + * ESDCFG0: tRFC:17clks, tXSR:21clks, tXP:3clks, tWTR:1clk, tRP:3clks, tMRD:2clks + * tRAS:7clks, tRRD:2clks, tWR:3clks, tRCD:3clks, tRC:9clks + */ DATA 4 0x83FD900C 0x704564a8
-# ESDSCR (mDRAM configuration finished) +/* ESDSCR (mDRAM configuration finished) */ DATA 4 0x83FD9014 0x00000004
-# ESDSCR - clear "configuration request" bit +/* ESDSCR - clear "configuration request" bit */ DATA 4 0x83fd9014 0x00000000
Hi Troy,
On 10/03/2012 06:47 PM, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \
This bit creates imxcfg.imx.
If built in-tree, the file will be reported as a new file in 'git status'. Is there a reason it can't be deleted after the build?
On 10/7/2012 11:19 AM, Eric Nelson wrote:
Hi Troy,
On 10/03/2012 06:47 PM, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o$(obj)imxcfg.imx
$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@This bit creates imxcfg.imx.
If built in-tree, the file will be reported as a new file in 'git status'. Is there a reason it can't be deleted after the build?
Just being able to look at it to see that the output makes sense. I should make sure that make clean, deletes it, but I kinda like being able to look at it after a make all. Is an entry in gitignore ok?
Is everyone OK was the file name imxcfg.imx, or should some other extension be used?
On 04/10/2012 03:47, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
I see the C preprocessor as an optional feature, instead of a rule everybody must follow.
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \
In fact, adding this rule here requires that each board configuration must be changed. And for all of them, running the preprocessor is unnnecessary.
What about to add this rule only to the Makefile of the boards that require preprocessing ?
Best regards, Stefano Babic
On 10/8/2012 6:38 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
I see the C preprocessor as an optional feature, instead of a rule everybody must follow.
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \In fact, adding this rule here requires that each board configuration must be changed. And for all of them, running the preprocessor is unnnecessary.
What about to add this rule only to the Makefile of the boards that require preprocessing ?
Best regards, Stefano Babic
That would be great. But I don't know how to accomplish that. Can you point to similar magic that I can try to understand?
Thanks Troy
On 10/8/2012 6:38 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
I see the C preprocessor as an optional feature, instead of a rule everybody must follow.
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o $(obj)imxcfg.imx$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \In fact, adding this rule here requires that each board configuration must be changed. And for all of them, running the preprocessor is unnnecessary.
What about to add this rule only to the Makefile of the boards that require preprocessing ?
Best regards, Stefano Babic
How about this to do the job....
Subject: [PATCH 17/32] boards.cfg: run mx6q_4x_mt41j128.pcfg through C preprocessor
The '#' used as comments in the cfg file cause the preprocessor trouble, so change to /* */. Also, rename mx6q_4x_mt41j128.cfg to mx6q_4x_mt41j128.pcfg.
Files with extension of .pcfg are run through the preprocessor before being given to mkimage.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- v4: Don't run every file through preprocessor, only .pcfg files --- .gitignore | 1 + Makefile | 16 +++- ...{mx6q_4x_mt41j128.cfg => mx6q_4x_mt41j128.pcfg} | 90 ++++++++++---------- boards.cfg | 4 +- 4 files changed, 63 insertions(+), 48 deletions(-) rename board/freescale/imx/ddr/{mx6q_4x_mt41j128.cfg => mx6q_4x_mt41j128.pcfg} (65%)
diff --git a/.gitignore b/.gitignore index d91e91b..e5273bd 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ *.swp *.patch *.bin +*.pcfgtmp
# Build tree /build-* diff --git a/Makefile b/Makefile index a40d4cc..99666b9 100644 --- a/Makefile +++ b/Makefile @@ -430,8 +430,17 @@ $(obj)u-boot.img: $(obj)u-boot.bin sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \ -d $< $@
-$(obj)u-boot.imx: $(obj)u-boot.bin - $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ +ifeq ($(suffix $(patsubst "%",%,$(CONFIG_IMX_CONFIG))),.pcfg) +$(obj)$(patsubst "%",%,$(CONFIG_IMX_CONFIG))tmp: %.pcfgtmp : %.pcfg + $(CC) -E -x c $< -I./include -o $@ + +$(obj)u-boot.imx: %.imx : %.bin $(obj)$(patsubst "%",%,$(CONFIG_IMX_CONFIG))tmp +else +$(obj)u-boot.imx: %.imx : %.bin $(patsubst "%",%,$(CONFIG_IMX_CONFIG)) +endif + +$(obj)u-boot.imx: + $(obj)tools/mkimage -n $(filter-out %.bin,$^) -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin @@ -794,7 +803,8 @@ clean: @rm -f $(TIMESTAMP_FILE) $(VERSION_FILE) @find $(OBJTREE) -type f \ ( -name 'core' -o -name '*.bak' -o -name '*~' -o -name '*.su' \ - -o -name '*.o' -o -name '*.a' -o -name '*.exe' ) -print \ + -o -name '*.o' -o -name '*.a' -o -name '*.exe' \ + -o -name '*.pcfgtmp' ) -print \ | xargs rm -f
# Removes everything not needed for testing u-boot diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.pcfg similarity index 65% rename from board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg rename to board/freescale/imx/ddr/mx6q_4x_mt41j128.pcfg diff --git a/boards.cfg b/boards.cfg index e9e073e..677beac 100644 --- a/boards.cfg +++ b/boards.cfg @@ -232,8 +232,8 @@ ima3-mx53 arm armv7 ima3-mx53 esg vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imx image_hynix.cfg mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/i mximage.cfg mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qs abreauto/imximage.cfg -mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/d dr/mx6q_4x_mt41j128.cfg -mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr /mx6q_4x_mt41j128.cfg +mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/d dr/mx6q_4x_mt41j128.pcfg +mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr /mx6q_4x_mt41j128.pcfg cm_t35 arm armv7 cm_t35 - omap3 omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 -- 1.7.9.5
Am 10/10/2012 04:03, schrieb Troy Kisky:
On 10/8/2012 6:38 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor trouble, so change to /* */.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
Makefile | 3 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ 13 files changed, 727 insertions(+), 653 deletions(-)
I see the C preprocessor as an optional feature, instead of a rule everybody must follow.
diff --git a/Makefile b/Makefile index a40d4cc..64ff1b8 100644 --- a/Makefile +++ b/Makefile @@ -431,7 +431,8 @@ $(obj)u-boot.img: $(obj)u-boot.bin -d $< $@ $(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \
$(CC) -E -x c $(CONFIG_IMX_CONFIG) -I./include -o$(obj)imxcfg.imx
$(obj)tools/mkimage -n $(obj)imxcfg.imx -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@In fact, adding this rule here requires that each board configuration must be changed. And for all of them, running the preprocessor is unnnecessary.
What about to add this rule only to the Makefile of the boards that require preprocessing ?
Best regards, Stefano Babic
How about this to do the job....
Subject: [PATCH 17/32] boards.cfg: run mx6q_4x_mt41j128.pcfg through C preprocessor
The '#' used as comments in the cfg file cause the preprocessor trouble, so change to /* */. Also, rename mx6q_4x_mt41j128.cfg to mx6q_4x_mt41j128.pcfg.
Files with extension of .pcfg are run through the preprocessor before being given to mkimage.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
v4: Don't run every file through preprocessor, only .pcfg files
.gitignore | 1 + Makefile | 16 +++- ...{mx6q_4x_mt41j128.cfg => mx6q_4x_mt41j128.pcfg} | 90 ++++++++++---------- boards.cfg | 4 +- 4 files changed, 63 insertions(+), 48 deletions(-) rename board/freescale/imx/ddr/{mx6q_4x_mt41j128.cfg => mx6q_4x_mt41j128.pcfg} (65%)
diff --git a/.gitignore b/.gitignore index d91e91b..e5273bd 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ *.swp *.patch *.bin +*.pcfgtmp
# Build tree /build-* diff --git a/Makefile b/Makefile index a40d4cc..99666b9 100644 --- a/Makefile +++ b/Makefile @@ -430,8 +430,17 @@ $(obj)u-boot.img: $(obj)u-boot.bin sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \ -d $< $@
-$(obj)u-boot.imx: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \+ifeq ($(suffix $(patsubst "%",%,$(CONFIG_IMX_CONFIG))),.pcfg) +$(obj)$(patsubst "%",%,$(CONFIG_IMX_CONFIG))tmp: %.pcfgtmp : %.pcfg
$(CC) -E -x c $< -I./include -o $@+$(obj)u-boot.imx: %.imx : %.bin $(obj)$(patsubst "%",%,$(CONFIG_IMX_CONFIG))tmp +else +$(obj)u-boot.imx: %.imx : %.bin $(patsubst "%",%,$(CONFIG_IMX_CONFIG)) +endif
+$(obj)u-boot.imx:
$(obj)tools/mkimage -n $(filter-out %.bin,$^) -Timximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
Does it work something more direct (I have not tested, really...) ?
In board Makefile, for example board/freescale/mx6qsabrelite, a rule for the imximage file:
$(CONFIG_IMX_CONFIG): <your base file, mx6q_4x_mt41j128.cfg maybe> $(CC) -E -x c $< -I./include -o $@
And let unchanged in the main Makefile. So CONFIG_IMX_CONFIG is produced and you do not need to change logic in the main Makefile.
Regards, Stefano
On 10/11/2012 4:11 AM, Stefano Babic wrote:
Does it work something more direct (I have not tested, really...) ?
In board Makefile, for example board/freescale/mx6qsabrelite, a rule for the imximage file:
$(CONFIG_IMX_CONFIG): <your base file, mx6q_4x_mt41j128.cfg maybe> $(CC) -E -x c $< -I./include -o $@
And let unchanged in the main Makefile. So CONFIG_IMX_CONFIG is produced and you do not need to change logic in the main Makefile.
Regards, Stefano
The advantages I see of changing the main Makefile are 1. Easy for other boards to use the preprocessor. You merely need to change the file extension to pcfg.
2. Easy to clean the temporary generated file. The main Makefile deletes files with .pcfgtmp extension.
3. The file referred to by boards.cfg actually exists before the build starts.
4. The temporary file can be placed in an out-of-tree directory for make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Thanks Troy
Am 11/10/2012 22:33, schrieb Troy Kisky:
On 10/11/2012 4:11 AM, Stefano Babic wrote:
Does it work something more direct (I have not tested, really...) ?
In board Makefile, for example board/freescale/mx6qsabrelite, a rule for the imximage file:
$(CONFIG_IMX_CONFIG): <your base file, mx6q_4x_mt41j128.cfg maybe> $(CC) -E -x c $< -I./include -o $@
And let unchanged in the main Makefile. So CONFIG_IMX_CONFIG is produced and you do not need to change logic in the main Makefile.
Regards, Stefano
The advantages I see of changing the main Makefile are
- Easy for other boards to use the preprocessor. You merely
need to change the file extension to pcfg.
I set Tom in CC, because changing the main Makefile is more related to the whole project, and not only for the i.MX.
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
- Easy to clean the temporary generated file. The main Makefile
deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before the build
starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
- The temporary file can be placed in an out-of-tree directory for
make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
Regards, Stefano
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
- Easy to clean the temporary generated file. The main Makefile
deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before the build
starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
- The temporary file can be placed in an out-of-tree directory for
make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Introducing slight differences to the image generation rules per family generation when we could just have one rule that works fine for all generations is one worry I have about the notion of moving things out of a top level Makefile and putting them elsewhere.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
How about this, if we convert the existing cfg files to '@' comments and use the LDSCRIPT style preprocessor rule instead of another one? I assume there's improvements that could be done to the mx5 ones if we preprocessed them. Or no? I'm looking for opinions here myself still..
Hi Tom,
On Thu, 11 Oct 2012 16:15:02 -0700, Tom Rini trini@ti.com wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
Tom, can you be more specific than 'it doesn't work'? :)
Seriously, though, I'm interested in understand what the make issue is there, because I am indeed a proponent of putting files where they belong to, so if help is needed there, I would try to.
Amicalement,
On Sat, Oct 13, 2012 at 3:11 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Oct 2012 16:15:02 -0700, Tom Rini trini@ti.com wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
Tom, can you be more specific than 'it doesn't work'? :)
Seriously, though, I'm interested in understand what the make issue is there, because I am indeed a proponent of putting files where they belong to, so if help is needed there, I would try to.
I have had no luck moving things like the 'MLO' rule from spl/Makefile to anywhere else. Same with the 'checkthumb' rule in the top-level Makefile.
Hi Tom,
(seems like gmail does not honor the rule that replies should drop the "(was: xxxxx)" part in an e-mail subject; but hey, neither does Claws apparently. Sigh.)
On Sat, 13 Oct 2012 08:17:41 -0700, Tom Rini trini@ti.com wrote:
On Sat, Oct 13, 2012 at 3:11 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Oct 2012 16:15:02 -0700, Tom Rini trini@ti.com wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
Tom, can you be more specific than 'it doesn't work'? :)
Seriously, though, I'm interested in understand what the make issue is there, because I am indeed a proponent of putting files where they belong to, so if help is needed there, I would try to.
I have had no luck moving things like the 'MLO' rule from spl/Makefile to anywhere else. Same with the 'checkthumb' rule in the top-level Makefile.
Ok, now it is more precise :) but still not enough for me to efficiently try and analyze the issue.
Let's take the checkthumb rule. Where did you try to move it?
Amicalement,
On Sun, Oct 14, 2012 at 1:37 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
(seems like gmail does not honor the rule that replies should drop the "(was: xxxxx)" part in an e-mail subject; but hey, neither does Claws apparently. Sigh.)
On Sat, 13 Oct 2012 08:17:41 -0700, Tom Rini trini@ti.com wrote:
On Sat, Oct 13, 2012 at 3:11 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Oct 2012 16:15:02 -0700, Tom Rini trini@ti.com wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
Tom, can you be more specific than 'it doesn't work'? :)
Seriously, though, I'm interested in understand what the make issue is there, because I am indeed a proponent of putting files where they belong to, so if help is needed there, I would try to.
I have had no luck moving things like the 'MLO' rule from spl/Makefile to anywhere else. Same with the 'checkthumb' rule in the top-level Makefile.
Ok, now it is more precise :) but still not enough for me to efficiently try and analyze the issue.
Let's take the checkthumb rule. Where did you try to move it?
I tried both arch/arm/config.mk arch/arm/Makefile and couldn't make either work.
Hi Tom,
On Sun, 14 Oct 2012 18:24:58 -0700, Tom Rini trini@ti.com wrote:
On Sun, Oct 14, 2012 at 1:37 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
(seems like gmail does not honor the rule that replies should drop the "(was: xxxxx)" part in an e-mail subject; but hey, neither does Claws apparently. Sigh.)
On Sat, 13 Oct 2012 08:17:41 -0700, Tom Rini trini@ti.com wrote:
On Sat, Oct 13, 2012 at 3:11 AM, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Oct 2012 16:15:02 -0700, Tom Rini trini@ti.com wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
Tom, can you be more specific than 'it doesn't work'? :)
Seriously, though, I'm interested in understand what the make issue is there, because I am indeed a proponent of putting files where they belong to, so if help is needed there, I would try to.
I have had no luck moving things like the 'MLO' rule from spl/Makefile to anywhere else. Same with the 'checkthumb' rule in the top-level Makefile.
Ok, now it is more precise :) but still not enough for me to efficiently try and analyze the issue.
Let's take the checkthumb rule. Where did you try to move it?
I tried both arch/arm/config.mk arch/arm/Makefile and couldn't make either work.
Thanks. I'm adding this to my todo list, although not as an immediate priority.
Amicalement,
On 10/11/2012 4:15 PM, Tom Rini wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
- Easy to clean the temporary generated file. The main Makefile
deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before the build
starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
Consistency was my point here. Every other file in boards.cfg exists prior to build.
- The temporary file can be placed in an out-of-tree directory for
make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Introducing slight differences to the image generation rules per family generation when we could just have one rule that works fine for all generations is one worry I have about the notion of moving things out of a top level Makefile and putting them elsewhere.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
How about this, if we convert the existing cfg files to '@' comments and use the LDSCRIPT style preprocessor rule instead of another one? I assume there's improvements that could be done to the mx5 ones if we preprocessed them. Or no? I'm looking for opinions here myself still..
I had previously converted all existing cfg files to /* */ comments. That style of comment seems common for LDSCRIPTs as well. '@''s actually give me an error.
arm-eabi-ld:u-boot.lds:1: ignoring invalid character `@' in expression
I do believe mx5 files can benefit from preprocessing. I can see the advantage of converting everything now. I also like flexibility of not forcing every cfg file to change now. So, I am setting on the fence. If I have to take a position, I'd fall on the side of the smaller patch set of a gradual conversion, just because I like smaller patches.
Troy
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 10/17/12 13:32, Troy Kisky wrote:
On 10/11/2012 4:15 PM, Tom Rini wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
- Easy to clean the temporary generated file. The main
Makefile deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before
the build starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
Consistency was my point here. Every other file in boards.cfg exists prior to build.
- The temporary file can be placed in an out-of-tree
directory for make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Introducing slight differences to the image generation rules per family generation when we could just have one rule that works fine for all generations is one worry I have about the notion of moving things out of a top level Makefile and putting them elsewhere.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
How about this, if we convert the existing cfg files to '@' comments and use the LDSCRIPT style preprocessor rule instead of another one? I assume there's improvements that could be done to the mx5 ones if we preprocessed them. Or no? I'm looking for opinions here myself still..
I had previously converted all existing cfg files to /* */ comments. That style of comment seems common for LDSCRIPTs as well. '@''s actually give me an error.
arm-eabi-ld:u-boot.lds:1: ignoring invalid character `@' in expression
Right, but in u-boot.lds.S it gets preprocessed away, at least I swear I changed and tested that. My thinking being it was a smaller diff delta. But my final point being I don't think we should start introducing artificial differences here just because older boards may not use it. That doing that leads to bit rot.
I do believe mx5 files can benefit from preprocessing. I can see the advantage of converting everything now. I also like flexibility of not forcing every cfg file to change now. So, I am setting on the fence. If I have to take a position, I'd fall on the side of the smaller patch set of a gradual conversion, just because I like smaller patches.
I'm on the other side only because "later" sometimes never happens. Doing it as a series of smaller patches, now might be fine too...
- -- Tom
On 10/17/2012 2:05 PM, Tom Rini wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 10/17/12 13:32, Troy Kisky wrote:
On 10/11/2012 4:15 PM, Tom Rini wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
- Easy to clean the temporary generated file. The main
Makefile deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before
the build starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
Consistency was my point here. Every other file in boards.cfg exists prior to build.
- The temporary file can be placed in an out-of-tree
directory for make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Introducing slight differences to the image generation rules per family generation when we could just have one rule that works fine for all generations is one worry I have about the notion of moving things out of a top level Makefile and putting them elsewhere.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
How about this, if we convert the existing cfg files to '@' comments and use the LDSCRIPT style preprocessor rule instead of another one? I assume there's improvements that could be done to the mx5 ones if we preprocessed them. Or no? I'm looking for opinions here myself still..
I had previously converted all existing cfg files to /* */ comments. That style of comment seems common for LDSCRIPTs as well. '@''s actually give me an error.
arm-eabi-ld:u-boot.lds:1: ignoring invalid character `@' in expression
Right, but in u-boot.lds.S it gets preprocessed away, at least I swear I changed and tested that. My thinking being it was a smaller diff delta.
Good point. Is there some magic parameter to pass to gcc to strip @. My current command line is expanded to
arm-eabi-gcc -E -x c board/freescale/imx/ddr/mx6q_4x_mt41j128.pcfg -g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x17800000 -I/home/tkisky/u-boot-imx6/include -fno-builtin -ffreestanding -nostdinc -isystem /home/tkisky/myandroid/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/../lib/gcc/arm-eabi/4.4.3/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -march=armv7-a -o board/freescale/imx/ddr/mx6q_4x_mt41j128.pcfgtmp
Alternatively, I could send a small patch to mkimage to ignore @ lines along with the currently ignored # lines.
I grepped all lds files in u-boot, but could not find one that used @ as a comment indicator. I don't know what/where u-boot.lds.S is.
But my final point being I don't think we should start introducing artificial differences here just because older boards may not use it. That doing that leads to bit rot.
I do believe mx5 files can benefit from preprocessing. I can see the advantage of converting everything now. I also like flexibility of not forcing every cfg file to change now. So, I am setting on the fence. If I have to take a position, I'd fall on the side of the smaller patch set of a gradual conversion, just because I like smaller patches.
I'm on the other side only because "later" sometimes never happens. Doing it as a series of smaller patches, now might be fine too...
Tom
On Wed, Oct 17, 2012 at 02:38:47PM -0700, Troy Kisky wrote:
On 10/17/2012 2:05 PM, Tom Rini wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 10/17/12 13:32, Troy Kisky wrote:
On 10/11/2012 4:15 PM, Tom Rini wrote:
On Fri, Oct 12, 2012 at 12:27:09AM +0200, stefano babic wrote:
[snip]
One reason to move into the board directory is that there was a decision to move rules related to only one arch or SOC where they belong to, that is in the corresponding arch/ or board/ directory.
I'll admit that maybe my make-fu is off, but that idea doesn't work, at least for SPL. So I'd really like someone to make that work first.
- Easy to clean the temporary generated file. The main
Makefile deletes files with .pcfgtmp extension.
- The file referred to by boards.cfg actually exists before
the build starts.
This is true, but I do not understand which is the advantage. A lot of files are generated, also .c or .S files. If it exists or not, it does not matter.
Consistency was my point here. Every other file in boards.cfg exists prior to build.
- The temporary file can be placed in an out-of-tree
directory for make -O builds
Using the file extension to determine whether to use the preprocessor is also what gcc uses to preprocess ".S" files while skipping this for ".s" files.
I believe that at least other mx6 boards will quickly change to using the preprocessor as well to add support for solo/duallite, so total line count should eventually be less with changes to the main makefile.
Ok, but if this true, the rule should be moved to the mx6 directory, and should not be valid for other i.MX that do not need it.
Introducing slight differences to the image generation rules per family generation when we could just have one rule that works fine for all generations is one worry I have about the notion of moving things out of a top level Makefile and putting them elsewhere.
Having said that, I really have no problem going your route, I just don't prefer it. Let me know.
Let's wait to know Tom's opinion.
How about this, if we convert the existing cfg files to '@' comments and use the LDSCRIPT style preprocessor rule instead of another one? I assume there's improvements that could be done to the mx5 ones if we preprocessed them. Or no? I'm looking for opinions here myself still..
I had previously converted all existing cfg files to /* */ comments. That style of comment seems common for LDSCRIPTs as well. '@''s actually give me an error.
arm-eabi-ld:u-boot.lds:1: ignoring invalid character `@' in expression
Right, but in u-boot.lds.S it gets preprocessed away, at least I swear I changed and tested that. My thinking being it was a smaller diff delta.
Good point. Is there some magic parameter to pass to gcc to strip @.
Lets just go with /* */ comments, everyone understands that.
This allows us to generate DCD table data appropriate for MX6Q, MX6DL, or MX6Solo simply by defining CONFIG_MX6Q, CONFIG_MX6DL, or CONFIG_MX6S
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 156 ++++++++++++++++ board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 245 +++++++++++++------------- 2 files changed, 280 insertions(+), 121 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h
diff --git a/arch/arm/include/asm/arch-mx6/imx-mkimage.h b/arch/arm/include/asm/arch-mx6/imx-mkimage.h new file mode 100644 index 0000000..4abd3f1 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/imx-mkimage.h @@ -0,0 +1,156 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. + * + * Licensed under the GPL-2 or later. + */ +#ifndef __ASM_ARCH_IMX_MKIMAGE_H__ +#define __ASM_ARCH_IMX_MKIMAGE_H__ + +#define IOMUXC_GPR4 0x020e0010 +#define IOMUXC_GPR6 0x020e0018 +#define IOMUXC_GPR7 0x020e001c + +/* mx6 duallite and solo have same offsets */ + +#define IOM_DRAM_DQM0 MA(0x020e05ac, 0x020e0470, 0x0) +#define IOM_DRAM_DQM1 MA(0x020e05b4, 0x020e0474, 0x0) +#define IOM_DRAM_DQM2 MA(0x020e0528, 0x020e0478, 0x0) +#define IOM_DRAM_DQM3 MA(0x020e0520, 0x020e047c, 0x0) +#define IOM_DRAM_DQM4 MA(0x020e0514, 0x020e0480, 0x0) +#define IOM_DRAM_DQM5 MA(0x020e0510, 0x020e0484, 0x0) +#define IOM_DRAM_DQM6 MA(0x020e05bc, 0x020e0488, 0x0) +#define IOM_DRAM_DQM7 MA(0x020e05c4, 0x020e048c, 0x0) + +#define IOM_DRAM_CAS MA(0x020e056c, 0x020e0464, 0x0) +#define IOM_DRAM_RAS MA(0x020e0578, 0x020e0490, 0x0) +#define IOM_DRAM_RESET MA(0x020e057c, 0x020e0494, 0x0) +#define IOM_DRAM_SDCLK_0 MA(0x020e0588, 0x020e04ac, 0x0) +#define IOM_DRAM_SDCLK_1 MA(0x020e0594, 0x020e04b0, 0x0) +#define IOM_DRAM_SDBA2 MA(0x020e058c, 0x020e04a0, 0x0) +#define IOM_DRAM_SDCKE0 MA(0x020e0590, 0x020e04a4, 0x0) +#define IOM_DRAM_SDCKE1 MA(0x020e0598, 0x020e04a8, 0x0) +#define IOM_DRAM_SDODT0 MA(0x020e059c, 0x020e04b4, 0x0) +#define IOM_DRAM_SDODT1 MA(0x020e05a0, 0x020e04b8, 0x0) + +#define IOM_DRAM_SDQS0 MA(0x020e05a8, 0x020e04bc, 0x0) +#define IOM_DRAM_SDQS1 MA(0x020e05b0, 0x020e04c0, 0x0) +#define IOM_DRAM_SDQS2 MA(0x020e0524, 0x020e04c4, 0x0) +#define IOM_DRAM_SDQS3 MA(0x020e051c, 0x020e04c8, 0x0) +#define IOM_DRAM_SDQS4 MA(0x020e0518, 0x020e04cc, 0x0) +#define IOM_DRAM_SDQS5 MA(0x020e050c, 0x020e04d0, 0x0) +#define IOM_DRAM_SDQS6 MA(0x020e05b8, 0x020e04d4, 0x0) +#define IOM_DRAM_SDQS7 MA(0x020e05c0, 0x020e04d8, 0x0) + +#define IOM_GRP_B0DS MA(0x020e0784, 0x020e0764, 0x0) +#define IOM_GRP_B1DS MA(0x020e0788, 0x020e0770, 0x0) +#define IOM_GRP_B2DS MA(0x020e0794, 0x020e0778, 0x0) +#define IOM_GRP_B3DS MA(0x020e079c, 0x020e077c, 0x0) +#define IOM_GRP_B4DS MA(0x020e07a0, 0x020e0780, 0x0) +#define IOM_GRP_B5DS MA(0x020e07a4, 0x020e0784, 0x0) +#define IOM_GRP_B6DS MA(0x020e07a8, 0x020e078c, 0x0) +#define IOM_GRP_B7DS MA(0x020e0748, 0x020e0748, 0x0) +#define IOM_GRP_ADDDS MA(0x020e074c, 0x020e074c, 0x0) +#define IOM_DDRMODE_CTL MA(0x020e0750, 0x020e0750, 0x0) +#define IOM_GRP_DDRPKE MA(0x020e0758, 0x020e0754, 0x0) +#define IOM_GRP_DDRMODE MA(0x020e0774, 0x020e0760, 0x0) +#define IOM_GRP_CTLDS MA(0x020e078c, 0x020e076c, 0x0) +#define IOM_GRP_DDR_TYPE MA(0x020e0798, 0x020e0774, 0x0) + +#define IRAM_FREE_START 0x00907000 + +#define MMDC_P0_MDCTL 0x021b0000 +#define MMDC_P0_MDPDC 0x021b0004 +#define MMDC_P0_MDOTC 0x021b0008 +#define MMDC_P0_MDCFG0 0x021b000c +#define MMDC_P0_MDCFG1 0x021b0010 +#define MMDC_P0_MDCFG2 0x021b0014 +#define MMDC_P0_MDMISC 0x021b0018 +#define MMDC_P0_MDSCR 0x021b001c +#define MMDC_P0_MDREF 0x021b0020 +#define MMDC_P0_MDRWD 0x021b002c +#define MMDC_P0_MDOR 0x021b0030 +#define MMDC_P0_MDASP 0x021b0040 +#define MMDC_P0_MAPSR 0x021b0404 +#define MMDC_P0_MPZQHWCTRL 0x021b0800 +#define MMDC_P0_MPWLDECTRL0 0x021b080c +#define MMDC_P0_MPWLDECTRL1 0x021b0810 +#define MMDC_P0_MPODTCTRL 0x021b0818 +#define MMDC_P0_MPRDDQBY0DL 0x021b081c +#define MMDC_P0_MPRDDQBY1DL 0x021b0820 +#define MMDC_P0_MPRDDQBY2DL 0x021b0824 +#define MMDC_P0_MPRDDQBY3DL 0x021b0828 +#define MMDC_P0_MPDGCTRL0 0x021b083c +#define MMDC_P0_MPDGCTRL1 0x021b0840 +#define MMDC_P0_MPRDDLCTL 0x021b0848 +#define MMDC_P0_MPWRDLCTL 0x021b0850 +#define MMDC_P0_MPMUR0 0x021b08b8 + +#define MMDC_P1_MDCTL 0x021b4000 +#define MMDC_P1_MDPDC 0x021b4004 +#define MMDC_P1_MDOTC 0x021b4008 +#define MMDC_P1_MDCFG0 0x021b400c +#define MMDC_P1_MDCFG1 0x021b4010 +#define MMDC_P1_MDCFG2 0x021b4014 +#define MMDC_P1_MDMISC 0x021b4018 +#define MMDC_P1_MDSCR 0x021b401c +#define MMDC_P1_MDREF 0x021b4020 +#define MMDC_P1_MDRWD 0x021b402c +#define MMDC_P1_MDOR 0x021b4030 +#define MMDC_P1_MDASP 0x021b4040 +#define MMDC_P1_MAPSR 0x021b4404 +#define MMDC_P1_MPZQHWCTRL 0x021b4800 +#define MMDC_P1_MPWLDECTRL0 0x021b480c +#define MMDC_P1_MPWLDECTRL1 0x021b4810 +#define MMDC_P1_MPODTCTRL 0x021b4818 +#define MMDC_P1_MPRDDQBY0DL 0x021b481c +#define MMDC_P1_MPRDDQBY1DL 0x021b4820 +#define MMDC_P1_MPRDDQBY2DL 0x021b4824 +#define MMDC_P1_MPRDDQBY3DL 0x021b4828 +#define MMDC_P1_MPDGCTRL0 0x021b483c +#define MMDC_P1_MPDGCTRL1 0x021b4840 +#define MMDC_P1_MPRDDLCTL 0x021b4848 +#define MMDC_P1_MPWRDLCTL 0x021b4850 +#define MMDC_P1_MPMUR0 0x021b48b8 + +#define CCM_CCGR0 0x020C4068 +#define CCM_CCGR1 0x020C406c +#define CCM_CCGR2 0x020C4070 +#define CCM_CCGR3 0x020C4074 +#define CCM_CCGR4 0x020C4078 +#define CCM_CCGR5 0x020C407c +#define CCM_CCGR6 0x020C4080 + + +#define WRITE_ENTRY1(addr, q) DATA 4, addr, q +#ifdef CONFIG_MX6Q +#define MA(mx6q, mx6dl_solo, mx6sololite) mx6q +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, q) +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, q) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, q) +#else + +#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, dl) +#ifdef CONFIG_MX6DL +#define MA(mx6q, mx6dl_solo, mx6sololite) mx6dl_solo +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, dl) +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, dl) +#else + +#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, solo) +#ifdef CONFIG_MX6S +#define MA(mx6q, mx6dl_solo, mx6sololite) mx6dl_solo +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, solo) +#else + +#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, sl) +#ifdef CONFIG_MX6SL +#define MA(mx6q, mx6dl_solo, mx6sololite) mx6sololite +#else + +#error "Please select cpu" +#endif /* CONFIG_MX6SL */ +#endif /* CONFIG_MX6S */ +#endif /* CONFIG_MX6DL */ +#endif /* CONFIG_MX6Q */ + +#endif /*__ASM_ARCH_IMX_MKIMAGE_H__ */ diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index c86cd40..84823f8 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -25,6 +25,9 @@ * * The syntax is taken as close as possible with the kwbimage */ +#define __ASSEMBLY__ +#include <config.h> +#include <asm/arch/imx-mkimage.h>
/* image version */ IMAGE_VERSION 2 @@ -46,129 +49,129 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ -DATA 4 0x020e05a8 0x00000030 -DATA 4 0x020e05b0 0x00000030 -DATA 4 0x020e0524 0x00000030 -DATA 4 0x020e051c 0x00000030 - -DATA 4 0x020e0518 0x00000030 -DATA 4 0x020e050c 0x00000030 -DATA 4 0x020e05b8 0x00000030 -DATA 4 0x020e05c0 0x00000030 - -DATA 4 0x020e05ac 0x00020030 -DATA 4 0x020e05b4 0x00020030 -DATA 4 0x020e0528 0x00020030 -DATA 4 0x020e0520 0x00020030 - -DATA 4 0x020e0514 0x00020030 -DATA 4 0x020e0510 0x00020030 -DATA 4 0x020e05bc 0x00020030 -DATA 4 0x020e05c4 0x00020030 - -DATA 4 0x020e056c 0x00020030 -DATA 4 0x020e0578 0x00020030 -DATA 4 0x020e0588 0x00020030 -DATA 4 0x020e0594 0x00020030 - -DATA 4 0x020e057c 0x00020030 -DATA 4 0x020e0590 0x00003000 -DATA 4 0x020e0598 0x00003000 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 -DATA 4 0x020e0784 0x00000030 -DATA 4 0x020e0788 0x00000030 - -DATA 4 0x020e0794 0x00000030 -DATA 4 0x020e079c 0x00000030 -DATA 4 0x020e07a0 0x00000030 -DATA 4 0x020e07a4 0x00000030 - -DATA 4 0x020e07a8 0x00000030 -DATA 4 0x020e0748 0x00000030 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - -DATA 4 0x021b081c 0x33333333 -DATA 4 0x021b0820 0x33333333 -DATA 4 0x021b0824 0x33333333 -DATA 4 0x021b0828 0x33333333 - -DATA 4 0x021b481c 0x33333333 -DATA 4 0x021b4820 0x33333333 -DATA 4 0x021b4824 0x33333333 -DATA 4 0x021b4828 0x33333333 - -DATA 4 0x021b0018 0x00081740 - -DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x555A7975 -DATA 4 0x021b0010 0xFF538E64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x005B0E21 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00025576 -DATA 4 0x021b0040 0x00000027 -DATA 4 0x021b0000 0x831A0000 - -DATA 4 0x021b001c 0x04088032 -DATA 4 0x021b001c 0x0408803A -DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x0000803B -DATA 4 0x021b001c 0x00428031 -DATA 4 0x021b001c 0x00428039 -DATA 4 0x021b001c 0x09408030 -DATA 4 0x021b001c 0x09408038 - -DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b001c 0x04008048 -DATA 4 0x021b0800 0xA1380003 -DATA 4 0x021b4800 0xA1380003 -DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00022227 -DATA 4 0x021b4818 0x00022227 - -DATA 4 0x021b083c 0x434B0350 -DATA 4 0x021b0840 0x034C0359 -DATA 4 0x021b483c 0x434B0350 -DATA 4 0x021b4840 0x03650348 -DATA 4 0x021b0848 0x4436383B -DATA 4 0x021b4848 0x39393341 -DATA 4 0x021b0850 0x35373933 -DATA 4 0x021b4850 0x48254A36 - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x00440044 -DATA 4 0x021b4810 0x00440044 - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b001c 0x00000000 -DATA 4 0x021b0404 0x00011006 +WRITE_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS3, 0x00000030) + +WRITE_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) +WRITE_ENTRY1(IOM_DRAM_SDQS7, 0x00000030) + +WRITE_ENTRY1(IOM_DRAM_DQM0, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM1, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM2, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM3, 0x00020030) + +WRITE_ENTRY1(IOM_DRAM_DQM4, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM5, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM6, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_DQM7, 0x00020030) + +WRITE_ENTRY1(IOM_DRAM_CAS, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_RAS, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030) + +WRITE_ENTRY1(IOM_DRAM_RESET, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) +WRITE_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) +WRITE_ENTRY1(IOM_DRAM_SDBA2, 0x00000000) + +WRITE_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) +WRITE_ENTRY1(IOM_DRAM_SDODT1, 0x00003030) +WRITE_ENTRY1(IOM_GRP_B0DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_B1DS, 0x00000030) + +WRITE_ENTRY1(IOM_GRP_B2DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_B3DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_B4DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_B5DS, 0x00000030) + +WRITE_ENTRY1(IOM_GRP_B6DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_B7DS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +WRITE_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) + +WRITE_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +WRITE_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) +WRITE_ENTRY1(IOM_GRP_CTLDS, 0x00000030) +WRITE_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000) + +WRITE_ENTRY1(MMDC_P0_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P1_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1_MPRDDQBY3DL, 0x33333333) + +WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740) + +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000) +WRITE_ENTRY1(MMDC_P0_MDCFG0, 0x555A7975) +WRITE_ENTRY1(MMDC_P0_MDCFG1, 0xFF538E64) +WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) +WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2) + +WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21) +WRITE_ENTRY1(MMDC_P0_MDOTC, 0x09444040) +WRITE_ENTRY1(MMDC_P0_MDPDC, 0x00025576) +WRITE_ENTRY1(MMDC_P0_MDASP, 0x00000027) +WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000) + +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0408803A) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0000803B) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428039) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408038) + +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008048) +WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P0_MDREF, 0x00005800) +WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) +WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227) + +WRITE_ENTRY1(MMDC_P0_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P0_MPDGCTRL1, 0x034C0359) +WRITE_ENTRY1(MMDC_P1_MPDGCTRL0, 0x434B0350) +WRITE_ENTRY1(MMDC_P1_MPDGCTRL1, 0x03650348) +WRITE_ENTRY1(MMDC_P0_MPRDDLCTL, 0x4436383B) +WRITE_ENTRY1(MMDC_P1_MPRDDLCTL, 0x39393341) +WRITE_ENTRY1(MMDC_P0_MPWRDLCTL, 0x35373933) +WRITE_ENTRY1(MMDC_P1_MPWRDLCTL, 0x48254A36) + +WRITE_ENTRY1(MMDC_P0_MPWLDECTRL0, 0x001F001F) +WRITE_ENTRY1(MMDC_P0_MPWLDECTRL1, 0x001F001F) + +WRITE_ENTRY1(MMDC_P1_MPWLDECTRL0, 0x00440044) +WRITE_ENTRY1(MMDC_P1_MPWLDECTRL1, 0x00440044) + +WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800) +WRITE_ENTRY1(MMDC_P1_MPMUR0, 0x00000800) + +WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00000000) +WRITE_ENTRY1(MMDC_P0_MAPSR, 0x00011006)
/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF +WRITE_ENTRY1(CCM_CCGR0, 0x00C03F3F) +WRITE_ENTRY1(CCM_CCGR1, 0x0030FC03) +WRITE_ENTRY1(CCM_CCGR2, 0x0FFFC000) +WRITE_ENTRY1(CCM_CCGR3, 0x3FF00000) +WRITE_ENTRY1(CCM_CCGR4, 0x00FFF300) +WRITE_ENTRY1(CCM_CCGR5, 0x0F0000C3) +WRITE_ENTRY1(CCM_CCGR6, 0x000003FF)
/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF +WRITE_ENTRY1(IOMUXC_GPR4, 0xF00000CF) /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F +WRITE_ENTRY1(IOMUXC_GPR6, 0x007F007F) +WRITE_ENTRY1(IOMUXC_GPR7, 0x007F007F)
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 55 ++++++++++++++++++++++---- 1 file changed, 47 insertions(+), 8 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 84823f8..b859e2f 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -53,7 +53,6 @@ WRITE_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS3, 0x00000030) - WRITE_ENTRY1(IOM_DRAM_SDQS4, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS5, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS6, 0x00000030) @@ -63,7 +62,6 @@ WRITE_ENTRY1(IOM_DRAM_DQM0, 0x00020030) WRITE_ENTRY1(IOM_DRAM_DQM1, 0x00020030) WRITE_ENTRY1(IOM_DRAM_DQM2, 0x00020030) WRITE_ENTRY1(IOM_DRAM_DQM3, 0x00020030) - WRITE_ENTRY1(IOM_DRAM_DQM4, 0x00020030) WRITE_ENTRY1(IOM_DRAM_DQM5, 0x00020030) WRITE_ENTRY1(IOM_DRAM_DQM6, 0x00020030) @@ -81,65 +79,105 @@ WRITE_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
WRITE_ENTRY1(IOM_DRAM_SDODT0, 0x00003030) WRITE_ENTRY1(IOM_DRAM_SDODT1, 0x00003030) + WRITE_ENTRY1(IOM_GRP_B0DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B1DS, 0x00000030) - WRITE_ENTRY1(IOM_GRP_B2DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B3DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B4DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B5DS, 0x00000030) - WRITE_ENTRY1(IOM_GRP_B6DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B7DS, 0x00000030) + WRITE_ENTRY1(IOM_GRP_ADDDS, 0x00000030) +/* (differential input) */ WRITE_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) - +/* disable ddr pullups */ WRITE_ENTRY1(IOM_GRP_DDRPKE, 0x00000000) +/* (differential input) */ WRITE_ENTRY1(IOM_GRP_DDRMODE, 0x00020000) +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ WRITE_ENTRY1(IOM_GRP_CTLDS, 0x00000030) WRITE_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000)
+/* Read data DQ Byte0-3 delay */ WRITE_ENTRY1(MMDC_P0_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P0_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P0_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P0_MPRDDQBY3DL, 0x33333333) - WRITE_ENTRY1(MMDC_P1_MPRDDQBY0DL, 0x33333333) WRITE_ENTRY1(MMDC_P1_MPRDDQBY1DL, 0x33333333) WRITE_ENTRY1(MMDC_P1_MPRDDQBY2DL, 0x33333333) WRITE_ENTRY1(MMDC_P1_MPRDDQBY3DL, 0x33333333)
+/* + * MDMISC, mirroring, interleaved (row/bank/col) + */ WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740)
+/* + * MDSCR, con_req + */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000) +/* + * MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks + * tXP=4 clocks, tXPDLL=13 clocks + * tFAW=24 clocks, cas=8 cycles + */ WRITE_ENTRY1(MMDC_P0_MDCFG0, 0x555A7975) +/* + * MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8 + * tMRD=4, tCWL=6 + */ WRITE_ENTRY1(MMDC_P0_MDCFG1, 0xFF538E64) +/* + * MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4 + */ WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2)
WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21) WRITE_ENTRY1(MMDC_P0_MDOTC, 0x09444040) WRITE_ENTRY1(MMDC_P0_MDPDC, 0x00025576) + +/* + * Mx6Q - 64 bit wide ddr + * last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) = + * 1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27 + */ +/* MDASP, CS0_END */ WRITE_ENTRY1(MMDC_P0_MDASP, 0x00000027) +/* + * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8, width=64/32bit + * mx6q : row+col+bank+width=14+10+3+3=30 = 1G + */ WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000)
+/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0408803A) +/* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0000803B) +/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428039) +/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030) WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408038)
+/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008048) WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003) WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003) + +/* MDREF, 32KHz refresh, 4 refeshes each */ WRITE_ENTRY1(MMDC_P0_MDREF, 0x00005800) WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227)
+/* MPDGCTRL0/1 DQS GATE*/ WRITE_ENTRY1(MMDC_P0_MPDGCTRL0, 0x434B0350) WRITE_ENTRY1(MMDC_P0_MPDGCTRL1, 0x034C0359) WRITE_ENTRY1(MMDC_P1_MPDGCTRL0, 0x434B0350) @@ -148,17 +186,18 @@ WRITE_ENTRY1(MMDC_P0_MPRDDLCTL, 0x4436383B) WRITE_ENTRY1(MMDC_P1_MPRDDLCTL, 0x39393341) WRITE_ENTRY1(MMDC_P0_MPWRDLCTL, 0x35373933) WRITE_ENTRY1(MMDC_P1_MPWRDLCTL, 0x48254A36) - WRITE_ENTRY1(MMDC_P0_MPWLDECTRL0, 0x001F001F) WRITE_ENTRY1(MMDC_P0_MPWLDECTRL1, 0x001F001F) - WRITE_ENTRY1(MMDC_P1_MPWLDECTRL0, 0x00440044) WRITE_ENTRY1(MMDC_P1_MPWLDECTRL1, 0x00440044)
+/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800) WRITE_ENTRY1(MMDC_P1_MPMUR0, 0x00000800)
+/* MDSCR, enable ddr */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00000000) +/* MAPSR, 1024 cycles idle before self-refresh */ WRITE_ENTRY1(MMDC_P0_MAPSR, 0x00011006)
/* set the default clock gate to save power */
Bits 19-18 of IOMUXC_IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET should be 3 for DDR3 mode. The current value of 0 is reserved in TRM.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index b859e2f..9c622c8 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -72,7 +72,7 @@ WRITE_ENTRY1(IOM_DRAM_RAS, 0x00020030) WRITE_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) WRITE_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030)
-WRITE_ENTRY1(IOM_DRAM_RESET, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_RESET, 0x000e0030) WRITE_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) WRITE_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) WRITE_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
Sabrelite does not have memory associated with CS1
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 9c622c8..2d03ff7 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -155,20 +155,15 @@ WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000)
/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0408803A) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0000803B) /* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428039) /* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408038)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008048) WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003) WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003)
Hi Troy,
On 10/03/2012 06:47 PM, Troy Kisky wrote:
Sabrelite does not have memory associated with CS1
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 9c622c8..2d03ff7 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -155,20 +155,15 @@ WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000)
/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0408803A) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x0000803B) /* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428039) /* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408038)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008048) WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003) WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003)
Note that mx6qsabreauto and mx6qsabresd also use this config file. That said, none of these boards have pad DRAM_CS1 connected.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 2d03ff7..9e20db0 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -164,8 +164,8 @@ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1380003) -WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1380003) +WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1390003) +WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1390003)
/* MDREF, 32KHz refresh, 4 refeshes each */ WRITE_ENTRY1(MMDC_P0_MDREF, 0x00005800)
Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
---
Changed in V3. V2 had created in new function get_cpu_type instead. --- arch/arm/cpu/armv7/mx6/soc.c | 32 +++++++++++++++++++++-------- arch/arm/imx-common/cpu.c | 16 ++++++++------- arch/arm/include/asm/arch-mx5/sys_proto.h | 9 +++++++- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ arch/arm/include/asm/arch-mx6/sys_proto.h | 9 +++++++- 5 files changed, 51 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index bc65767..a8aad5d 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -31,17 +31,33 @@ #include <asm/arch/sys_proto.h> #include <asm/imx-common/boot_mode.h>
+struct scu_regs { + u32 ctrl; + u32 config; + u32 status; + u32 invalidate; + u32 fpga_rev; +}; + u32 get_cpu_rev(void) { struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; - int reg = readl(&anatop->digprog); - - /* Read mx6 variant: quad, dual or solo */ - int system_rev = (reg >> 4) & 0xFF000; - /* Read mx6 silicon revision */ - system_rev |= (reg & 0xFF) + 0x10; - - return system_rev; + u32 reg = readl(&anatop->digprog_sololite); + u32 type = ((reg >> 16) & 0xff); + + if (type != MXC_CPU_MX6SL) { + reg = readl(&anatop->digprog); + type = ((reg >> 16) & 0xff); + if (type == MXC_CPU_MX6DL) { + struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR; + u32 cfg = readl(&scu->config) & 3; + + if (!cfg) + type = MXC_CPU_MX6SOLO; + } + } + reg &= 0xff; /* mx6 silicon revision */ + return (type << 12) | (reg + 0x10); }
void init_aips(void) diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index a10d12d..102c254 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -67,18 +67,20 @@ char *get_reset_cause(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
-static const char *get_imx_type(u32 imxtype) +const char *get_imx_type(u32 imxtype) { switch (imxtype) { - case 0x63: + case MXC_CPU_MX6Q: return "6Q"; /* Quad-core version of the mx6 */ - case 0x61: - return "6DS"; /* Dual/Solo version of the mx6 */ - case 0x60: + case MXC_CPU_MX6DL: + return "6DL"; /* Dual Lite version of the mx6 */ + case MXC_CPU_MX6SOLO: + return "6SOLO"; /* Solo version of the mx6 */ + case MXC_CPU_MX6SL: return "6SL"; /* Solo-Lite version of the mx6 */ - case 0x51: + case MXC_CPU_MX51: return "51"; - case 0x53: + case MXC_CPU_MX53: return "53"; default: return "??"; diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 7b5246e..4435be1 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -24,8 +24,15 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_
-u32 get_cpu_rev(void); +#define MXC_CPU_MX51 0x51 +#define MXC_CPU_MX53 0x53 +#define MXC_CPU_MX6SL 0x60 +#define MXC_CPU_MX6DL 0x61 +#define MXC_CPU_MX6SOLO 0x62 +#define MXC_CPU_MX6Q 0x63 + #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) +u32 get_cpu_rev(void); void sdelay(unsigned long); void set_chipselect_size(int const);
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index dc737ba..b3a0d90 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -558,6 +558,8 @@ struct anatop_regs { u32 usb2_misc_clr; /* 0x258 */ u32 usb2_misc_tog; /* 0x25c */ u32 digprog; /* 0x260 */ + u32 reserved1[7]; + u32 digprog_sololite; /* 0x280 */ };
#define ANATOP_PFD_480_PFD0_FRAC_SHIFT 0 diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 711b30d..6627bbc 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -24,9 +24,16 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_
-#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) +#define MXC_CPU_MX51 0x51 +#define MXC_CPU_MX53 0x53 +#define MXC_CPU_MX6SL 0x60 +#define MXC_CPU_MX6DL 0x61 +#define MXC_CPU_MX6SOLO 0x62 +#define MXC_CPU_MX6Q 0x63
+#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void); +const char *get_imx_type(u32 imxtype);
void set_vddsoc(u32 mv);
Use CONFIG_MX6 when the particular processor variant isn't important.
Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- drivers/gpio/mxc_gpio.c | 6 +++--- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 1 + 5 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 2c79bff..a388064 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -42,14 +42,14 @@ static unsigned long gpio_ports[] = { [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ - defined(CONFIG_MX53) || defined(CONFIG_MX6Q) + defined(CONFIG_MX53) || defined(CONFIG_MX6) [3] = GPIO4_BASE_ADDR, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) [4] = GPIO5_BASE_ADDR, [5] = GPIO6_BASE_ADDR, #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) [6] = GPIO7_BASE_ADDR, #endif }; diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index a43aa03..982e252 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -55,7 +55,7 @@ #define IPU_TPM_REG_BASE 0x01060000 #define IPU_DC_TMPL_REG_BASE 0x01080000 #define IPU_ISP_TBPR_REG_BASE 0x010C0000 -#elif defined(CONFIG_MX6Q) +#elif defined(CONFIG_MX6) #define IPU_CPMEM_REG_BASE 0x00100000 #define IPU_LUT_REG_BASE 0x00120000 #define IPU_SRM_REG_BASE 0x00140000 diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea3..8e5b81e 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 247e8d6..5a940da 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -17,6 +17,7 @@ #ifndef __MX6QSABRE_COMMON_CONFIG_H #define __MX6QSABRE_COMMON_CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf658..6a10232 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
On 04/10/2012 03:47, Troy Kisky wrote:
Use CONFIG_MX6 when the particular processor variant isn't important.
Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
drivers/gpio/mxc_gpio.c | 6 +++--- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 1 + 5 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 2c79bff..a388064 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -42,14 +42,14 @@ static unsigned long gpio_ports[] = { [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
defined(CONFIG_MX53) || defined(CONFIG_MX6)#endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) [4] = GPIO5_BASE_ADDR, [5] = GPIO6_BASE_ADDR, #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) [6] = GPIO7_BASE_ADDR, #endif }; diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index a43aa03..982e252 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -55,7 +55,7 @@ #define IPU_TPM_REG_BASE 0x01060000 #define IPU_DC_TMPL_REG_BASE 0x01080000 #define IPU_ISP_TBPR_REG_BASE 0x010C0000 -#elif defined(CONFIG_MX6Q) +#elif defined(CONFIG_MX6) #define IPU_CPMEM_REG_BASE 0x00100000 #define IPU_LUT_REG_BASE 0x00120000 #define IPU_SRM_REG_BASE 0x00140000 diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea3..8e5b81e 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 247e8d6..5a940da 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -17,6 +17,7 @@ #ifndef __MX6QSABRE_COMMON_CONFIG_H #define __MX6QSABRE_COMMON_CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf658..6a10232 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
This changes affects also mx6qsabreauto and mx6qsabresd, that I have already merged.
Best regards, Stefano Babic
On 10/8/2012 6:41 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
Use CONFIG_MX6 when the particular processor variant isn't important.
Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
drivers/gpio/mxc_gpio.c | 6 +++--- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 1 + 5 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 2c79bff..a388064 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -42,14 +42,14 @@ static unsigned long gpio_ports[] = { [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
defined(CONFIG_MX53) || defined(CONFIG_MX6)-#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) [4] = GPIO5_BASE_ADDR, [5] = GPIO6_BASE_ADDR, #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) [6] = GPIO7_BASE_ADDR, #endif }; diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index a43aa03..982e252 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -55,7 +55,7 @@ #define IPU_TPM_REG_BASE 0x01060000 #define IPU_DC_TMPL_REG_BASE 0x01080000 #define IPU_ISP_TBPR_REG_BASE 0x010C0000 -#elif defined(CONFIG_MX6Q) +#elif defined(CONFIG_MX6) #define IPU_CPMEM_REG_BASE 0x00100000 #define IPU_LUT_REG_BASE 0x00120000 #define IPU_SRM_REG_BASE 0x00140000 diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea3..8e5b81e 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 247e8d6..5a940da 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -17,6 +17,7 @@ #ifndef __MX6QSABRE_COMMON_CONFIG_H #define __MX6QSABRE_COMMON_CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index e7bf658..6a10232 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -22,6 +22,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_MX6 #define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
This changes affects also mx6qsabreauto and mx6qsabresd, that I have already merged.
Best regards, Stefano Babic
They should be covered by #include "mx6qsabre_common.h"
Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
--- New patch with V3. V2 had code in mx6qsabrelite.c --- arch/arm/imx-common/cpu.c | 50 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx5/sys_proto.h | 1 + arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + 3 files changed, 52 insertions(+)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 102c254..5081908 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -65,6 +65,56 @@ char *get_reset_cause(void) } }
+#if defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX53) +#define MEMCTL_BASE ESDCTL_BASE_ADDR; +#else +#define MEMCTL_BASE MMDC_P0_BASE_ADDR; +#endif +static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2}; + +struct esd_mmdc_regs { + uint32_t ctl; + uint32_t pdc; + uint32_t otc; + uint32_t cfg0; + uint32_t cfg1; + uint32_t cfg2; + uint32_t misc; + uint32_t scr; + uint32_t ref; + uint32_t rsvd1; + uint32_t rsvd2; + uint32_t rwd; + uint32_t or; + uint32_t mrr; + uint32_t cfg3lp; + uint32_t mr4; +}; + +#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) +#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) +#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) +#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) +#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc >> 5) & 1) + +unsigned imx_ddr_size(void) +{ + struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE; + unsigned ctl = readl(&mem->ctl); + unsigned misc = readl(&mem->misc); + int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ + + bits += ESD_MMDC_CTL_GET_ROW(ctl); + bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)]; + bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)]; + bits += ESD_MMDC_CTL_GET_WIDTH(ctl); + bits += ESD_MMDC_CTL_GET_CS1(ctl); + return 1 << bits; +} +#endif + #if defined(CONFIG_DISPLAY_CPUINFO)
const char *get_imx_type(u32 imxtype) diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 4435be1..93ad1c6 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -33,6 +33,7 @@
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void); +unsigned imx_ddr_size(void); void sdelay(unsigned long); void set_chipselect_size(int const);
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 6627bbc..3193297 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -34,6 +34,7 @@ #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void); const char *get_imx_type(u32 imxtype); +unsigned imx_ddr_size(void);
void set_vddsoc(u32 mv);
On 04/10/2012 03:47, Troy Kisky wrote:
Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
I am interested to better understand why get_ram_size() does not work. It seems to me you discovered a bug in this function, and you circumvent it decoding the DRAM controller setup to get the RAM size.
Because the max size is added to the start address in get_ram_size(), I have the feeling that this overwlow the long value, and maybe can be fixed swithcing to a "long long". With which parameters to get_ram_size() does your board hang ?
New patch with V3. V2 had code in mx6qsabrelite.c
arch/arm/imx-common/cpu.c | 50 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx5/sys_proto.h | 1 + arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + 3 files changed, 52 insertions(+)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 102c254..5081908 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -65,6 +65,56 @@ char *get_reset_cause(void) } }
+#if defined(CONFIG_MX53) || defined(CONFIG_MX6) +#if defined(CONFIG_MX53) +#define MEMCTL_BASE ESDCTL_BASE_ADDR; +#else +#define MEMCTL_BASE MMDC_P0_BASE_ADDR; +#endif +static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2};
+struct esd_mmdc_regs {
- uint32_t ctl;
- uint32_t pdc;
- uint32_t otc;
- uint32_t cfg0;
- uint32_t cfg1;
- uint32_t cfg2;
- uint32_t misc;
- uint32_t scr;
- uint32_t ref;
- uint32_t rsvd1;
- uint32_t rsvd2;
- uint32_t rwd;
- uint32_t or;
- uint32_t mrr;
- uint32_t cfg3lp;
- uint32_t mr4;
+};
+#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) +#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) +#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) +#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) +#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc >> 5) & 1)
+unsigned imx_ddr_size(void) +{
- struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
- unsigned ctl = readl(&mem->ctl);
- unsigned misc = readl(&mem->misc);
- int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */
- bits += ESD_MMDC_CTL_GET_ROW(ctl);
- bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)];
- bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
- bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
- bits += ESD_MMDC_CTL_GET_CS1(ctl);
- return 1 << bits;
+} +#endif
#if defined(CONFIG_DISPLAY_CPUINFO)
const char *get_imx_type(u32 imxtype) diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 4435be1..93ad1c6 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -33,6 +33,7 @@
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void); +unsigned imx_ddr_size(void); void sdelay(unsigned long); void set_chipselect_size(int const);
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 6627bbc..3193297 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -34,6 +34,7 @@ #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void); const char *get_imx_type(u32 imxtype); +unsigned imx_ddr_size(void);
Best regards, Stefano Babic
On 10/8/2012 6:06 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Hi Troy,
I am interested to better understand why get_ram_size() does not work. It seems to me you discovered a bug in this function, and you circumvent it decoding the DRAM controller setup to get the RAM size.
Because the max size is added to the start address in get_ram_size(), I have the feeling that this overwlow the long value, and maybe can be fixed swithcing to a "long long". With which parameters to get_ram_size() does your board hang ?
#define MMDC0_ARB_BASE_ADDR 0x10000000 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
So, base + size = 0x50000000
Only the values used in the sabrelite board are added currently. Add more as other boards use them.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h new file mode 100644 index 0000000..5848013 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h @@ -0,0 +1,118 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * + */ + +#ifndef __ASM_ARCH_MX6_MX6DL_PINS_H__ +#define __ASM_ARCH_MX6_MX6DL_PINS_H__ + +#include <asm/imx-common/iomux-v3.h> + +/* Use to set PAD control */ +#define PAD_CTL_HYS (1 << 16) +#define PAD_CTL_PUS_100K_DOWN (0 << 14) +#define PAD_CTL_PUS_47K_UP (1 << 14) +#define PAD_CTL_PUS_100K_UP (2 << 14) +#define PAD_CTL_PUS_22K_UP (3 << 14) + +#define PAD_CTL_PUE (1 << 13) +#define PAD_CTL_PKE (1 << 12) +#define PAD_CTL_ODE (1 << 11) +#define PAD_CTL_SPEED_LOW (1 << 6) +#define PAD_CTL_SPEED_MED (2 << 6) +#define PAD_CTL_SPEED_HIGH (3 << 6) +#define PAD_CTL_DSE_DISABLE (0 << 3) +#define PAD_CTL_DSE_240ohm (1 << 3) +#define PAD_CTL_DSE_120ohm (2 << 3) +#define PAD_CTL_DSE_80ohm (3 << 3) +#define PAD_CTL_DSE_60ohm (4 << 3) +#define PAD_CTL_DSE_48ohm (5 << 3) +#define PAD_CTL_DSE_40ohm (6 << 3) +#define PAD_CTL_DSE_34ohm (7 << 3) +#define PAD_CTL_SRE_FAST (1 << 0) +#define PAD_CTL_SRE_SLOW (0 << 0) + +#define IOMUX_CONFIG_SION 0x10 +#define NO_MUX_I 0 +#define NO_PAD_I 0 +enum { + MX6DL_PAD_EIM_D16__ECSPI1_SCLK = IOMUX_PAD(0x0514, 0x0144, 1, 0x07D8, 2, 0), + MX6DL_PAD_EIM_D17__ECSPI1_MISO = IOMUX_PAD(0x0518, 0x0148, 1, 0x07DC, 2, 0), + MX6DL_PAD_EIM_D18__ECSPI1_MOSI = IOMUX_PAD(0x051C, 0x014C, 1, 0x07E0, 2, 0), + MX6DL_PAD_EIM_D19__GPIO_3_19 = IOMUX_PAD(0x0520, 0x0150, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D21__GPIO_3_21 = IOMUX_PAD(0x0528, 0x0158, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D21__I2C1_SCL = IOMUX_PAD(0x0528, 0x0158, 6 | IOMUX_CONFIG_SION, 0x0868, 1, 0), + MX6DL_PAD_EIM_D23__GPIO_3_23 = IOMUX_PAD(0x0530, 0x0160, 5, 0x0000, 0, 0), + MX6DL_PAD_EIM_D26__UART2_TXD = IOMUX_PAD(0x053C, 0x016C, 4, 0x0000, 0, 0), + MX6DL_PAD_EIM_D27__UART2_RXD = IOMUX_PAD(0x0540, 0x0170, 4, 0x0904, 1, 0), + MX6DL_PAD_EIM_D28__I2C1_SDA = IOMUX_PAD(0x0544, 0x0174, 1 | IOMUX_CONFIG_SION, 0x086C, 1, 0), + MX6DL_PAD_EIM_D28__GPIO_3_28 = IOMUX_PAD(0x0544, 0x0174, 5, 0x0000, 0, 0), + MX6DL_PAD_ENET_MDC__ENET_MDC = IOMUX_PAD(0x05B8, 0x01E8, 1, 0x0000, 0, 0), + MX6DL_PAD_ENET_MDIO__ENET_MDIO = IOMUX_PAD(0x05BC, 0x01EC, 1, 0x0810, 0, 0), + MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK = IOMUX_PAD(0x05C0, 0x01F0, 1, 0x0000, 0, 0), + MX6DL_PAD_ENET_RXD0__GPIO_1_27 = IOMUX_PAD(0x05C8, 0x01F8, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_16__GPIO_7_11 = IOMUX_PAD(0x05E4, 0x0214, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_16__I2C3_SDA = IOMUX_PAD(0x05E4, 0x0214, 6 | IOMUX_CONFIG_SION, 0x087C, 1, 0), + MX6DL_PAD_GPIO_17__GPIO_7_12 = IOMUX_PAD(0x05E8, 0x0218, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_18__GPIO_7_13 = IOMUX_PAD(0x05EC, 0x021C, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_19__GPIO_4_5 = IOMUX_PAD(0x05F0, 0x0220, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_5__GPIO_1_5 = IOMUX_PAD(0x0600, 0x0230, 5, 0x0000, 0, 0), + MX6DL_PAD_GPIO_5__I2C3_SCL = IOMUX_PAD(0x0600, 0x0230, 6 | IOMUX_CONFIG_SION, 0x0878, 2, 0), + MX6DL_PAD_KEY_COL3__I2C2_SCL = IOMUX_PAD(0x0638, 0x0250, 4 | IOMUX_CONFIG_SION, 0x0870, 1, 0), + MX6DL_PAD_KEY_COL3__GPIO_4_12 = IOMUX_PAD(0x0638, 0x0250, 5, 0x0000, 0, 0), + MX6DL_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x064C, 0x0264, 4 | IOMUX_CONFIG_SION, 0x0874, 1, 0), + MX6DL_PAD_KEY_ROW3__GPIO_4_13 = IOMUX_PAD(0x064C, 0x0264, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D1__GPIO_2_1 = IOMUX_PAD(0x0670, 0x0288, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D2__GPIO_2_2 = IOMUX_PAD(0x0674, 0x028C, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D3__GPIO_2_3 = IOMUX_PAD(0x0678, 0x0290, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D4__GPIO_2_4 = IOMUX_PAD(0x067C, 0x0294, 5, 0x0000, 0, 0), + MX6DL_PAD_NANDF_D6__GPIO_2_6 = IOMUX_PAD(0x0684, 0x029C, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD0__ENET_RGMII_RD0 = IOMUX_PAD(0x0694, 0x02AC, 1, 0x0818, 1, 0), + MX6DL_PAD_RGMII_RD0__GPIO_6_25 = IOMUX_PAD(0x0694, 0x02AC, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD1__ENET_RGMII_RD1 = IOMUX_PAD(0x0698, 0x02B0, 1, 0x081C, 1, 0), + MX6DL_PAD_RGMII_RD1__GPIO_6_27 = IOMUX_PAD(0x0698, 0x02B0, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD2__ENET_RGMII_RD2 = IOMUX_PAD(0x069C, 0x02B4, 1, 0x0820, 1, 0), + MX6DL_PAD_RGMII_RD2__GPIO_6_28 = IOMUX_PAD(0x069C, 0x02B4, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RD3__ENET_RGMII_RD3 = IOMUX_PAD(0x06A0, 0x02B8, 1, 0x0824, 1, 0), + MX6DL_PAD_RGMII_RD3__GPIO_6_29 = IOMUX_PAD(0x06A0, 0x02B8, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL = IOMUX_PAD(0x06A4, 0x02BC, 1, 0x0828, 1, 0), + MX6DL_PAD_RGMII_RX_CTL__GPIO_6_24 = IOMUX_PAD(0x06A4, 0x02BC, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_RXC__ENET_RGMII_RXC = IOMUX_PAD(0x06A8, 0x02C0, 1, 0x0814, 1, 0), + MX6DL_PAD_RGMII_RXC__GPIO_6_30 = IOMUX_PAD(0x06A8, 0x02C0, 5, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD0__ENET_RGMII_TD0 = IOMUX_PAD(0x06AC, 0x02C4, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD1__ENET_RGMII_TD1 = IOMUX_PAD(0x06B0, 0x02C8, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD2__ENET_RGMII_TD2 = IOMUX_PAD(0x06B4, 0x02CC, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TD3__ENET_RGMII_TD3 = IOMUX_PAD(0x06B8, 0x02D0, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL = IOMUX_PAD(0x06BC, 0x02D4, 1, 0x0000, 0, 0), + MX6DL_PAD_RGMII_TXC__ENET_RGMII_TXC = IOMUX_PAD(0x06C0, 0x02D8, 1, 0x0000, 0, 0), + MX6DL_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x06F4, 0x030C, 0, 0x0934, 1, 0), + MX6DL_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x06F8, 0x0310, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x06FC, 0x0314, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 = IOMUX_PAD(0x0700, 0x0318, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 = IOMUX_PAD(0x0704, 0x031C, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 = IOMUX_PAD(0x0708, 0x0320, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT5__GPIO_7_0 = IOMUX_PAD(0x0710, 0x0328, 5, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT6__UART1_RXD = IOMUX_PAD(0x0714, 0x032C, 1, 0x08FC, 2, 0), + MX6DL_PAD_SD3_DAT7__UART1_TXD = IOMUX_PAD(0x0718, 0x0330, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_CLK__USDHC4_CLK = IOMUX_PAD(0x0720, 0x0338, 0, 0x0938, 1, 0), + MX6DL_PAD_SD4_CMD__USDHC4_CMD = IOMUX_PAD(0x0724, 0x033C, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 = IOMUX_PAD(0x0728, 0x0340, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 = IOMUX_PAD(0x072C, 0x0344, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 = IOMUX_PAD(0x0730, 0x0348, 1, 0x0000, 0, 0), + MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 = IOMUX_PAD(0x0734, 0x034C, 1, 0x0000, 0, 0), +}; +#endif /* __ASM_ARCH_MX6_MX6DL_PINS_H__ */
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++ 2 files changed, 229 insertions(+), 178 deletions(-) create mode 100644 board/freescale/mx6qsabrelite/pads.h
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 4b4e89b..454972c 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -26,6 +26,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> #include <asm/arch/mx6x_pins.h> +#include <asm/arch/mx6dl_pins.h> +#include <asm/arch/sys_proto.h> #include <asm/errno.h> #include <asm/gpio.h> #include <asm/imx-common/iomux-v3.h> @@ -38,162 +40,52 @@ #include <netdev.h> DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define SPI_PAD_CTRL (PAD_CTL_HYS | \ - PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) +#ifdef CONFIG_MX6Q +#include "pads.h" +#endif +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define FOR_DL_SOLO +#include "pads.h" +#endif
-int dram_init(void) +int cpu_is_mx6q(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); - - return 0; + return (get_cpu_rev() >> 12) == MXC_CPU_MX6Q; }
-iomux_v3_cfg_t uart1_pads[] = { - MX6Q_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6Q_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -iomux_v3_cfg_t uart2_pads[] = { - MX6Q_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) - -/* I2C1, SGTL5000 */ -struct i2c_pads_info i2c_pad_info0 = { - .scl = { - .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } -}; - -/* I2C2 Camera, MIPI */ -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } -}; - -/* I2C3, J15 - RGB connector */ -struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, - .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, - .gp = IMX_GPIO_NR(1, 5) - }, - .sda = { - .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, - .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, - .gp = IMX_GPIO_NR(7, 11) - } -}; +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#ifdef CONFIG_MX6Q +#define GET_MX6_REF(ref) (cpu_is_mx6q() ? mx6q_##ref : mx6dl_solo_##ref) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list))
-iomux_v3_cfg_t usdhc3_pads[] = { - MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD3_DAT5__GPIO_7_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = cpu_is_mx6q(); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt;
-iomux_v3_cfg_t usdhc4_pads[] = { - MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6Q_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; + return imx_iomux_v3_setup_multiple_pads(p, cnt); +}
-iomux_v3_cfg_t enet_pads1[] = { - MX6Q_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* pin 35 - 1 (PHY_AD2) on reset */ - MX6Q_PAD_RGMII_RXC__GPIO_6_30 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 32 - 1 - (MODE0) all */ - MX6Q_PAD_RGMII_RD0__GPIO_6_25 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 31 - 1 - (MODE1) all */ - MX6Q_PAD_RGMII_RD1__GPIO_6_27 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 28 - 1 - (MODE2) all */ - MX6Q_PAD_RGMII_RD2__GPIO_6_28 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 27 - 1 - (MODE3) all */ - MX6Q_PAD_RGMII_RD3__GPIO_6_29 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ - MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* pin 42 PHY nRST */ - MX6Q_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; +#else +#define GET_MX6_REF(ref) (mx6dl_solo_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) +#endif +#else
-iomux_v3_cfg_t enet_pads2[] = { - MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; +#define GET_MX6_REF(ref) (mx6q_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6q_##list, ARRAY_SIZE(mx6q_##list)) +#endif
-/* Button assignments for J14 */ -static iomux_v3_cfg_t button_pads[] = { - /* Menu */ - MX6Q_PAD_NANDF_D1__GPIO_2_1 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Back */ - MX6Q_PAD_NANDF_D2__GPIO_2_2 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Labelled Search (mapped to Power under Android) */ - MX6Q_PAD_NANDF_D3__GPIO_2_3 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Home */ - MX6Q_PAD_NANDF_D4__GPIO_2_4 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Volume Down */ - MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), - /* Volume Up */ - MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), -}; +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + return 0; +}
static void setup_iomux_enet(void) { @@ -203,30 +95,26 @@ static void setup_iomux_enet(void) gpio_direction_output(IMX_GPIO_NR(6, 27), 1); gpio_direction_output(IMX_GPIO_NR(6, 28), 1); gpio_direction_output(IMX_GPIO_NR(6, 29), 1); - imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + IOMUX_SETUP(enet_pads1); gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
/* Need delay 10ms according to KSZ9021 spec */ udelay(1000 * 10); gpio_set_value(IMX_GPIO_NR(3, 23), 1);
- imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + IOMUX_SETUP(enet_pads2); }
-iomux_v3_cfg_t usb_pads[] = { - MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static void setup_iomux_uart(void) { - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); + IOMUX_SETUP(uart1_pads); + IOMUX_SETUP(uart2_pads); }
#ifdef CONFIG_USB_EHCI_MX6 int board_ehci_hcd_init(int port) { - imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + IOMUX_SETUP(usb_pads);
/* Reset USB hub */ gpio_direction_output(IMX_GPIO_NR(7, 12), 0); @@ -267,12 +155,10 @@ int board_mmc_init(bd_t *bis) for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { switch (index) { case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + IOMUX_SETUP(usdhc3_pads); break; case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + IOMUX_SETUP(usdhc4_pads); break; default: printf("Warning: you configured more USDHC controllers" @@ -294,19 +180,10 @@ u32 get_board_rev(void) }
#ifdef CONFIG_MXC_SPI -iomux_v3_cfg_t ecspi1_pads[] = { - /* SS1 */ - MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), -}; - void setup_spi(void) { gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, - ARRAY_SIZE(ecspi1_pads)); + IOMUX_SETUP(ecspi1_pads); } #endif
@@ -342,8 +219,7 @@ int board_eth_init(bd_t *bis)
static void setup_buttons(void) { - imx_iomux_v3_setup_multiple_pads(button_pads, - ARRAY_SIZE(button_pads)); + IOMUX_SETUP(button_pads); }
#ifdef CONFIG_CMD_SATA @@ -382,15 +258,17 @@ int board_early_init_f(void)
int board_init(void) { + struct i2c_pads_info *p = GET_MX6_REF(i2c_pad_info); + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_MXC_SPI setup_spi(); #endif - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]);
#ifdef CONFIG_CMD_SATA setup_sata(); @@ -401,9 +279,10 @@ int board_init(void)
int checkboard(void) { - puts("Board: MX6Q-Sabre Lite\n"); - - return 0; + puts("Board: MX"); + puts(get_imx_type(get_cpu_rev() >> 12)); + puts("-Sabre Lite\n"); + return 0; }
struct button_key { diff --git a/board/freescale/mx6qsabrelite/pads.h b/board/freescale/mx6qsabrelite/pads.h new file mode 100644 index 0000000..e7ffe21 --- /dev/null +++ b/board/freescale/mx6qsabrelite/pads.h @@ -0,0 +1,172 @@ +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +iomux_v3_cfg_t MX6NAME(uart1_pads)[] = { + MX6PAD(SD3_DAT6__UART1_RXD) | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6PAD(SD3_DAT7__UART1_TXD) | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(uart2_pads)[] = { + MX6PAD(EIM_D26__UART2_TXD) | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6PAD(EIM_D27__UART2_RXD) | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { + { + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = MX6PAD(EIM_D21__I2C1_SCL) | PC, + .gpio_mode = MX6PAD(EIM_D21__GPIO_3_21) | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6PAD(EIM_D28__I2C1_SDA) | PC, + .gpio_mode = MX6PAD(EIM_D28__GPIO_3_28) | PC, + .gp = IMX_GPIO_NR(3, 28) + } + }, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6PAD(KEY_COL3__I2C2_SCL) | PC, + .gpio_mode = MX6PAD(KEY_COL3__GPIO_4_12) | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6PAD(KEY_ROW3__I2C2_SDA) | PC, + .gpio_mode = MX6PAD(KEY_ROW3__GPIO_4_13) | PC, + .gp = IMX_GPIO_NR(4, 13) + } + }, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6PAD(GPIO_5__I2C3_SCL) | PC, + .gpio_mode = MX6PAD(GPIO_5__GPIO_1_5) | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6PAD(GPIO_16__I2C3_SDA) | PC, + .gpio_mode = MX6PAD(GPIO_16__GPIO_7_11) | PC, + .gp = IMX_GPIO_NR(7, 11) + } + } +}; + +iomux_v3_cfg_t MX6NAME(usdhc3_pads)[] = { + MX6PAD(SD3_CLK__USDHC3_CLK) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_CMD__USDHC3_CMD) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT0__USDHC3_DAT0) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT1__USDHC3_DAT1) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT2__USDHC3_DAT2) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT3__USDHC3_DAT3) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD3_DAT5__GPIO_7_0) | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t MX6NAME(usdhc4_pads)[] = { + MX6PAD(SD4_CLK__USDHC4_CLK) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_CMD__USDHC4_CMD) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT0__USDHC4_DAT0) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT1__USDHC4_DAT1) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT2__USDHC4_DAT2) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(SD4_DAT3__USDHC4_DAT3) | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6PAD(NANDF_D6__GPIO_2_6) | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t MX6NAME(enet_pads1)[] = { + MX6PAD(ENET_MDIO__ENET_MDIO) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(ENET_MDC__ENET_MDC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TXC__ENET_RGMII_TXC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD0__ENET_RGMII_TD0) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD1__ENET_RGMII_TD1) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD2__ENET_RGMII_TD2) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TD3__ENET_RGMII_TD3) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_TX_CTL__RGMII_TX_CTL) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(ENET_REF_CLK__ENET_TX_CLK) | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6PAD(RGMII_RXC__GPIO_6_30) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6PAD(RGMII_RD0__GPIO_6_25) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6PAD(RGMII_RD1__GPIO_6_27) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6PAD(RGMII_RD2__GPIO_6_28) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6PAD(RGMII_RD3__GPIO_6_29) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6PAD(RGMII_RX_CTL__GPIO_6_24) | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6PAD(EIM_D23__GPIO_3_23) | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(enet_pads2)[] = { + MX6PAD(RGMII_RXC__ENET_RGMII_RXC) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD0__ENET_RGMII_RD0) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD1__ENET_RGMII_RD1) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD2__ENET_RGMII_RD2) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RD3__ENET_RGMII_RD3) | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6PAD(RGMII_RX_CTL__RGMII_RX_CTL) | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +/* Button assignments for J14 */ +static iomux_v3_cfg_t MX6NAME(button_pads)[] = { + /* Menu */ + MX6PAD(NANDF_D1__GPIO_2_1) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6PAD(NANDF_D2__GPIO_2_2) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6PAD(NANDF_D3__GPIO_2_3) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6PAD(NANDF_D4__GPIO_2_4) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6PAD(GPIO_19__GPIO_4_5) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6PAD(GPIO_18__GPIO_7_13) | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +iomux_v3_cfg_t MX6NAME(usb_pads)[] = { + MX6PAD(GPIO_17__GPIO_7_12) | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t MX6NAME(ecspi1_pads)[] = { + /* SS1 */ + MX6PAD(EIM_D19__GPIO_3_19) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D17__ECSPI1_MISO) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D18__ECSPI1_MOSI) | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6PAD(EIM_D16__ECSPI1_SCLK) | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; +#endif
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++
I'd say mx6qsabrelite could be renamed to mx6sabrelite so it is not confusing.
On 10/3/2012 8:23 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++
I'd say mx6qsabrelite could be renamed to mx6sabrelite so it is not confusing.
Both mx6qsabrelite.c and mx6qsabrelite.h should be renamed to drop the q. Also, the directory could be renamed ? I think a follow on patch later to reduced conflicts with others work would be appropriate.
Troy
On 05/10/2012 01:34, Troy Kisky wrote:
On 10/3/2012 8:23 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 ++++++------------------- board/freescale/mx6qsabrelite/pads.h | 172 ++++++++++++++++++
I'd say mx6qsabrelite could be renamed to mx6sabrelite so it is not confusing.
Both mx6qsabrelite.c and mx6qsabrelite.h should be renamed to drop the q. Also, the directory could be renamed ?
Yes, it can, but add board's maintainer (Fabio) to the discussion.
Regards, Stefano
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 120 +++++++++++++++++++------- 1 file changed, 87 insertions(+), 33 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 9e20db0..f45f93e 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -49,6 +49,15 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz, currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits, x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits, x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits, x16/x32 + */ WRITE_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) @@ -90,6 +99,7 @@ WRITE_ENTRY1(IOM_GRP_B6DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B7DS, 0x00000030)
WRITE_ENTRY1(IOM_GRP_ADDDS, 0x00000030) + /* (differential input) */ WRITE_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) /* disable ddr pullups */ @@ -119,48 +129,92 @@ WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740) * MDSCR, con_req */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000) + /* - * MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks - * tXP=4 clocks, tXPDLL=13 clocks - * tFAW=24 clocks, cas=8 cycles + * MDCFG0, + * MX6Q: + * tRFC=0x56 clocks, tXS=0x5b clocks, tXP=4 clocks, tXPDLL=13 clocks + * tFAW=24 clocks, cas=8 cycles + * MX6DL/SOLO: + * tRFC=0x6a clocks, tXS=0x6e clocks, tXP=3 clocks, tXPDLL=10 clocks + * tFAW=19 clocks, cas=6 cycles */ -WRITE_ENTRY1(MMDC_P0_MDCFG0, 0x555A7975) +WRITE_ENTRY2(MMDC_P0_MDCFG0, 0x555A7975, 0x696D5323) + /* - * MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8 - * tMRD=4, tCWL=6 + * MDCFG1, + * MX6Q: + * tRDC=8, tRP=8, tRC=27, tRAS=20, tRPA=tRP+1, tWR=8, tMRD=4, tCWL=6 + * MX6DL/SOLO: + * tRDC=6, tRP=6, tRC=20, tRAS=15, tRPA=tRP+1, tWR=7, tMRD=4, tCWL=5 */ -WRITE_ENTRY1(MMDC_P0_MDCFG1, 0xFF538E64) +WRITE_ENTRY2(MMDC_P0_MDCFG1, 0xFF538E64, 0xB66E8C63) + /* * MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4 */ WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2) - WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21) -WRITE_ENTRY1(MMDC_P0_MDOTC, 0x09444040) -WRITE_ENTRY1(MMDC_P0_MDPDC, 0x00025576)
/* - * Mx6Q - 64 bit wide ddr + * MMDC_MDOTC, + * MX6Q: + * tAOFPD=2 cycles, tAONPD=2, tANPD=5, tAXPD=5, tODTLon=5, tODT_idle_off=5 + * MX6DL/SOLO: + * tAOFPD=1 cycles, tAONPD=1, tANPD=4, tAXPD=4, tODTLon=4, tODT_idle_off=4 + */ +WRITE_ENTRY2(MMDC_P0_MDOTC, 0x09444040, 0x00333030) + +/* + * MDPDC - [17:16](2) => CKE pulse width = 3 cycles. + * [15:12](5) => PWDT_1 = 256 cycles + * [11:8](5) =>PWDR_0 = 256 cycles + * MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6 cycles + * MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5 cycles + */ +WRITE_ENTRY2(MMDC_P0_MDPDC, 0x00025576, 0x0002556D) + +/* + * MX6Q/DL - 64 bit wide ddr * last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) = * 1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27 */ +/* + * MX6SOLO - 32 bit wide ddr + * last address is (1<<28 (base) + 1<<29 - 1) / (1<<25) = + * 1<<3 + 1<<4 - 1 = 8 + 0x10 -1 = 0x17 + */ /* MDASP, CS0_END */ -WRITE_ENTRY1(MMDC_P0_MDASP, 0x00000027) +WRITE_ENTRY3(MMDC_P0_MDASP, 0x00000027, 0x00000027, 0x00000017) /* - * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8, width=64/32bit - * mx6q : row+col+bank+width=14+10+3+3=30 = 1G + * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8 + * MX6Q/DL: width=64bit row+col+bank+width=14+10+3+3=30 = 1G + * MX6SOLO: width=32bit row+col+bank+width=14+10+3+2=29 = 512M */ -WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000) +WRITE_ENTRY3(MMDC_P0_MDCTL, 0x831A0000, 0x831A0000, 0x83190000)
-/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) +/* + * LOAD MR2: MDSCR, con_req, CS0, A10 set - RZQ/2 + * MX6Q: A3 set(CAS Write=6) + * MX6DL/SOLO: (CAS Write=5) + */ +WRITE_ENTRY2(MMDC_P0_MDSCR, 0x04088032, 0x04008032) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) -/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) -/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030) + +/* + * LOAD MR1, CS0 + * MX6Q: A6 set: Rtt=RZQ/2, A1 set: ODI=RZQ/7 + * MX6DL/SOLO: A2 set: Rtt=RZQ/4, ODI=RZQ/6 + */ +WRITE_ENTRY2(MMDC_P0_MDSCR, 0x00428031, 0x00048031) + +/* LOAD MR0, CS0 A8 set: DLL Reset + * MX6Q: A6 set: CAS=8 A11 set: WR=8 + * MX6DL/SOLO: A4 set: CAS=5, A9,A10 set: WR=7 + */ +WRITE_ENTRY2(MMDC_P0_MDSCR, 0x09408030, 0x07208030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) @@ -173,18 +227,18 @@ WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ -WRITE_ENTRY1(MMDC_P0_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P0_MPDGCTRL1, 0x034C0359) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL1, 0x03650348) -WRITE_ENTRY1(MMDC_P0_MPRDDLCTL, 0x4436383B) -WRITE_ENTRY1(MMDC_P1_MPRDDLCTL, 0x39393341) -WRITE_ENTRY1(MMDC_P0_MPWRDLCTL, 0x35373933) -WRITE_ENTRY1(MMDC_P1_MPWRDLCTL, 0x48254A36) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL0, 0x001F001F) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL1, 0x001F001F) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL0, 0x00440044) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL1, 0x00440044) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL1, 0x034C0359, 0x021A0218) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL1, 0x03650348, 0x021A0218) +WRITE_ENTRY2(MMDC_P0_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P1_MPRDDLCTL, 0x39393341, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P0_MPWRDLCTL, 0x35373933, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P1_MPWRDLCTL, 0x48254A36, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL0, 0x001F001F, 0x0040003C) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL1, 0x001F001F, 0x0032003E) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL0, 0x00440044, 0x0040003C) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL1, 0x00440044, 0x0032003E)
/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800)
Hi Troy,
This seems to be the patch where the rubber meets the road in much of this series.
On 10/03/2012 06:47 PM, Troy Kisky wrote:
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 120 +++++++++++++++++++------- 1 file changed, 87 insertions(+), 33 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 9e20db0..f45f93e 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -49,6 +49,15 @@ BOOT_FROM sd
Address absolute address of the registervalue value to be stored in the register*/ +/*
- DDR3 settings
- MX6Q ddr is limited to 1066 Mhz, currently 1056 MHz(528 MHz clock),
memory bus width: 64 bits, x16/x32/x64
- MX6DL ddr is limited to 800 MHz(400 MHz clock)
memory bus width: 64 bits, x16/x32/x64
- MX6SOLO ddr is limited to 800 MHz(400 MHz clock)
memory bus width: 32 bits, x16/x32- */
This comment seems to be critical to understanding some of what's below, since now three **different** memory configurations are represented in this file.
At a minimum, the file name should be changed to get rid of '6q' and '4x' since those don't necessarily apply.
WRITE_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) @@ -90,6 +99,7 @@ WRITE_ENTRY1(IOM_GRP_B6DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B7DS, 0x00000030)
WRITE_ENTRY1(IOM_GRP_ADDDS, 0x00000030)
- /* (differential input) */ WRITE_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) /* disable ddr pullups */
@@ -119,48 +129,92 @@ WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740)
- MDSCR, con_req
*/ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000)
- /*
- MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks
- tXP=4 clocks, tXPDLL=13 clocks
- tFAW=24 clocks, cas=8 cycles
- MDCFG0,
- MX6Q:
- tRFC=0x56 clocks, tXS=0x5b clocks, tXP=4 clocks, tXPDLL=13 clocks
- tFAW=24 clocks, cas=8 cycles
- MX6DL/SOLO:
- tRFC=0x6a clocks, tXS=0x6e clocks, tXP=3 clocks, tXPDLL=10 clocks
*/
tFAW=19 clocks, cas=6 cycles-WRITE_ENTRY1(MMDC_P0_MDCFG0, 0x555A7975) +WRITE_ENTRY2(MMDC_P0_MDCFG0, 0x555A7975, 0x696D5323)
Here's where I start to get lost in the macro-fu.
The WRITE_ENTRY1 macros make some sense to me in that they always write a single value to an offset whose address changes based on the processor type.
In order to understand WRITE_ENTRY2, you really have to know that the dual, solo, and sololite share many characteristics.
It's kinda hard to infer that knowledge from the code and I wonder if this structure will hold up under future revisions.
/*
- MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8
- tMRD=4, tCWL=6
- MDCFG1,
- MX6Q:
- tRDC=8, tRP=8, tRC=27, tRAS=20, tRPA=tRP+1, tWR=8, tMRD=4, tCWL=6
- MX6DL/SOLO:
*/
- tRDC=6, tRP=6, tRC=20, tRAS=15, tRPA=tRP+1, tWR=7, tMRD=4, tCWL=5
-WRITE_ENTRY1(MMDC_P0_MDCFG1, 0xFF538E64) +WRITE_ENTRY2(MMDC_P0_MDCFG1, 0xFF538E64, 0xB66E8C63)
- /*
*/ WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2)
- MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4
- WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21)
-WRITE_ENTRY1(MMDC_P0_MDOTC, 0x09444040) -WRITE_ENTRY1(MMDC_P0_MDPDC, 0x00025576)
/*
- Mx6Q - 64 bit wide ddr
- MMDC_MDOTC,
- MX6Q:
- tAOFPD=2 cycles, tAONPD=2, tANPD=5, tAXPD=5, tODTLon=5, tODT_idle_off=5
- MX6DL/SOLO:
- tAOFPD=1 cycles, tAONPD=1, tANPD=4, tAXPD=4, tODTLon=4, tODT_idle_off=4
- */
+WRITE_ENTRY2(MMDC_P0_MDOTC, 0x09444040, 0x00333030)
+/*
- MDPDC - [17:16](2) => CKE pulse width = 3 cycles.
- [15:12](5) => PWDT_1 = 256 cycles
- [11:8](5) =>PWDR_0 = 256 cycles
- MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6 cycles
- MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5 cycles
- */
+WRITE_ENTRY2(MMDC_P0_MDPDC, 0x00025576, 0x0002556D)
+/*
*/
- MX6Q/DL - 64 bit wide ddr
- last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) =
- 1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27
+/*
- MX6SOLO - 32 bit wide ddr
- last address is (1<<28 (base) + 1<<29 - 1) / (1<<25) =
- 1<<3 + 1<<4 - 1 = 8 + 0x10 -1 = 0x17
- */ /* MDASP, CS0_END */
-WRITE_ENTRY1(MMDC_P0_MDASP, 0x00000027) +WRITE_ENTRY3(MMDC_P0_MDASP, 0x00000027, 0x00000027, 0x00000017)
Is it unreasonable to think there's a use case for 32-bit wide memory on a dual or quad?
What happens when we populate 256Mx16 DDR chips?
Sabre Auto is already doing this.
/*
- MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8, width=64/32bit
- mx6q : row+col+bank+width=14+10+3+3=30 = 1G
- MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8
- MX6Q/DL: width=64bit row+col+bank+width=14+10+3+3=30 = 1G
*/
- MX6SOLO: width=32bit row+col+bank+width=14+10+3+2=29 = 512M
-WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000) +WRITE_ENTRY3(MMDC_P0_MDCTL, 0x831A0000, 0x831A0000, 0x83190000)
-/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) +/*
- LOAD MR2: MDSCR, con_req, CS0, A10 set - RZQ/2
- MX6Q: A3 set(CAS Write=6)
- MX6DL/SOLO: (CAS Write=5)
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x04088032, 0x04008032) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) -/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) -/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030)
+/*
- LOAD MR1, CS0
- MX6Q: A6 set: Rtt=RZQ/2, A1 set: ODI=RZQ/7
- MX6DL/SOLO: A2 set: Rtt=RZQ/4, ODI=RZQ/6
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x00428031, 0x00048031)
+/* LOAD MR0, CS0 A8 set: DLL Reset
- MX6Q: A6 set: CAS=8 A11 set: WR=8
- MX6DL/SOLO: A4 set: CAS=5, A9,A10 set: WR=7
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x09408030, 0x07208030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) @@ -173,18 +227,18 @@ WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ -WRITE_ENTRY1(MMDC_P0_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P0_MPDGCTRL1, 0x034C0359) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL1, 0x03650348) -WRITE_ENTRY1(MMDC_P0_MPRDDLCTL, 0x4436383B) -WRITE_ENTRY1(MMDC_P1_MPRDDLCTL, 0x39393341) -WRITE_ENTRY1(MMDC_P0_MPWRDLCTL, 0x35373933) -WRITE_ENTRY1(MMDC_P1_MPWRDLCTL, 0x48254A36) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL0, 0x001F001F) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL1, 0x001F001F) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL0, 0x00440044) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL1, 0x00440044) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL1, 0x034C0359, 0x021A0218) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL1, 0x03650348, 0x021A0218) +WRITE_ENTRY2(MMDC_P0_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P1_MPRDDLCTL, 0x39393341, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P0_MPWRDLCTL, 0x35373933, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P1_MPWRDLCTL, 0x48254A36, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL0, 0x001F001F, 0x0040003C) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL1, 0x001F001F, 0x0032003E) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL0, 0x00440044, 0x0040003C) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL1, 0x00440044, 0x0032003E)
/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800)
It appears that only the memory configuration registers use WRITE_ENTRY2 or WRITE_ENTRY3 macros, and if so, I'd much rather see three separate files expressing the values, i.e.:
mx6q_4x_mt41j128.cfg mx6dl_4x_mt41j128.cfg mx6s_2x_mt41j128.cfg
I'm not certain the processor part of the name is the right designator though. If I understand correctly, the differences in values between 6q and 6dl are mostly based on the memory speed.
Is that right?
It also seems valid that a board would want to use an i.mx6quad with a lower memory bus speed.
If the address differences are taken care of by the preprocessor, it seems that a set like this would be more appropriate (and processor independent):
mx6_4x_mt41j128_1066.cfg mx6_4x_mt41j128_800.cfg mx6_2x_mt41j128_800.cfg
By splitting up the files, we can still check for differences between them using 'diff', and it will be easier to extend the set.
Note that meaningful diffs will require the use of symbolic names rather than varying addresses for registers.
It's also conceivable that calibration on a given layout will require per-board tweaks, but that's not clear at the moment.
You've clearly been through this in more detail than I have. Please let me know your thoughts.
Regards,
Eric
On 10/8/2012 11:46 AM, Eric Nelson wrote:
Hi Troy,
This seems to be the patch where the rubber meets the road in much of this series.
On 10/03/2012 06:47 PM, Troy Kisky wrote:
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 120 +++++++++++++++++++------- 1 file changed, 87 insertions(+), 33 deletions(-)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index 9e20db0..f45f93e 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -49,6 +49,15 @@ BOOT_FROM sd
Address absolute address of the registervalue value to be stored in the register*/ +/*
- DDR3 settings
- MX6Q ddr is limited to 1066 Mhz, currently 1056 MHz(528 MHz
clock),
memory bus width: 64 bits, x16/x32/x64
- MX6DL ddr is limited to 800 MHz(400 MHz clock)
memory bus width: 64 bits, x16/x32/x64
- MX6SOLO ddr is limited to 800 MHz(400 MHz clock)
memory bus width: 32 bits, x16/x32- */
This comment seems to be critical to understanding some of what's below, since now three **different** memory configurations are represented in this file.
At a minimum, the file name should be changed to get rid of '6q' and '4x' since those don't necessarily apply.
Right, my preference is to put at back in board/freescale/mx6qsabrelite/imximage.cfg since MPDGCTRL0/1 DQS GATE registers and MMDC_MPRDDQBYnDL should be very board specific, but that may be meet by objections from Fabio.
WRITE_ENTRY1(IOM_DRAM_SDQS0, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS1, 0x00000030) WRITE_ENTRY1(IOM_DRAM_SDQS2, 0x00000030) @@ -90,6 +99,7 @@ WRITE_ENTRY1(IOM_GRP_B6DS, 0x00000030) WRITE_ENTRY1(IOM_GRP_B7DS, 0x00000030)
WRITE_ENTRY1(IOM_GRP_ADDDS, 0x00000030)
- /* (differential input) */ WRITE_ENTRY1(IOM_DDRMODE_CTL, 0x00020000) /* disable ddr pullups */
@@ -119,48 +129,92 @@ WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740)
- MDSCR, con_req
*/ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000)
- /*
- MDCFG0, tRFC=0x56 clocks, tXS=0x5b clocks
- tXP=4 clocks, tXPDLL=13 clocks
- tFAW=24 clocks, cas=8 cycles
- MDCFG0,
- MX6Q:
- tRFC=0x56 clocks, tXS=0x5b clocks, tXP=4 clocks, tXPDLL=13 clocks
- tFAW=24 clocks, cas=8 cycles
- MX6DL/SOLO:
- tRFC=0x6a clocks, tXS=0x6e clocks, tXP=3 clocks, tXPDLL=10 clocks
*/
tFAW=19 clocks, cas=6 cycles-WRITE_ENTRY1(MMDC_P0_MDCFG0, 0x555A7975) +WRITE_ENTRY2(MMDC_P0_MDCFG0, 0x555A7975, 0x696D5323)
Here's where I start to get lost in the macro-fu.
The WRITE_ENTRY1 macros make some sense to me in that they always write a single value to an offset whose address changes based on the processor type.
In order to understand WRITE_ENTRY2, you really have to know that the dual, solo, and sololite share many characteristics.
RIght, ENTRY2 is used when there are differences between mx6q, and mx6dl/solo. In the case above, the value 0x555A7975 is written if a mx6quad, and the value 0x696D5323 is written if a mx6duallite or mx6solo.
It's kinda hard to infer that knowledge from the code and I wonder if this structure will hold up under future revisions.
/*
- MDCFG1, tRDC=8, tRP=8, tRC=27,tRAS=20,tRPA=tRP+1,tWR=8
- tMRD=4, tCWL=6
- MDCFG1,
- MX6Q:
- tRDC=8, tRP=8, tRC=27, tRAS=20, tRPA=tRP+1, tWR=8, tMRD=4, tCWL=6
- MX6DL/SOLO:
*/
- tRDC=6, tRP=6, tRC=20, tRAS=15, tRPA=tRP+1, tWR=7, tMRD=4, tCWL=5
-WRITE_ENTRY1(MMDC_P0_MDCFG1, 0xFF538E64) +WRITE_ENTRY2(MMDC_P0_MDCFG1, 0xFF538E64, 0xB66E8C63)
- /*
*/ WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2)
- MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4
- WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21)
-WRITE_ENTRY1(MMDC_P0_MDOTC, 0x09444040) -WRITE_ENTRY1(MMDC_P0_MDPDC, 0x00025576)
/*
- Mx6Q - 64 bit wide ddr
- MMDC_MDOTC,
- MX6Q:
- tAOFPD=2 cycles, tAONPD=2, tANPD=5, tAXPD=5, tODTLon=5,
tODT_idle_off=5
- MX6DL/SOLO:
- tAOFPD=1 cycles, tAONPD=1, tANPD=4, tAXPD=4, tODTLon=4,
tODT_idle_off=4
- */
+WRITE_ENTRY2(MMDC_P0_MDOTC, 0x09444040, 0x00333030)
+/*
- MDPDC - [17:16](2) => CKE pulse width = 3 cycles.
- [15:12](5) => PWDT_1 = 256 cycles
- [11:8](5) =>PWDR_0 = 256 cycles
- MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6
cycles
- MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5
cycles
- */
+WRITE_ENTRY2(MMDC_P0_MDPDC, 0x00025576, 0x0002556D)
+/*
*/
- MX6Q/DL - 64 bit wide ddr
- last address is (1<<28 (base) + 1<<30 - 1) / (1<<25) =
1<<3 + 1<<5 - 1 = 8 + 0x20 -1 = 0x27+/*
- MX6SOLO - 32 bit wide ddr
- last address is (1<<28 (base) + 1<<29 - 1) / (1<<25) =
- 1<<3 + 1<<4 - 1 = 8 + 0x10 -1 = 0x17
- */ /* MDASP, CS0_END */
-WRITE_ENTRY1(MMDC_P0_MDASP, 0x00000027) +WRITE_ENTRY3(MMDC_P0_MDASP, 0x00000027, 0x00000027, 0x00000017)
Is it unreasonable to think there's a use case for 32-bit wide memory on a dual or quad?
Sure, they just would not use this file.
What happens when we populate 256Mx16 DDR chips?
Sabre Auto is already doing this.
Again, definitely a new file would be needed.
/*
- MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8,
width=64/32bit
- mx6q : row+col+bank+width=14+10+3+3=30 = 1G
- MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8
- MX6Q/DL: width=64bit row+col+bank+width=14+10+3+3=30 = 1G
*/
- MX6SOLO: width=32bit row+col+bank+width=14+10+3+2=29 = 512M
-WRITE_ENTRY1(MMDC_P0_MDCTL, 0x831A0000) +WRITE_ENTRY3(MMDC_P0_MDCTL, 0x831A0000, 0x831A0000, 0x83190000)
-/* MDSCR, con_req, LOAD MR2, CS0, A3,A10 set (CAS Write=6), RZQ/2 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04088032) +/*
- LOAD MR2: MDSCR, con_req, CS0, A10 set - RZQ/2
- MX6Q: A3 set(CAS Write=6)
- MX6DL/SOLO: (CAS Write=5)
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x04088032, 0x04008032) /* LOAD MR3, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) -/* LOAD MR1, CS0, A1,A6 set Rtt=RZQ/2, ODI=RZQ/7 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00428031) -/* LOAD MR0, CS0, A6,A8,A11 set CAS=8, WR=8, DLL reset */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x09408030)
+/*
- LOAD MR1, CS0
- MX6Q: A6 set: Rtt=RZQ/2, A1 set: ODI=RZQ/7
- MX6DL/SOLO: A2 set: Rtt=RZQ/4, ODI=RZQ/6
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x00428031, 0x00048031)
+/* LOAD MR0, CS0 A8 set: DLL Reset
- MX6Q: A6 set: CAS=8 A11 set: WR=8
- MX6DL/SOLO: A4 set: CAS=5, A9,A10 set: WR=7
- */
+WRITE_ENTRY2(MMDC_P0_MDSCR, 0x09408030, 0x07208030)
/* ZQ calibrate, CS0 */ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) @@ -173,18 +227,18 @@ WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ -WRITE_ENTRY1(MMDC_P0_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P0_MPDGCTRL1, 0x034C0359) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL0, 0x434B0350) -WRITE_ENTRY1(MMDC_P1_MPDGCTRL1, 0x03650348) -WRITE_ENTRY1(MMDC_P0_MPRDDLCTL, 0x4436383B) -WRITE_ENTRY1(MMDC_P1_MPRDDLCTL, 0x39393341) -WRITE_ENTRY1(MMDC_P0_MPWRDLCTL, 0x35373933) -WRITE_ENTRY1(MMDC_P1_MPWRDLCTL, 0x48254A36) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL0, 0x001F001F) -WRITE_ENTRY1(MMDC_P0_MPWLDECTRL1, 0x001F001F) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL0, 0x00440044) -WRITE_ENTRY1(MMDC_P1_MPWLDECTRL1, 0x00440044) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P0_MPDGCTRL1, 0x034C0359, 0x021A0218) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P1_MPDGCTRL1, 0x03650348, 0x021A0218) +WRITE_ENTRY2(MMDC_P0_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P1_MPRDDLCTL, 0x39393341, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P0_MPWRDLCTL, 0x35373933, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P1_MPWRDLCTL, 0x48254A36, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL0, 0x001F001F, 0x0040003C) +WRITE_ENTRY2(MMDC_P0_MPWLDECTRL1, 0x001F001F, 0x0032003E) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL0, 0x00440044, 0x0040003C) +WRITE_ENTRY2(MMDC_P1_MPWLDECTRL1, 0x00440044, 0x0032003E)
/* MPMUR0 - Complete calibration by forced measurement */ WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800)
It appears that only the memory configuration registers use WRITE_ENTRY2 or WRITE_ENTRY3 macros, and if so, I'd much rather see three separate files expressing the values, i.e.:
mx6q_4x_mt41j128.cfg mx6dl_4x_mt41j128.cfg mx6s_2x_mt41j128.cfg
That is definitely a valid option. But you lose the common settings of the iomux registers. Cut-n-pasting the files isn't so bad I guess, but updates such as mx6q_4x_mt41j128.cfg: use ddr3 mode for reset
Bits 19-18 of IOMUXC_IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET should be 3 for DDR3 mode. The current value of 0 is reserved in TRM.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index b859e2f..9c622c8 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -72,7 +72,7 @@ WRITE_ENTRY1(IOM_DRAM_RAS, 0x00020030) WRITE_ENTRY1(IOM_DRAM_SDCLK_0, 0x00020030) WRITE_ENTRY1(IOM_DRAM_SDCLK_1, 0x00020030)
-WRITE_ENTRY1(IOM_DRAM_RESET, 0x00020030) +WRITE_ENTRY1(IOM_DRAM_RESET, 0x000e0030) WRITE_ENTRY1(IOM_DRAM_SDCKE0, 0x00003000) WRITE_ENTRY1(IOM_DRAM_SDCKE1, 0x00003000) WRITE_ENTRY1(IOM_DRAM_SDBA2, 0x00000000)
Would then need to be applied to all three files.
I'm not certain the processor part of the name is the right designator though. If I understand correctly, the differences in values between 6q and 6dl are mostly based on the memory speed.
Is that right?
Correct...
It also seems valid that a board would want to use an i.mx6quad with a lower memory bus speed.
Especially if there is a layout problem.
If the address differences are taken care of by the preprocessor, it seems that a set like this would be more appropriate (and processor independent):
mx6_4x_mt41j128_1066.cfg mx6_4x_mt41j128_800.cfg mx6_2x_mt41j128_800.cfg
Right, this is definitely a valid option. And if different boards calibrated their DDR to the same settings (DQS and byte delays) it would make more sense.
But I still see this file as board specific and not so much memory type specific.
By splitting up the files, we can still check for differences between them using 'diff', and it will be easier to extend the set.
Note that meaningful diffs will require the use of symbolic names rather than varying addresses for registers.
It's also conceivable that calibration on a given layout will require per-board tweaks, but that's not clear at the moment.
You've clearly been through this in more detail than I have. Please let me know your thoughts.
Regards,
Eric
mx6dlsabrelite - for duallite mx6ssabrelite - for solo
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- boards.cfg | 4 +++- include/configs/mx6qsabrelite.h | 1 - 2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/boards.cfg b/boards.cfg index e9e073e..abc95d4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -232,7 +232,9 @@ ima3-mx53 arm armv7 ima3-mx53 esg vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg -mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +mx6dlsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6DL +mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q +mx6ssabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6S mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg cm_t35 arm armv7 cm_t35 - omap3 omap3_overo arm armv7 overo - omap3 diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 6a10232..8890e4c 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -23,7 +23,6 @@ #define __CONFIG_H
#define CONFIG_MX6 -#define CONFIG_MX6Q #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- include/configs/mx6qsabrelite.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 8890e4c..8fd35a6 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -180,7 +180,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > " +#define CONFIG_SYS_PROMPT "U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
Troy
On 05/10/2012 01:28, Troy Kisky wrote:
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
This means that CONFIG_MX6Dx is set. You can use it to set appropriately the prompt or use a more generic name including the board name, as "MX6SABRELITE U-Boot > ". The board is always the same, what is different is the SOC. I can compare this with a motherboard for a PC that can mount a dual or quad core. The board is always the same, and how many core are running is read in a different way (cat /proc/cpuinfo under Linux or get_cpu_rev in U-Boot with the patch you sent).
Best regards, Stefano
On 10/8/2012 6:54 AM, Stefano Babic wrote:
On 05/10/2012 01:28, Troy Kisky wrote:
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
This means that CONFIG_MX6Dx is set. You can use it to set appropriately the prompt or use a more generic name including the board name, as "MX6SABRELITE U-Boot > ". The board is always the same, what is
I can live with "MX6SABRELITE U-Boot" but I prefer a plain "U-Boot". The rest seems a waste of screen real estate. The long u-boot commands are more likely to wrap. Anyone else have an opinion???
Thanks Troy
On Mon, Oct 8, 2012 at 6:58 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
I can live with "MX6SABRELITE U-Boot" but I prefer a plain "U-Boot". The rest seems a waste of screen real estate. The long u-boot commands are more likely to wrap. Anyone else have an opinion???
Agreed.
Am 08/10/2012 23:58, schrieb Troy Kisky:
On 10/8/2012 6:54 AM, Stefano Babic wrote:
On 05/10/2012 01:28, Troy Kisky wrote:
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
This means that CONFIG_MX6Dx is set. You can use it to set appropriately the prompt or use a more generic name including the board name, as "MX6SABRELITE U-Boot > ". The board is always the same, what is
I can live with "MX6SABRELITE U-Boot" but I prefer a plain "U-Boot". The rest seems a waste of screen real estate. The long u-boot commands are more likely to wrap.
Personally agree, shorter is better.
Regards, Stefano
On 10/08/2012 03:18 PM, stefano babic wrote:
Am 08/10/2012 23:58, schrieb Troy Kisky:
On 10/8/2012 6:54 AM, Stefano Babic wrote:
On 05/10/2012 01:28, Troy Kisky wrote:
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
This means that CONFIG_MX6Dx is set. You can use it to set appropriately the prompt or use a more generic name including the board name, as "MX6SABRELITE U-Boot> ". The board is always the same, what is
I can live with "MX6SABRELITE U-Boot" but I prefer a plain "U-Boot". The rest seems a waste of screen real estate. The long u-boot commands are more likely to wrap.
Personally agree, shorter is better.
Shh! Nobody tell the marketing folks!
On 10/08/2012 02:58 PM, Troy Kisky wrote:
On 10/8/2012 6:54 AM, Stefano Babic wrote:
On 05/10/2012 01:28, Troy Kisky wrote:
On 10/3/2012 8:00 PM, Otavio Salvador wrote:
On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky troy.kisky@boundarydevices.com wrote:
The prompt is not appropriate if not running on a mx6q processor.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
But in this case the board name will change, no?
No, patch 29/32 sets the new boards to use the same config file (mx6qsabrelite.h) only adding ",MX6DL" or ",MX6S" or ",MX6Q" to the end of the line in boards.cfg
This means that CONFIG_MX6Dx is set. You can use it to set appropriately the prompt or use a more generic name including the board name, as "MX6SABRELITE U-Boot > ". The board is always the same, what is
I can live with "MX6SABRELITE U-Boot" but I prefer a plain "U-Boot". The rest seems a waste of screen real estate. The long u-boot commands are more likely to wrap. Anyone else have an opinion???
I'm with you, for selfish reasons.
When I write up instructions like these, things tend to wrap with the longer prompt (so I usually hand-edit them):
http://boundarydevices.com/configuring-i-mx6-machines-different-screens-nitr...
The marketing value of MX6SABRELITE is pretty small when someone as one on their desk.
Regards,
Eric
Basic expressions with order precedence is now supported. ie. (----3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- tools/parse_helper.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/parse_helper.c b/tools/parse_helper.c index 0a5c5f6..50be832 100644 --- a/tools/parse_helper.c +++ b/tools/parse_helper.c @@ -97,20 +97,172 @@ int ph_skip_comma(struct parse_helper *ph) } }
+static const char precedence[] = { + /* ( + - * / & ^ | ) */ + 0, 2, 2, 1, 1, 3, 4, 5, 6 +}; +static const char unary_operations[] = "(+-"; +static const char binary_operations[] = " +-*/&^|)"; + +static uint32_t do_func(uint32_t val1, uint32_t val2, int op) +{ + switch (op) { + case 1: + return val1 + val2; + case 2: + return val1 - val2; + case 3: + return val1 * val2; + case 4: + return val1 / val2; + case 5: + return val1 & val2; + case 6: + return val1 ^ val2; + case 7: + return val1 | val2; + } + fprintf(stderr, "Error: in func %s: val1=%d val2=%d op = %d\n", + __func__, val1, val2, op); + exit(EXIT_FAILURE); +} + +static int find_op(char c, const char *p) +{ + int i; + for (i = 0; ; i++) { + if (c == p[i]) + return i; + if (!p[i]) + break; + } + return -1; +} + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + int ph_get_value(struct parse_helper *ph, uint32_t *pval) { char *endptr; - uint32_t value; + int op_i = 0; + int val_i = 0; + unsigned char op[16]; + uint32_t val[16]; + int unary = 1; + char *p;
- if (ph_skip_separators(ph)) - return -1; - errno = 0; - value = strtoul(ph->p, &endptr, 16); - if (errno || (ph->p == endptr)) - return -1; - *pval = value; - ph->p = endptr; - return 0; + p = ph->p; + for (;;) { + char c; + int i, j; + const char *ops = unary ? unary_operations : binary_operations; + + if (unary) { + ph->p = p; + if (ph_skip_separators(ph)) + return -1; + p = ph->p; + c = *p; + } else { + for (;;) { + c = *p; + if ((c != ' ') && (c != '\t')) + break; + p++; + } + } + i = find_op(c, ops); + debug("%d,%c,%d:%s\n", i, c, unary, p); + if ((i < 0) && unary) { + if (val_i >= ARRAY_SIZE(val)) + return -1; + errno = 0; + val[val_i++] = strtoul(p, &endptr, 16); + if (errno || (p == endptr)) { + ph->p = p; + return -1; + } + p = endptr; + unary = 0; + debug("val[%d]=%x,%d,%d\n", val_i - 1, val[val_i - 1], + op_i, val_i); +do_unary: + while (op_i) { + j = op[op_i - 1]; + if (!(j & 0x80)) + break; + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("un:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + continue; + } + if (i < 0) { + c = 0; + i = 8; + } else { + p++; + } + if (c == '(') { + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i; + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], + op_i, val_i); + unary = 1; + continue; + } + for (;;) { + if (!op_i || unary) + break; + j = op[op_i - 1]; + if (j == 0) { + if (c == ')') { + op_i--; + goto do_unary; + } + break; + } + if ((j & 0x80)) { + op_i--; + val[val_i - 1] = do_func(0, + val[val_i - 1], j & 0x7f); + debug("unary:%d,%x\n", val[val_i - 1], j); + continue; + } + if (precedence[i] < precedence[j]) + break; + if (val_i < 2) + return -1; + op_i--; + val[val_i - 2] = do_func(val[val_i - 2], + val[val_i - 1], j); + val_i--; + debug("binary:%d,%x,%d,%d\n", val[val_i - 1], j, + op_i, val_i); + } + if (c == ')') { + fprintf(stderr, "Error: unmatched parenthesis\n"); + return -1; + } + if (i == 8) { + if ((op_i != 0) || (val_i != 1)) { + fprintf(stderr, "Error: syntax %d %d\n", + op_i, val_i); + return -1; + } + ph->p = p; + *pval = val[0]; + return 0; + } + if (op_i >= ARRAY_SIZE(op)) + return -1; + op[op_i++] = i | (unary << 7); + debug("op[%d]=%x,%d,%d\n", op_i - 1, op[op_i - 1], op_i, val_i); + unary = 1; + } }
/*
Now that expression work, we can delete the redundant MMC_P1_xxx defines and just define MMC_P0 and MMC_P1 bases.
The other addresses are changed to a base + offset syntax as well.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 205 ++++++++++++-------------- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 +++++------ 2 files changed, 136 insertions(+), 159 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/imx-mkimage.h b/arch/arm/include/asm/arch-mx6/imx-mkimage.h index 4abd3f1..dc9dadf 100644 --- a/arch/arm/include/asm/arch-mx6/imx-mkimage.h +++ b/arch/arm/include/asm/arch-mx6/imx-mkimage.h @@ -6,124 +6,101 @@ #ifndef __ASM_ARCH_IMX_MKIMAGE_H__ #define __ASM_ARCH_IMX_MKIMAGE_H__
-#define IOMUXC_GPR4 0x020e0010 -#define IOMUXC_GPR6 0x020e0018 -#define IOMUXC_GPR7 0x020e001c - -/* mx6 duallite and solo have same offsets */ +#define IRAM_FREE_START 0x00907000 +#define MMDC_P0 0x021b0000 +#define MMDC_P1 0x021b4000 +#define IOMUXC_BASE 0x020e0000 +#define CCM_BASE 0x020c4000
-#define IOM_DRAM_DQM0 MA(0x020e05ac, 0x020e0470, 0x0) -#define IOM_DRAM_DQM1 MA(0x020e05b4, 0x020e0474, 0x0) -#define IOM_DRAM_DQM2 MA(0x020e0528, 0x020e0478, 0x0) -#define IOM_DRAM_DQM3 MA(0x020e0520, 0x020e047c, 0x0) -#define IOM_DRAM_DQM4 MA(0x020e0514, 0x020e0480, 0x0) -#define IOM_DRAM_DQM5 MA(0x020e0510, 0x020e0484, 0x0) -#define IOM_DRAM_DQM6 MA(0x020e05bc, 0x020e0488, 0x0) -#define IOM_DRAM_DQM7 MA(0x020e05c4, 0x020e048c, 0x0) - -#define IOM_DRAM_CAS MA(0x020e056c, 0x020e0464, 0x0) -#define IOM_DRAM_RAS MA(0x020e0578, 0x020e0490, 0x0) -#define IOM_DRAM_RESET MA(0x020e057c, 0x020e0494, 0x0) -#define IOM_DRAM_SDCLK_0 MA(0x020e0588, 0x020e04ac, 0x0) -#define IOM_DRAM_SDCLK_1 MA(0x020e0594, 0x020e04b0, 0x0) -#define IOM_DRAM_SDBA2 MA(0x020e058c, 0x020e04a0, 0x0) -#define IOM_DRAM_SDCKE0 MA(0x020e0590, 0x020e04a4, 0x0) -#define IOM_DRAM_SDCKE1 MA(0x020e0598, 0x020e04a8, 0x0) -#define IOM_DRAM_SDODT0 MA(0x020e059c, 0x020e04b4, 0x0) -#define IOM_DRAM_SDODT1 MA(0x020e05a0, 0x020e04b8, 0x0) - -#define IOM_DRAM_SDQS0 MA(0x020e05a8, 0x020e04bc, 0x0) -#define IOM_DRAM_SDQS1 MA(0x020e05b0, 0x020e04c0, 0x0) -#define IOM_DRAM_SDQS2 MA(0x020e0524, 0x020e04c4, 0x0) -#define IOM_DRAM_SDQS3 MA(0x020e051c, 0x020e04c8, 0x0) -#define IOM_DRAM_SDQS4 MA(0x020e0518, 0x020e04cc, 0x0) -#define IOM_DRAM_SDQS5 MA(0x020e050c, 0x020e04d0, 0x0) -#define IOM_DRAM_SDQS6 MA(0x020e05b8, 0x020e04d4, 0x0) -#define IOM_DRAM_SDQS7 MA(0x020e05c0, 0x020e04d8, 0x0) - -#define IOM_GRP_B0DS MA(0x020e0784, 0x020e0764, 0x0) -#define IOM_GRP_B1DS MA(0x020e0788, 0x020e0770, 0x0) -#define IOM_GRP_B2DS MA(0x020e0794, 0x020e0778, 0x0) -#define IOM_GRP_B3DS MA(0x020e079c, 0x020e077c, 0x0) -#define IOM_GRP_B4DS MA(0x020e07a0, 0x020e0780, 0x0) -#define IOM_GRP_B5DS MA(0x020e07a4, 0x020e0784, 0x0) -#define IOM_GRP_B6DS MA(0x020e07a8, 0x020e078c, 0x0) -#define IOM_GRP_B7DS MA(0x020e0748, 0x020e0748, 0x0) -#define IOM_GRP_ADDDS MA(0x020e074c, 0x020e074c, 0x0) -#define IOM_DDRMODE_CTL MA(0x020e0750, 0x020e0750, 0x0) -#define IOM_GRP_DDRPKE MA(0x020e0758, 0x020e0754, 0x0) -#define IOM_GRP_DDRMODE MA(0x020e0774, 0x020e0760, 0x0) -#define IOM_GRP_CTLDS MA(0x020e078c, 0x020e076c, 0x0) -#define IOM_GRP_DDR_TYPE MA(0x020e0798, 0x020e0774, 0x0) +#define IOMUXC_GPR4 (IOMUXC_BASE + 0x010) +#define IOMUXC_GPR6 (IOMUXC_BASE + 0x018) +#define IOMUXC_GPR7 (IOMUXC_BASE + 0x01c)
-#define IRAM_FREE_START 0x00907000 +/* mx6 duallite and solo have same offsets */
-#define MMDC_P0_MDCTL 0x021b0000 -#define MMDC_P0_MDPDC 0x021b0004 -#define MMDC_P0_MDOTC 0x021b0008 -#define MMDC_P0_MDCFG0 0x021b000c -#define MMDC_P0_MDCFG1 0x021b0010 -#define MMDC_P0_MDCFG2 0x021b0014 -#define MMDC_P0_MDMISC 0x021b0018 -#define MMDC_P0_MDSCR 0x021b001c -#define MMDC_P0_MDREF 0x021b0020 -#define MMDC_P0_MDRWD 0x021b002c -#define MMDC_P0_MDOR 0x021b0030 -#define MMDC_P0_MDASP 0x021b0040 -#define MMDC_P0_MAPSR 0x021b0404 -#define MMDC_P0_MPZQHWCTRL 0x021b0800 -#define MMDC_P0_MPWLDECTRL0 0x021b080c -#define MMDC_P0_MPWLDECTRL1 0x021b0810 -#define MMDC_P0_MPODTCTRL 0x021b0818 -#define MMDC_P0_MPRDDQBY0DL 0x021b081c -#define MMDC_P0_MPRDDQBY1DL 0x021b0820 -#define MMDC_P0_MPRDDQBY2DL 0x021b0824 -#define MMDC_P0_MPRDDQBY3DL 0x021b0828 -#define MMDC_P0_MPDGCTRL0 0x021b083c -#define MMDC_P0_MPDGCTRL1 0x021b0840 -#define MMDC_P0_MPRDDLCTL 0x021b0848 -#define MMDC_P0_MPWRDLCTL 0x021b0850 -#define MMDC_P0_MPMUR0 0x021b08b8 - -#define MMDC_P1_MDCTL 0x021b4000 -#define MMDC_P1_MDPDC 0x021b4004 -#define MMDC_P1_MDOTC 0x021b4008 -#define MMDC_P1_MDCFG0 0x021b400c -#define MMDC_P1_MDCFG1 0x021b4010 -#define MMDC_P1_MDCFG2 0x021b4014 -#define MMDC_P1_MDMISC 0x021b4018 -#define MMDC_P1_MDSCR 0x021b401c -#define MMDC_P1_MDREF 0x021b4020 -#define MMDC_P1_MDRWD 0x021b402c -#define MMDC_P1_MDOR 0x021b4030 -#define MMDC_P1_MDASP 0x021b4040 -#define MMDC_P1_MAPSR 0x021b4404 -#define MMDC_P1_MPZQHWCTRL 0x021b4800 -#define MMDC_P1_MPWLDECTRL0 0x021b480c -#define MMDC_P1_MPWLDECTRL1 0x021b4810 -#define MMDC_P1_MPODTCTRL 0x021b4818 -#define MMDC_P1_MPRDDQBY0DL 0x021b481c -#define MMDC_P1_MPRDDQBY1DL 0x021b4820 -#define MMDC_P1_MPRDDQBY2DL 0x021b4824 -#define MMDC_P1_MPRDDQBY3DL 0x021b4828 -#define MMDC_P1_MPDGCTRL0 0x021b483c -#define MMDC_P1_MPDGCTRL1 0x021b4840 -#define MMDC_P1_MPRDDLCTL 0x021b4848 -#define MMDC_P1_MPWRDLCTL 0x021b4850 -#define MMDC_P1_MPMUR0 0x021b48b8 - -#define CCM_CCGR0 0x020C4068 -#define CCM_CCGR1 0x020C406c -#define CCM_CCGR2 0x020C4070 -#define CCM_CCGR3 0x020C4074 -#define CCM_CCGR4 0x020C4078 -#define CCM_CCGR5 0x020C407c -#define CCM_CCGR6 0x020C4080 +#define IOM_DRAM_DQM0 MA(0x5ac, 0x470, 0x0) +#define IOM_DRAM_DQM1 MA(0x5b4, 0x474, 0x0) +#define IOM_DRAM_DQM2 MA(0x528, 0x478, 0x0) +#define IOM_DRAM_DQM3 MA(0x520, 0x47c, 0x0) +#define IOM_DRAM_DQM4 MA(0x514, 0x480, 0x0) +#define IOM_DRAM_DQM5 MA(0x510, 0x484, 0x0) +#define IOM_DRAM_DQM6 MA(0x5bc, 0x488, 0x0) +#define IOM_DRAM_DQM7 MA(0x5c4, 0x48c, 0x0) + +#define IOM_DRAM_CAS MA(0x56c, 0x464, 0x0) +#define IOM_DRAM_RAS MA(0x578, 0x490, 0x0) +#define IOM_DRAM_RESET MA(0x57c, 0x494, 0x0) +#define IOM_DRAM_SDCLK_0 MA(0x588, 0x4ac, 0x0) +#define IOM_DRAM_SDCLK_1 MA(0x594, 0x4b0, 0x0) +#define IOM_DRAM_SDBA2 MA(0x58c, 0x4a0, 0x0) +#define IOM_DRAM_SDCKE0 MA(0x590, 0x4a4, 0x0) +#define IOM_DRAM_SDCKE1 MA(0x598, 0x4a8, 0x0) +#define IOM_DRAM_SDODT0 MA(0x59c, 0x4b4, 0x0) +#define IOM_DRAM_SDODT1 MA(0x5a0, 0x4b8, 0x0) + +#define IOM_DRAM_SDQS0 MA(0x5a8, 0x4bc, 0x0) +#define IOM_DRAM_SDQS1 MA(0x5b0, 0x4c0, 0x0) +#define IOM_DRAM_SDQS2 MA(0x524, 0x4c4, 0x0) +#define IOM_DRAM_SDQS3 MA(0x51c, 0x4c8, 0x0) +#define IOM_DRAM_SDQS4 MA(0x518, 0x4cc, 0x0) +#define IOM_DRAM_SDQS5 MA(0x50c, 0x4d0, 0x0) +#define IOM_DRAM_SDQS6 MA(0x5b8, 0x4d4, 0x0) +#define IOM_DRAM_SDQS7 MA(0x5c0, 0x4d8, 0x0) + +#define IOM_GRP_B0DS MA(0x784, 0x764, 0x0) +#define IOM_GRP_B1DS MA(0x788, 0x770, 0x0) +#define IOM_GRP_B2DS MA(0x794, 0x778, 0x0) +#define IOM_GRP_B3DS MA(0x79c, 0x77c, 0x0) +#define IOM_GRP_B4DS MA(0x7a0, 0x780, 0x0) +#define IOM_GRP_B5DS MA(0x7a4, 0x784, 0x0) +#define IOM_GRP_B6DS MA(0x7a8, 0x78c, 0x0) +#define IOM_GRP_B7DS MA(0x748, 0x748, 0x0) +#define IOM_GRP_ADDDS MA(0x74c, 0x74c, 0x0) +#define IOM_DDRMODE_CTL MA(0x750, 0x750, 0x0) +#define IOM_GRP_DDRPKE MA(0x758, 0x754, 0x0) +#define IOM_GRP_DDRMODE MA(0x774, 0x760, 0x0) +#define IOM_GRP_CTLDS MA(0x78c, 0x76c, 0x0) +#define IOM_GRP_DDR_TYPE MA(0x798, 0x774, 0x0) + +#define MMDC_MDCTL 0x000 +#define MMDC_MDPDC 0x004 +#define MMDC_MDOTC 0x008 +#define MMDC_MDCFG0 0x00c +#define MMDC_MDCFG1 0x010 +#define MMDC_MDCFG2 0x014 +#define MMDC_MDMISC 0x018 +#define MMDC_MDSCR 0x01c +#define MMDC_MDREF 0x020 +#define MMDC_MDRWD 0x02c +#define MMDC_MDOR 0x030 +#define MMDC_MDASP 0x040 +#define MMDC_MAPSR 0x404 +#define MMDC_MPZQHWCTRL 0x800 +#define MMDC_MPWLDECTRL0 0x80c +#define MMDC_MPWLDECTRL1 0x810 +#define MMDC_MPODTCTRL 0x818 +#define MMDC_MPRDDQBY0DL 0x81c +#define MMDC_MPRDDQBY1DL 0x820 +#define MMDC_MPRDDQBY2DL 0x824 +#define MMDC_MPRDDQBY3DL 0x828 +#define MMDC_MPDGCTRL0 0x83c +#define MMDC_MPDGCTRL1 0x840 +#define MMDC_MPRDDLCTL 0x848 +#define MMDC_MPWRDLCTL 0x850 +#define MMDC_MPMUR0 0x8b8 + +#define CCM_CCGR0 (CCM_BASE + 0x068) +#define CCM_CCGR1 (CCM_BASE + 0x06c) +#define CCM_CCGR2 (CCM_BASE + 0x070) +#define CCM_CCGR3 (CCM_BASE + 0x074) +#define CCM_CCGR4 (CCM_BASE + 0x078) +#define CCM_CCGR5 (CCM_BASE + 0x07c) +#define CCM_CCGR6 (CCM_BASE + 0x080)
#define WRITE_ENTRY1(addr, q) DATA 4, addr, q #ifdef CONFIG_MX6Q -#define MA(mx6q, mx6dl_solo, mx6sololite) mx6q +#define MA(mx6q, mx6dl_solo, mx6sololite) (IOMUXC_BASE + mx6q) #define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, q) #define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, q) #define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, q) @@ -131,20 +108,20 @@
#define WRITE_ENTRY2(addr, q, dl) WRITE_ENTRY1(addr, dl) #ifdef CONFIG_MX6DL -#define MA(mx6q, mx6dl_solo, mx6sololite) mx6dl_solo +#define MA(mx6q, mx6dl_solo, mx6sololite) (IOMUXC_BASE + mx6dl_solo) #define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, dl) #define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, dl) #else
#define WRITE_ENTRY3(addr, q, dl, solo) WRITE_ENTRY1(addr, solo) #ifdef CONFIG_MX6S -#define MA(mx6q, mx6dl_solo, mx6sololite) mx6dl_solo +#define MA(mx6q, mx6dl_solo, mx6sololite) (IOMUXC_BASE + mx6dl_solo) #define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, solo) #else
#define WRITE_ENTRY4(addr, q, dl, solo, sl) WRITE_ENTRY1(addr, sl) #ifdef CONFIG_MX6SL -#define MA(mx6q, mx6dl_solo, mx6sololite) mx6sololite +#define MA(mx6q, mx6dl_solo, mx6sololite) (IOMUXC_BASE + mx6sololite) #else
#error "Please select cpu" diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index f45f93e..5de0f30 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -111,24 +111,24 @@ WRITE_ENTRY1(IOM_GRP_CTLDS, 0x00000030) WRITE_ENTRY1(IOM_GRP_DDR_TYPE, 0x000C0000)
/* Read data DQ Byte0-3 delay */ -WRITE_ENTRY1(MMDC_P0_MPRDDQBY0DL, 0x33333333) -WRITE_ENTRY1(MMDC_P0_MPRDDQBY1DL, 0x33333333) -WRITE_ENTRY1(MMDC_P0_MPRDDQBY2DL, 0x33333333) -WRITE_ENTRY1(MMDC_P0_MPRDDQBY3DL, 0x33333333) -WRITE_ENTRY1(MMDC_P1_MPRDDQBY0DL, 0x33333333) -WRITE_ENTRY1(MMDC_P1_MPRDDQBY1DL, 0x33333333) -WRITE_ENTRY1(MMDC_P1_MPRDDQBY2DL, 0x33333333) -WRITE_ENTRY1(MMDC_P1_MPRDDQBY3DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPRDDQBY3DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333)
/* * MDMISC, mirroring, interleaved (row/bank/col) */ -WRITE_ENTRY1(MMDC_P0_MDMISC, 0x00081740) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740)
/* * MDSCR, con_req */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008000)
/* * MDCFG0, @@ -139,7 +139,7 @@ WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008000) * tRFC=0x6a clocks, tXS=0x6e clocks, tXP=3 clocks, tXPDLL=10 clocks * tFAW=19 clocks, cas=6 cycles */ -WRITE_ENTRY2(MMDC_P0_MDCFG0, 0x555A7975, 0x696D5323) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDCFG0, 0x555A7975, 0x696D5323)
/* * MDCFG1, @@ -148,14 +148,14 @@ WRITE_ENTRY2(MMDC_P0_MDCFG0, 0x555A7975, 0x696D5323) * MX6DL/SOLO: * tRDC=6, tRP=6, tRC=20, tRAS=15, tRPA=tRP+1, tWR=7, tMRD=4, tCWL=5 */ -WRITE_ENTRY2(MMDC_P0_MDCFG1, 0xFF538E64, 0xB66E8C63) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDCFG1, 0xFF538E64, 0xB66E8C63)
/* * MDCFG2,tDLLK=512,tRTP=4,tWTR=4,tRRD=4 */ -WRITE_ENTRY1(MMDC_P0_MDCFG2, 0x01FF00DB) -WRITE_ENTRY1(MMDC_P0_MDRWD, 0x000026D2) -WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDCFG2, 0x01FF00DB) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDRWD, 0x000026D2) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDOR, 0x005B0E21)
/* * MMDC_MDOTC, @@ -164,7 +164,7 @@ WRITE_ENTRY1(MMDC_P0_MDOR, 0x005B0E21) * MX6DL/SOLO: * tAOFPD=1 cycles, tAONPD=1, tANPD=4, tAXPD=4, tODTLon=4, tODT_idle_off=4 */ -WRITE_ENTRY2(MMDC_P0_MDOTC, 0x09444040, 0x00333030) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDOTC, 0x09444040, 0x00333030)
/* * MDPDC - [17:16](2) => CKE pulse width = 3 cycles. @@ -173,7 +173,7 @@ WRITE_ENTRY2(MMDC_P0_MDOTC, 0x09444040, 0x00333030) * MX6Q: [2:0](6) => CKSRE = 6 cycles, [5:3](6) => CKSRX = 6 cycles * MX6DL/SOLO: [2:0](5) => CKSRE = 5 cycles, [5:3](5) => CKSRX = 5 cycles */ -WRITE_ENTRY2(MMDC_P0_MDPDC, 0x00025576, 0x0002556D) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDPDC, 0x00025576, 0x0002556D)
/* * MX6Q/DL - 64 bit wide ddr @@ -186,68 +186,68 @@ WRITE_ENTRY2(MMDC_P0_MDPDC, 0x00025576, 0x0002556D) * 1<<3 + 1<<4 - 1 = 8 + 0x10 -1 = 0x17 */ /* MDASP, CS0_END */ -WRITE_ENTRY3(MMDC_P0_MDASP, 0x00000027, 0x00000027, 0x00000017) +WRITE_ENTRY3(MMDC_P0 + MMDC_MDASP, 0x00000027, 0x00000027, 0x00000017) /* * MDCTL, CS0 enable, CS1 disabled, row=14, col=10, burst=8 * MX6Q/DL: width=64bit row+col+bank+width=14+10+3+3=30 = 1G * MX6SOLO: width=32bit row+col+bank+width=14+10+3+2=29 = 512M */ -WRITE_ENTRY3(MMDC_P0_MDCTL, 0x831A0000, 0x831A0000, 0x83190000) +WRITE_ENTRY3(MMDC_P0 + MMDC_MDCTL, 0x831A0000, 0x831A0000, 0x83190000)
/* * LOAD MR2: MDSCR, con_req, CS0, A10 set - RZQ/2 * MX6Q: A3 set(CAS Write=6) * MX6DL/SOLO: (CAS Write=5) */ -WRITE_ENTRY2(MMDC_P0_MDSCR, 0x04088032, 0x04008032) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x04088032, 0x04008032) /* LOAD MR3, CS0 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00008033) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00008033)
/* * LOAD MR1, CS0 * MX6Q: A6 set: Rtt=RZQ/2, A1 set: ODI=RZQ/7 * MX6DL/SOLO: A2 set: Rtt=RZQ/4, ODI=RZQ/6 */ -WRITE_ENTRY2(MMDC_P0_MDSCR, 0x00428031, 0x00048031) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x00428031, 0x00048031)
/* LOAD MR0, CS0 A8 set: DLL Reset * MX6Q: A6 set: CAS=8 A11 set: WR=8 * MX6DL/SOLO: A4 set: CAS=5, A9,A10 set: WR=7 */ -WRITE_ENTRY2(MMDC_P0_MDSCR, 0x09408030, 0x07208030) +WRITE_ENTRY2(MMDC_P0 + MMDC_MDSCR, 0x09408030, 0x07208030)
/* ZQ calibrate, CS0 */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x04008040) -WRITE_ENTRY1(MMDC_P0_MPZQHWCTRL, 0xA1390003) -WRITE_ENTRY1(MMDC_P1_MPZQHWCTRL, 0xA1390003) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x04008040) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPZQHWCTRL, 0xA1390003) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPZQHWCTRL, 0xA1390003)
/* MDREF, 32KHz refresh, 4 refeshes each */ -WRITE_ENTRY1(MMDC_P0_MDREF, 0x00005800) -WRITE_ENTRY1(MMDC_P0_MPODTCTRL, 0x00022227) -WRITE_ENTRY1(MMDC_P1_MPODTCTRL, 0x00022227) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDREF, 0x00005800) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPODTCTRL, 0x00022227) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPODTCTRL, 0x00022227)
/* MPDGCTRL0/1 DQS GATE*/ -WRITE_ENTRY2(MMDC_P0_MPDGCTRL0, 0x434B0350, 0x42350231) -WRITE_ENTRY2(MMDC_P0_MPDGCTRL1, 0x034C0359, 0x021A0218) -WRITE_ENTRY2(MMDC_P1_MPDGCTRL0, 0x434B0350, 0x42350231) -WRITE_ENTRY2(MMDC_P1_MPDGCTRL1, 0x03650348, 0x021A0218) -WRITE_ENTRY2(MMDC_P0_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) -WRITE_ENTRY2(MMDC_P1_MPRDDLCTL, 0x39393341, 0x4B4B4E49) -WRITE_ENTRY2(MMDC_P0_MPWRDLCTL, 0x35373933, 0x3F3F3035) -WRITE_ENTRY2(MMDC_P1_MPWRDLCTL, 0x48254A36, 0x3F3F3035) -WRITE_ENTRY2(MMDC_P0_MPWLDECTRL0, 0x001F001F, 0x0040003C) -WRITE_ENTRY2(MMDC_P0_MPWLDECTRL1, 0x001F001F, 0x0032003E) -WRITE_ENTRY2(MMDC_P1_MPWLDECTRL0, 0x00440044, 0x0040003C) -WRITE_ENTRY2(MMDC_P1_MPWLDECTRL1, 0x00440044, 0x0032003E) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPDGCTRL1, 0x034C0359, 0x021A0218) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPDGCTRL0, 0x434B0350, 0x42350231) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPDGCTRL1, 0x03650348, 0x021A0218) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPRDDLCTL, 0x4436383B, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPRDDLCTL, 0x39393341, 0x4B4B4E49) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWRDLCTL, 0x35373933, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWRDLCTL, 0x48254A36, 0x3F3F3035) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWLDECTRL0, 0x001F001F, 0x0040003C) +WRITE_ENTRY2(MMDC_P0 + MMDC_MPWLDECTRL1, 0x001F001F, 0x0032003E) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWLDECTRL0, 0x00440044, 0x0040003C) +WRITE_ENTRY2(MMDC_P1 + MMDC_MPWLDECTRL1, 0x00440044, 0x0032003E)
/* MPMUR0 - Complete calibration by forced measurement */ -WRITE_ENTRY1(MMDC_P0_MPMUR0, 0x00000800) -WRITE_ENTRY1(MMDC_P1_MPMUR0, 0x00000800) +WRITE_ENTRY1(MMDC_P0 + MMDC_MPMUR0, 0x00000800) +WRITE_ENTRY1(MMDC_P1 + MMDC_MPMUR0, 0x00000800)
/* MDSCR, enable ddr */ -WRITE_ENTRY1(MMDC_P0_MDSCR, 0x00000000) +WRITE_ENTRY1(MMDC_P0 + MMDC_MDSCR, 0x00000000) /* MAPSR, 1024 cycles idle before self-refresh */ -WRITE_ENTRY1(MMDC_P0_MAPSR, 0x00011006) +WRITE_ENTRY1(MMDC_P0 + MMDC_MAPSR, 0x00011006)
/* set the default clock gate to save power */ WRITE_ENTRY1(CCM_CCGR0, 0x00C03F3F)
Hi Troy,
On Wed, 3 Oct 2012 18:47:02 -0700, Troy Kisky troy.kisky@boundarydevices.com wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
If the boards are known as 'mx6solo' and 'mx6duallite', they should be named so rather than called yet another nickname.
The 1st 16 patches perform cleanup on imximage
The final 2 patches add support for expressions to mkimage. If found not to be worth the effort, they can be omitted.
Troy Kisky (32): imximage: check dcd_len as entries added imximage: remove redundant setting of app_dest_ptr imximage: move flash_offset check to common location imximage: fix size of image to load. imximage: delay setting of image size imximage: change parameters to set_imx_hdr imximage: make set_imx_hdr_v1/v2 easier to read imximage: make header variable length imximage: remove static imximage_version imximage: prepare to move static variables to struct data_src imximage: change parameters for set_dcd_val/set_imx_hdr imximage: move set_imx_hdr to struct data_src imximage: move set_dcd_val to struct data_src imximage: enable word writes for version2 header tools: add parse_helper file imximage: use parse_helper functions imximage.cfg: run files through C preprocessor mx6q_4x_mt41j128.cfg: use symbols instead of hardcoded constants mx6q_4x_mt41j128.cfg: add comments mx6q_4x_mt41j128.cfg: use ddr3 mode for reset mx6q_4x_mt41j128.cfg: skip initiailizing non-existent memory mx6q_4x_mt41j128.cfg: force ZQ calibration mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite mx6: use CONFIG_MX6 instead of CONFIG_MX6Q imx-common: cpu: add imx_ddr_size arch-mx6: add mx6dl_pins.h mx6qsabrelite: add support for mx6 solo/duallite mx6q_4x_mt41j128.cfg: add mx6 solo/duallite support Add boards for sabrelite variants mx6s(solo) and mx6dl(duallite) mx6qsabrelite: change CONFIG_SYS_PROMPT parse_helper: add expression evaluation imx-mkimage.h: use base + offset syntax
Makefile | 3 +- arch/arm/cpu/armv7/mx6/soc.c | 32 +- arch/arm/imx-common/cpu.c | 66 +++- arch/arm/include/asm/arch-mx5/sys_proto.h | 10 +- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 133 +++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 2 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++ arch/arm/include/asm/arch-mx6/sys_proto.h | 10 +- board/esg/ima3-mx53/imximage.cfg | 120 +++--- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 425 ++++++++++++--------- board/freescale/mx25pdk/imximage.cfg | 77 ++-- board/freescale/mx51evk/imximage.cfg | 114 +++--- board/freescale/mx53ard/imximage_dd3.cfg | 83 +++-- board/freescale/mx53evk/imximage.cfg | 86 ++--- board/freescale/mx53loco/imximage.cfg | 83 +++-- board/freescale/mx53smd/imximage.cfg | 83 +++-- board/freescale/mx6qarm2/imximage.cfg | 88 ++--- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 +++--------- board/freescale/mx6qsabrelite/pads.h | 172 +++++++++ board/genesi/mx51_efikamx/imximage_mx.cfg | 132 +++---- board/genesi/mx51_efikamx/imximage_sb.cfg | 126 ++++--- board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++------- boards.cfg | 4 +- drivers/gpio/mxc_gpio.c | 6 +- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 4 +- tools/Makefile | 2 + tools/imximage.c | 487 ++++++++++--------------- tools/imximage.h | 39 +- tools/parse_helper.c | 325 +++++++++++++++++ tools/parse_helper.h | 28 ++ 33 files changed, 2106 insertions(+), 1286 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h create mode 100644 board/freescale/mx6qsabrelite/pads.h create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
Amicalement,
On 10/04/2012 03:18 AM, Albert ARIBAUD wrote:
Hi Troy,
On Wed, 3 Oct 2012 18:47:02 -0700, Troy Kisky troy.kisky@boundarydevices.com wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
If the boards are known as 'mx6solo' and 'mx6duallite', they should be named so rather than called yet another nickname.
Hi Albert,
I'm not sure I understand your comment.
mx6solo and mx6duallite are the CPU names, not the board names.
mx6dlsabrelite is a version of the SABRE Lite board containing the mx6duallite CPU instead of the mx6quad.
We'll also be offering Nitrogen6X in mx6solo and mx6duallite variants.
Regards,
Eric
Hi Eric,
On Thu, 04 Oct 2012 07:36:45 -0700, Eric Nelson eric.nelson@boundarydevices.com wrote:
On 10/04/2012 03:18 AM, Albert ARIBAUD wrote:
Hi Troy,
On Wed, 3 Oct 2012 18:47:02 -0700, Troy Kisky troy.kisky@boundarydevices.com wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
If the boards are known as 'mx6solo' and 'mx6duallite', they should be named so rather than called yet another nickname.
Hi Albert,
I'm not sure I understand your comment.
mx6solo and mx6duallite are the CPU names, not the board names.
That's where the misunderstanding crept in: I thought these were board names, not CPU names.
mx6dlsabrelite is a version of the SABRE Lite board containing the mx6duallite CPU instead of the mx6quad.
We'll also be offering Nitrogen6X in mx6solo and mx6duallite variants.
Understood now -- and disregard my initial comment.
Regards,
Eric
Amicalement,
Hi Troy,
On 10/03/2012 06:47 PM, Troy Kisky wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
The 1st 16 patches perform cleanup on imximage
The final 2 patches add support for expressions to mkimage. If found not to be worth the effort, they can be omitted.
Troy Kisky (32): imximage: check dcd_len as entries added imximage: remove redundant setting of app_dest_ptr imximage: move flash_offset check to common location imximage: fix size of image to load. imximage: delay setting of image size imximage: change parameters to set_imx_hdr imximage: make set_imx_hdr_v1/v2 easier to read imximage: make header variable length imximage: remove static imximage_version imximage: prepare to move static variables to struct data_src imximage: change parameters for set_dcd_val/set_imx_hdr imximage: move set_imx_hdr to struct data_src imximage: move set_dcd_val to struct data_src imximage: enable word writes for version2 header tools: add parse_helper file imximage: use parse_helper functions imximage.cfg: run files through C preprocessor mx6q_4x_mt41j128.cfg: use symbols instead of hardcoded constants mx6q_4x_mt41j128.cfg: add comments mx6q_4x_mt41j128.cfg: use ddr3 mode for reset mx6q_4x_mt41j128.cfg: skip initiailizing non-existent memory mx6q_4x_mt41j128.cfg: force ZQ calibration mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite mx6: use CONFIG_MX6 instead of CONFIG_MX6Q imx-common: cpu: add imx_ddr_size arch-mx6: add mx6dl_pins.h mx6qsabrelite: add support for mx6 solo/duallite mx6q_4x_mt41j128.cfg: add mx6 solo/duallite support Add boards for sabrelite variants mx6s(solo) and mx6dl(duallite) mx6qsabrelite: change CONFIG_SYS_PROMPT parse_helper: add expression evaluation imx-mkimage.h: use base + offset syntax
Makefile | 3 +- arch/arm/cpu/armv7/mx6/soc.c | 32 +- arch/arm/imx-common/cpu.c | 66 +++- arch/arm/include/asm/arch-mx5/sys_proto.h | 10 +- arch/arm/include/asm/arch-mx6/imx-mkimage.h | 133 +++++++ arch/arm/include/asm/arch-mx6/imx-regs.h | 2 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 118 ++++++ arch/arm/include/asm/arch-mx6/sys_proto.h | 10 +- board/esg/ima3-mx53/imximage.cfg | 120 +++--- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 425 ++++++++++++--------- board/freescale/mx25pdk/imximage.cfg | 77 ++-- board/freescale/mx51evk/imximage.cfg | 114 +++--- board/freescale/mx53ard/imximage_dd3.cfg | 83 +++-- board/freescale/mx53evk/imximage.cfg | 86 ++--- board/freescale/mx53loco/imximage.cfg | 83 +++-- board/freescale/mx53smd/imximage.cfg | 83 +++-- board/freescale/mx6qarm2/imximage.cfg | 88 ++--- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235 +++--------- board/freescale/mx6qsabrelite/pads.h | 172 +++++++++ board/genesi/mx51_efikamx/imximage_mx.cfg | 132 +++---- board/genesi/mx51_efikamx/imximage_sb.cfg | 126 ++++--- board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++------- boards.cfg | 4 +- drivers/gpio/mxc_gpio.c | 6 +- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 4 +- tools/Makefile | 2 + tools/imximage.c | 487 ++++++++++--------------- tools/imximage.h | 39 +- tools/parse_helper.c | 325 +++++++++++++++++ tools/parse_helper.h | 28 ++ 33 files changed, 2106 insertions(+), 1286 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/imx-mkimage.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h create mode 100644 board/freescale/mx6qsabrelite/pads.h create mode 100644 tools/parse_helper.c create mode 100644 tools/parse_helper.h
There's clearly a lot going on in this patch set. Does it make sense to split this into parts that can be reviewed and checked separately?
It seems that there are - bug fixes to imximage - enhancements to imximage - enhancements to build for imximage.cfg (CPP) - core i.MX6 changes (cpu types, etc) - rework of imximage.cfg files to use CPP ...
And there's that simple one changing the prompt we can probably get a quick ack/nak on ;)
On 04/10/2012 03:47, Troy Kisky wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
The 1st 16 patches perform cleanup on imximage
Hi Troy,
I have some difficulties to understand which are the dependencies of this patchset. IMHO there are very different topics here, and some patches can be applied independently from the other one. imximage patches. For example, why "add mx6dl_pins" belong to imximage patchset ? It is surely easier to split for each topic, so that each patcheset can be applied independently if on a different topic there is still an open issue.
I see at least: - imximage fixes: they are really fix and can be applied soon. - imximage new features - mx6 patches
It is surely easier if you split your changes in separate patchset, as they covered different topics.
Best regards, Stefano Babic
On 10/8/2012 6:15 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
This series goal is to add support for mx6solo and mx6duallite variants of mx6qsabrelite board. The new targets are called mx6ssabrelite and mx6dlsabrelite.
The 1st 16 patches perform cleanup on imximage
Hi Troy,
I have some difficulties to understand which are the dependencies of this patchset. IMHO there are very different topics here, and some patches can be applied independently from the other one. imximage patches. For example, why "add mx6dl_pins" belong to imximage patchset ? It is surely easier to split for each topic, so that each patcheset can be applied independently if on a different topic there is still an open issue.
I see at least:
- imximage fixes: they are really fix and can be applied soon.
- imximage new features
- mx6 patches
It is surely easier if you split your changes in separate patchset, as they covered different topics.
Best regards, Stefano Babic
Yes, Eric made the same comment. I'll split the next version up.
Thanks Troy
participants (12)
-
Albert ARIBAUD -
Dirk Behme -
Eric Nelson -
Fabio Estevam -
Liu Hui-R64343 -
Otavio Salvador -
stefano babic -
Stefano Babic
-
Tom Rini -
Troy Kisky -
Vikram Narayanan -
Wolfgang Denk