[U-Boot] [PATCH v2 0/7] Determine Boot mode at run time
There are two phases in Secure Boot 1. ISBC: In BootROM, validate the BootLoader (U-Boot). 2. ESBC: In U-Boot, continuing the Chain of Trust by validating and booting LINUX.
For ESBC phase, there is no difference in SoC's based on ARM or PowerPC cores.
But the exit conditions after ISBC phase i.e. entry conditions for U-Boot are different for ARM and PowerPC. PowerPC: ======== If Secure Boot is executed, a separate U-Boot target is required which must be compiled with a diffrent Text Base as compared to Non-Secure Boot. There are some LAW and TLB settings which are required specifically for Secure Boot scenario.
ARM: ==== ARM based SoC's have a fixed memory map and exit conditions from BootROM are same irrespective of boot mode (Secure or Non-Secure).
This patchset is aimed at removing the requirement for a separate Secure Boot target for ARM based SoC's.
Another Security Requirement for running CHAIN_OF_TRUST is that U-Boot environemnt must not be picked from flash/external memory. This cannot be done based on bootmode at run time in current U-Boot architecture. Once this dependency is resolved, no separate SECURE_BOOT target will be required for ARM based SoC's.
Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is defining CONFIG_ENV_IS_NOWHERE
The patches have been tested on LS1043, LS1021, P3041 and T1024.
The patch set is dependent on following: http://patchwork.ozlabs.org/patch/553826/
Aneesh Bansal (7): include/configs: make secure boot header file include uniform include/configs: move definition of CONFIG_CMD_BLOB SECURE_BOOT: split the secure boot functionality in two parts create function to determine boot mode enable chain of trust for ARM platforms enable chain of trust for PowerPC platforms SECURE_BOOT: change error handler for esbc_validate
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 + .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 + arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 + arch/arm/include/asm/fsl_secure_boot.h | 20 +++- arch/powerpc/cpu/mpc85xx/cpu_init.c | 12 +++ arch/powerpc/include/asm/fsl_secure_boot.h | 47 ++++++--- arch/powerpc/include/asm/immap_85xx.h | 3 + board/freescale/common/Makefile | 1 + board/freescale/common/cmd_esbc_validate.c | 7 +- board/freescale/common/fsl_chain_of_trust.c | 70 +++++++++++++ board/freescale/common/fsl_validate.c | 7 ++ board/freescale/ls1021aqds/ls1021aqds.c | 4 + board/freescale/ls1021atwr/ls1021atwr.c | 4 + include/config_fsl_chain_trust.h | 101 ++++++++++++++++++ include/config_fsl_secboot.h | 116 --------------------- include/configs/B4860QDS.h | 4 - include/configs/BSC9132QDS.h | 4 - include/configs/P1010RDB.h | 4 - include/configs/P2041RDB.h | 4 - include/configs/T102xQDS.h | 10 +- include/configs/T102xRDB.h | 10 +- include/configs/T1040QDS.h | 3 - include/configs/T104xRDB.h | 3 - include/configs/T208xQDS.h | 4 - include/configs/T208xRDB.h | 4 - include/configs/T4240QDS.h | 4 - include/configs/T4240RDB.h | 9 -- include/configs/corenet_ds.h | 4 - include/configs/ls1021aqds.h | 5 +- include/configs/ls1021atwr.h | 5 +- include/configs/ls1043a_common.h | 8 ++ include/configs/ls1043aqds.h | 2 + include/configs/ls1043ardb.h | 8 -- include/fsl_validate.h | 2 + 34 files changed, 295 insertions(+), 203 deletions(-) create mode 100644 board/freescale/common/fsl_chain_of_trust.c create mode 100644 include/config_fsl_chain_trust.h delete mode 100644 include/config_fsl_secboot.h
The file fsl_secure_boot.h must be included in config file for Secure Boot. This is not required to be protected by any macro. CONFIG_FSL_CAAM must be defined and CONFIG_CMD_HASH should be turned on. The above was missing in some config files and all files have been made uniform in this respect.
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: None (Changed the Sign-Off with New E-Mail ID)
arch/arm/include/asm/fsl_secure_boot.h | 5 +++++ include/configs/C29XPCIE.h | 4 ++++ include/configs/T102xQDS.h | 12 +++++++++++- include/configs/T102xRDB.h | 12 +++++++++++- include/configs/T1040QDS.h | 3 ++- include/configs/T104xRDB.h | 3 ++- include/configs/T208xQDS.h | 3 ++- include/configs/T208xRDB.h | 3 ++- include/configs/ls1021aqds.h | 5 ++++- include/configs/ls1021atwr.h | 5 ++++- include/configs/ls1043a_common.h | 8 ++++++++ include/configs/ls1043aqds.h | 2 ++ include/configs/ls1043ardb.h | 8 -------- 13 files changed, 57 insertions(+), 16 deletions(-)
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 806302b..b29e71c 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -34,6 +34,11 @@ #define CONFIG_FSL_ISBC_KEY_EXT #endif
+#ifdef CONFIG_LS1043A +/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ +#define CONFIG_ESBC_ADDR_64BIT +#endif + #ifndef CONFIG_FIT_SIGNATURE
#define CONFIG_EXTRA_ENV \ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 16920c6..890dcbb 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -567,4 +567,8 @@
#include <asm/fsl_secure_boot.h>
+#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CMD_BLOB +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 951cbc4..fb41a7d 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -39,6 +39,8 @@ #define CONFIG_BOARD_EARLY_INIT_F #endif
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ + #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_rcw.cfg @@ -936,8 +938,16 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT +/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL +#endif + #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CMD_BLOB #endif
#endif /* __T1024QDS_H */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 4a0f5b2..113df37 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -33,6 +33,8 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_ENV_OVERWRITE
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ + /* support deep sleep */ #ifdef CONFIG_PPC_T1024 #define CONFIG_DEEP_SLEEP @@ -948,8 +950,16 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT +/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL +#endif + #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CMD_BLOB #endif
#endif /* __T1024RDB_H */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 9e151da..5fd93a1 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -835,8 +835,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB #endif
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index da65f56..eec2971 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -938,8 +938,9 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB #endif
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a0cecc6..019878a 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -933,8 +933,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB #undef CONFIG_CMD_USB #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 312b0eb..3665b7d 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -889,8 +889,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT #include <asm/fsl_secure_boot.h> + +#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB #undef CONFIG_CMD_USB #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 2e8dbc7..0f1ad21 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -660,12 +660,15 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MISC_INIT_R
/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM #define CONFIG_CMD_HASH #define CONFIG_SHA_HW_ACCEL +#endif + +#include <asm/fsl_secure_boot.h>
#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB -#include <asm/fsl_secure_boot.h> #endif
#endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index c12ba3a..d368cf2 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -516,12 +516,15 @@ #define CONFIG_MISC_INIT_R
/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM #define CONFIG_CMD_HASH #define CONFIG_SHA_HW_ACCEL +#endif + +#include <asm/fsl_secure_boot.h>
#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB -#include <asm/fsl_secure_boot.h> #endif
#endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 677d281..e80ac27 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -197,6 +197,8 @@ #define CONFIG_DOS_PARTITION #endif
+#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ + /* FMan ucode */ #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN @@ -252,4 +254,10 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
+/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL +#endif + #endif /* __LS1043A_COMMON_H */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..d5acfaa 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -401,4 +401,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_MII #define CONFIG_CMDLINE_TAG
+#include <asm/fsl_secure_boot.h> + #endif /* __LS1043AQDS_H__ */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 585114f..dbdcc51 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -291,14 +291,6 @@ #define CONFIG_CMD_EXT2 #endif
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_HASH -#define CONFIG_SHA_HW_ACCEL -#define CONFIG_CMD_BLOB -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ -#define CONFIG_ESBC_ADDR_64BIT -#endif - #include <asm/fsl_secure_boot.h>
#endif /* __LS1043ARDB_H__ */
CONFIG_CMD_BLOB must be defined in case of Secure Boot. It was earlier defined in all config files. The definition has been moved to a common file which is included by all configs.
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: None (Changed the Sign-Off with New E-Mail ID)
arch/arm/include/asm/fsl_secure_boot.h | 1 + arch/powerpc/include/asm/fsl_secure_boot.h | 1 + include/configs/B4860QDS.h | 4 ---- include/configs/BSC9132QDS.h | 4 ---- include/configs/C29XPCIE.h | 4 ---- include/configs/P1010RDB.h | 4 ---- include/configs/P2041RDB.h | 4 ---- include/configs/T102xQDS.h | 4 ---- include/configs/T102xRDB.h | 4 ---- include/configs/T1040QDS.h | 4 ---- include/configs/T104xRDB.h | 4 ---- include/configs/T208xQDS.h | 5 ----- include/configs/T208xRDB.h | 5 ----- include/configs/T4240QDS.h | 4 ---- include/configs/T4240RDB.h | 9 --------- include/configs/corenet_ds.h | 4 ---- include/configs/ls1021aqds.h | 4 ---- include/configs/ls1021atwr.h | 4 ---- 18 files changed, 2 insertions(+), 71 deletions(-)
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index b29e71c..8491a72 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -9,6 +9,7 @@
#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_ESBC_VALIDATE +#define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON #define CONFIG_SHA_PROG_HW_ACCEL #define CONFIG_RSA diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 87415b1..7d217a6 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -10,6 +10,7 @@
#ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_ESBC_VALIDATE +#define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON #define CONFIG_SHA_PROG_HW_ACCEL #define CONFIG_DM diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 9fb5cee..bcbae50 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -924,8 +924,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index d0e5a25..89907dc 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -722,8 +722,4 @@ combinations. this should be removed later
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 890dcbb..16920c6 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -567,8 +567,4 @@
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f9776c0..3c0faca 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -952,8 +952,4 @@ extern unsigned long get_sdram_size(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b2e51b5..f250e7f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -756,8 +756,4 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index fb41a7d..e5df784 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -946,8 +946,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __T1024QDS_H */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 113df37..3cda3b1 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -958,8 +958,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __T1024RDB_H */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 5fd93a1..2e7892f 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -837,8 +837,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index eec2971..5fc3497 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -940,8 +940,4 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 019878a..a56208c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -935,9 +935,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#undef CONFIG_CMD_USB -#endif - #endif /* __T208xQDS_H */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 3665b7d..b5290a1 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -891,9 +891,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#undef CONFIG_CMD_USB -#endif - #endif /* __T2080RDB_H */ diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 1b94f64..91857d6 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -644,8 +644,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 73279c8..eb4d52c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -837,13 +837,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -/* Secure Boot target was not getting build for T4240 because of - * increased binary size. So the size is being reduced by removing USB - * which is anyways not used in Secure Environment. - */ -#undef CONFIG_CMD_USB -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index aef37dd..a099eee 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -765,8 +765,4 @@
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 0f1ad21..7c54af4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -667,8 +667,4 @@ unsigned long get_board_ddr_clk(void);
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d368cf2..fe0e9a8 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -523,8 +523,4 @@
#include <asm/fsl_secure_boot.h>
-#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB -#endif - #endif
There are two phases in Secure Boot 1. ISBC: In BootROM, validate the BootLoader (U-Boot). 2. ESBC: In U-Boot, continuing the Chain of Trust by validating and booting LINUX.
For ESBC phase, there is no difference in SoC's based on ARM or PowerPC cores.
But the exit conditions after ISBC phase i.e. entry conditions for U-Boot are different for ARM and PowerPC. PowerPC: ======== If Secure Boot is executed, a separate U-Boot target is required which must be compiled with a diffrent Text Base as compared to Non-Secure Boot. There are some LAW and TLB settings which are required specifically for Secure Boot scenario.
ARM: ==== ARM based SoC's have a fixed memory map and exit conditions from BootROM are same irrespective of boot mode (Secure or Non-Secure).
Thus the current Secure Boot functionlity has been split into two parts:
CONFIG_CHAIN_OF_TRUST ======================== This will have the following functionality as part of U-Boot: 1. Enable commands like esbc_validate, esbc_halt 2. Change the environment settings based on bootmode (determined at run time): - If bootmode is non-secure, no change - If bootmode is secure, set the following: - bootdelay = 0 (Don't give boot prompt) - bootcmd = Validate and execute the bootscript.
CONFIG_SECURE_BOOT ===================== This is defined only for creating a different compile time target for secure boot.
Traditionally, both these functionalities were defined under CONFIG_SECURE_BOOT This patch is aimed at removing the requirement for a separate Secure Boot target for ARM based SoC's. CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be determine at run time.
Another Security Requirement for running CHAIN_OF_TRUST is that U-Boot environemnt must not be picked from flash/external memory. This cannot be done based on bootmode at run time in current U-Boot architecture. Once this dependency is resolved, no separate SECURE_BOOT target will be required for ARM based SoC's.
Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is defining CONFIG_ENV_IS_NOWHERE
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: CONFIG_ENV_IS_NOWHERE is defined for Secure Boot
arch/arm/include/asm/fsl_secure_boot.h | 16 ++-- arch/powerpc/include/asm/fsl_secure_boot.h | 41 +++++----- include/config_fsl_chain_trust.h | 101 +++++++++++++++++++++++++ include/config_fsl_secboot.h | 116 ----------------------------- 4 files changed, 135 insertions(+), 139 deletions(-) create mode 100644 include/config_fsl_chain_trust.h delete mode 100644 include/config_fsl_secboot.h
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 8491a72..0da0599 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -8,6 +8,14 @@ #define __FSL_SECURE_BOOT_H
#ifdef CONFIG_SECURE_BOOT + +#ifndef CONFIG_FIT_SIGNATURE +#define CONFIG_CHAIN_OF_TRUST +#endif + +#endif + +#ifdef CONFIG_CHAIN_OF_TRUST #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON @@ -40,8 +48,6 @@ #define CONFIG_ESBC_ADDR_64BIT #endif
-#ifndef CONFIG_FIT_SIGNATURE - #define CONFIG_EXTRA_ENV \ "setenv fdt_high 0xcfffffff;" \ "setenv initrd_high 0xcfffffff;" \ @@ -50,8 +56,6 @@ /* The address needs to be modified according to NOR memory map */ #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x600a0000
-#include <config_fsl_secboot.h> -#endif -#endif - +#include <config_fsl_chain_trust.h> +#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 7d217a6..41058d1 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -9,19 +9,11 @@ #include <asm/config_mpc85xx.h>
#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_ESBC_VALIDATE -#define CONFIG_CMD_BLOB -#define CONFIG_FSL_SEC_MON -#define CONFIG_SHA_PROG_HW_ACCEL -#define CONFIG_DM -#define CONFIG_RSA -#define CONFIG_RSA_FREESCALE_EXP -#ifndef CONFIG_FSL_CAAM -#define CONFIG_FSL_CAAM -#endif + +#ifndef CONFIG_FIT_SIGNATURE +#define CONFIG_CHAIN_OF_TRUST #endif
-#ifdef CONFIG_SECURE_BOOT #if defined(CONFIG_FSL_CORENET) #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 #elif defined(CONFIG_BSC9132QDS) @@ -76,8 +68,25 @@ */ #define CONFIG_FSL_ISBC_KEY_EXT #endif +#endif /* #ifdef CONFIG_SECURE_BOOT */ + +#ifdef CONFIG_CHAIN_OF_TRUST + +#define CONFIG_CMD_ESBC_VALIDATE +#define CONFIG_CMD_BLOB +#define CONFIG_FSL_SEC_MON +#define CONFIG_SHA_PROG_HW_ACCEL +#define CONFIG_RSA +#define CONFIG_RSA_FREESCALE_EXP + +#ifndef CONFIG_DM +#define CONFIG_DM +#endif + +#ifndef CONFIG_FSL_CAAM +#define CONFIG_FSL_CAAM +#endif
-#ifndef CONFIG_FIT_SIGNATURE /* If Boot Script is not on NOR and is required to be copied on RAM */ #ifdef CONFIG_BOOTSCRIPT_COPY_RAM #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 @@ -105,10 +114,8 @@ #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 #endif
-#endif - -#include <config_fsl_secboot.h> -#endif +#endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */
-#endif +#include <config_fsl_chain_trust.h> +#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h new file mode 100644 index 0000000..45dda56 --- /dev/null +++ b/include/config_fsl_chain_trust.h @@ -0,0 +1,101 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_FSL_CHAIN_TRUST_H +#define __CONFIG_FSL_CHAIN_TRUST_H + +/* For secure boot, since ENVIRONMENT in flash/external memories is + * not verified, undef CONFIG_ENV_xxx and set default env + * (CONFIG_ENV_IS_NOWHERE) + */ +#ifdef CONFIG_SECURE_BOOT + +#undef CONFIG_ENV_IS_IN_EEPROM +#undef CONFIG_ENV_IS_IN_NAND +#undef CONFIG_ENV_IS_IN_MMC +#undef CONFIG_ENV_IS_IN_SPI_FLASH +#undef CONFIG_ENV_IS_IN_FLASH + +#define CONFIG_ENV_IS_NOWHERE + +#endif + +#ifdef CONFIG_CHAIN_OF_TRUST + +#ifndef CONFIG_EXTRA_ENV +#define CONFIG_EXTRA_ENV "" +#endif + +/* + * Control should not reach back to uboot after validation of images + * for secure boot flow and therefore bootscript should have + * the bootm command. If control reaches back to uboot anyhow + * after validating images, core should just spin. + */ + +/* + * Define the key hash for boot script here if public/private key pair used to + * sign bootscript are different from the SRK hash put in the fuse + * Example of defining KEY_HASH is + * #define CONFIG_BOOTSCRIPT_KEY_HASH \ + * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" + */ + +#ifdef CONFIG_BOOTSCRIPT_KEY_HASH +#define CONFIG_SECBOOT \ + "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ + "setenv bootargs 'root=/dev/ram rw console=ttyS0,115200 " \ + "ramdisk_size=600000';" \ + CONFIG_EXTRA_ENV \ + "esbc_validate $bs_hdraddr " \ + __stringify(CONFIG_BOOTSCRIPT_KEY_HASH)";" \ + "source $img_addr;" \ + "esbc_halt\0" +#else +#define CONFIG_SECBOOT \ + "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ + "setenv bootargs 'root=/dev/ram rw console=ttyS0,115200 " \ + "ramdisk_size=600000';" \ + CONFIG_EXTRA_ENV \ + "esbc_validate $bs_hdraddr;" \ + "source $img_addr;" \ + "esbc_halt\0" +#endif + +/* For secure boot flow, default environment used will be used */ +#if defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_BOOTSCRIPT_COPY_RAM +#define CONFIG_BS_COPY_ENV \ + "setenv bs_hdr_ram " __stringify(CONFIG_BS_HDR_ADDR_RAM)";" \ + "setenv bs_hdr_flash " __stringify(CONFIG_BS_HDR_ADDR_FLASH)";" \ + "setenv bs_hdr_size " __stringify(CONFIG_BS_HDR_SIZE)";" \ + "setenv bs_ram " __stringify(CONFIG_BS_ADDR_RAM)";" \ + "setenv bs_flash " __stringify(CONFIG_BS_ADDR_FLASH)";" \ + "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" + +#if defined(CONFIG_RAMBOOT_NAND) +#define CONFIG_BS_COPY_CMD \ + "nand read $bs_hdr_ram $bs_hdr_flash $bs_hdr_size ;" \ + "nand read $bs_ram $bs_flash $bs_size ;" +#endif /* CONFIG_RAMBOOT_NAND */ +#endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ + +#endif + +#ifndef CONFIG_BS_COPY_ENV +#define CONFIG_BS_COPY_ENV +#endif + +#ifndef CONFIG_BS_COPY_CMD +#define CONFIG_BS_COPY_CMD +#endif + +#define CONFIG_CHAIN_BOOT_CMD CONFIG_BS_COPY_ENV \ + CONFIG_BS_COPY_CMD \ + CONFIG_SECBOOT + +#endif +#endif diff --git a/include/config_fsl_secboot.h b/include/config_fsl_secboot.h deleted file mode 100644 index fc6788a..0000000 --- a/include/config_fsl_secboot.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright 2015 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_FSL_SECBOOT_H -#define __CONFIG_FSL_SECBOOT_H - -#ifdef CONFIG_SECURE_BOOT - -#ifndef CONFIG_CMD_ESBC_VALIDATE -#define CONFIG_CMD_ESBC_VALIDATE -#endif - -#ifndef CONFIG_EXTRA_ENV -#define CONFIG_EXTRA_ENV "" -#endif - -/* - * Control should not reach back to uboot after validation of images - * for secure boot flow and therefore bootscript should have - * the bootm command. If control reaches back to uboot anyhow - * after validating images, core should just spin. - */ - -/* - * Define the key hash for boot script here if public/private key pair used to - * sign bootscript are different from the SRK hash put in the fuse - * Example of defining KEY_HASH is - * #define CONFIG_BOOTSCRIPT_KEY_HASH \ - * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" - */ - -#ifdef CONFIG_BOOTSCRIPT_KEY_HASH -#define CONFIG_SECBOOT \ - "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - "setenv bootargs 'root=/dev/ram rw console=ttyS0,115200 " \ - "ramdisk_size=600000';" \ - CONFIG_EXTRA_ENV \ - "esbc_validate $bs_hdraddr " \ - __stringify(CONFIG_BOOTSCRIPT_KEY_HASH)";" \ - "source $img_addr;" \ - "esbc_halt\0" -#else -#define CONFIG_SECBOOT \ - "setenv bs_hdraddr " __stringify(CONFIG_BOOTSCRIPT_HDR_ADDR)";" \ - "setenv bootargs 'root=/dev/ram rw console=ttyS0,115200 " \ - "ramdisk_size=600000';" \ - CONFIG_EXTRA_ENV \ - "esbc_validate $bs_hdraddr;" \ - "source $img_addr;" \ - "esbc_halt\0" -#endif - -/* For secure boot flow, default environment used will be used */ -#if defined(CONFIG_SYS_RAMBOOT) -#ifdef CONFIG_BOOTSCRIPT_COPY_RAM -#define CONFIG_BS_COPY_ENV \ - "setenv bs_hdr_ram " __stringify(CONFIG_BS_HDR_ADDR_RAM)";" \ - "setenv bs_hdr_flash " __stringify(CONFIG_BS_HDR_ADDR_FLASH)";" \ - "setenv bs_hdr_size " __stringify(CONFIG_BS_HDR_SIZE)";" \ - "setenv bs_ram " __stringify(CONFIG_BS_ADDR_RAM)";" \ - "setenv bs_flash " __stringify(CONFIG_BS_ADDR_FLASH)";" \ - "setenv bs_size " __stringify(CONFIG_BS_SIZE)";" - -#if defined(CONFIG_RAMBOOT_NAND) -#define CONFIG_BS_COPY_CMD \ - "nand read $bs_hdr_ram $bs_hdr_flash $bs_hdr_size ;" \ - "nand read $bs_ram $bs_flash $bs_size ;" -#endif /* CONFIG_RAMBOOT_NAND */ -#endif /* CONFIG_BOOTSCRIPT_COPY_RAM */ - -#if defined(CONFIG_RAMBOOT_SPIFLASH) -#undef CONFIG_ENV_IS_IN_SPI_FLASH -#elif defined(CONFIG_RAMBOOT_NAND) -#undef CONFIG_ENV_IS_IN_NAND -#elif defined(CONFIG_RAMBOOT_SDCARD) -#undef CONFIG_ENV_IS_IN_MMC -#endif -#else /*CONFIG_SYS_RAMBOOT*/ -#undef CONFIG_ENV_IS_IN_FLASH -#endif - -#define CONFIG_ENV_IS_NOWHERE - -#ifndef CONFIG_BS_COPY_ENV -#define CONFIG_BS_COPY_ENV -#endif - -#ifndef CONFIG_BS_COPY_CMD -#define CONFIG_BS_COPY_CMD -#endif - -#define CONFIG_SECBOOT_CMD CONFIG_BS_COPY_ENV \ - CONFIG_BS_COPY_CMD \ - CONFIG_SECBOOT -/* - * We don't want boot delay for secure boot flow - * before autoboot starts - */ -#undef CONFIG_BOOTDELAY -#define CONFIG_BOOTDELAY 0 -#undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND CONFIG_SECBOOT_CMD - -/* - * CONFIG_ZERO_BOOTDELAY_CHECK should not be defined for - * secure boot flow as defining this would enable a user to - * reach uboot prompt by pressing some key before start of - * autoboot - */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK - -#endif -#endif
A function is created to detrmine if the boot mode is secure or non-secure for differnt SoC's.
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: Corrected the macro for SB_EN bit in RCW.
.../include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 ++ arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 + arch/powerpc/include/asm/immap_85xx.h | 3 ++ board/freescale/common/fsl_chain_of_trust.c | 53 ++++++++++++++++++++++ 4 files changed, 61 insertions(+) create mode 100644 board/freescale/common/fsl_chain_of_trust.c
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 21b803f..297ff35 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -218,6 +218,9 @@ struct ccsr_gur { #define FSL_CHASSIS2_RCWSR0_MEM_PLL_RAT_MASK 0x3f #define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK 0xffff0000 #define FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT 16 +#define RCW_SB_EN_REG_INDEX 7 +#define RCW_SB_EN_MASK 0x00200000 + u8 res_140[0x200-0x140]; u32 scratchrw[4]; /* Scratch Read/Write */ u8 res_210[0x300-0x210]; diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 89339fe..0a80772 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -120,6 +120,8 @@ struct ccsr_gur { u32 brrl; /* Boot release */ u8 res_0e8[0x100-0xe8]; u32 rcwsr[16]; /* Reset control word status */ +#define RCW_SB_EN_REG_INDEX 7 +#define RCW_SB_EN_MASK 0x00200000 u8 res_140[0x200-0x140]; u32 scratchrw[4]; /* Scratch Read/Write */ u8 res_210[0x300-0x210]; diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index bc7e5f8..53ca6d9 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1749,6 +1749,8 @@ typedef struct ccsr_gur { u32 brrl; /* Boot release */ u8 res17[24]; u32 rcwsr[16]; /* Reset control word status */ +#define RCW_SB_EN_REG_INDEX 7 +#define RCW_SB_EN_MASK 0x00200000
#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT 16 @@ -2193,6 +2195,7 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR2_DDR_SPD_0 0x00000008 #define MPC85xx_PORDEVSR2_DDR_SPD_0_SHIFT 3 #endif +#define MPC85xx_PORDEVSR2_SBC_MASK 0x10000000 /* The 8544 RM says this is bit 26, but it's really bit 24 */ #define MPC85xx_PORDEVSR2_SEC_CFG 0x00000080 u8 res1[8]; diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c new file mode 100644 index 0000000..ff67bd7 --- /dev/null +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -0,0 +1,53 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_validate.h> +#include <fsl_sfp.h> + +#ifdef CONFIG_LS102XA +#include <asm/arch/immap_ls102xa.h> +#endif + +#if defined(CONFIG_MPC85xx) +#define CONFIG_DCFG_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR +#else +#define CONFIG_DCFG_ADDR CONFIG_SYS_FSL_GUTS_ADDR +#endif + +#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE +#define gur_in32(a) in_le32(a) +#else +#define gur_in32(a) in_be32(a) +#endif + +/* Check the Boot Mode. If Secure, return 1 else return 0 */ +int fsl_check_boot_mode_secure(void) +{ + uint32_t val; + struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); + struct ccsr_gur __iomem *gur = (void *)(CONFIG_DCFG_ADDR); + + val = sfp_in32(&sfp_regs->ospr) & ITS_MASK; + if (val == ITS_MASK) + return 1; + +#if defined(CONFIG_FSL_CORENET) || !defined(CONFIG_MPC85xx) + /* For PBL based platforms check the SB_EN bit in RCWSR */ + val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK; + if (val == RCW_SB_EN_MASK) + return 1; +#endif + +#if defined(CONFIG_MPC85xx) && !defined(CONFIG_FSL_CORENET) + /* For Non-PBL Platforms, check the Device Status register 2*/ + val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK; + if (val != MPC85xx_PORDEVSR2_SBC_MASK) + return 1; + +#endif + return 0; +}
Chain of Trust is enabled for ARM platforms (LS1021 and LS1043). In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following: - If boot mode is non-secure, return (No Change) - If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: Defconfigs for Secure Boot Target are not removed
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++++ board/freescale/common/Makefile | 1 + board/freescale/common/fsl_chain_of_trust.c | 17 +++++++++++++++++ board/freescale/ls1021aqds/ls1021aqds.c | 4 ++++ board/freescale/ls1021atwr/ls1021atwr.c | 4 ++++ include/fsl_validate.h | 2 ++ 6 files changed, 32 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 23d6b73..2f92b55 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -12,6 +12,7 @@ #include <asm/io.h> #include <asm/global_data.h> #include <asm/arch-fsl-layerscape/config.h> +#include <fsl_validate.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -241,6 +242,9 @@ int board_late_init(void) #ifdef CONFIG_SCSI_AHCI_PLAT sata_init(); #endif +#ifdef CONFIG_CHAIN_OF_TRUST + fsl_setenv_chain_of_trust(); +#endif
return 0; } diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 51d2814..be114ce 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -76,5 +76,6 @@ obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ns_access.o ifdef CONFIG_SECURE_BOOT obj-$(CONFIG_CMD_ESBC_VALIDATE) += fsl_validate.o cmd_esbc_validate.o endif +obj-$(CONFIG_CHAIN_OF_TRUST) += fsl_chain_of_trust.o
endif diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index ff67bd7..ecfcc82 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -51,3 +51,20 @@ int fsl_check_boot_mode_secure(void) #endif return 0; } + +int fsl_setenv_chain_of_trust(void) +{ + /* Check Boot Mode + * If Boot Mode is Non-Secure, no changes are required + */ + if (fsl_check_boot_mode_secure() == 0) + return 0; + + /* If Boot mode is Secure, set the environment variables + * bootdelay = 0 (To disable Boot Prompt) + * bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) + */ + setenv("bootdelay", "0"); + setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD); + return 0; +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index ca1ea61..6e82232 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -22,6 +22,7 @@ #include <fsl_sec.h> #include <spl.h> #include <fsl_devdis.h> +#include <fsl_validate.h>
#include "../common/sleep.h" #include "../common/qixis.h" @@ -369,6 +370,9 @@ int board_late_init(void) #ifdef CONFIG_SCSI_AHCI_PLAT ls1021a_sata_init(); #endif +#ifdef CONFIG_CHAIN_OF_TRUST + fsl_setenv_chain_of_trust(); +#endif
return 0; } diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index ae62bca..054cc3d 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -30,6 +30,7 @@ #ifdef CONFIG_U_QE #include "../../../drivers/qe/qe.h" #endif +#include <fsl_validate.h>
DECLARE_GLOBAL_DATA_PTR; @@ -553,6 +554,9 @@ int board_late_init(void) #ifdef CONFIG_SCSI_AHCI_PLAT ls1021a_sata_init(); #endif +#ifdef CONFIG_CHAIN_OF_TRUST + fsl_setenv_chain_of_trust(); +#endif
return 0; } diff --git a/include/fsl_validate.h b/include/fsl_validate.h index ad14867..83efcf4 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -205,4 +205,6 @@ int fsl_secboot_blob_encap(cmd_tbl_t *cmdtp, int flag, int argc, int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int fsl_check_boot_mode_secure(void); +int fsl_setenv_chain_of_trust(void); #endif
On 01/17/2016 01:42 AM, Aneesh Bansal wrote:
Chain of Trust is enabled for ARM platforms (LS1021 and LS1043). In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com
Changes in v2: Defconfigs for Secure Boot Target are not removed
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++++ board/freescale/common/Makefile | 1 + board/freescale/common/fsl_chain_of_trust.c | 17 +++++++++++++++++ board/freescale/ls1021aqds/ls1021aqds.c | 4 ++++ board/freescale/ls1021atwr/ls1021atwr.c | 4 ++++ include/fsl_validate.h | 2 ++ 6 files changed, 32 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 23d6b73..2f92b55 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -12,6 +12,7 @@ #include <asm/io.h> #include <asm/global_data.h> #include <asm/arch-fsl-layerscape/config.h> +#include <fsl_validate.h>
Does this patch depend on other patches? It causes compiling error for fsl_sec.h on ls2 boards.
error: #error Neither CONFIG_SYS_FSL_SEC_LE nor CONFIG_SYS_FSL_SEC_BE is defined
York
-----Original Message----- From: york sun Sent: Friday, January 22, 2016 1:52 AM To: Aneesh Bansal aneesh.bansal@nxp.com; u-boot@lists.denx.de Cc: Ruchika Gupta ruchika.gupta@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com Subject: Re: [PATCH v2 5/7] enable chain of trust for ARM platforms
On 01/17/2016 01:42 AM, Aneesh Bansal wrote:
Chain of Trust is enabled for ARM platforms (LS1021 and LS1043). In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com
Changes in v2: Defconfigs for Secure Boot Target are not removed
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++++ board/freescale/common/Makefile | 1 + board/freescale/common/fsl_chain_of_trust.c | 17 +++++++++++++++++ board/freescale/ls1021aqds/ls1021aqds.c | 4 ++++ board/freescale/ls1021atwr/ls1021atwr.c | 4 ++++ include/fsl_validate.h | 2 ++ 6 files changed, 32 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 23d6b73..2f92b55 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -12,6 +12,7 @@ #include <asm/io.h> #include <asm/global_data.h> #include <asm/arch-fsl-layerscape/config.h> +#include <fsl_validate.h>
Does this patch depend on other patches? It causes compiling error for fsl_sec.h on ls2 boards.
error: #error Neither CONFIG_SYS_FSL_SEC_LE nor CONFIG_SYS_FSL_SEC_BE is defined
York
I have patches for LS2 to be sent on top of this patchset. I will submit a new rev of the patch in which inclusion of <fsl_validate.h> is protected by CONFIG_CHAIN_OF_TRUST. When we add chain of trust support for LS2, CONFIG_SYS_FSL_SEC_LE will also be defined.
Aneesh
Chain of Trust is enabled for PowerPC platforms for Secure Boot. CONFIG_BOARD_LATE_INIT is defined. In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following: - If boot mode is non-secure, return (No Change) - If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: None (Changed the Sign-Off with New E-Mail ID)
arch/powerpc/cpu/mpc85xx/cpu_init.c | 12 ++++++++++++ arch/powerpc/include/asm/fsl_secure_boot.h | 7 +++++++ 2 files changed, 19 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 50bb86a..a797980 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -26,6 +26,7 @@ #include <fsl_usb.h> #include <hwconfig.h> #include <linux/compiler.h> +#include <fsl_validate.h> #include "mp.h" #ifdef CONFIG_FSL_CAAM #include <fsl_sec.h> @@ -1011,3 +1012,14 @@ void cpu_secondary_init_r(void) qe_reset(); #endif } + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_CHAIN_OF_TRUST + fsl_setenv_chain_of_trust(); +#endif + + return 0; +} +#endif diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 41058d1..c45cace 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -87,6 +87,13 @@ #define CONFIG_FSL_CAAM #endif
+/* fsl_setenv_chain_of_trust() must be called from + * board_late_init() + */ +#ifndef CONFIG_BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT +#endif + /* If Boot Script is not on NOR and is required to be copied on RAM */ #ifdef CONFIG_BOOTSCRIPT_COPY_RAM #define CONFIG_BS_HDR_ADDR_RAM 0x00010000
In case of error while executing esbc_validate command, SNVS transition and issue of reset is required only for secure-boot. If boot mode is non-secure, this is not required.
Similarly, esbc_halt command which puts the core in Spin Loop is applicable only for Secure Boot.
Signed-off-by: Aneesh Bansal aneesh.bansal@nxp.com --- Changes in v2: None (Changed the Sign-Off with New E-Mail ID)
board/freescale/common/cmd_esbc_validate.c | 7 ++++++- board/freescale/common/fsl_validate.c | 7 +++++++ 2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c index ca7c737..dfa3e21 100644 --- a/board/freescale/common/cmd_esbc_validate.c +++ b/board/freescale/common/cmd_esbc_validate.c @@ -11,6 +11,11 @@ static int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + if (fsl_check_boot_mode_secure() == 0) { + printf("Boot Mode is Non-Secure. Not entering spin loop.\n"); + return 0; + } + printf("Core is entering spin loop.\n"); loop: goto loop; @@ -64,6 +69,6 @@ U_BOOT_CMD(
U_BOOT_CMD( esbc_halt, 1, 0, do_esbc_halt, - "Put the core in spin loop ", + "Put the core in spin loop (Secure Boot Only)", "" ); diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index de40081..8fd6dd6 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -370,6 +370,13 @@ void fsl_secboot_handle_error(int error) printf("ERROR :: %x :: %s\n", error, e->name); }
+ /* If Boot Mode is secure, transition the SNVS state and issue + * reset based on type of failure and ITS setting. + * If Boot mode is non-secure, return from this function. + */ + if (fsl_check_boot_mode_secure() == 0) + return; + switch (error) { case ERROR_ESBC_CLIENT_HEADER_BARKER: case ERROR_ESBC_CLIENT_HEADER_IMG_SIZE:
participants (2)
-
Aneesh Bansal -
york sun