[U-Boot] [PATCH 00/13] assortment of tegra fixes/enhancements
From: Marcel Ziswiler marcel.ziswiler@toradex.com
This patch set is an assortment of tegra fixes/enhancements distilled straight from our downstream integration work.
Marcel Ziswiler (12): ARM: tegra: allow custom usb manufacturer/product/vendor ids/strings ARM: tegra: allow reading recovery mode boot type apalis/colibri_t20/t30: integrate recovery mode detection colibri_t20: fix device-tree compatible node colibri_t20: add LCD display support colibri_t20: add i2c support colibri_t20: disable PMIC sleep mode on low supply voltage tegra: nand: fix read_byte required for proper onfi detection colibri_t20: enable nand onfi detection mtd/nand/tegra: alignment workaround colibri_t20: enable mtdparts support apalis/colibri_t20/t30: enable raw initrd support
Max Krummenacher (1): apalis/colibri_t20/t30: increase tftp blocksize
arch/arm/dts/tegra20-colibri.dts | 59 +++++++++++++++++++++++++++- arch/arm/include/asm/arch-tegra/tegra.h | 2 + board/toradex/apalis_t30/apalis_t30.c | 15 ++++++- board/toradex/colibri_t20/colibri_t20.c | 65 +++++++++++++++++++++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 18 +++++++-- drivers/mtd/nand/tegra_nand.c | 57 +++++++++++++-------------- include/configs/apalis_t30.h | 16 ++++++-- include/configs/colibri_t20.h | 46 +++++++++++++++++++--- include/configs/colibri_t30.h | 16 ++++++-- include/configs/tegra-common-usb-gadget.h | 6 +++ 10 files changed, 254 insertions(+), 46 deletions(-)
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow for optional custom USB gadget manufacturer/product/vendor IDs/strings to be specified.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- include/configs/tegra-common-usb-gadget.h | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/include/configs/tegra-common-usb-gadget.h b/include/configs/tegra-common-usb-gadget.h index 287460c..645d965 100644 --- a/include/configs/tegra-common-usb-gadget.h +++ b/include/configs/tegra-common-usb-gadget.h @@ -15,9 +15,15 @@ #define CONFIG_CI_UDC #define CONFIG_CI_UDC_HAS_HOSTPC #define CONFIG_USB_GADGET_DUALSPEED +#ifndef CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_VENDOR_NUM 0x0955 +#endif +#ifndef CONFIG_G_DNL_PRODUCT_NUM #define CONFIG_G_DNL_PRODUCT_NUM 0x701A +#endif +#ifndef CONFIG_G_DNL_MANUFACTURER #define CONFIG_G_DNL_MANUFACTURER "NVIDIA" +#endif #define CONFIG_USBDOWNLOAD_GADGET /* USB mass storage protocol */ #define CONFIG_USB_GADGET_MASS_STORAGE
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow for optional custom USB gadget manufacturer/product/vendor IDs/strings to be specified.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
include/configs/tegra-common-usb-gadget.h | 6 ++++++ 1 file changed, 6 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow reading recovery mode (RCM) boot type from the boot information table (BIT) written by the boot ROM (BR) to the IRAM.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- arch/arm/include/asm/arch-tegra/tegra.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index b6c7cab..3add1b3 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -56,6 +56,8 @@ struct timerus { /* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */ #define NV_WB_RUN_ADDRESS 0x40020000
+#define NVBOOTTYPE_RECOVERY 2 /* BR entered RCM */ +#define NVBOOTINFOTABLE_BOOTTYPE 0xC /* Boot type in BIT in IRAM */ #define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */ #define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */
Hi,
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow reading recovery mode (RCM) boot type from the boot information table (BIT) written by the boot ROM (BR) to the IRAM.
nit: Shouldn't this say that it is just adding the defines?
Reviewed-by: Simon Glass sjg@chromium.org
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
arch/arm/include/asm/arch-tegra/tegra.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index b6c7cab..3add1b3 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -56,6 +56,8 @@ struct timerus { /* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */ #define NV_WB_RUN_ADDRESS 0x40020000
+#define NVBOOTTYPE_RECOVERY 2 /* BR entered RCM */ +#define NVBOOTINFOTABLE_BOOTTYPE 0xC /* Boot type in BIT in IRAM */ #define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */ #define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */
-- 1.9.3
Regards, Simon
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow detecting whether or not U-Boot was launched through the recovery mode of the resp. NVIDIA SoC.
Make use of a board specific arch_misc_init() and enable the same via CONFIG_ARCH_MISC_INIT configuration option.
While at it also sort the include files alphabetically (while leaving common.h on top of course).
While at it also streamline some comments in the configuration files and fix the spacing from using spaces to tabs.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- board/toradex/apalis_t30/apalis_t30.c | 15 ++++++++++++++- board/toradex/colibri_t20/colibri_t20.c | 12 ++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 18 +++++++++++++++--- include/configs/apalis_t30.h | 10 +++++++--- include/configs/colibri_t20.h | 14 +++++++++----- include/configs/colibri_t30.h | 10 +++++++--- 6 files changed, 64 insertions(+), 15 deletions(-)
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 6244214..879006f 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -6,10 +6,13 @@ */
#include <common.h> -#include <dm.h> #include <asm/arch/gp_padctrl.h> #include <asm/arch/pinmux.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/tegra.h> #include <asm/gpio.h> +#include <asm/io.h> +#include <dm.h> #include <i2c.h> #include <netdev.h>
@@ -18,6 +21,15 @@ #define PMU_I2C_ADDRESS 0x2D #define MAX_I2C_RETRY 3
+int arch_misc_init(void) +{ + if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == + NVBOOTTYPE_RECOVERY) + printf("USB recovery mode\n"); + + return 0; +} + /* * Routine: pinmux_init * Description: Do individual peripheral pinmux configs @@ -47,6 +59,7 @@ int tegra_pcie_board_init(void) debug("%s: Cannot find PMIC I2C chip\n", __func__); return err; } + /* TPS659110: VDD2_OP_REG = 1.05V */ data[0] = 0x27; addr = 0x25; diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 8ae9ccf..7210a8a 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -8,8 +8,20 @@ #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> +#include <asm/arch-tegra/ap.h> #include <asm/arch-tegra/board.h> +#include <asm/arch-tegra/tegra.h> #include <asm/gpio.h> +#include <asm/io.h> + +int arch_misc_init(void) +{ + if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == + NVBOOTTYPE_RECOVERY) + printf("USB recovery mode\n"); + + return 0; +}
#ifdef CONFIG_TEGRA_MMC /* diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c index f4bc7d8..44b5beb 100644 --- a/board/toradex/colibri_t30/colibri_t30.c +++ b/board/toradex/colibri_t30/colibri_t30.c @@ -6,11 +6,23 @@ */
#include <common.h> -#include <asm/arch/pinmux.h> #include <asm/arch/gp_padctrl.h> -#include "pinmux-config-colibri_t30.h" -#include <i2c.h> +#include <asm/arch/pinmux.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/tegra.h> #include <asm/gpio.h> +#include <asm/io.h> +#include <i2c.h> +#include "pinmux-config-colibri_t30.h" + +int arch_misc_init(void) +{ + if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == + NVBOOTTYPE_RECOVERY) + printf("USB recovery mode\n"); + + return 0; +}
/* * Routine: pinmux_init diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index aba9ba6..bb58936 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -1,6 +1,8 @@ /* * Copyright (c) 2014-2015 Marcel Ziswiler * + * Configuration settings for the Toradex Apalis T30 modules. + * * SPDX-License-Identifier: GPL-2.0+ */
@@ -11,6 +13,8 @@
#include "tegra30-common.h"
+#define CONFIG_ARCH_MISC_INIT + /* High-level configuration options */ #define V_PROMPT "Apalis T30 # " #define CONFIG_TEGRA_BOARD_STRING "Toradex Apalis T30" @@ -26,7 +30,7 @@ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C
-/* SD/MMC */ +/* SD/MMC support */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC #define CONFIG_TEGRA_MMC @@ -38,10 +42,10 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2
-/* USB Host support */ +/* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index a3f27e3..b22e82a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -1,6 +1,8 @@ /* * Copyright (C) 2012 Lucas Stach * + * Configuration settings for the Toradex Colibri T20 modules. + * * SPDX-License-Identifier: GPL-2.0+ */
@@ -9,6 +11,8 @@
#include "tegra20-common.h"
+#define CONFIG_ARCH_MISC_INIT + /* High-level configuration options */ #define V_PROMPT "Colibri T20 # " #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T20" @@ -32,7 +36,7 @@ #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB
@@ -46,13 +50,13 @@ /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND -#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1
/* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET (SZ_2M) -#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */ -#define CONFIG_ENV_SIZE (SZ_64K) +#define CONFIG_ENV_OFFSET (SZ_2M) +#undef CONFIG_ENV_SIZE /* undef size from tegra20-common.h */ +#define CONFIG_ENV_SIZE (SZ_64K)
/* Debug commands */ #define CONFIG_CMD_BDI diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 4655668..7710786 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -1,6 +1,8 @@ /* * Copyright (c) 2013-2015 Stefan Agner * + * Configuration settings for the Toradex Colibri T30 modules. + * * SPDX-License-Identifier: GPL-2.0+ */
@@ -11,6 +13,8 @@
#include "tegra30-common.h"
+#define CONFIG_ARCH_MISC_INIT + /* High-level configuration options */ #define V_PROMPT "Colibri T30 # " #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T30" @@ -26,7 +30,7 @@ #define CONFIG_SYS_I2C_TEGRA #define CONFIG_CMD_I2C
-/* SD/MMC */ +/* SD/MMC support */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC #define CONFIG_TEGRA_MMC @@ -38,10 +42,10 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 2
-/* USB Host support */ +/* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB
Hi Marcel,
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Allow detecting whether or not U-Boot was launched through the recovery mode of the resp. NVIDIA SoC.
Out of interest, is this just a message for the user? Why is it useful?
Make use of a board specific arch_misc_init() and enable the same via CONFIG_ARCH_MISC_INIT configuration option.
While at it also sort the include files alphabetically (while leaving common.h on top of course).
While at it also streamline some comments in the configuration files and fix the spacing from using spaces to tabs.
Changes look fine, but clean-up should be in a separate patch as it is unrelated.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
board/toradex/apalis_t30/apalis_t30.c | 15 ++++++++++++++- board/toradex/colibri_t20/colibri_t20.c | 12 ++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 18 +++++++++++++++--- include/configs/apalis_t30.h | 10 +++++++--- include/configs/colibri_t20.h | 14 +++++++++----- include/configs/colibri_t30.h | 10 +++++++--- 6 files changed, 64 insertions(+), 15 deletions(-)
Regards, Simon
On 6 July 2015 18:38:21 CEST, Simon Glass sjg@chromium.org wrote:
Out of interest, is this just a message for the user? Why is it useful?
Well, we or customers might do other interesting things on entering rcm like stopping autoboot or automatically start ums.
Changes look fine, but clean-up should be in a separate patch as it is unrelated.
Will send a separate cleanup patch in the V2 round.
Thanks Simon!
On 07/07/2015 12:04 AM, Marcel Ziswiler wrote:
On 6 July 2015 18:38:21 CEST, Simon Glass sjg@chromium.org wrote:
Out of interest, is this just a message for the user? Why is it useful?
Well, we or customers might do other interesting things on entering rcm like stopping autoboot or automatically start ums.
But that's not what this patch does; it simply prints a message. It doesn't seem terribly useful.
On Wed, 2015-07-08 at 14:57 -0600, Stephen Warren wrote:
But that's not what this patch does; it simply prints a message. It doesn't seem terribly useful.
Agreed but I look at it more like a documented entry point.
In our downstream U-Boot we use it to stop autoboot to allow for manual recovery handling of our BSP demo images but unfortunately that does not play that well with the tegra-uboot-flasher as it stands so I decided to just have that message printed for now.
On 08.07.2015 22:57, Stephen Warren wrote:
On 07/07/2015 12:04 AM, Marcel Ziswiler wrote:
On 6 July 2015 18:38:21 CEST, Simon Glass sjg@chromium.org wrote:
Out of interest, is this just a message for the user? Why is it useful?
Well, we or customers might do other interesting things on entering rcm like stopping autoboot or automatically start ums.
But that's not what this patch does; it simply prints a message. It doesn't seem terribly useful.
IMO, it really is useful: The boot ROM takes other initialization steps when using RCM recovery mode vs. full NAND/eMMC boot. We have had issues in the past where the Linux kernel hangs or shows issues just because something (e.g. USB, NAND or eMMC) was/or was not initialized by the boot ROM first. Of course those are bugs, and need to be resolved in the end. But it can be helpful to reproduce issues when one sees whether the recovery mode has been used or not...
-- Stefan
On 07/09/2015 09:02 AM, Stefan Agner wrote:
On 08.07.2015 22:57, Stephen Warren wrote:
On 07/07/2015 12:04 AM, Marcel Ziswiler wrote:
On 6 July 2015 18:38:21 CEST, Simon Glass sjg@chromium.org wrote:
Out of interest, is this just a message for the user? Why is it useful?
Well, we or customers might do other interesting things on entering rcm like stopping autoboot or automatically start ums.
But that's not what this patch does; it simply prints a message. It doesn't seem terribly useful.
IMO, it really is useful: The boot ROM takes other initialization steps when using RCM recovery mode vs. full NAND/eMMC boot. We have had issues in the past where the Linux kernel hangs or shows issues just because something (e.g. USB, NAND or eMMC) was/or was not initialized by the boot ROM first. Of course those are bugs, and need to be resolved in the end. But it can be helpful to reproduce issues when one sees whether the recovery mode has been used or not...
Surely you can remember whether you pressed the reset button or used tegrarcm/... to push U-Boot onto the device in recovery mode?
If it really is that useful, then I'd suggest not making this board-specific, since it's a SoC-defined concept, not a board-defined concept.
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Use toradex,colibri_t20 as the device-tree compatible node value rather than toradex,t20 in accordance to our Apalis/Colibri T30 products.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- arch/arm/dts/tegra20-colibri.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 3131b92..257ca27 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -4,7 +4,7 @@
/ { model = "Toradex Colibri T20"; - compatible = "toradex,t20", "nvidia,tegra20"; + compatible = "toradex,colibri_t20", "nvidia,tegra20";
chosen { stdout-path = &uarta;
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Use toradex,colibri_t20 as the device-tree compatible node value rather than toradex,t20 in accordance to our Apalis/Colibri T30 products.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
arch/arm/dts/tegra20-colibri.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Add LCD display support defaulting to VESA VGA resolution. Different resolutions configurable via device-tree.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- arch/arm/dts/tegra20-colibri.dts | 29 +++++++++++++++++++++++++++++ board/toradex/colibri_t20/colibri_t20.c | 18 ++++++++++++++++++ include/configs/colibri_t20.h | 10 ++++++++++ 3 files changed, 57 insertions(+)
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 257ca27..ae40bad 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -17,6 +17,17 @@ sdhci0 = "/sdhci@c8000600"; };
+ host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + usb@c5000000 { dr_mode = "otg"; }; @@ -46,4 +57,22 @@ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; bus-width = <4>; }; + + lcd_panel: panel { + clock = <25175000>; + xres = <640>; + yres = <480>; + left-margin = <48>; /* horizontal back porch */ + right-margin = <16>; /* horizontal front porch */ + hsync-len = <96>; + lower-margin = <11>; /* vertical front porch */ + upper-margin = <31>; /* vertical back porch */ + vsync-len = <2>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>; + nvidia,panel-timings = <0 0 0 0>; + }; }; diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 7210a8a..81d344c 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -75,3 +75,21 @@ void pin_mux_usb(void) pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif + +#ifdef CONFIG_VIDEO_TEGRA +/* + * Routine: pin_mux_display + * Description: setup the pin muxes/tristate values for the LCD interface) + */ +void pin_mux_display(void) +{ + /* + * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through + * device-tree + */ + pinmux_tristate_disable(PMUX_PINGRP_DTA); + + pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); + pinmux_tristate_disable(PMUX_PINGRP_SDC); +} +#endif diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index b22e82a..fce1411 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -47,6 +47,16 @@ /* General networking support */ #define CONFIG_CMD_DHCP
+/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 +#define CONFIG_CMD_BMP +#define CONFIG_LCD_LOGO + /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND
Hi Marcel,
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Add LCD display support defaulting to VESA VGA resolution. Different resolutions configurable via device-tree.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
arch/arm/dts/tegra20-colibri.dts | 29 +++++++++++++++++++++++++++++ board/toradex/colibri_t20/colibri_t20.c | 18 ++++++++++++++++++ include/configs/colibri_t20.h | 10 ++++++++++ 3 files changed, 57 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
Please see below.
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 257ca27..ae40bad 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -17,6 +17,17 @@ sdhci0 = "/sdhci@c8000600"; };
host1x {status = "okay";dc@54200000 {status = "okay";rgb {status = "okay";nvidia,panel = <&lcd_panel>;};};};usb@c5000000 { dr_mode = "otg"; };@@ -46,4 +57,22 @@ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; bus-width = <4>; };
lcd_panel: panel {clock = <25175000>;xres = <640>;yres = <480>;left-margin = <48>; /* horizontal back porch */right-margin = <16>; /* horizontal front porch */hsync-len = <96>;lower-margin = <11>; /* vertical front porch */upper-margin = <31>; /* vertical back porch */vsync-len = <2>;hsync-active-high;vsync-active-high;nvidia,bits-per-pixel = <16>;nvidia,pwm = <&pwm 2 0>;nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;nvidia,panel-timings = <0 0 0 0>;};}; diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 7210a8a..81d344c 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -75,3 +75,21 @@ void pin_mux_usb(void) pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif
+#ifdef CONFIG_VIDEO_TEGRA +/*
- Routine: pin_mux_display
- Description: setup the pin muxes/tristate values for the LCD interface)
- */
+void pin_mux_display(void) +{
/** Manually untristate BL_ON (PT4 - SODIMM 71) as specified through* device-tree*/pinmux_tristate_disable(PMUX_PINGRP_DTA);pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);pinmux_tristate_disable(PMUX_PINGRP_SDC);+}
I wonder why this code doesn't go in funcmux_select()? It has a parameter to select the variant.
Regards, Simon
Hi Simon
On Mon, 2015-07-06 at 10:38 -0600, Simon Glass wrote:
I wonder why this code doesn't go in funcmux_select()? It has a parameter to select the variant.
Yeah, but I believe Tegra 2 aka T20 with its rather special pin group arrangement has never really been properly converted to using funcmux_select() other than for DISP, KBC, NDFLASH, SDMMC, SPI and USB.
As a matter of fact even the Tegra video driver uses pinmux_set_func() which BTW is hard-coded to a specific PWM in there!
[user@host u-boot] $ cat drivers/video/tegra.c | grep PWM STAGE_PWM, debug("%s: Unable to request PWM channel\n", __func__); case STAGE_PWM: /* Enable PWM at 15/16 high, 32768 Hz with divider 1 */ pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Add I2C support in order to subsequently allow disabling the PMIC sleep mode on low supply voltage.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- arch/arm/dts/tegra20-colibri.dts | 28 ++++++++++++++++++++++++++++ include/configs/colibri_t20.h | 4 ++++ 2 files changed, 32 insertions(+)
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index ae40bad..42efcdc 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -11,6 +11,9 @@ };
aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; usb2 = "/usb@c5004000"; @@ -52,6 +55,31 @@ }; };
+ /* + * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier + * board) + */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* GEN2_I2C: unused */ + + /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */ + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* + * PWR_I2C: power I2C to PMIC and temperature sensor + */ + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + sdhci@c8000600 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index fce1411..c85fb9f 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -25,6 +25,10 @@
#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_T20
+/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + /* SD/MMC support */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Add I2C support in order to subsequently allow disabling the PMIC sleep mode on low supply voltage.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
arch/arm/dts/tegra20-colibri.dts | 28 ++++++++++++++++++++++++++++ include/configs/colibri_t20.h | 4 ++++ 2 files changed, 32 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
From: Marcel Ziswiler marcel.ziswiler@toradex.com
The Colibri T20's PMIC enters a sleep mode on low supply voltage < 3.0V ±2.5% (2.92...3.08V). Rising the main supply voltage again does not bring it back to regular operation. Not even a full reset does bring the module back. A full power cycle was required to reboot the system. A long positive pulse on the PMICs resume pin also reboots the system but this pin is only accessible as a test point on the module.
This patch configures the PMIC through I2C to not enter this sleep mode plus force it to normal state upon sleep request exit should this ever happen.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- board/toradex/colibri_t20/colibri_t20.c | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 81d344c..42b293d 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -13,9 +13,44 @@ #include <asm/arch-tegra/tegra.h> #include <asm/gpio.h> #include <asm/io.h> +#include <i2c.h> + +#define PMU_I2C_ADDRESS 0x34 +#define MAX_I2C_RETRY 3 +#define PMU_SUPPLYENE 0x14 +#define PMU_SUPPLYENE_SYSINEN (1<<5) +#define PMU_SUPPLYENE_EXITSLREQ (1<<1)
int arch_misc_init(void) { + /* Disable PMIC sleep mode on low supply voltage */ + struct udevice *dev; + u8 addr, data[1]; + int err; + + err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (err) { + debug("%s: Cannot find PMIC I2C chip\n", __func__); + return err; + } + + addr = PMU_SUPPLYENE; + + err = dm_i2c_read(dev, addr, data, 1); + if (err) { + debug("failed to get PMU_SUPPLYENE\n"); + return err; + } + + data[0] &= ~PMU_SUPPLYENE_SYSINEN; + data[0] |= PMU_SUPPLYENE_EXITSLREQ; + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { + debug("failed to set PMU_SUPPLYENE\n"); + return err; + } + if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == NVBOOTTYPE_RECOVERY) printf("USB recovery mode\n");
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
The Colibri T20's PMIC enters a sleep mode on low supply voltage < 3.0V ±2.5% (2.92...3.08V). Rising the main supply voltage again does not bring it back to regular operation. Not even a full reset does bring the module back. A full power cycle was required to reboot the system. A long positive pulse on the PMICs resume pin also reboots the system but this pin is only accessible as a test point on the module.
This patch configures the PMIC through I2C to not enter this sleep mode plus force it to normal state upon sleep request exit should this ever happen.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
board/toradex/colibri_t20/colibri_t20.c | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
You could write a pmic driver for this if you like.
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Fix PIO read_byte() implementation not only used for the legacy READ ID but also the PARAM command now required for proper ONFI detection.
This fix is inspired by Lucas Stach's Linux Tegra NAND driver of late.
While at it also disable subpage writes.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- drivers/mtd/nand/tegra_nand.c | 39 +++++++++------------------------------ 1 file changed, 9 insertions(+), 30 deletions(-)
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index b660f3b..9c90634 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -86,16 +86,6 @@ struct fdt_nand {
struct nand_drv { struct nand_ctlr *reg; - - /* - * When running in PIO mode to get READ ID bytes from register - * RESP_0, we need this variable as an index to know which byte in - * register RESP_0 should be read. - * Because common code in nand_base.c invokes read_byte function two - * times for NAND_CMD_READID. - * And our controller returns 4 bytes at once in register RESP_0. - */ - int pio_byte_index; struct fdt_nand config; };
@@ -181,25 +171,16 @@ static int nand_waitfor_cmd_completion(struct nand_ctlr *reg) static uint8_t read_byte(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; - u32 dword_read; struct nand_drv *info;
info = (struct nand_drv *)chip->priv;
- /* In PIO mode, only 4 bytes can be transferred with single CMD_GO. */ - if (info->pio_byte_index > 3) { - info->pio_byte_index = 0; - writel(CMD_GO | CMD_PIO - | CMD_RX | CMD_CE0, - &info->reg->command); - if (!nand_waitfor_cmd_completion(info->reg)) - printf("Command timeout\n"); - } + writel(CMD_GO | CMD_PIO | CMD_RX | CMD_CE0 | CMD_A_VALID, + &info->reg->command); + if (!nand_waitfor_cmd_completion(info->reg)) + printf("Command timeout\n");
- dword_read = readl(&info->reg->resp); - dword_read = dword_read >> (8 * info->pio_byte_index); - info->pio_byte_index++; - return (uint8_t)dword_read; + return (uint8_t)readl(&info->reg->resp); }
/** @@ -314,6 +295,9 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, if (column != -1 && (chip->options & NAND_BUSWIDTH_16)) column >>= 1;
+ /* Disable subpage writes as we do not provide ecc->hwctl */ + chip->options |= NAND_NO_SUBPAGE_WRITE; + nand_clear_interrupt_status(info->reg);
/* Stop DMA engine, clear DMA completion status */ @@ -330,12 +314,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_READID: writel(NAND_CMD_READID, &info->reg->cmd_reg1); writel(column & 0xFF, &info->reg->addr_reg1); - writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_PIO - | CMD_RX | - ((4 - 1) << CMD_TRANS_SIZE_SHIFT) - | CMD_CE0, + writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_CE0, &info->reg->command); - info->pio_byte_index = 0; break; case NAND_CMD_PARAM: writel(NAND_CMD_PARAM, &info->reg->cmd_reg1); @@ -376,7 +356,6 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, | ((1 - 0) << CMD_TRANS_SIZE_SHIFT) | CMD_CE0, &info->reg->command); - info->pio_byte_index = 0; break; case NAND_CMD_RESET: writel(NAND_CMD_RESET, &info->reg->cmd_reg1);
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Now after having fixed NAND ONFI detection actually enable it to make the various Colibri T20 module versions with different NAND chips assembled actually work.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- include/configs/colibri_t20.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index c85fb9f..6dc1c3a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -65,6 +65,7 @@ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_ONFI_DETECTION
/* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define CONFIG_ENV_IS_IN_NAND
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Now after having fixed NAND ONFI detection actually enable it to make the various Colibri T20 module versions with different NAND chips assembled actually work.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
include/configs/colibri_t20.h | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Introduce cache alignment bounce buffer to workaround issues as follows:
Loading file '/boot/zImage' to addr 0x01000000 with size 4499152 (0x0044a6d0)... ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108 Done Kernel image @ 0x1000000 [ 0x000000 - 0x44a6d0 ]
Starting kernel ...
undefined instruction pc : [<005ff03c>] lr : [<0000800c>] sp : 0144b6e8 ip : 01000188 fp : 0144a6c8 r10: 00000000 r9 : 411fc090 r8 : 00000100 r7 : 00000cfb r6 : 0144a6d0 r5 : 00000000 r4 : 00008000 r3 : 0000000c r2 : 00000100 r1 : 00000cfb r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ...
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- drivers/mtd/nand/tegra_nand.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 9c90634..a7ab415 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -87,6 +87,7 @@ struct fdt_nand { struct nand_drv { struct nand_ctlr *reg; struct fdt_nand config; + uint8_t *data_buf; /* cache alignment bounce buffer */ };
static struct nand_drv nand_ctrl; @@ -534,6 +535,7 @@ static int nand_rw_page(struct mtd_info *mtd, struct nand_chip *chip, char *tag_ptr; struct nand_drv *info; struct fdt_nand *config; + uint8_t *temp_buf = NULL;
if ((uintptr_t)buf & 0x03) { printf("buf %p has to be 4-byte aligned\n", buf); @@ -545,6 +547,12 @@ static int nand_rw_page(struct mtd_info *mtd, struct nand_chip *chip, if (set_bus_width_page_size(config, ®_val)) return -EINVAL;
+ /* cache alignment */ + if ((!is_writing) && ((uintptr_t)buf & (ARCH_DMA_MINALIGN - 1))) { + temp_buf = buf; + buf = info->data_buf; + } + /* Need to be 4-byte aligned */ tag_ptr = (char *)tag_buf;
@@ -638,6 +646,11 @@ static int nand_rw_page(struct mtd_info *mtd, struct nand_chip *chip, return -EIO; }
+ /* cache alignment */ + if (temp_buf) { + memcpy(temp_buf, buf, 1 << chip->page_shift); + } + if (with_ecc && !is_writing) { memcpy(chip->oob_poi, tag_ptr, SKIPPED_SPARE_BYTES); @@ -999,6 +1012,11 @@ int tegra_nand_init(struct nand_chip *nand, int devnum) nand->ecc.size = our_mtd->writesize; nand->ecc.bytes = our_mtd->oobsize;
+ /* cache alignment */ + info->data_buf = memalign(ARCH_DMA_MINALIGN, our_mtd->writesize); + if (!info->data_buf) + return -ENOMEM; + ret = nand_scan_tail(our_mtd); if (ret) return ret;
Hi Marcel,
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Introduce cache alignment bounce buffer to workaround issues as follows:
Loading file '/boot/zImage' to addr 0x01000000 with size 4499152 (0x0044a6d0)... ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108 Done Kernel image @ 0x1000000 [ 0x000000 - 0x44a6d0 ]
Starting kernel ...
undefined instruction pc : [<005ff03c>] lr : [<0000800c>] sp : 0144b6e8 ip : 01000188 fp : 0144a6c8 r10: 00000000 r9 : 411fc090 r8 : 00000100 r7 : 00000cfb r6 : 0144a6d0 r5 : 00000000 r4 : 00008000 r3 : 0000000c r2 : 00000100 r1 : 00000cfb r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ...
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
drivers/mtd/nand/tegra_nand.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
Can you use the existing bouncebuf for this?
Regards, Simon
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Enable mtdparts aka dynamic MTD partition support.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- include/configs/colibri_t20.h | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 6dc1c3a..1ac7a41 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -67,6 +67,17 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ONFI_DETECTION
+/* Dynamic MTD partition support */ +#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define MTDIDS_DEFAULT "nand0=tegra_nand" +#define MTDPARTS_DEFAULT "mtdparts=tegra_nand:" \ + "2m(u-boot)ro," \ + "1m(u-boot-env)," \ + "1m(cfgblock)ro," \ + "-(ubi)" + /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET (SZ_2M)
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Enable mtdparts aka dynamic MTD partition support.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
include/configs/colibri_t20.h | 11 +++++++++++ 1 file changed, 11 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Enable optional raw initrd support to allow boot using an initrd.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- include/configs/apalis_t30.h | 3 +++ include/configs/colibri_t20.h | 3 +++ include/configs/colibri_t30.h | 3 +++ 3 files changed, 9 insertions(+)
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index bb58936..03d2ee0 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -81,6 +81,9 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 32
+#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_SYS_BOOT_RAMDISK_HIGH + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h"
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 1ac7a41..a102cfb 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -106,6 +106,9 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 32
+#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_SYS_BOOT_RAMDISK_HIGH + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h"
diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 7710786..b1ef7e4 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -74,6 +74,9 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 32
+#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_SYS_BOOT_RAMDISK_HIGH + #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h"
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Marcel Ziswiler marcel.ziswiler@toradex.com
Enable optional raw initrd support to allow boot using an initrd.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
include/configs/apalis_t30.h | 3 +++ include/configs/colibri_t20.h | 3 +++ include/configs/colibri_t30.h | 3 +++ 3 files changed, 9 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
From: Max Krummenacher max.krummenacher@toradex.com
Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384. This increases the tftp download speed considerably.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to fifty '#' independent of the downloaded file size.
Signed-off-by: Max Krummenacher max.krummenacher@toradex.com Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com --- include/configs/apalis_t30.h | 3 +++ include/configs/colibri_t20.h | 3 +++ include/configs/colibri_t30.h | 3 +++ 3 files changed, 9 insertions(+)
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 03d2ee0..7fc4bd9 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -62,6 +62,9 @@
/* General networking support */ #define CONFIG_CMD_DHCP +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 16384 +#define CONFIG_TFTP_TSIZE
/* Miscellaneous commands */ #define CONFIG_FAT_WRITE diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index a102cfb..4b7e6d9 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -50,6 +50,9 @@
/* General networking support */ #define CONFIG_CMD_DHCP +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 16384 +#define CONFIG_TFTP_TSIZE
/* LCD support */ #define CONFIG_LCD diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index b1ef7e4..04fdc48 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -55,6 +55,9 @@
/* General networking support */ #define CONFIG_CMD_DHCP +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 16384 +#define CONFIG_TFTP_TSIZE
/* Miscellaneous commands */ #define CONFIG_FAT_WRITE
On 6 July 2015 at 02:20, Marcel Ziswiler marcel@ziswiler.com wrote:
From: Max Krummenacher max.krummenacher@toradex.com
Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384. This increases the tftp download speed considerably.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to fifty '#' independent of the downloaded file size.
Signed-off-by: Max Krummenacher max.krummenacher@toradex.com Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
include/configs/apalis_t30.h | 3 +++ include/configs/colibri_t20.h | 3 +++ include/configs/colibri_t30.h | 3 +++ 3 files changed, 9 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On 07/06/2015 02:20 AM, Marcel Ziswiler wrote:
From: Max Krummenacher max.krummenacher@toradex.com
Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384. This increases the tftp download speed considerably.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to fifty '#' independent of the downloaded file size.
Do either of patches 12 and 13 make sense for all Tegra boards?
On Wed, 2015-07-08 at 15:03 -0600, Stephen Warren wrote:
Do either of patches 12 and 13 make sense for all Tegra boards?
In German we would call that a Gretchenfrage.
BTW: I just noticed that somehow on T20 one can not quite use 16K as on the T30 (e.g. it fails with "EHCI timed out on TD - token=0x88008d80"). Wondering why that is but for now I will limit it to 1536 bytes in an upcoming v2 thereof.
participants (4)
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Marcel Ziswiler -
Simon Glass -
Stefan Agner -
Stephen Warren