[U-Boot-Users] CF Access in 8540

Hi all,
Im configuring my board[MPC8540] for CF Support [Thru LCS]. My Compact Flash Base is F8800000. Port Size 16 bit
I configured BR1 and OR1 and I accessed the CF thru Chip Select.But I need to probe thru IDE .
#define CFG_PCMCIA_MEM_ADDR 0xF8800000 #define CFG_PCMCIA_MEM_SIZE 128 << 20
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
In Uboot ,I saw that the offset for CFG_ATA_DATA is defined as follows. Can anyone explain thsi whay we need to specify the offset as this..or we have to specify in different manner.
/* Offset for data I/O */ #define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE+320) /* Offset for normal register accesses */ #define CFG_ATA_REG_OFFSET (2*CFG_PCMCIA_MEM_SIZE*320) /* Offset for alternate registers */ #define CFG_ATA_ALT_OFFSET 0x0000
Thanks and Regards, Sudhakar V

In message 200409251842.21281.v.sudhakar@gdatech.co.in you wrote:
In Uboot ,I saw that the offset for CFG_ATA_DATA is defined as follows.
You are wrong. There is no such definition in the whole U-Boot code.
Can anyone explain thsi whay we need to specify the offset as this..or we have to specify in different manner.
/* Offset for data I/O */ #define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE+320) /* Offset for normal register accesses */ #define CFG_ATA_REG_OFFSET (2*CFG_PCMCIA_MEM_SIZE*320)
These definitions are obvuiously wrong and connot work. I don;t know where you got them from, but this is not part of the U-Boot code.
As for your question: try to figure out how address decoding for the IDE controller register works.
Best regards,
Wolfgang Denk
participants (2)
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Sudhakar
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Wolfgang Denk