[U-Boot] [PATCH 1/5] mmc: matsushita-common: Special case only select registers in 16bit
There are only a few registerse used in the 16bit mode which are 32bit internally. Special-case only those in the IO accessors and always write both halves. Any other register access is protected from accidentally overwriting neighboring register.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/matsushita-common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/matsushita-common.c b/drivers/mmc/matsushita-common.c index 3f538c354e..739586557a 100644 --- a/drivers/mmc/matsushita-common.c +++ b/drivers/mmc/matsushita-common.c @@ -68,7 +68,9 @@ void matsu_sd_writel(struct matsu_sd_priv *priv, writel(val, priv->regbase + (reg << 1)); if (priv->caps & MATSU_SD_CAP_16BIT) { writew(val & 0xffff, priv->regbase + (reg >> 1)); - if (val >> 16) + if (reg == MATSU_SD_INFO1 || reg == MATSU_SD_INFO1_MASK || + reg == MATSU_SD_INFO2 || reg == MATSU_SD_INFO2_MASK || + reg == MATSU_SD_ARG) writew(val >> 16, priv->regbase + (reg >> 1) + 2); } else writel(val, priv->regbase + reg);
The HOST_MODE register must be set to 0 when the IP is operated in 16bit mode, otherwise 16bit access to the data FIFO may fail.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/matsushita-common.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/drivers/mmc/matsushita-common.c b/drivers/mmc/matsushita-common.c index 739586557a..e552a09ea1 100644 --- a/drivers/mmc/matsushita-common.c +++ b/drivers/mmc/matsushita-common.c @@ -688,8 +688,6 @@ static void matsu_sd_host_init(struct matsu_sd_priv *priv) */ if (priv->version >= 0x10) matsu_sd_writel(priv, 0x101, MATSU_SD_HOST_MODE); - else if (priv->caps & MATSU_SD_CAP_16BIT) - matsu_sd_writel(priv, 0x1, MATSU_SD_HOST_MODE); else matsu_sd_writel(priv, 0x0, MATSU_SD_HOST_MODE);
Make sure to wait for the command to complete altogether, including the trailing 8 clock cycles. This prevents the driver for accidentally writing the CMD register too fast before the previous command fully completed.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/matsushita-common.c | 2 ++ drivers/mmc/matsushita-common.h | 1 + 2 files changed, 3 insertions(+)
diff --git a/drivers/mmc/matsushita-common.c b/drivers/mmc/matsushita-common.c index e552a09ea1..33224bb51b 100644 --- a/drivers/mmc/matsushita-common.c +++ b/drivers/mmc/matsushita-common.c @@ -498,6 +498,8 @@ int matsu_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, return ret; }
+ matsu_sd_wait_for_irq(dev, MATSU_SD_INFO2, MATSU_SD_INFO2_SCLKDIVEN); + return ret; }
diff --git a/drivers/mmc/matsushita-common.h b/drivers/mmc/matsushita-common.h index 3be91c310e..34631cb43e 100644 --- a/drivers/mmc/matsushita-common.h +++ b/drivers/mmc/matsushita-common.h @@ -38,6 +38,7 @@ #define MATSU_SD_INFO2 0x03c /* IRQ status 2 */ #define MATSU_SD_INFO2_ERR_ILA BIT(15) /* illegal access err */ #define MATSU_SD_INFO2_CBSY BIT(14) /* command busy */ +#define MATSU_SD_INFO2_SCLKDIVEN BIT(13) /* command setting reg ena */ #define MATSU_SD_INFO2_BWE BIT(9) /* write buffer ready */ #define MATSU_SD_INFO2_BRE BIT(8) /* read buffer ready */ #define MATSU_SD_INFO2_DAT0 BIT(7) /* SDDAT0 */
Fix minor rebase omission, the else was missing which triggered two accesses to the register on 64bit variant of the IP.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/matsushita-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/matsushita-common.c b/drivers/mmc/matsushita-common.c index 33224bb51b..e22a9de5da 100644 --- a/drivers/mmc/matsushita-common.c +++ b/drivers/mmc/matsushita-common.c @@ -66,7 +66,7 @@ void matsu_sd_writel(struct matsu_sd_priv *priv, { if (priv->caps & MATSU_SD_CAP_64BIT) writel(val, priv->regbase + (reg << 1)); - if (priv->caps & MATSU_SD_CAP_16BIT) { + else if (priv->caps & MATSU_SD_CAP_16BIT) { writew(val & 0xffff, priv->regbase + (reg >> 1)); if (reg == MATSU_SD_INFO1 || reg == MATSU_SD_INFO1_MASK || reg == MATSU_SD_INFO2 || reg == MATSU_SD_INFO2_MASK ||
The IP requires some time to recuperate after the IO pin properties were changed. Add a delay to assure this.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/renesas-sdhi.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index e9edcf5f17..8564f42e20 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -289,6 +289,9 @@ out: static int renesas_sdhi_set_ios(struct udevice *dev) { int ret = matsu_sd_set_ios(dev); + + mdelay(10); + #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) struct matsu_sd_priv *priv = dev_get_priv(dev);
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Marek Vasut