Hi,

I'm having trouble debugging U-Boot (version 2008.10) with a BDI2000 on an Embedded Planet EP8248 board (MPC8248 processor). According to "Embedded Linux Primer" by Christopher Hanin, early U-Boot debugging must be done using hardware breakpoints, because it is running out of flash at that point in time.

Following along his example, I have connected to the BDI2000 via remote GDB and issued a 'mon break hard' command to enable hardware breakpoints. Upon continuing, I get the errors from the BDI that all hardware breakpoints are in use. Clearing breakpoints have no effect.

Looking in my CPU reference manual, it does mention two instruction address breakpoint registers, as well as two data address breakpoint registers (IABR1, IABR2, DABR1, DABR2). It does not mention (at least that I could find) what is necessary to set these registers up and use them.

Any tips on how to proceed would be appreciated. I have attached my BDI configuration, as well as the error message. Thank you!

GDB Session:

~/u-boot/build% ppc-linux-gdb u-boot GNU gdb Red Hat Linux (6.7-1rh) Copyright (C) 2007 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later http://gnu.org/licenses/gpl.html This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=i686-pc-linux-gnu --target=ppc-linux". The target architecture is set automatically (currently powerpc:common) .. (gdb) target remote 192.168.100.130:2001 Remote debugging using 192.168.100.130:2001 _start () at start.S:163 163 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/ Current language: auto; currently asm (gdb) mon break hard (gdb) b board_init_f Breakpoint 1 at 0xfff049b0: file board.c, line 405. (gdb) c Continuing. Warning: Cannot insert breakpoint 1. Error accessing memory address 0xfff049b0: Unknown error 4294967295.

BDI Session:

- TARGET: processing power-up delay - TARGET: processing user reset request - BDI asserts HRESET - Reset JTAG controller passed - Bypass check: 0x000000001 => 0x00000001 - Bypass check: 0x000000001 => 0x00000001 - JTAG exists check passed - COP status is 0x01 - Check running state passed - BDI scans COP freeze command - BDI removes HRESET - Target PVR is 0x80822014 - COP status is 0x05 - Check stopped state passed - Check LSRL length passed - BDI sets breakpoint at 0xFFF00100 - BDI resumes program execution - Waiting for target stop passed - TARGET: Target PVR is 0x80822014 - TARGET: resetting target passed - TARGET: processing target startup .... - TARGET: processing target startup passed - TARGET: stepped *** TARGET: all hardware breakpoints in use

BDI Configuration File: ;EP8248 16M of psdram config script ;---------------------------------- ;written by Greg Davis ;based on the EP8260 BDI2000 script written by Steve Blakeslee ; ; [INIT] ; ;************************************************************* ; program the SYPCR - disable the watchdog timer ;************************************************************* WM32 0x10004 0xFFFF0681 ; ;************************************************************* ; program the bcr - Bus cfg reg ;************************************************************* WM32 0x10024 0x00908010 ; ;************************************************************* ; program the SIUMCR - ;************************************************************* WM32 0x10000 0x01240200 ; ;************************************************************* ; program the SCCR - disable PCI mode & set clock divider to 16 ;************************************************************* WM32 0x10c80 0x00000001 ; ;************************************************************* ; load IMMR register with the new base address (0x04700000) ; Warning: this assumes that the IMMR is located at 0xf0101A8 ; due to the reset configuration. If the reset config words ; in boot Flash/ROM are set for a different address, then you ; must update this script to use the new IMMR address! ;************************************************************* WM32 0x101A8 0xF0000000 ; ;************************************************************* ; initialize the memory controller registers... ;************************************************************* ; ;************************************************************* ; initialize - FLASH BR0 & OR0 (8 Mbyte) ;************************************************************* ;WM32 0xf0010100 0xFC001801 ;WM32 0xf0010104 0xFC0008B2 ; ;************************************************************* ; initialize - PSDRAM BR1 & OR1 (16 Mbyte) ;************************************************************* WM32 0xf0010108 0x00001841 WM32 0xf001010c 0xFF0030C0 ; ;************************************************************* ; initialize - BCSR BR2 & OR2 ;************************************************************* WM32 0xf0010110 0xFA000801 WM32 0xf0010114 0xFFC80864 ; ;************************************************************* ; program the MPTPR - ;************************************************************* WM16 0xf0010184 0x1300 ; ;************************************************************* ; SDRAM Initialization ;************************************************************* ;wait 100us before accessing ; ;************************************************************* ; initialize - PSDRAM mode reg (PSDMR) ; ; C2672522 ; C267FF33 (slow timing) ; ;************************************************************* WM32 0xf0010190 0xC267FF33 ; ;************************************************************* ; program PSRT - PSDRAM refresh timer ; ; 0x4B ; ;************************************************************* WM8 0xf001019C 0x4B ; ;************************************************************* ; SDRAM Initialization ;************************************************************* ;wait 100us before accessing ; ;Precharge all banks SMMR[OP]=101 WM8 0xf0010190 0xea WM8 0x00000110 0xff ; ;Issue 8 CBR_Refresh commands SMMR[OP]=001 WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0xf0010190 0xca WM8 0x00000110 0xff ; ;Issue Mode set command SMMR[OP]=011 WM8 0xf0010190 0xda WM8 0x00000110 0xff ; ;set PSDMR for normal operation WM8 0xf0010190 0xc2 ; ;clear MRS WREG MSR 0x00000000 ; ; [TARGET] CPUTYPE 8240 ;the CPU type (603EV,750,8240,8260) JTAGCLOCK 0 ;use 16 MHz JTAG clock ;WORKSPACE 0x00000000 ;workspace in target RAM for fast download BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT | GATEWAY) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoints VECTOR CATCH ;catch unhandled exceptions DCACHE NOFLUSH ;data cache flushing (FLUSH | NOFLUSH) SIO 7 9600 ; ; ;Not really using this ; [FLASH] ;CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) ;CHIPSIZE 0x200000 ;The size of one flash chip in bytes (e.g. AM29F010 = 0x20000) ;BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64) ; ; [HOST] IP 192.168.100.3 FILE pcl82xx120.ep FORMAT SREC ;START 0x80020 ;only needed for RAM booloader LOAD MANUAL ;load code MANUAL or AUTO after reset ; ; [REGS] DMM1 0xF0000000 FILE reg8272.def

Tommy Wang

5605 N. MacArthur Blvd. Suite 1100 Irving, TX 75038 601.594.9864 twang@dtims.com

Diversified Technology, Inc. 1.800.443.2667 http://www.diversifiedtechnology.com

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