From: Fabio Estevam fabio.estevam@freescale.com

CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard.

Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel.

Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers."

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h | 1 + board/boundary/nitrogen6x/clocks.cfg | 11 +++++++++++ 2 files changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 7676457..ca732af 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -20,6 +20,7 @@ #ifndef __ARCH_ARM_MACH_MX6_CCM_REGS_H__ #define __ARCH_ARM_MACH_MX6_CCM_REGS_H__

+#define CCM_CCOSR 0x020c4060 #define CCM_CCGR0 0x020C4068 #define CCM_CCGR1 0x020C406c #define CCM_CCGR2 0x020C4070 diff --git a/board/boundary/nitrogen6x/clocks.cfg b/board/boundary/nitrogen6x/clocks.cfg index e7d1f86..0a3b47b 100644 --- a/board/boundary/nitrogen6x/clocks.cfg +++ b/board/boundary/nitrogen6x/clocks.cfg @@ -44,3 +44,14 @@ DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ DATA 4, MX6_IOMUXC_GPR6, 0x007F007F DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb