From: Shaohui Xie Shaohui.Xie@nxp.com

To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active.

Signed-off-by: Shaohui Xie Shaohui.Xie@nxp.com --- board/freescale/ls2080ardb/ls2080ardb.c | 4 ++++ include/configs/ls2080a_common.h | 4 ++++ include/configs/ls2080ardb.h | 1 + 3 files changed, 9 insertions(+)

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 2ae9d6c..da227a7 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -149,6 +149,7 @@ int board_init(void) { char *env_hwconfig; u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE; u32 val;

init_final_memctl_regs(); @@ -170,6 +171,9 @@ int board_init(void)

QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN);

+ /* invert AQR405 IRQ pins polarity */ + out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); + return 0; }

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 2e1fe7a..1740dd6 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -38,6 +38,10 @@ #define CONFIG_SYS_TEXT_BASE 0x30100000 #endif

+/* Interrupt Sampling Control */ +#define ISC_BASE 0x01F70000 +#define IRQCR_OFFSET 0x14 + #ifdef CONFIG_EMU #define CONFIG_SYS_NO_FLASH #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 65d4f64..0d60420 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -336,6 +336,7 @@ unsigned long get_board_sys_clk(void); #define AQ_PHY_ADDR2 0x01 #define AQ_PHY_ADDR3 0x02 #define AQ_PHY_ADDR4 0x03 +#define AQR405_IRQ_MASK 0x36

#define CONFIG_MII #define CONFIG_ETHPRIME "DPNI1"