[PATCH v2 1/2] board: rockchip: add Radxa ROCK5B Rk3588 board

ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specification:
Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm
Kernel commits: a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board") 6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")
Signed-off-by: Eugen Hristev eugen.hristev@collabora.com ---
Changes in v2: - added kernel commits that added the DT for the board in Kernel.
This board comes on top of Jagan's series for adding the rk3588 support: https://lists.denx.de/pipermail/u-boot/2023-January/506784.html And Jonas' series of patches that adds support for DDR v3 : https://lists.denx.de/pipermail/u-boot/2023-January/504923.html and another series from Jonas about rockchip TPL https://lists.denx.de/pipermail/u-boot/2023-February/509051.html And a workaround to make SD-Card 400 kHz clock working from Jonas' private tree
Thanks, Eugen
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 22 +++++++ arch/arm/dts/rk3588-rock-5b.dts | 44 ++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 26 +++++++++ board/radxa/rock5b-rk3588/Kconfig | 15 +++++ board/radxa/rock5b-rk3588/MAINTAINERS | 6 ++ board/radxa/rock5b-rk3588/Makefile | 6 ++ board/radxa/rock5b-rk3588/rock5b-rk3588.c | 4 ++ configs/rock5b-rk3588_defconfig | 71 +++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/rock5b-rk3588.h | 15 +++++ 10 files changed, 210 insertions(+) create mode 100644 arch/arm/dts/rk3588-rock-5b-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588-rock-5b.dts create mode 100644 board/radxa/rock5b-rk3588/Kconfig create mode 100644 board/radxa/rock5b-rk3588/MAINTAINERS create mode 100644 board/radxa/rock5b-rk3588/Makefile create mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c create mode 100644 configs/rock5b-rk3588_defconfig create mode 100644 include/configs/rock5b-rk3588.h
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi new file mode 100644 index 000000000000..2386edf90deb --- /dev/null +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Collabora Ltd. + */ + +#include "rk3588-u-boot.dtsi" + +/ { + aliases { + mmc0 = &sdmmc; + }; + + chosen { + u-boot,spl-boot-order = &sdmmc; + }; +}; + +&sdmmc { + bus-width = <4>; + u-boot,dm-spl; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts new file mode 100644 index 000000000000..95805cb0adfa --- /dev/null +++ b/arch/arm/dts/rk3588-rock-5b.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3588.dtsi" + +/ { + model = "Radxa ROCK 5 Model B"; + compatible = "radxa,rock-5b", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + serial2 = &uart2; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index def4094e2e44..aee71ca1dab8 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -13,6 +13,31 @@ config TARGET_RK3588_NEU6 IO board and Neu6a needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 6(Neu6) IO platform.
+config TARGET_ROCK5B_RK3588 + bool "Radxa ROCK5B RK3588 board" + select BOARD_LATE_INIT + help + Radxa ROCK5B is a Rockchip RK3588 based SBC (Single Board Computer) + by Radxa. + + There are tree variants depending on the DRAM size : 4G, 8G and 16G. + + Specification: + + Rockchip Rk3588 SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 4/8/16GB memory LPDDR4x + Mali G610MC4 GPU + MIPI CSI 2 multiple lanes connector + eMMC module connector + uSD slot (up to 128GB) + 2x USB 2.0, 2x USB 3.0 + 2x HDMI output, 1x HDMI input + Ethernet port + 40-pin IO header including UART, SPI, I2C and 5V DC power in + USB PD over USB Type-C + Size: 85mm x 54mm + config ROCKCHIP_BOOT_MODE_REG default 0xfd588080
@@ -26,5 +51,6 @@ config SYS_MALLOC_F_LEN default 0x80000
source board/edgeble/neural-compute-module-6/Kconfig +source board/radxa/rock5b-rk3588/Kconfig
endif diff --git a/board/radxa/rock5b-rk3588/Kconfig b/board/radxa/rock5b-rk3588/Kconfig new file mode 100644 index 000000000000..8f1444649afe --- /dev/null +++ b/board/radxa/rock5b-rk3588/Kconfig @@ -0,0 +1,15 @@ +if TARGET_ROCK5B_RK3588 + +config SYS_BOARD + default "rock5b-rk3588" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "rock5b-rk3588" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/radxa/rock5b-rk3588/MAINTAINERS b/board/radxa/rock5b-rk3588/MAINTAINERS new file mode 100644 index 000000000000..693751e583d9 --- /dev/null +++ b/board/radxa/rock5b-rk3588/MAINTAINERS @@ -0,0 +1,6 @@ +ROCK5B-RK3588 +M: Eugen Hristev eugen.hristev@collabora.com +S: Maintained +F: board/radxa/rock5b-rk3588 +F: include/configs/rock5b-rk3588 +F: configs/rock5b-rk3588_defconfig diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile new file mode 100644 index 000000000000..95d813596da4 --- /dev/null +++ b/board/radxa/rock5b-rk3588/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2022 Collabora Ltd. +# + +obj-y += rock5b-rk3588.o diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c new file mode 100644 index 000000000000..b5d74798f3b9 --- /dev/null +++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Collabora Ltd. + */ diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig new file mode 100644 index 000000000000..9b7db7de64be --- /dev/null +++ b/configs/rock5b-rk3588_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_ROCK5B_RK3588=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_REGULATOR_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYSRESET=y +# CONFIG_BINMAN_FDT is not set +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index a140c1a8a432..10b971361dab 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -88,6 +88,7 @@ List of mainline supported Rockchip boards: - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) * rk3588 - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-r1126) + - Radxa ROCK 5B (rock5b-rk3588) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) - Elgin-R1 (elgin-rv1108) diff --git a/include/configs/rock5b-rk3588.h b/include/configs/rock5b-rk3588.h new file mode 100644 index 000000000000..4f75c800060a --- /dev/null +++ b/include/configs/rock5b-rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2022 Collabora Ltd. + */ + +#ifndef __ROCK5B_RK3588_H +#define __ROCK5B_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __ROCK5B_RK3588_H */

RK3588 has two memory gaps when using 16 GiB DRAM size: [0x3fc000000 , 0x3fc500000] and [0x3fff00000 , 0x3ffffffff]
If the kernel is agnostic to these gaps, accessing the area causes a SError panic.
Hence, add reserved memory areas in kernel's DTB before booting.
Signed-off-by: Eugen Hristev eugen.hristev@collabora.com ---
Hi,
These memory gaps are required because the kernel crashes with a SError if accessing that area. It appears the ATAGs provide DDR banks that do not include those specific two regions. To be able to boot the kernel, those areas have to be reserved. Maybe someone from Rockchip could have an explanation to this behavior? Otherwise we have to block them at this level. If those memory ranges are reserved for a dedicated purpose we can come up with a better solution, w.r.t. the purpose of the regions.
Thanks ! Eugen
board/radxa/rock5b-rk3588/rock5b-rk3588.c | 35 +++++++++++++++++++++++ configs/rock5b-rk3588_defconfig | 1 + 2 files changed, 36 insertions(+)
diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c index b5d74798f3b9..5c3b52b94898 100644 --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c +++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c @@ -2,3 +2,38 @@ /* * Copyright (c) 2023 Collabora Ltd. */ + +#include <fdtdec.h> +#include <fdt_support.h> + +#ifdef CONFIG_OF_BOARD_SETUP +int rock5b_add_reserved_memory_fdt_nodes(void *new_blob) +{ + struct fdt_memory gap1 = { + .start = 0x3fc000000, + .end = 0x3fc4fffff, + }; + struct fdt_memory gap2 = { + .start = 0x3fff00000, + .end = 0x3ffffffff, + }; + unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; + unsigned int ret; + + /* + * Inject the reserved-memory nodes into the DTS + */ + ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, + NULL, flags); + if (ret) + return ret; + + return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, + NULL, flags); +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return rock5b_add_reserved_memory_fdt_nodes(blob); +} +#endif diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 9b7db7de64be..f3026c7ea166 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -26,6 +26,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y

On 2023/2/22 17:05, Eugen Hristev wrote:
RK3588 has two memory gaps when using 16 GiB DRAM size: [0x3fc000000 , 0x3fc500000] and [0x3fff00000 , 0x3ffffffff]
If the kernel is agnostic to these gaps, accessing the area causes a SError panic.
Hence, add reserved memory areas in kernel's DTB before booting.
Signed-off-by: Eugen Hristev eugen.hristev@collabora.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
Hi,
These memory gaps are required because the kernel crashes with a SError if accessing that area. It appears the ATAGs provide DDR banks that do not include those specific two regions. To be able to boot the kernel, those areas have to be reserved. Maybe someone from Rockchip could have an explanation to this behavior? Otherwise we have to block them at this level. If those memory ranges are reserved for a dedicated purpose we can come up with a better solution, w.r.t. the purpose of the regions.
Thanks ! Eugen
board/radxa/rock5b-rk3588/rock5b-rk3588.c | 35 +++++++++++++++++++++++ configs/rock5b-rk3588_defconfig | 1 + 2 files changed, 36 insertions(+)
diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c index b5d74798f3b9..5c3b52b94898 100644 --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c +++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c @@ -2,3 +2,38 @@ /*
- Copyright (c) 2023 Collabora Ltd.
*/
+#include <fdtdec.h> +#include <fdt_support.h>
+#ifdef CONFIG_OF_BOARD_SETUP +int rock5b_add_reserved_memory_fdt_nodes(void *new_blob) +{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,
.end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,
.end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS
*/
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);
- if (ret)
return ret;
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);
+}
+int ft_board_setup(void *blob, struct bd_info *bd) +{
- return rock5b_add_reserved_memory_fdt_nodes(blob);
+} +#endif diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 9b7db7de64be..f3026c7ea166 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -26,6 +26,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y

On 2023/2/22 17:05, Eugen Hristev wrote:
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specification:
Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm
Kernel commits: a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board") 6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")
Signed-off-by: Eugen Hristev eugen.hristev@collabora.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
Changes in v2:
- added kernel commits that added the DT for the board in Kernel.
This board comes on top of Jagan's series for adding the rk3588 support: https://lists.denx.de/pipermail/u-boot/2023-January/506784.html And Jonas' series of patches that adds support for DDR v3 : https://lists.denx.de/pipermail/u-boot/2023-January/504923.html and another series from Jonas about rockchip TPL https://lists.denx.de/pipermail/u-boot/2023-February/509051.html And a workaround to make SD-Card 400 kHz clock working from Jonas' private tree
Thanks, Eugen
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 22 +++++++ arch/arm/dts/rk3588-rock-5b.dts | 44 ++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 26 +++++++++ board/radxa/rock5b-rk3588/Kconfig | 15 +++++ board/radxa/rock5b-rk3588/MAINTAINERS | 6 ++ board/radxa/rock5b-rk3588/Makefile | 6 ++ board/radxa/rock5b-rk3588/rock5b-rk3588.c | 4 ++ configs/rock5b-rk3588_defconfig | 71 +++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/rock5b-rk3588.h | 15 +++++ 10 files changed, 210 insertions(+) create mode 100644 arch/arm/dts/rk3588-rock-5b-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588-rock-5b.dts create mode 100644 board/radxa/rock5b-rk3588/Kconfig create mode 100644 board/radxa/rock5b-rk3588/MAINTAINERS create mode 100644 board/radxa/rock5b-rk3588/Makefile create mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c create mode 100644 configs/rock5b-rk3588_defconfig create mode 100644 include/configs/rock5b-rk3588.h
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi new file mode 100644 index 000000000000..2386edf90deb --- /dev/null +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2023 Collabora Ltd.
- */
+#include "rk3588-u-boot.dtsi"
+/ {
- aliases {
mmc0 = &sdmmc;
- };
- chosen {
u-boot,spl-boot-order = &sdmmc;
- };
+};
+&sdmmc {
- bus-width = <4>;
- u-boot,dm-spl;
- status = "okay";
+}; diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts new file mode 100644 index 000000000000..95805cb0adfa --- /dev/null +++ b/arch/arm/dts/rk3588-rock-5b.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "rk3588.dtsi"
+/ {
- model = "Radxa ROCK 5 Model B";
- compatible = "radxa,rock-5b", "rockchip,rk3588";
- aliases {
mmc0 = &sdhci;
serial2 = &uart2;
- };
- chosen {
stdout-path = "serial2:1500000n8";
- };
- vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- };
+};
+&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
+};
+&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
+}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index def4094e2e44..aee71ca1dab8 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -13,6 +13,31 @@ config TARGET_RK3588_NEU6 IO board and Neu6a needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 6(Neu6) IO platform.
+config TARGET_ROCK5B_RK3588
- bool "Radxa ROCK5B RK3588 board"
- select BOARD_LATE_INIT
- help
Radxa ROCK5B is a Rockchip RK3588 based SBC (Single Board Computer)
by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x HDMI output, 1x HDMI input
Ethernet port
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 54mm
- config ROCKCHIP_BOOT_MODE_REG default 0xfd588080
@@ -26,5 +51,6 @@ config SYS_MALLOC_F_LEN default 0x80000
source board/edgeble/neural-compute-module-6/Kconfig +source board/radxa/rock5b-rk3588/Kconfig
endif diff --git a/board/radxa/rock5b-rk3588/Kconfig b/board/radxa/rock5b-rk3588/Kconfig new file mode 100644 index 000000000000..8f1444649afe --- /dev/null +++ b/board/radxa/rock5b-rk3588/Kconfig @@ -0,0 +1,15 @@ +if TARGET_ROCK5B_RK3588
+config SYS_BOARD
- default "rock5b-rk3588"
+config SYS_VENDOR
- default "radxa"
+config SYS_CONFIG_NAME
- default "rock5b-rk3588"
+config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
+endif diff --git a/board/radxa/rock5b-rk3588/MAINTAINERS b/board/radxa/rock5b-rk3588/MAINTAINERS new file mode 100644 index 000000000000..693751e583d9 --- /dev/null +++ b/board/radxa/rock5b-rk3588/MAINTAINERS @@ -0,0 +1,6 @@ +ROCK5B-RK3588 +M: Eugen Hristev eugen.hristev@collabora.com +S: Maintained +F: board/radxa/rock5b-rk3588 +F: include/configs/rock5b-rk3588 +F: configs/rock5b-rk3588_defconfig diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile new file mode 100644 index 000000000000..95d813596da4 --- /dev/null +++ b/board/radxa/rock5b-rk3588/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2022 Collabora Ltd. +#
+obj-y += rock5b-rk3588.o diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c new file mode 100644 index 000000000000..b5d74798f3b9 --- /dev/null +++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (c) 2023 Collabora Ltd.
- */
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig new file mode 100644 index 000000000000..9b7db7de64be --- /dev/null +++ b/configs/rock5b-rk3588_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_ROCK5B_RK3588=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_REGULATOR_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYSRESET=y +# CONFIG_BINMAN_FDT is not set +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index a140c1a8a432..10b971361dab 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -88,6 +88,7 @@ List of mainline supported Rockchip boards: - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
- rk3588
- Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-r1126)
- Radxa ROCK 5B (rock5b-rk3588)
- rv1108
- Rockchip Evb-rv1108 (evb-rv1108)
- Elgin-R1 (elgin-rv1108)
diff --git a/include/configs/rock5b-rk3588.h b/include/configs/rock5b-rk3588.h new file mode 100644 index 000000000000..4f75c800060a --- /dev/null +++ b/include/configs/rock5b-rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright (c) 2022 Collabora Ltd.
- */
+#ifndef __ROCK5B_RK3588_H +#define __ROCK5B_RK3588_H
+#define ROCKCHIP_DEVICE_SETTINGS \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
+#include <configs/rk3588_common.h>
+#endif /* __ROCK5B_RK3588_H */
participants (2)
-
Eugen Hristev
-
Kever Yang