[U-Boot] [PATCH] mc : Add support to run MC in 128 MB DDR size

ls2088, ls1088 : minimum DDR size for MC is 128 MB lx2 : minimum DDR size for MC is 256 MB
Alignment of MC Base Address is as per the MC size.
Signed-off-by: Meenakshi Aggarwal meenakshi.aggarwal@nxp.com --- drivers/net/fsl-mc/mc.c | 56 +++++++++++++++++++++++++++++++++++----- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 2 +- 4 files changed, 52 insertions(+), 10 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d0b8c03..708472c 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -21,13 +21,24 @@ #include <fsl-mc/fsl_qbman_portal.h> #include <fsl-mc/ldpaa_wriop.h>
-#define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024) -#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1)) +#define MC_RAM_BASE_ADDR_ALIGNMENT_128 (128UL * 1024 * 1024) +#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK_128 \ + (~(MC_RAM_BASE_ADDR_ALIGNMENT_128 - 1)) + +#define MC_RAM_BASE_ADDR_ALIGNMENT_256 (256UL * 1024 * 1024) +#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK_256 \ + (~(MC_RAM_BASE_ADDR_ALIGNMENT_256 - 1)) + +#define MC_RAM_BASE_ADDR_ALIGNMENT_512 (512UL * 1024 * 1024) +#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK_512 \ + (~(MC_RAM_BASE_ADDR_ALIGNMENT_512 - 1)) + #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
#define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" #define MC_BOOT_ENV_VAR "mcinitcmd" +#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
DECLARE_GLOBAL_DATA_PTR; static int mc_memset_resv_ram; @@ -683,7 +694,15 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t mc_ram_size = mc_get_dram_block_size();
mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; - if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) { + + /* + * To support 128 MB DDR Size for MC + */ + if (mc_ram_num_256mb_blocks == 0) { + mc_ram_num_256mb_blocks = 0xFF; + } + + if (mc_ram_num_256mb_blocks > 0xff) { error = -EINVAL; printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", mc_ram_size); @@ -730,8 +749,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */ - reg_mcfbalr = (u32)mc_ram_addr | - (mc_ram_num_256mb_blocks - 1); + if (mc_ram_num_256mb_blocks < 0xFF) { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks - 1); + } else { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks); + } + out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)(mc_ram_addr >> 32)); @@ -838,6 +863,21 @@ int get_dpl_apply_status(void) }
/* + * Return alignment for MC base address + */ +unsigned long get_base_address_alignment(unsigned long mc_ram_size) +{ + if (mc_ram_size == MC_RAM_BASE_ADDR_ALIGNMENT_128) { + return MC_RAM_BASE_ADDR_ALIGNMENT_MASK_128; + } else if (mc_ram_size > MC_RAM_BASE_ADDR_ALIGNMENT_128 && + mc_ram_size <= MC_RAM_BASE_ADDR_ALIGNMENT_256) { + return MC_RAM_BASE_ADDR_ALIGNMENT_MASK_256; + } else { + return MC_RAM_BASE_ADDR_ALIGNMENT_MASK_512; + } +} + +/* * Return the MC address of private DRAM block. * As per MC design document, MC initial base address * should be least significant 512MB address of MC private @@ -847,14 +887,16 @@ int get_dpl_apply_status(void) u64 mc_get_dram_addr(void) { size_t mc_ram_size = mc_get_dram_block_size(); + unsigned long mc_alignment;
if (!mc_memset_resv_ram || (get_mc_boot_status() < 0)) { mc_memset_resv_ram = 1; memset((void *)gd->arch.resv_ram, 0, mc_ram_size); }
+ mc_alignment = get_base_address_alignment(mc_ram_size); return (gd->arch.resv_ram + mc_ram_size - 1) & - MC_RAM_BASE_ADDR_ALIGNMENT_MASK; + mc_alignment; }
/** @@ -876,7 +918,7 @@ unsigned long mc_get_dram_block_size(void) "' environment variable: %lu\n", dram_block_size);
- dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; + dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE; } }
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 89133c2..1509292 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -154,7 +154,7 @@ unsigned long long get_qixis_addr(void); */
#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif /* Command line configuration */ #define CONFIG_CMD_CACHE diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ab38981..7c1d35b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -159,7 +159,7 @@ unsigned long long get_qixis_addr(void); * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif
/* Command line configuration */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 0f1a621..c4bbe96 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -102,7 +102,7 @@ * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) #endif
/* I2C bus multiplexer */

ls2088, ls1088 : minimum DDR size for MC is 128 MB lx2 : minimum DDR size for MC is 256 MB
Signed-off-by: Meenakshi Aggarwal meenakshi.aggarwal@nxp.com --- drivers/net/fsl-mc/mc.c | 23 +++++++++++++++++++---- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 2 +- 4 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d0b8c03..7ba44cd 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -28,6 +28,7 @@ #define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" #define MC_BOOT_ENV_VAR "mcinitcmd" +#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
DECLARE_GLOBAL_DATA_PTR; static int mc_memset_resv_ram; @@ -683,7 +684,8 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t mc_ram_size = mc_get_dram_block_size();
mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; - if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) { + + if (mc_ram_num_256mb_blocks >= 0xff) { error = -EINVAL; printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", mc_ram_size); @@ -691,6 +693,13 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) }
/* + * To support 128 MB DDR Size for MC + */ + if (mc_ram_num_256mb_blocks == 0) { + mc_ram_num_256mb_blocks = 0xFF; + } + + /* * Management Complex cores should be held at reset out of POR. * U-Boot should be the first software to touch MC. To be safe, * we reset all cores again by setting GCR1 to 0. It doesn't do @@ -730,8 +739,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */ - reg_mcfbalr = (u32)mc_ram_addr | - (mc_ram_num_256mb_blocks - 1); + if (mc_ram_num_256mb_blocks < 0xFF) { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks - 1); + } else { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks); + } + out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)(mc_ram_addr >> 32)); @@ -876,7 +891,7 @@ unsigned long mc_get_dram_block_size(void) "' environment variable: %lu\n", dram_block_size);
- dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; + dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE; } }
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 89133c2..1509292 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -154,7 +154,7 @@ unsigned long long get_qixis_addr(void); */
#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif /* Command line configuration */ #define CONFIG_CMD_CACHE diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ab38981..7c1d35b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -159,7 +159,7 @@ unsigned long long get_qixis_addr(void); * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif
/* Command line configuration */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 0f1a621..c4bbe96 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -102,7 +102,7 @@ * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) #endif
/* I2C bus multiplexer */

-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Meenakshi Aggarwal Sent: Wednesday, February 20, 2019 3:36 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1] mc : Add support to run MC in 128 MB DDR size
Ashish: Rephrase to "Reduce MC memory size to 128M" from the above it sound like system DDR is 128MB
Regards Ashish
ls2088, ls1088 : minimum DDR size for MC is 128 MB lx2 : minimum DDR size for MC is 256 MB
Signed-off-by: Meenakshi Aggarwal meenakshi.aggarwal@nxp.com
drivers/net/fsl-mc/mc.c | 23 +++++++++++++++++++---- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 2 +- 4 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d0b8c03..7ba44cd 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -28,6 +28,7 @@ #define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" #define MC_BOOT_ENV_VAR "mcinitcmd" +#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
DECLARE_GLOBAL_DATA_PTR; static int mc_memset_resv_ram; @@ -683,7 +684,8 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t mc_ram_size = mc_get_dram_block_size();
mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
- if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks >
0xff) {
- if (mc_ram_num_256mb_blocks >= 0xff) { error = -EINVAL; printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", mc_ram_size);
@@ -691,6 +693,13 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) }
/*
* To support 128 MB DDR Size for MC
*/
- if (mc_ram_num_256mb_blocks == 0) {
mc_ram_num_256mb_blocks = 0xFF;
- }
- /*
- Management Complex cores should be held at reset out of POR.
- U-Boot should be the first software to touch MC. To be safe,
- we reset all cores again by setting GCR1 to 0. It doesn't do @@ -730,8
+739,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */
- reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks - 1);
- if (mc_ram_num_256mb_blocks < 0xFF) {
reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks - 1);
- } else {
reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks);
- }
- out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)(mc_ram_addr >> 32));
@@ -876,7 +891,7 @@ unsigned long mc_get_dram_block_size(void) "' environment variable: %lu\n", dram_block_size);
dram_block_size =
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
} }dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE;
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 89133c2..1509292 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -154,7 +154,7 @@ unsigned long long get_qixis_addr(void); */
#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif /* Command line configuration */ #define CONFIG_CMD_CACHE diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ab38981..7c1d35b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -159,7 +159,7 @@ unsigned long long get_qixis_addr(void);
- 512MB aligned, so the min size to hide is 512MB.
*/ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif
/* Command line configuration */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 0f1a621..c4bbe96 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -102,7 +102,7 @@
- 512MB aligned, so the min size to hide is 512MB.
*/ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) #endif
/* I2C bus multiplexer */
1.9.1
U-Boot mailing list U-Boot@lists.denx.de https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de nx.de%2Flistinfo%2Fu- boot&data=02%7C01%7CAshish.Kumar%40nxp.com%7C47b95d2e68d34 362e1cc08d696ead9c9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 %7C636862332767130806&sdata=nqugF6OMxgjPXOW5kpQemHRWAgo zVGwMndpxztNqDgE%3D&reserved=0

-----Original Message----- From: Ashish Kumar Sent: Tuesday, February 26, 2019 12:08 PM To: Meenakshi Aggarwal meenakshi.aggarwal@nxp.com; u- boot@lists.denx.de Subject: RE: [U-Boot] [PATCH v1] mc : Add support to run MC in 128 MB DDR size
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Meenakshi Aggarwal Sent: Wednesday, February 20, 2019 3:36 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1] mc : Add support to run MC in 128 MB DDR size
Ashish: Rephrase to "Reduce MC memory size to 128M" from the above it sound like system DDR is 128MB
Ok
Regards Ashish
ls2088, ls1088 : minimum DDR size for MC is 128 MB lx2 : minimum DDR size for MC is 256 MB
Signed-off-by: Meenakshi Aggarwal meenakshi.aggarwal@nxp.com
drivers/net/fsl-mc/mc.c | 23 +++++++++++++++++++---- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 2 +- 4 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index d0b8c03..7ba44cd 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -28,6 +28,7 @@ #define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" #define MC_BOOT_ENV_VAR "mcinitcmd" +#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
DECLARE_GLOBAL_DATA_PTR; static int mc_memset_resv_ram; @@ -683,7 +684,8 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t mc_ram_size = mc_get_dram_block_size();
mc_ram_num_256mb_blocks = mc_ram_size /
MC_RAM_SIZE_ALIGNMENT;
- if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks >
0xff) {
- if (mc_ram_num_256mb_blocks >= 0xff) { error = -EINVAL; printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", mc_ram_size);
@@ -691,6 +693,13 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) }
/*
* To support 128 MB DDR Size for MC
*/
- if (mc_ram_num_256mb_blocks == 0) {
mc_ram_num_256mb_blocks = 0xFF;
- }
- /*
- Management Complex cores should be held at reset out of POR.
- U-Boot should be the first software to touch MC. To be safe,
- we reset all cores again by setting GCR1 to 0. It doesn't do @@
-730,8 +739,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */
- reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks - 1);
- if (mc_ram_num_256mb_blocks < 0xFF) {
reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks - 1);
- } else {
reg_mcfbalr = (u32)mc_ram_addr |
(mc_ram_num_256mb_blocks);
- }
- out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)(mc_ram_addr >> 32));
@@ -876,7 +891,7 @@ unsigned long mc_get_dram_block_size(void) "' environment variable: %lu\n", dram_block_size);
dram_block_size =
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
} }dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE;
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 89133c2..1509292 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -154,7 +154,7 @@ unsigned long long get_qixis_addr(void); */
#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
(512UL *
1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
(128UL *
1024 * 1024) #endif /* Command line configuration */ #define CONFIG_CMD_CACHE diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ab38981..7c1d35b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -159,7 +159,7 @@ unsigned long long get_qixis_addr(void);
- 512MB aligned, so the min size to hide is 512MB.
*/ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
(512UL *
1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
(128UL *
1024 * 1024) #endif
/* Command line configuration */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 0f1a621..c4bbe96 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -102,7 +102,7 @@
- 512MB aligned, so the min size to hide is 512MB.
*/ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024
#endif
/* I2C bus multiplexer */
1.9.1
U-Boot mailing list U-Boot@lists.denx.de https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis ts.de nx.de%2Flistinfo%2Fu- boot&data=02%7C01%7CAshish.Kumar%40nxp.com%7C47b95d2e68d34 362e1cc08d696ead9c9%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 %7C636862332767130806&sdata=nqugF6OMxgjPXOW5kpQemHRWAgo zVGwMndpxztNqDgE%3D&reserved=0
participants (2)
-
Ashish Kumar
-
Meenakshi Aggarwal