[PATCH v4 0/4] J721E HS Fixes
This series fixes the support for J721E board along with some maintainance for it.
v4: - Fix docs - applied reviewed-by
v3: - drop fixes related to other boards ( make series j721e specific ) - memory map added in docs - applied reviewed-by
v2: - Merge two series - Include some more commits that fix the gp builds when merging defconfigs - Update MAINTAINERS to remove hs related defconfigs - applied Acks
Andrew Davis (1): arm: k3: config.mk: Add missing dependencies on tispl.bin HS
Dave Gerlach (1): arm: mach-k3: Increase SYSFW max image size
Manorit Chawdhry (2): configs: j721e: Merge the HS and non-HS defconfigs Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
MAINTAINERS | 2 - arch/arm/mach-k3/Kconfig | 6 +- arch/arm/mach-k3/config.mk | 2 + configs/j721e_evm_a72_defconfig | 3 +- configs/j721e_evm_r5_defconfig | 11 +- configs/j721e_hs_evm_a72_defconfig | 208 ----------------------------- configs/j721e_hs_evm_r5_defconfig | 176 ------------------------ doc/board/ti/j721e_evm.rst | 27 ++++ 8 files changed, 43 insertions(+), 392 deletions(-) delete mode 100644 configs/j721e_hs_evm_a72_defconfig delete mode 100644 configs/j721e_hs_evm_r5_defconfig
From: Andrew Davis afd@ti.com
When building for secure devices using non-buildman based image generation the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned tispl.bin file as expected.
Signed-off-by: Andrew Davis afd@ti.com Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com --- arch/arm/mach-k3/config.mk | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index 9306f2627d9a..cbf9c10210a6 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -68,6 +68,8 @@ ifeq ($(CONFIG_TI_SECURE_DEVICE),y) SPL_ITS := u-boot-spl-k3_HS.its $(SPL_ITS): export IS_HS=1 INPUTS-y += tispl.bin_HS +INPUTS-y += tispl.bin +tispl.bin: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(subst ",,$(CONFIG_SPL_OF_LIST))) else SPL_ITS := u-boot-spl-k3.its INPUTS-y += tispl.bin
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored.
Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com Acked-by: Andrew Davis afd@ti.com --- MAINTAINERS | 2 - configs/j721e_evm_a72_defconfig | 3 +- configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_a72_defconfig | 208 ----------------------------- configs/j721e_hs_evm_r5_defconfig | 176 ------------------------ 5 files changed, 3 insertions(+), 387 deletions(-) delete mode 100644 configs/j721e_hs_evm_a72_defconfig delete mode 100644 configs/j721e_hs_evm_r5_defconfig
diff --git a/MAINTAINERS b/MAINTAINERS index 41c9f265f815..9e5e51b2eeeb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1462,8 +1462,6 @@ F: configs/am65x_hs_evm_r5_defconfig F: configs/am65x_hs_evm_a53_defconfig F: configs/j7200_hs_evm_a72_defconfig F: configs/j7200_hs_evm_r5_defconfig -F: configs/j721e_hs_evm_a72_defconfig -F: configs/j721e_hs_evm_r5_defconfig F: configs/j721s2_hs_evm_a72_defconfig F: configs/j721s2_hs_evm_r5_defconfig
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 2190df1f3a51..48b48f43e7ec 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y @@ -30,7 +31,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 16fa386792d4..476072659571 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x70000 CONFIG_SPL_GPIO=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig deleted file mode 100644 index 7aba55c2d488..000000000000 --- a/configs/j721e_hs_evm_a72_defconfig +++ /dev/null @@ -1,208 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y -CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_SOC_K3_J721E=y -CONFIG_TARGET_J721E_A72_EVM=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" -CONFIG_SPL_TEXT_BASE=0x80080000 -CONFIG_DM_RESET=y -CONFIG_SPL_MMC=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_SPL_FS_FAT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y -# CONFIG_PSCI_RESET is not set -CONFIG_DISTRO_DEFAULTS=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlay_${boot}; run run_fit" -CONFIG_LOGLEVEL=7 -CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 -CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 -CONFIG_SPL_DMA=y -CONFIG_SPL_ENV_SUPPORT=y -CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" -CONFIG_SPL_I2C=y -CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_DM_SPI_FLASH=y -CONFIG_SPL_NOR_SUPPORT=y -CONFIG_SPL_DM_RESET=y -CONFIG_SPL_POWER_DOMAIN=y -CONFIG_SPL_RAM_SUPPORT=y -CONFIG_SPL_RAM_DEVICE=y -# CONFIG_SPL_SPI_FLASH_TINY is not set -CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 -CONFIG_SPL_USB_GADGET=y -CONFIG_SPL_DFU=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_SYS_MAXARGS=64 -CONFIG_CMD_ASKENV=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_MTD=y -CONFIG_CMD_REMOTEPROC=y -CONFIG_CMD_UFS=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" -CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),1m(ospi.sysfw),256k(ospi.env.backup),57344k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" -CONFIG_CMD_UBI=y -CONFIG_MMC_SPEED_MODE_SET=y -# CONFIG_ISO_PARTITION is not set -# CONFIG_SPL_EFI_PARTITION is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="k3-j721e-common-proc-board k3-j721e-sk" -CONFIG_MULTI_DTB_FIT=y -CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_NOWHERE=y -CONFIG_ENV_IS_IN_FAT=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_REGMAP=y -CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y -CONFIG_SPL_SYSCON=y -CONFIG_SPL_OF_TRANSLATE=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y -CONFIG_CLK_TI_SCI=y -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20000 -CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 -CONFIG_DMA_CHANNELS=y -CONFIG_TI_K3_NAVSS_UDMA=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_TI_SCI_PROTOCOL=y -CONFIG_DA8XX_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_DM_I2C_GPIO=y -CONFIG_SYS_I2C_OMAP24XX=y -CONFIG_DM_MAILBOX=y -CONFIG_K3_SEC_PROXY=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ADMA=y -CONFIG_SPL_MMC_SDHCI_ADMA=y -CONFIG_MMC_SDHCI_AM654=y -CONFIG_MTD=y -CONFIG_DM_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_SHOW_PROGRESS=0 -CONFIG_CFI_FLASH=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_FLASH_CFI_MTD=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_HBMC_AM654=y -CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_SPI_FLASH_MTD=y -CONFIG_MULTIPLEXER=y -CONFIG_MUX_MMIO=y -CONFIG_PHY_TI_DP83867=y -CONFIG_PHY_FIXED=y -CONFIG_TI_AM65_CPSW_NUSS=y -CONFIG_PHY=y -CONFIG_SPL_PHY=y -CONFIG_PHY_CADENCE_SIERRA=y -CONFIG_PHY_J721E_WIZ=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_GENERIC is not set -CONFIG_SPL_PINCTRL=y -# CONFIG_SPL_PINCTRL_GENERIC is not set -CONFIG_PINCTRL_SINGLE=y -CONFIG_POWER_DOMAIN=y -CONFIG_TI_SCI_POWER_DOMAIN=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_RAM=y -CONFIG_SPL_RAM=y -CONFIG_REMOTEPROC_TI_K3_DSP=y -CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_RESET_TI_SCI=y -CONFIG_SCSI=y -CONFIG_DM_SCSI=y -CONFIG_DM_SERIAL=y -CONFIG_SOC_DEVICE=y -CONFIG_SOC_DEVICE_TI_K3=y -CONFIG_SOC_TI=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CADENCE_QSPI=y -CONFIG_HAS_CQSPI_REF_CLK=y -CONFIG_CQSPI_REF_CLK=133333333 -CONFIG_SYSRESET=y -CONFIG_SPL_SYSRESET=y -CONFIG_SYSRESET_TI_SCI=y -CONFIG_USB=y -CONFIG_DM_USB_GADGET=y -CONFIG_SPL_DM_USB_GADGET=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_CDNS3=y -CONFIG_USB_CDNS3_GADGET=y -CONFIG_USB_CDNS3_HOST=y -CONFIG_SPL_USB_CDNS3_GADGET=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 -CONFIG_UFS=y -CONFIG_CADENCE_UFS=y -CONFIG_TI_J721E_UFS=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig deleted file mode 100644 index 7d6a047f3a58..000000000000 --- a/configs/j721e_hs_evm_r5_defconfig +++ /dev/null @@ -1,176 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y -CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x70000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SOC_K3_J721E=y -CONFIG_K3_EARLY_CONS=y -CONFIG_TARGET_J721E_R5_EVM=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc -CONFIG_ENV_SIZE=0x20000 -CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" -CONFIG_SPL_TEXT_BASE=0x41c00000 -CONFIG_DM_RESET=y -CONFIG_SPL_MMC=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_SPL_FS_FAT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 -CONFIG_OF_BOARD_SETUP=y -CONFIG_USE_BOOTCOMMAND=y -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc -CONFIG_SPL_BSS_MAX_SIZE=0xa000 -CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 -CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 -CONFIG_SPL_EARLY_BSS=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 -CONFIG_SPL_DMA=y -CONFIG_SPL_ENV_SUPPORT=y -CONFIG_SPL_FS_EXT4=y -CONFIG_SPL_I2C=y -CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_DM_SPI_FLASH=y -CONFIG_SPL_NOR_SUPPORT=y -CONFIG_SPL_DM_RESET=y -CONFIG_SPL_POWER_DOMAIN=y -CONFIG_SPL_RAM_SUPPORT=y -CONFIG_SPL_RAM_DEVICE=y -CONFIG_SPL_REMOTEPROC=y -# CONFIG_SPL_SPI_FLASH_TINY is not set -CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 -CONFIG_SPL_USB_GADGET=y -CONFIG_SPL_DFU=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_BOOTM_LEN=0x4000000 -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPT=y -CONFIG_CMD_MMC=y -CONFIG_CMD_REMOTEPROC=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TIME=y -CONFIG_CMD_FAT=y -CONFIG_CMD_MTDPARTS=y -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board k3-j721e-r5-sk" -CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_REGMAP=y -CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y -CONFIG_SPL_SYSCON=y -CONFIG_SPL_OF_TRANSLATE=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y -CONFIG_SPL_CLK_CCF=y -CONFIG_SPL_CLK_K3_PLL=y -CONFIG_SPL_CLK_K3=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 -CONFIG_DMA_CHANNELS=y -CONFIG_TI_K3_NAVSS_UDMA=y -CONFIG_TI_SCI_PROTOCOL=y -CONFIG_DA8XX_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_SYS_I2C_OMAP24XX=y -CONFIG_DM_MAILBOX=y -CONFIG_K3_SEC_PROXY=y -CONFIG_FS_LOADER=y -CONFIG_SPL_FS_LOADER=y -CONFIG_ESM_K3=y -CONFIG_K3_AVS0=y -CONFIG_ESM_PMIC=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y -CONFIG_MMC_SDHCI=y -CONFIG_SPL_MMC_SDHCI_ADMA=y -CONFIG_MMC_SDHCI_AM654=y -CONFIG_MTD=y -CONFIG_DM_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_SHOW_PROGRESS=0 -CONFIG_CFI_FLASH=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_FLASH_CFI_MTD=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_HBMC_AM654=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_GENERIC is not set -CONFIG_SPL_PINCTRL=y -# CONFIG_SPL_PINCTRL_GENERIC is not set -CONFIG_PINCTRL_SINGLE=y -CONFIG_POWER_DOMAIN=y -CONFIG_TI_POWER_DOMAIN=y -CONFIG_DM_PMIC=y -CONFIG_PMIC_TPS65941=y -CONFIG_DM_REGULATOR=y -CONFIG_SPL_DM_REGULATOR=y -CONFIG_DM_REGULATOR_TPS65941=y -CONFIG_K3_SYSTEM_CONTROLLER=y -CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_RESET_TI_SCI=y -CONFIG_DM_SERIAL=y -CONFIG_SOC_DEVICE=y -CONFIG_SOC_DEVICE_TI_K3=y -CONFIG_SOC_TI=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CADENCE_QSPI=y -CONFIG_HAS_CQSPI_REF_CLK=y -CONFIG_CQSPI_REF_CLK=133333333 -CONFIG_SYSRESET=y -CONFIG_SPL_SYSRESET=y -CONFIG_SYSRESET_TI_SCI=y -CONFIG_TIMER=y -CONFIG_SPL_TIMER=y -CONFIG_OMAP_TIMER=y -CONFIG_USB=y -CONFIG_DM_USB_GADGET=y -CONFIG_SPL_DM_USB_GADGET=y -CONFIG_USB_CDNS3=y -CONFIG_USB_CDNS3_GADGET=y -CONFIG_SPL_USB_CDNS3_GADGET=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_FS_EXT4=y -CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 -CONFIG_LIB_RATIONAL=y -CONFIG_SPL_LIB_RATIONAL=y
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis n-francis@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Kamlesh Gurudasani kamlesh@ti.com --- arch/arm/mach-k3/Kconfig | 3 ++- configs/j721e_evm_r5_defconfig | 10 ++++++++-- doc/board/ti/j721e_evm.rst | 27 +++++++++++++++++++++++++++ 3 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index a8c3a593d570..0991b42423a0 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -52,7 +52,8 @@ config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE config SYS_K3_MCU_SCRATCHPAD_BASE hex default 0x40280000 if SOC_K3_AM654 - default 0x40280000 if SOC_K3_J721E || SOC_K3_J721S2 + default 0x40280000 if SOC_K3_J721S2 + default 0x41cff9fc if SOC_K3_J721E help Describes the base address of MCU Scratchpad RAM.
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 476072659571..afe1f3a31306 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -21,10 +21,16 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0xf59f0 +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf59f0 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 @@ -32,9 +38,9 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_MAX_SIZE=0xf59f0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc +CONFIG_SPL_BSS_START_ADDR=0x41cf59f0 CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst index e898601c41ea..ac0ae3d9226b 100644 --- a/doc/board/ti/j721e_evm.rst +++ b/doc/board/ti/j721e_evm.rst @@ -268,6 +268,33 @@ Image formats: | +-------------------+ | +-----------------------+
+R5 Memory Map: +-------------- + +.. code-block:: text + + ┌─────────────────────────────────────┐ 0x41c00000 + │ SPL │ + ├─────────────────────────────────────┤ 0x41c40000 (approx) + │ EMPTY │ + ├─────────────────────────────────────┤ 0x41c81920 + │ STACK │ + │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ + ├─────────────────────────────────────┤ 0x41c85920 + │ Global data │ + │ sizeof(struct global_data) = 0xd8 │ + ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 + │ HEAP │ + │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ + ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR + │ SPL BSS │ (0x41cf59f0) + │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ + ├─────────────────────────────────────┤ 0x41cff9fc + │ NEW MCU SCRATCHPAD │ + │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ + └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX + (0x41cffbfc) + OSPI: ----- ROM supports booting from OSPI from offset 0x0.
On Mon, Mar 06, 2023 at 11:12:53AM +0530, Manorit Chawdhry wrote:
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis n-francis@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Kamlesh Gurudasani kamlesh@ti.com
arch/arm/mach-k3/Kconfig | 3 ++- configs/j721e_evm_r5_defconfig | 10 ++++++++-- doc/board/ti/j721e_evm.rst | 27 +++++++++++++++++++++++++++
OK, but now this just renders differently poorly. Please see the list-table directive as used for example in doc/board/apple/m1.rst and it would be good to get other ascii tables updated to produce nice output as well.
On 14:01-20230306, Tom Rini wrote:
On Mon, Mar 06, 2023 at 11:12:53AM +0530, Manorit Chawdhry wrote:
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis n-francis@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Kamlesh Gurudasani kamlesh@ti.com
arch/arm/mach-k3/Kconfig | 3 ++- configs/j721e_evm_r5_defconfig | 10 ++++++++-- doc/board/ti/j721e_evm.rst | 27 +++++++++++++++++++++++++++
OK, but now this just renders differently poorly. Please see the list-table directive as used for example in doc/board/apple/m1.rst and it would be good to get other ascii tables updated to produce nice output as well.
Hi Tom,
I've updated this table in v5, we can look at updating other tables later.
Thanks and regards, Manorit
-- Tom
On Wed, Mar 15, 2023 at 12:18:54PM +0530, Manorit Chawdhry wrote:
On 14:01-20230306, Tom Rini wrote:
On Mon, Mar 06, 2023 at 11:12:53AM +0530, Manorit Chawdhry wrote:
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents.
The commit changes R5 MCU scratchpad for j721e to an SRAM region.
Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX (0x41cffbfc)
Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis n-francis@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Kamlesh Gurudasani kamlesh@ti.com
arch/arm/mach-k3/Kconfig | 3 ++- configs/j721e_evm_r5_defconfig | 10 ++++++++-- doc/board/ti/j721e_evm.rst | 27 +++++++++++++++++++++++++++
OK, but now this just renders differently poorly. Please see the list-table directive as used for example in doc/board/apple/m1.rst and it would be good to get other ascii tables updated to produce nice output as well.
Hi Tom,
I've updated this table in v5, we can look at updating other tables later.
Sounds good, thanks.
From: Dave Gerlach d-gerlach@ti.com
When booting with HS silicon, the system firmware image is 278270, which is slightly larger than currently allocated amount.
This can cause unexpected behavior if this overlap interferes with other things in memory, so increase this with a slightly margin added as well to avoid any boot issues that can appear after system firmware gets loaded.
Signed-off-by: Dave Gerlach d-gerlach@ti.com Signed-off-by: Tero Kristo kristo@kernel.org Signed-off-by: Manorit Chawdhry m-chawdhry@ti.com --- arch/arm/mach-k3/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 0991b42423a0..bae0a827c29f 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -141,8 +141,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART config K3_SYSFW_IMAGE_SIZE_MAX int "Amount of memory dynamically allocated for loading SYSFW blob" depends on K3_LOAD_SYSFW - default 163840 if SOC_K3_AM625 || SOC_K3_AM62A7 - default 278000 + default 280000 help Amount of memory (in bytes) reserved through dynamic allocation at runtime for loading the combined System Firmware and configuration image
participants (2)
-
Manorit Chawdhry -
Tom Rini