[U-Boot] [PATCH 00/11] imx: ventana: misc patches

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[U-Boot] [PATCH] imx: ventana: add...

Tim Harvey

8 Aug 2014 8 Aug '14

7:35 a.m.

This is a series of patches in my queue for the Gateworks Ventana family of boards.

Tim Harvey (11): imx: ventana: set dynamic env var for flash layout imx: ventana: added cputype env var imx: ventana: remove caam disable per eeprom bit imx: ventana: add appropriate delay following GSC i2c write imx: ventana: add econfig command imx: ventana: add video enable gpio pinmux for GW54xx imx: ventana: add missing crlf to print imx: ventana: configure i2c_dis# pin properly for gw53xx imx: ventana: enable SION bit on gpio outputs imx: ventana: add iomux for PCISKT_WDIS# gpio imx: ventana: leave PCI reset de-asserted if PCI enabled

board/gateworks/gw_ventana/eeprom.c | 168 ++++++++++++++++- board/gateworks/gw_ventana/gsc.c | 2 +- board/gateworks/gw_ventana/gw_ventana.c | 267 ++++++++++++---------------- board/gateworks/gw_ventana/ventana_eeprom.h | 11 ++ include/configs/gw_ventana.h | 5 +- 5 files changed, 297 insertions(+), 156 deletions(-)

-- 1.8.3.2

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Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 01/11] imx: ventana: set dynamic env var for flash layout

NAND devices have differing layouts with respect to page size and pages per block. These parameters affect the parameters that need to be passed to mkfs.ubifs and ubinize used to create UBI images. The various NAND chips supported by Gateworks Ventana fall into two different layouts which we refer to as 'normal' and 'large'. This layout is useful when referencing ubi files to download and flash so we create a dynamic env variable for it.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9d2651f..a8fcb5d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,10 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl"; + if (8 << (ventana_info.nand_flash_size-1) >= 2048) + setenv("flash_layout", "large"); + else + setenv("flash_layout", "normal"); memset(str, 0, sizeof(str)); for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++) str[i] = tolower(info->model[i]);

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

12:52 p.m.

New subject: [U-Boot] [PATCH 01/11] imx: ventana: set dynamic env var for flash layout

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

NAND devices have differing layouts with respect to page size and pages per block. These parameters affect the parameters that need to be passed to mkfs.ubifs and ubinize used to create UBI images. The various NAND chips supported by Gateworks Ventana fall into two different layouts which we refer to as 'normal' and 'large'. This layout is useful when referencing ubi files to download and flash so we create a dynamic env variable for it.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9d2651f..a8fcb5d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,10 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl";
if (8 << (ventana_info.nand_flash_size-1) >= 2048)
	setenv("flash_layout", "large");
else
	setenv("flash_layout", "normal");
memset(str, 0, sizeof(str)); for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++) str[i] = tolower(info->model[i]);

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

-- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de =====================================================================

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 02/11] imx: ventana: added cputype env var

There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a8fcb5d..de2336e 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,7 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl"; + setenv("soctype", cputype); if (8 << (ventana_info.nand_flash_size-1) >= 2048) setenv("flash_layout", "large"); else

-- 1.8.3.2

Stefano Babic

14 Aug 14 Aug

5:23 p.m.

New subject: [U-Boot] [PATCH 02/11] imx: ventana: added cputype env var

On 08/08/2014 07:35, Tim Harvey wrote:

...

There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a8fcb5d..de2336e 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,7 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl";
setenv("soctype", cputype);

So you have soc=mx6 and soctype=<value of cputype>, if CONFIG_SYS_SOC is set.

Is it important to have both or you can simply redefine the variable "soc" ?

Best regards, Stefano Babic

Tim Harvey

18 Aug 18 Aug

3:52 p.m.

New subject: [U-Boot] [PATCH 02/11] imx: ventana: added cputype env var

On Thu, Aug 14, 2014 at 8:23 AM, Stefano Babic sbabic@denx.de wrote:

...

On 08/08/2014 07:35, Tim Harvey wrote:

...
There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a8fcb5d..de2336e 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,7 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl";
        setenv("soctype", cputype);
So you have soc=mx6 and soctype=<value of cputype>, if CONFIG_SYS_SOC is set.

Is it important to have both or you can simply redefine the variable "soc" ?

Best regards, Stefano Babic

Hi Stefano,

Yes, I do feel its important, although the name and where its set is debatable.

There are enough similarities between an IMX6DUAL/IMX6QUAD vs an IMX6SOLO/IMX6DUALLITE making it such that if your board supports all 4 CPU's, you would usually have just two device-tree files: imx6q-<foo>.dtb (supporting both the QUAD and the DUAL soc variants) and imx6dl-<foo>.dtb (supporting both the DUALLITE and SOLO soc variants).

Regards,

Tim

Stefano Babic

20 Aug 20 Aug

12:51 p.m.

New subject: [U-Boot] [PATCH 02/11] imx: ventana: added cputype env var

Hi Tim,

On 18/08/2014 15:52, Tim Harvey wrote:

...

On Thu, Aug 14, 2014 at 8:23 AM, Stefano Babic sbabic@denx.de wrote:

...
On 08/08/2014 07:35, Tim Harvey wrote:

...
There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a8fcb5d..de2336e 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1264,6 +1264,7 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl";
        setenv("soctype", cputype);
So you have soc=mx6 and soctype=<value of cputype>, if CONFIG_SYS_SOC is set.

Is it important to have both or you can simply redefine the variable "soc" ?

Best regards, Stefano Babic
Hi Stefano,

Yes, I do feel its important, although the name and where its set is debatable.

There are enough similarities between an IMX6DUAL/IMX6QUAD vs an IMX6SOLO/IMX6DUALLITE making it such that if your board supports all 4 CPU's, you would usually have just two device-tree files: imx6q-<foo>.dtb (supporting both the QUAD and the DUAL soc variants) and imx6dl-<foo>.dtb (supporting both the DUALLITE and SOLO soc variants).

I agree on that, my only concern if the variable "soc" set to "mx6" has still a meaning. When "soctype" is set to "imx6dl" (or whatever), "soc" loses its meaning. Then it could be possible to set "soc" to the value of cputype instead of adding a new one. What do you think ?=

Anyway, this is *not* a blocking point on my side. I will apply the patch as it is if you think it is better for your board.

Best regards, Stefano Babic

...

Regards,

Tim

Stefano Babic

9 Sep 9 Sep

3:19 p.m.

New subject: [U-Boot] [PATCH 02/11] imx: ventana: added cputype env var

On 08/08/2014 07:35, Tim Harvey wrote:

...

There are many similarities between the IMX6QUAD/IMX6DUAL and there are many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env variable that tells you which type you have.

Signed-off-by: Tim Harvey tharvey@gateworks.com

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 03/11] imx: ventana: remove caam disable per eeprom bit

During manufacturing this bit is not getting enabled when it should be, so we will ignore it.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index de2336e..b35fe5a 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1388,7 +1388,7 @@ const char *fdt_aliases[] = { "vpu", "csi0", "csi1", - "caam", + NULL, NULL, NULL, NULL,

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

12:53 p.m.

New subject: [U-Boot] [PATCH 03/11] imx: ventana: remove caam disable per eeprom bit

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

During manufacturing this bit is not getting enabled when it should be, so we will ignore it.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index de2336e..b35fe5a 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1388,7 +1388,7 @@ const char *fdt_aliases[] = { "vpu", "csi0", "csi1",

"caam",

NULL, NULL, NULL, NULL,

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 04/11] imx: ventana: add appropriate delay following GSC i2c write

The Gateworks System Controller EEPROM config is flash based. Add a delay following writes to avoid errors on back-to-back writes.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 37966ab..1cf38d4 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -57,7 +57,7 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) break; mdelay(10); } - mdelay(1); + mdelay(100); return ret; }

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

12:54 p.m.

New subject: [U-Boot] [PATCH 04/11] imx: ventana: add appropriate delay following GSC i2c write

On 08/08/2014 07:35, Tim Harvey wrote:

...

The Gateworks System Controller EEPROM config is flash based. Add a delay following writes to avoid errors on back-to-back writes.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 37966ab..1cf38d4 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -57,7 +57,7 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) break; mdelay(10); }

mdelay(1);

mdelay(100); return ret;

}

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 05/11] imx: ventana: add econfig command

The Gateworks Ventana EEPROM contains a set of configuration bits that affect the removal of device-tree nodes that support peripherals that do not exist on sub-loaded boards. This patch adds: - a structure to define a config bit name, dt node alias, bit position - an array of supported configuration items - an econfig command to get/set/list configuration bits - use of the array when adjusting the FDT prior to boot

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/eeprom.c | 168 +++++++++++++++++++++++++++- board/gateworks/gw_ventana/gw_ventana.c | 100 +++-------------- board/gateworks/gw_ventana/ventana_eeprom.h | 11 ++ include/configs/gw_ventana.h | 5 +- 4 files changed, 198 insertions(+), 86 deletions(-)

diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index e90186e..3edc915 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -6,7 +6,10 @@ */

#include <common.h> +#include <errno.h> #include <i2c.h> +#include <malloc.h> +#include <asm/bitops.h>

#include "gsc.h" #include "ventana_eeprom.h" @@ -38,14 +41,12 @@ read_eeprom(int bus, struct ventana_board_info *info) /* read eeprom config section */ if (gsc_i2c_read(GSC_EEPROM_ADDR, 0x00, 1, buf, sizeof(*info))) { puts("EEPROM: Failed to read EEPROM\n"); - info->model[0] = 0; return GW_UNKNOWN; }

/* sanity checks */ if (info->model[0] != 'G' || info->model[1] != 'W') { puts("EEPROM: Invalid Model in EEPROM\n"); - info->model[0] = 0; return GW_UNKNOWN; }

@@ -55,7 +56,6 @@ read_eeprom(int bus, struct ventana_board_info *info) if ((info->chksum[0] != chksum>>8) || (info->chksum[1] != (chksum&0xff))) { puts("EEPROM: Failed EEPROM checksum\n"); - info->model[0] = 0; return GW_UNKNOWN; }

@@ -87,3 +87,165 @@ read_eeprom(int bus, struct ventana_board_info *info) } return type; } + +/* list of config bits that the bootloader will remove from dtb if not set */ +struct ventana_eeprom_config econfig[] = { + { "eth0", "ethernet0", EECONFIG_ETH0 }, + { "eth1", "ethernet1", EECONFIG_ETH1 }, + { "sata", "ahci0", EECONFIG_SATA }, + { "pcie", NULL, EECONFIG_PCIE}, + { "lvds0", NULL, EECONFIG_LVDS0 }, + { "lvds1", NULL, EECONFIG_LVDS1 }, + { "usb0", NULL, EECONFIG_USB0 }, + { "usb1", NULL, EECONFIG_USB1 }, + { "mmc0", NULL, EECONFIG_SD0 }, + { "mmc1", NULL, EECONFIG_SD1 }, + { "mmc2", NULL, EECONFIG_SD2 }, + { "mmc3", NULL, EECONFIG_SD3 }, + { "uart0", NULL, EECONFIG_UART0 }, + { "uart1", NULL, EECONFIG_UART1 }, + { "uart2", NULL, EECONFIG_UART2 }, + { "uart3", NULL, EECONFIG_UART3 }, + { "uart4", NULL, EECONFIG_UART4 }, + { "ipu0", NULL, EECONFIG_IPU0 }, + { "ipu1", NULL, EECONFIG_IPU1 }, + { "can0", NULL, EECONFIG_FLEXCAN }, + { "i2c0", NULL, EECONFIG_I2C0 }, + { "i2c1", NULL, EECONFIG_I2C1 }, + { "i2c2", NULL, EECONFIG_I2C2 }, + { "vpu", NULL, EECONFIG_VPU }, + { "csi0", NULL, EECONFIG_CSI0 }, + { "csi1", NULL, EECONFIG_CSI1 }, + { "spi0", NULL, EECONFIG_ESPCI0 }, + { "spi1", NULL, EECONFIG_ESPCI1 }, + { "spi2", NULL, EECONFIG_ESPCI2 }, + { "spi3", NULL, EECONFIG_ESPCI3 }, + { "spi4", NULL, EECONFIG_ESPCI4 }, + { "spi5", NULL, EECONFIG_ESPCI5 }, + { "gps", "pps", EECONFIG_GPS }, + { "hdmi_in", NULL, EECONFIG_HDMI_IN }, + { "hdmi_out", NULL, EECONFIG_HDMI_OUT }, + { "cvbs_in", NULL, EECONFIG_VID_IN }, + { "cvbs_out", NULL, EECONFIG_VID_OUT }, + { "nand", NULL, EECONFIG_NAND }, + { /* Sentinel */ } +}; + +#ifdef CONFIG_CMD_EECONFIG +static struct ventana_eeprom_config *get_config(const char *name) +{ + struct ventana_eeprom_config *cfg = econfig; + + while (cfg->name) { + if (0 == strcmp(name, cfg->name)) + return cfg; + cfg++; + } + return NULL; +} + +static u8 econfig_bytes[sizeof(ventana_info.config)]; +static int econfig_init = -1; + +int do_econfig(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + struct ventana_eeprom_config *cfg; + struct ventana_board_info *info = &ventana_info; + int i; + + if (argc < 2) + return CMD_RET_USAGE; + + /* initialize */ + if (econfig_init != 1) { + memcpy(econfig_bytes, info->config, sizeof(econfig_bytes)); + econfig_init = 1; + } + + /* list configs */ + if ((strncmp(argv[1], "list", 4) == 0)) { + cfg = econfig; + while (cfg->name) { + printf("%s: %d\n", cfg->name, + test_bit(cfg->bit, econfig_bytes) ? 1 : 0); + cfg++; + } + } + + /* save */ + else if ((strncmp(argv[1], "save", 4) == 0)) { + unsigned char *buf = (unsigned char *)info; + int chksum; + + /* calculate new checksum */ + memcpy(info->config, econfig_bytes, sizeof(econfig_bytes)); + for (chksum = 0, i = 0; i < sizeof(*info)-2; i++) + chksum += buf[i]; + debug("old chksum:0x%04x\n", + (info->chksum[0] << 8) | info->chksum[1]); + debug("new chksum:0x%04x\n", chksum); + info->chksum[0] = chksum >> 8; + info->chksum[1] = chksum & 0xff; + + /* write new config data */ + if (gsc_i2c_write(GSC_EEPROM_ADDR, info->config - (u8 *)info, + 1, econfig_bytes, sizeof(econfig_bytes))) { + printf("EEPROM: Failed updating config\n"); + return CMD_RET_FAILURE; + } + + /* write new config data */ + if (gsc_i2c_write(GSC_EEPROM_ADDR, info->chksum - (u8 *)info, + 1, info->chksum, 2)) { + printf("EEPROM: Failed updating checksum\n"); + return CMD_RET_FAILURE; + } + + printf("Config saved to EEPROM\n"); + } + + /* get config */ + else if (argc == 2) { + cfg = get_config(argv[1]); + if (cfg) { + printf("%s: %d\n", cfg->name, + test_bit(cfg->bit, econfig_bytes) ? 1 : 0); + } else { + printf("invalid config: %s\n", argv[1]); + return CMD_RET_FAILURE; + } + } + + /* set config */ + else if (argc == 3) { + cfg = get_config(argv[1]); + if (cfg) { + if (simple_strtol(argv[2], NULL, 10)) { + test_and_set_bit(cfg->bit, econfig_bytes); + printf("Enabled %s\n", cfg->name); + } else { + test_and_clear_bit(cfg->bit, econfig_bytes); + printf("Disabled %s\n", cfg->name); + } + } else { + printf("invalid config: %s\n", argv[1]); + return CMD_RET_FAILURE; + } + } + + else + return CMD_RET_USAGE; + + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + econfig, 3, 0, do_econfig, + "EEPROM configuration", + "list - list config\n" + "save - save config to EEPROM\n" + "<name> - get config 'name'\n" + "<name> [0|1] - set config 'name' to value\n" +); + +#endif /* CONFIG_CMD_EECONFIG */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index b35fe5a..9857a05 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -50,10 +50,6 @@ DECLARE_GLOBAL_DATA_PTR; #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)

-/* I2C bus numbers */ -#define I2C_GSC 0 -#define I2C_PMIC 1 - #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -82,7 +78,7 @@ DECLARE_GLOBAL_DATA_PTR; * EEPROM board info struct populated by read_eeprom so that we only have to * read it once. */ -static struct ventana_board_info ventana_info; +struct ventana_board_info ventana_info;

int board_type;

@@ -902,7 +898,7 @@ int power_init_board(void)

/* configure PFUZE100 PMIC */ if (board_type == GW54xx || board_type == GW54proto) { - power_pfuze100_init(I2C_PMIC); + power_pfuze100_init(CONFIG_I2C_PMIC); p = pmic_get("PFUZE100_PMIC"); if (p && !pmic_probe(p)) { pmic_reg_read(p, PFUZE100_DEVICEID, &reg); @@ -924,7 +920,7 @@ int power_init_board(void)

/* configure LTC3676 PMIC */ else { - power_ltc3676_init(I2C_PMIC); + power_ltc3676_init(CONFIG_I2C_PMIC); p = pmic_get("LTC3676_PMIC"); if (p && !pmic_probe(p)) { puts("PMIC: LTC3676\n"); @@ -1152,7 +1148,7 @@ int board_init(void) setup_sata(); #endif /* read Gateworks EEPROM into global struct (used later) */ - board_type = read_eeprom(I2C_GSC, &ventana_info); + board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);

/* board-specifc GPIO iomux */ SETUP_IOMUX_PADS(gw_gpio_pads); @@ -1200,7 +1196,7 @@ int checkboard(void) return 0;

/* Display GSC firmware revision/CRC/status */ - i2c_set_bus_num(I2C_GSC); + i2c_set_bus_num(CONFIG_I2C_GSC); if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_FWVER, 1, buf, 1)) { printf("GSC: v%d", buf[0]); if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_STATUS, 1, buf, 4)) { @@ -1331,7 +1327,7 @@ int misc_init_r(void) * * Disable the boot watchdog and display/clear the timeout flag if set */ - i2c_set_bus_num(I2C_GSC); + i2c_set_bus_num(CONFIG_I2C_GSC); if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) { reg |= (1 << GSC_SC_CTRL1_WDDIS); if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1)) @@ -1352,74 +1348,6 @@ int misc_init_r(void)

#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)

-/* FDT aliases associated with EEPROM config bits */ -const char *fdt_aliases[] = { - "ethernet0", - "ethernet1", - "hdmi_out", - "ahci0", - "pcie", - "ssi0", - "ssi1", - "lcd0", - "lvds0", - "lvds1", - "usb0", - "usb1", - "mmc0", - "mmc1", - "mmc2", - "mmc3", - "uart0", - "uart1", - "uart2", - "uart3", - "uart4", - "ipu0", - "ipu1", - "can0", - "mipi_dsi", - "mipi_csi", - "tzasc0", - "tzasc1", - "i2c0", - "i2c1", - "i2c2", - "vpu", - "csi0", - "csi1", - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - "spi0", - "spi1", - "spi2", - "spi3", - "spi4", - "spi5", - NULL, - NULL, - "pps", - NULL, - NULL, - NULL, - "hdmi_in", - "cvbs_out", - "cvbs_in", - "nand", - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, -}; - /* * called prior to booting kernel or by 'fdt boardsetup' command * @@ -1431,8 +1359,8 @@ const char *fdt_aliases[] = { */ void ft_board_setup(void *blob, bd_t *bd) { - int bit; struct ventana_board_info *info = &ventana_info; + struct ventana_eeprom_config *cfg; struct node_info nodes[] = { { "sst,w25q256", MTD_DEV_TYPE_NOR, }, /* SPI flash */ { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */ @@ -1467,9 +1395,17 @@ void ft_board_setup(void *blob, bd_t *bd) * remove nodes by alias path if EEPROM config tells us the * peripheral is not loaded on the board. */ - for (bit = 0; bit < 64; bit++) { - if (!test_bit(bit, info->config)) - fdt_del_node_and_alias(blob, fdt_aliases[bit]); + if (getenv("fdt_noconfig")) { + puts(" Skiping periperhal config (fdt_noconfig defined)\n"); + return; + } + cfg = econfig; + while (cfg->name) { + if (!test_bit(cfg->bit, info->config)) { + fdt_del_node_and_alias(blob, cfg->dtalias ? + cfg->dtalias : cfg->name); + } + cfg++; } } #endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h index 5b065be..d64b910 100644 --- a/board/gateworks/gw_ventana/ventana_eeprom.h +++ b/board/gateworks/gw_ventana/ventana_eeprom.h @@ -110,8 +110,19 @@ enum { GW53xx, GW54xx, GW_UNKNOWN, + GW_BADCRC, };

+/* config items */ +struct ventana_eeprom_config { + const char *name; /* name of item */ + const char *dtalias; /* name of dt node to remove if not set */ + int bit; /* bit within config */ +}; + +extern struct ventana_eeprom_config econfig[]; +extern struct ventana_board_info ventana_info; + int read_eeprom(int bus, struct ventana_board_info *);

#endif diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 8197a72..b991b09 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -95,7 +95,9 @@ #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_GSC 0 +#define CONFIG_I2C_PMIC 1

/* MMC Configs */ #define CONFIG_FSL_ESDHC @@ -164,6 +166,7 @@ #define CONFIG_CMD_SETEXPR #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_GSC +#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ #define CONFIG_CMD_UBI #define CONFIG_RBTREE #define CONFIG_LZO

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1:09 p.m.

New subject: [U-Boot] [PATCH 05/11] imx: ventana: add econfig command

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

The Gateworks Ventana EEPROM contains a set of configuration bits that affect the removal of device-tree nodes that support peripherals that do not exist on sub-loaded boards. This patch adds:

a structure to define a config bit name, dt node alias, bit position

an array of supported configuration items

an econfig command to get/set/list configuration bits

use of the array when adjusting the FDT prior to boot

Signed-off-by: Tim Harvey tharvey@gateworks.com

After slight changes due to rebase on current u-boot-imx:

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 06/11] imx: ventana: add video enable gpio pinmux for GW54xx

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9857a05..07d5e2d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -643,6 +643,8 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* VID_EN */ + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), };

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

12:59 p.m.

New subject: [U-Boot] [PATCH 06/11] imx: ventana: add video enable gpio pinmux for GW54xx

On 08/08/2014 07:35, Tim Harvey wrote:

...

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9857a05..07d5e2d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -643,6 +643,8 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),

/* VID_EN */

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),

};

/*

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 07/11] imx: ventana: add missing crlf to print

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 07d5e2d..54e582b 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1339,7 +1339,7 @@ int misc_init_r(void) } if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1)) { if (reg & (1 << GSC_SC_IRQ_WATCHDOG)) { /* watchdog timeout */ - puts("GSC boot watchdog timeout detected"); + puts("GSC boot watchdog timeout detected\n"); reg &= ~(1 << GSC_SC_IRQ_WATCHDOG); /* clear flag */ gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1); }

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1 p.m.

New subject: [U-Boot] [PATCH 07/11] imx: ventana: add missing crlf to print

On 08/08/2014 07:35, Tim Harvey wrote:

...

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 07d5e2d..54e582b 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1339,7 +1339,7 @@ int misc_init_r(void) } if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1)) { if (reg & (1 << GSC_SC_IRQ_WATCHDOG)) { /* watchdog timeout */
	puts("GSC boot watchdog timeout detected");
	puts("GSC boot watchdog timeout detected\n");
reg &= ~(1 << GSC_SC_IRQ_WATCHDOG); /* clear flag */
gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1);
}

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 08/11] imx: ventana: configure i2c_dis# pin properly for gw53xx

The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was added to the GW53xx on revB PCB's). Additionally, remove the duplicate config for GW54xx.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 54e582b..98ee9df 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -609,6 +609,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* IOEXP_IRQ# */ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* DIOI2C_DIS# */ + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

/* MX6_LOCLED# */ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), @@ -637,8 +639,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DIOI2C_DIS# */ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), - /* DIOI2C_DIS# */ - IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCICK_SSON */ IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCI_RST# */

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1:02 p.m.

New subject: [U-Boot] [PATCH 08/11] imx: ventana: configure i2c_dis# pin properly for gw53xx

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was added to the GW53xx on revB PCB's). Additionally, remove the duplicate config for GW54xx.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 54e582b..98ee9df 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -609,6 +609,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* IOEXP_IRQ# */ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),

/* DIOI2C_DIS# */

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

/* MX6_LOCLED# */ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),

@@ -637,8 +639,6 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DIOI2C_DIS# */ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

/* DIOI2C_DIS# */

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCICK_SSON */ IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* PCI_RST# */

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 09/11] imx: ventana: enable SION bit on gpio outputs

Enable the SION bit on gpio outputs that we wish to be able to read the value of.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 133 +++++++++++++++++--------------- 1 file changed, 70 insertions(+), 63 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 98ee9df..d57ede4 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -74,6 +74,13 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST)

+#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define DIO_PAD_CFG (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION) + + /* * EEPROM board info struct populated by read_eeprom so that we only have to * read it once. @@ -183,7 +190,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), /* CD */ - IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), };

/* ENET */ @@ -207,7 +214,7 @@ iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), /* PHY nRST */ - IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG), };

/* NAND */ @@ -277,10 +284,10 @@ static void setup_iomux_uart(void)

#ifdef CONFIG_USB_EHCI_MX6 iomux_v3_cfg_t const usb_pads[] = { - IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(DIO_PAD_CTRL)), - IOMUX_PADS(PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(DIO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | DIO_PAD_CFG), + IOMUX_PADS(PAD_KEY_COL4__USB_OTG_OC | DIO_PAD_CFG), /* OTG PWR */ - IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(DIO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | DIO_PAD_CFG), };

int board_ehci_hcd_init(int port) @@ -292,15 +299,13 @@ int board_ehci_hcd_init(int port) /* Reset USB HUB (present on GW54xx/GW53xx) */ switch (info->model[3]) { case '3': /* GW53xx */ - SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | - MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 9), 0); mdelay(2); gpio_set_value(IMX_GPIO_NR(1, 9), 1); break; case '4': /* GW54xx */ - SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | - MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 16), 0); mdelay(2); gpio_set_value(IMX_GPIO_NR(1, 16), 1); @@ -422,7 +427,7 @@ static void enable_lvds(struct display_info_t const *dev) writel(reg, &iomux->gpr[2]);

/* Enable Backlight */ - SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 18), 1); }

@@ -519,7 +524,7 @@ static void setup_display(void) writel(reg, &iomux->gpr[3]);

/* Backlight CABEN on LVDS connector */ - SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 10), 0); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -531,120 +536,120 @@ static void setup_display(void) /* common to add baseboards */ static iomux_v3_cfg_t const gw_gpio_pads[] = { /* MSATA_EN */ - IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* RS232_EN# */ - IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG), };

/* prototype */ static iomux_v3_cfg_t const gwproto_gpio_pads[] = { /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* RS485_EN */ - IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* VID_EN */ - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* DIOI2C_DIS# */ - IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), /* PCICK_SSON */ - IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG), /* PCI_RST# */ - IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),

/* GPS_SHDN */ - IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* VID_PWR */ - IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), /* PCI_RST# */ - IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),

/* MX6_LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */ - IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG), /* USBOTG_SEL */ - IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* VID_PWR */ - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ - IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */ - IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),

/* MX6_LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */ - IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG), /* VID_EN */ - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ - IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { /* PANLEDG# */ - IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ - IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG), /* MX6_LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* MIPI_DIO */ - IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG), /* RS485_EN */ - IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG), /* IOEXP_PWREN# */ - IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_IRQ# */ - IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */ - IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), /* PCICK_SSON */ - IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG), /* PCI_RST# */ - IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* VID_EN */ - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), };

/* @@ -1020,15 +1025,17 @@ static void setup_board_gpio(int board) */ for (i = 0; i < 4; i++) { struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i]; - unsigned ctrl = DIO_PAD_CTRL; + iomux_v3_cfg_t ctrl = DIO_PAD_CFG; unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;

sprintf(arg, "dio%d", i); if (!hwconfig(arg)) continue; s = hwconfig_subarg(arg, "padctrl", &len); - if (s) - ctrl = simple_strtoul(s, NULL, 16) & 0x3ffff; + if (s) { + ctrl = MUX_PAD_CTRL(simple_strtoul(s, NULL, 16) + & 0x1ffff) | MUX_MODE_SION; + } if (hwconfig_subarg_cmp(arg, "mode", "gpio")) { if (!quiet) { printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i, @@ -1037,7 +1044,7 @@ static void setup_board_gpio(int board) cfg->gpio_param); } imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] | - MUX_PAD_CTRL(ctrl)); + ctrl); gpio_direction_input(cfg->gpio_param); } else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") && cfg->pwm_padmux) {

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1:02 p.m.

New subject: [U-Boot] [PATCH 09/11] imx: ventana: enable SION bit on gpio outputs

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

Enable the SION bit on gpio outputs that we wish to be able to read the value of.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 133 +++++++++++++++++--------------- 1 file changed, 70 insertions(+), 63 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 98ee9df..d57ede4 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -74,6 +74,13 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST)

+#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \

PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \

PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)

+#define DIO_PAD_CFG (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION)

/*

EEPROM board info struct populated by read_eeprom so that we only have to

read it once.

@@ -183,7 +190,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), /* CD */

IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),

};

/* ENET */ @@ -207,7 +214,7 @@ iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), /* PHY nRST */

IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG),

};

/* NAND */ @@ -277,10 +284,10 @@ static void setup_iomux_uart(void)

#ifdef CONFIG_USB_EHCI_MX6 iomux_v3_cfg_t const usb_pads[] = {

IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(DIO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(DIO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | DIO_PAD_CFG),

IOMUX_PADS(PAD_KEY_COL4__USB_OTG_OC | DIO_PAD_CFG), /* OTG PWR */

IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(DIO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | DIO_PAD_CFG),

};

int board_ehci_hcd_init(int port) @@ -292,15 +299,13 @@ int board_ehci_hcd_init(int port) /* Reset USB HUB (present on GW54xx/GW53xx) */ switch (info->model[3]) { case '3': /* GW53xx */
SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 |
		MUX_PAD_CTRL(NO_PAD_CTRL));
SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG);
gpio_direction_output(IMX_GPIO_NR(1, 9), 0); mdelay(2); gpio_set_value(IMX_GPIO_NR(1, 9), 1); break; case '4': /* GW54xx */
SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 |
		MUX_PAD_CTRL(NO_PAD_CTRL));
SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG);
gpio_direction_output(IMX_GPIO_NR(1, 16), 0); mdelay(2); gpio_set_value(IMX_GPIO_NR(1, 16), 1);
@@ -422,7 +427,7 @@ static void enable_lvds(struct display_info_t const *dev) writel(reg, &iomux->gpr[2]);

/* Enable Backlight */

SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL));

SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 18), 1);

}

@@ -519,7 +524,7 @@ static void setup_display(void) writel(reg, &iomux->gpr[3]);

/* Backlight CABEN on LVDS connector */

SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL));

SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 10), 0);

} #endif /* CONFIG_VIDEO_IPUV3 */ @@ -531,120 +536,120 @@ static void setup_display(void) /* common to add baseboards */ static iomux_v3_cfg_t const gw_gpio_pads[] = { /* MSATA_EN */

IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG), /* RS232_EN# */

IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),

};

/* prototype */ static iomux_v3_cfg_t const gwproto_gpio_pads[] = { /* PANLEDG# */

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* LOCLED# */

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* RS485_EN */

IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG), /* IOEXP_PWREN# */

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* VID_EN */

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* DIOI2C_DIS# */

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), /* PCICK_SSON */

IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG), /* PCI_RST# */

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { /* PANLEDG# */

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),

/* GPS_SHDN */

IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* VID_PWR */

IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), /* PCI_RST# */

IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { /* PANLEDG# */

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),

/* MX6_LOCLED# */

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */

IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG), /* USBOTG_SEL */

IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), /* VID_PWR */

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { /* PANLEDG# */

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_PWREN# */

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),

/* MX6_LOCLED# */

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */

IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG), /* VID_EN */

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { /* PANLEDG# */

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */

IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG), /* MX6_LOCLED# */

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* MIPI_DIO */

IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG), /* RS485_EN */

IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG), /* IOEXP_PWREN# */

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), /* IOEXP_IRQ# */

IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), /* PCICK_SSON */

IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | DIO_PAD_CFG), /* PCI_RST# */

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* VID_EN */

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),

IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),

};

/* @@ -1020,15 +1025,17 @@ static void setup_board_gpio(int board) */ for (i = 0; i < 4; i++) { struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i];
unsigned ctrl = DIO_PAD_CTRL;
iomux_v3_cfg_t ctrl = DIO_PAD_CFG;
unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;

sprintf(arg, "dio%d", i); if (!hwconfig(arg)) continue; s = hwconfig_subarg(arg, "padctrl", &len);
if (s)
	ctrl = simple_strtoul(s, NULL, 16) & 0x3ffff;
if (s) {
	ctrl = MUX_PAD_CTRL(simple_strtoul(s, NULL, 16)
			    & 0x1ffff) | MUX_MODE_SION;
}
if (hwconfig_subarg_cmp(arg, "mode", "gpio")) { if (!quiet) { printf("DIO%d: GPIO%d_IO%02d (gpio-%d)\n", i,
@@ -1037,7 +1044,7 @@ static void setup_board_gpio(int board) cfg->gpio_param); } imx_iomux_v3_setup_pad(cfg->gpio_padmux[cputype] |
			       MUX_PAD_CTRL(ctrl));
			       ctrl);
gpio_direction_input(cfg->gpio_param);
} else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") && cfg->pwm_padmux) {

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 10/11] imx: ventana: add iomux for PCISKT_WDIS# gpio

The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe sockets on the Ventana board.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index d57ede4..1c24e4b 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -581,6 +581,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { @@ -603,6 +605,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { @@ -625,6 +629,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), };

static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { @@ -650,6 +656,8 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* VID_EN */ IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG), };

/* @@ -680,6 +688,7 @@ struct ventana { int dioi2c_en; int pcie_sson; int usb_sel; + int wdis; };

struct ventana gpio_cfg[] = { @@ -765,6 +774,7 @@ struct ventana gpio_cfg[] = { .mezz_irq = IMX_GPIO_NR(2, 18), .gps_shdn = IMX_GPIO_NR(1, 2), .vidin_en = IMX_GPIO_NR(5, 20), + .wdis = IMX_GPIO_NR(7, 12), },

/* GW52xx */ @@ -808,6 +818,7 @@ struct ventana gpio_cfg[] = { .gps_shdn = IMX_GPIO_NR(1, 27), .vidin_en = IMX_GPIO_NR(3, 31), .usb_sel = IMX_GPIO_NR(1, 2), + .wdis = IMX_GPIO_NR(7, 12), },

/* GW53xx */ @@ -850,6 +861,7 @@ struct ventana gpio_cfg[] = { .mezz_irq = IMX_GPIO_NR(2, 18), .gps_shdn = IMX_GPIO_NR(1, 27), .vidin_en = IMX_GPIO_NR(3, 31), + .wdis = IMX_GPIO_NR(7, 12), },

/* GW54xx */ @@ -894,6 +906,7 @@ struct ventana gpio_cfg[] = { .vidin_en = IMX_GPIO_NR(3, 31), .dioi2c_en = IMX_GPIO_NR(4, 5), .pcie_sson = IMX_GPIO_NR(1, 20), + .wdis = IMX_GPIO_NR(5, 17), }, };

@@ -1019,6 +1032,10 @@ static void setup_board_gpio(int board) if (gpio_cfg[board].usb_sel) gpio_direction_output(gpio_cfg[board].usb_sel, 0);

+ /* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */ + if (gpio_cfg[board].wdis) + gpio_direction_output(gpio_cfg[board].wdis, 1); + /* * Configure DIO pinmux/padctl registers * see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1:03 p.m.

New subject: [U-Boot] [PATCH 10/11] imx: ventana: add iomux for PCISKT_WDIS# gpio

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe sockets on the Ventana board.

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index d57ede4..1c24e4b 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -581,6 +581,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = { IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),

/* PCIESKT_WDIS# */

IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { @@ -603,6 +605,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),

/* PCIESKT_WDIS# */

IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { @@ -625,6 +629,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG), /* PCI_RST# */ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),

/* PCIESKT_WDIS# */

IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),

};

static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { @@ -650,6 +656,8 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), /* VID_EN */ IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),

/* PCIESKT_WDIS# */

IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),

};

/* @@ -680,6 +688,7 @@ struct ventana { int dioi2c_en; int pcie_sson; int usb_sel;

int wdis;

};

struct ventana gpio_cfg[] = { @@ -765,6 +774,7 @@ struct ventana gpio_cfg[] = { .mezz_irq = IMX_GPIO_NR(2, 18), .gps_shdn = IMX_GPIO_NR(1, 2), .vidin_en = IMX_GPIO_NR(5, 20),
.wdis = IMX_GPIO_NR(7, 12),
},

/* GW52xx */
@@ -808,6 +818,7 @@ struct ventana gpio_cfg[] = { .gps_shdn = IMX_GPIO_NR(1, 27), .vidin_en = IMX_GPIO_NR(3, 31), .usb_sel = IMX_GPIO_NR(1, 2),
.wdis = IMX_GPIO_NR(7, 12),
},

/* GW53xx */
@@ -850,6 +861,7 @@ struct ventana gpio_cfg[] = { .mezz_irq = IMX_GPIO_NR(2, 18), .gps_shdn = IMX_GPIO_NR(1, 27), .vidin_en = IMX_GPIO_NR(3, 31),
.wdis = IMX_GPIO_NR(7, 12),
},

/* GW54xx */
@@ -894,6 +906,7 @@ struct ventana gpio_cfg[] = { .vidin_en = IMX_GPIO_NR(3, 31), .dioi2c_en = IMX_GPIO_NR(4, 5), .pcie_sson = IMX_GPIO_NR(1, 20),
.wdis = IMX_GPIO_NR(5, 17),
},
};

@@ -1019,6 +1032,10 @@ static void setup_board_gpio(int board) if (gpio_cfg[board].usb_sel) gpio_direction_output(gpio_cfg[board].usb_sel, 0);
/* PCISKT_WDIS# (Wireless disable GPIO to miniPCIe sockets) */

if (gpio_cfg[board].wdis)
gpio_direction_output(gpio_cfg[board].wdis, 1);
/*

Configure DIO pinmux/padctl registers

see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

Tim Harvey

8 Aug 8 Aug

7:35 a.m.

New subject: [U-Boot] [PATCH 11/11] imx: ventana: leave PCI reset de-asserted if PCI enabled

Signed-off-by: Tim Harvey tharvey@gateworks.com --- board/gateworks/gw_ventana/gw_ventana.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 1c24e4b..70b90d8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -991,12 +991,10 @@ static void setup_board_gpio(int board) gpio_direction_output(GP_MSATA_SEL, 0); }

- /* - * assert PCI_RST# (released by OS when clock is valid) - * TODO: figure out why leaving this de-asserted from PCI scan on boot - * causes linux pcie driver to hang during enumeration - */ +#if !defined(CONFIG_CMD_PCI) + /* assert PCI_RST# (released by OS when clock is valid) */ gpio_direction_output(gpio_cfg[board].pcie_rst, 0); +#endif

/* turn off (active-high) user LED's */ for (i = 0; i < 4; i++) {

-- 1.8.3.2

Stefano Babic

20 Aug 20 Aug

1:05 p.m.

New subject: [U-Boot] [PATCH 11/11] imx: ventana: leave PCI reset de-asserted if PCI enabled

Hi Tim,

On 08/08/2014 07:35, Tim Harvey wrote:

...

Signed-off-by: Tim Harvey tharvey@gateworks.com

board/gateworks/gw_ventana/gw_ventana.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 1c24e4b..70b90d8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -991,12 +991,10 @@ static void setup_board_gpio(int board) gpio_direction_output(GP_MSATA_SEL, 0); }
/*
* assert PCI_RST# (released by OS when clock is valid)
* TODO: figure out why leaving this de-asserted from PCI scan on boot
*       causes linux pcie driver to hang during enumeration
*/
+#if !defined(CONFIG_CMD_PCI)

/* assert PCI_RST# (released by OS when clock is valid) */ gpio_direction_output(gpio_cfg[board].pcie_rst, 0);

+#endif

/* turn off (active-high) user LED's */ for (i = 0; i < 4; i++) {

Applied to u-boot-imx, thanks !

Best regards, Stefano Babic

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Stefano Babic
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