Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

include/configs/uniphier-common.h | 1 - 1 file changed, 1 deletion(-)

diff --git a/include/configs/uniphier-common.h b/include/configs/uniphier-common.h index 2140fcc..31ab470 100644 --- a/include/configs/uniphier-common.h +++ b/include/configs/uniphier-common.h @@ -205,7 +205,6 @@ are defined. Select only one of them." "image_offset=0x00080000\0" \ "image_size=0x00f00000\0" \ "verify=n\0" \ - "autostart=yes\0" \ "norboot=run add_default_bootargs;" \ "bootm $image_offset\0" \ "nandboot=run add_default_bootargs;" \

Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

arch/arm/cpu/armv7/uniphier/Kconfig | 4 ++++ include/configs/ph1_pro4.h | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 36b7f11..31a03d9 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -9,11 +9,15 @@ config SYS_CONFIG_NAME default "ph1_ld4" if MACH_PH1_LD4 default "ph1_sld8" if MACH_PH1_SLD8

+config UNIPHIER_SMP + bool + choice prompt "UniPhier SoC select"

config MACH_PH1_PRO4 bool "PH1-Pro4" + select UNIPHIER_SMP

config MACH_PH1_LD4 bool "PH1-LD4" diff --git a/include/configs/ph1_pro4.h b/include/configs/ph1_pro4.h index fc5132d..7780030 100644 --- a/include/configs/ph1_pro4.h +++ b/include/configs/ph1_pro4.h @@ -37,8 +37,6 @@ #define CONFIG_DDR_NUM_CH0 2 #define CONFIG_DDR_NUM_CH1 2

-#define CONFIG_UNIPHIER_SMP - /* * Memory Size & Mapping */

Some configurations have been moved to Kconfig and the difference among the config headers of UniPhier SoC variants is getting smaller and smaller. Now is a good time to merge them into a single file.

Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

arch/arm/cpu/armv7/uniphier/Kconfig | 4 +- include/configs/ph1_ld4.h | 38 ------------------ include/configs/ph1_pro4.h | 38 ------------------ include/configs/ph1_sld8.h | 40 ------------------- include/configs/{uniphier-common.h => uniphier.h} | 47 +++++++++++++++++++++++ 5 files changed, 48 insertions(+), 119 deletions(-) delete mode 100644 include/configs/ph1_ld4.h delete mode 100644 include/configs/ph1_pro4.h delete mode 100644 include/configs/ph1_sld8.h rename include/configs/{uniphier-common.h => uniphier.h} (86%)

diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 1d96db2..9760299 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -5,9 +5,7 @@ config SYS_SOC default "uniphier"

config SYS_CONFIG_NAME - default "ph1_pro4" if MACH_PH1_PRO4 - default "ph1_ld4" if MACH_PH1_LD4 - default "ph1_sld8" if MACH_PH1_SLD8 + default "uniphier"

config UNIPHIER_SMP bool diff --git a/include/configs/ph1_ld4.h b/include/configs/ph1_ld4.h deleted file mode 100644 index a3e4f96..0000000 --- a/include/configs/ph1_ld4.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada yamada.m@jp.panasonic.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __PH1_XXX_H -#define __PH1_XXX_H - -/* - * Serial Configuration - * SoC UART : enable CONFIG_UNIPHIER_SERIAL - * On-board UART: enable CONFIG_SYS_NS16550_SERIAL - */ -#if 0 -#define CONFIG_SYS_NS16550_SERIAL -#endif - -#define CONFIG_SMC911X - -#define CONFIG_DDR_NUM_CH0 1 -#define CONFIG_DDR_NUM_CH1 1 - -/* - * Memory Size & Mapping - */ -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x10000000 -#define CONFIG_SDRAM1_BASE 0x90000000 -#define CONFIG_SDRAM1_SIZE 0x10000000 - -#define CONFIG_SPL_TEXT_BASE 0x40000 - -#include "uniphier-common.h" - -#endif /* __PH1_XXX_H */ diff --git a/include/configs/ph1_pro4.h b/include/configs/ph1_pro4.h deleted file mode 100644 index 15849ba..0000000 --- a/include/configs/ph1_pro4.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada yamada.m@jp.panasonic.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __PH1_XXX_H -#define __PH1_XXX_H - -/* - * Serial Configuration - * SoC UART : enable CONFIG_UNIPHIER_SERIAL - * On-board UART: enable CONFIG_SYS_NS16550_SERIAL - */ -#if 0 -#define CONFIG_SYS_NS16550_SERIAL -#endif - -#define CONFIG_SMC911X - -#define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 2 - -/* - * Memory Size & Mapping - */ -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xa0000000 -#define CONFIG_SDRAM1_SIZE 0x20000000 - -#define CONFIG_SPL_TEXT_BASE 0x100000 - -#include "uniphier-common.h" - -#endif /* __PH1_XXX_H */ diff --git a/include/configs/ph1_sld8.h b/include/configs/ph1_sld8.h deleted file mode 100644 index e64d902..0000000 --- a/include/configs/ph1_sld8.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada yamada.m@jp.panasonic.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __PH1_XXX_H -#define __PH1_XXX_H - -/* - * Serial Configuration - * SoC UART : enable CONFIG_UNIPHIER_SERIAL - * On-board UART: enable CONFIG_SYS_NS16550_SERIAL - */ -#if 0 -#define CONFIG_SYS_NS16550_SERIAL -#endif - -#define CONFIG_SMC911X - -#define CONFIG_DDR_NUM_CH0 1 -#define CONFIG_DDR_NUM_CH1 1 - -/* #define CONFIG_DDR_STANDARD */ - -/* - * Memory Size & Mapping - */ -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x10000000 -#define CONFIG_SDRAM1_BASE 0x90000000 -#define CONFIG_SDRAM1_SIZE 0x10000000 - -#define CONFIG_SPL_TEXT_BASE 0x40000 - -#include "uniphier-common.h" - -#endif /* __PH1_XXX_H */ diff --git a/include/configs/uniphier-common.h b/include/configs/uniphier.h similarity index 86% rename from include/configs/uniphier-common.h rename to include/configs/uniphier.h index 224c335..733e6fa 100644 --- a/include/configs/uniphier-common.h +++ b/include/configs/uniphier.h @@ -10,6 +10,39 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__

+#if defined(CONFIG_MACH_PH1_PRO4) +#define CONFIG_DDR_NUM_CH0 2 +#define CONFIG_DDR_NUM_CH1 2 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x20000000 +#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_SIZE 0x20000000 +#endif + +#if defined(CONFIG_MACH_PH1_LD4) +#define CONFIG_DDR_NUM_CH0 1 +#define CONFIG_DDR_NUM_CH1 1 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x10000000 +#define CONFIG_SDRAM1_BASE 0x90000000 +#define CONFIG_SDRAM1_SIZE 0x10000000 +#endif + +#if defined(CONFIG_MACH_PH1_SLD8) +#define CONFIG_DDR_NUM_CH0 1 +#define CONFIG_DDR_NUM_CH1 1 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x10000000 +#define CONFIG_SDRAM1_BASE 0x90000000 +#define CONFIG_SDRAM1_SIZE 0x10000000 +#endif + /* * Support card address map */ @@ -34,6 +67,13 @@ #define CONFIG_SYS_NS16550_REG_SIZE -2 #endif

+/* TODO: move to Kconfig and device tree */ +#if 0 +#define CONFIG_SYS_NS16550_SERIAL +#endif + +#define CONFIG_SMC911X + #define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE #define CONFIG_SMC911X_32_BIT

@@ -226,6 +266,13 @@

#define CONFIG_SYS_TEXT_BASE 0x84000000

+#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) +#define CONFIG_SPL_TEXT_BASE 0x00040000 +#endif +#if defined(CONFIG_MACH_PH1_PRO4) +#define CONFIG_SPL_TEXT_BASE 0x00100000 +#endif + #define CONFIG_BOARD_POSTCLK_INIT

#ifndef CONFIG_SPL_BUILD

Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

arch/arm/dts/Makefile | 1 + arch/arm/dts/uniphier-ph1-sld3-ref.dts | 57 ++++++++++++++++ arch/arm/dts/uniphier-ph1-sld3.dtsi | 121 +++++++++++++++++++++++++++++++++ 3 files changed, 179 insertions(+) create mode 100644 arch/arm/dts/uniphier-ph1-sld3-ref.dts create mode 100644 arch/arm/dts/uniphier-ph1-sld3.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 01df9a9..187d58c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra124-jetson-tk1.dtb \ tegra124-venice2.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ + uniphier-ph1-sld3-ref.dtb \ uniphier-ph1-pro4-ref.dtb \ uniphier-ph1-ld4-ref.dtb \ uniphier-ph1-sld8-ref.dtb diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts new file mode 100644 index 0000000..cb255d2 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts @@ -0,0 +1,57 @@ +/* + * Device Tree Source for UniPhier PH1-sLD3 Reference Board + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada yamada.m@jp.panasonic.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "uniphier-ph1-sld3.dtsi" + +/ { + model = "Panasonic UniPhier PH1-sLD3 Reference Board"; + compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + chosen { + bootargs = "console=ttyPS0,115200 earlyprintk"; + stdout-path = &uart0; + }; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + eeprom { + compatible = "i2c-eeprom"; + reg = <0x50>; + }; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi new file mode 100644 index 0000000..23b6767 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -0,0 +1,121 @@ +/* + * Device Tree Source for UniPhier PH1-sLD3 SoC + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada yamada.m@jp.panasonic.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "panasonic,ph1-sld3"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@54006800 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x20>; + clock-frequency = <36864000>; + }; + + uart1: serial@54006900 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x20>; + clock-frequency = <36864000>; + }; + + uart2: serial@54006a00 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x20>; + clock-frequency = <36864000>; + }; + + i2c0: i2c@58400000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58400000 0x40>; + status = "disabled"; + }; + + i2c1: i2c@58480000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58480000 0x40>; + status = "disabled"; + }; + + i2c2: i2c@58500000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58500000 0x40>; + status = "disabled"; + }; + + i2c3: i2c@58580000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58580000 0x40>; + status = "disabled"; + }; + + usb0: usb@5a800100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a800100 0x100>; + }; + + usb1: usb@5a810100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a810100 0x100>; + }; + + usb2: usb@5a820100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a820100 0x100>; + }; + + usb3: usb@5a830100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a830100 0x100>; + }; + + nand: nand@f8000000 { + compatible = "denali,denali-nand-dt"; + reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; + reg-names = "nand_data", "denali_reg"; + }; + }; +};

Some UniPhier boards are equipped with an expansion slot that some optional SRAM/NOR-flash cards can be attached to. So, run-time detection of the number of flash banks would be more user-friendly.

Until this commit, UniPhier boards have achieved this by (ab)using board_flash_wp_on() because the boot failed if flash_size got zero. This problem was solved by the previous commit.

Now it is possible to throw away such a tricky workaround.

This commit enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT and refactors NOR-flash detection code.

Signed-off-by: Masahiro Yamada yamada.m@jp.panasonic.com ---

arch/arm/cpu/armv7/uniphier/Makefile | 1 + arch/arm/cpu/armv7/uniphier/board_early_init_r.c | 15 +++ arch/arm/cpu/armv7/uniphier/support_card.c | 125 +++++++++++++++-------- arch/arm/include/asm/arch-uniphier/board.h | 7 ++ include/configs/uniphier.h | 13 +-- 5 files changed, 110 insertions(+), 51 deletions(-) create mode 100644 arch/arm/cpu/armv7/uniphier/board_early_init_r.c

diff --git a/arch/arm/cpu/armv7/uniphier/Makefile b/arch/arm/cpu/armv7/uniphier/Makefile index 0f64d25..4a7b8a9 100644 --- a/arch/arm/cpu/armv7/uniphier/Makefile +++ b/arch/arm/cpu/armv7/uniphier/Makefile @@ -11,6 +11,7 @@ obj-y += cache_uniphier.o obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o obj-y += dram_init.o obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o +obj-$(CONFIG_BOARD_EARLY_INIT_R) += board_early_init_r.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o obj-$(CONFIG_UNIPHIER_SMP) += smp.o obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_r.c b/arch/arm/cpu/armv7/uniphier/board_early_init_r.c new file mode 100644 index 0000000..cb7e04f --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/board_early_init_r.c @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada yamada.m@jp.panasonic.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/board.h> + +int board_early_init_r(void) +{ + uniphier_board_late_init(); + return 0; +} diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/cpu/armv7/uniphier/support_card.c index 40d4940..419012e 100644 --- a/arch/arm/cpu/armv7/uniphier/support_card.c +++ b/arch/arm/cpu/armv7/uniphier/support_card.c @@ -83,6 +83,12 @@ static int support_card_show_revision(void) } #endif

+int check_support_card(void) +{ + printf("SC: Micro Support Card "); + return support_card_show_revision(); +} + void support_card_init(void) { /* @@ -94,12 +100,6 @@ void support_card_init(void) support_card_reset_deassert(); }

-int check_support_card(void) -{ - printf("SC: Micro Support Card "); - return support_card_show_revision(); -} - #if defined(CONFIG_SMC911X) #include <netdev.h>

@@ -112,18 +112,14 @@ int board_eth_init(bd_t *bis) #if !defined(CONFIG_SYS_NO_FLASH)

#include <mtd/cfi_flash.h> +#include <asm/arch/sbc-regs.h>

-#if CONFIG_SYS_MAX_FLASH_BANKS > 1 -static phys_addr_t flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS] = - CONFIG_SYS_FLASH_BANKS_LIST; +struct memory_bank { + phys_addr_t base; + unsigned long size; +};

-phys_addr_t cfi_flash_bank_addr(int i) -{ - return flash_banks_list[i]; -} -#endif - -int mem_is_flash(phys_addr_t base) +static int mem_is_flash(const struct memory_bank *mem) { const int loop = 128; u32 *scratch_addr; @@ -131,8 +127,9 @@ int mem_is_flash(phys_addr_t base) int ret = 1; int i;

- scratch_addr = map_physmem(base + 0x01e00000, - sizeof(u32) * loop, MAP_NOCACHE); + /* just in case, use the tail of the memory bank */ + scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop, + sizeof(u32) * loop, MAP_NOCACHE);

for (i = 0; i < loop; i++, scratch_addr++) { saved_value = readl(scratch_addr); @@ -150,31 +147,79 @@ int mem_is_flash(phys_addr_t base) return ret; }

-int board_flash_wp_on(void) +#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) + /* {address, size} */ +static const struct memory_bank memory_banks_boot_swap_off[] = { + {0x02000000, 0x01f00000}, +}; + +static const struct memory_bank memory_banks_boot_swap_on[] = { + {0x00000000, 0x01f00000}, +}; +#endif + +#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) +static const struct memory_bank memory_banks_boot_swap_off[] = { + {0x04000000, 0x04000000}, +}; + +static const struct memory_bank memory_banks_boot_swap_on[] = { + {0x00000000, 0x04000000}, + {0x04000000, 0x04000000}, +}; +#endif + +static const struct memory_bank +*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT]; + +phys_addr_t cfi_flash_bank_addr(int i) { - int i; - int ret = 1; + return flash_banks_list[i]->base; +}

- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - if (mem_is_flash(cfi_flash_bank_addr(i))) { - /* - * We found at least one flash. - * We need to return 0 and call flash_init(). - */ - ret = 0; - } -#if CONFIG_SYS_MAX_FLASH_BANKS > 1 - else { - /* - * We might have a SRAM here. - * To prevent SRAM data from being destroyed, - * we set dummy address (SDRAM). - */ - flash_banks_list[i] = 0x80000000 + 0x10000 * i; +unsigned long cfi_flash_bank_size(int i) +{ + return flash_banks_list[i]->size; +} + +static void detect_num_flash_banks(void) +{ + const struct memory_bank *memory_bank, *end; + + cfi_flash_num_flash_banks = 0; + + if (boot_is_swapped()) { + memory_bank = memory_banks_boot_swap_on; + end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on); + } else { + memory_bank = memory_banks_boot_swap_off; + end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off); + } + + for (; memory_bank < end; memory_bank++) { + if (cfi_flash_num_flash_banks >= + CONFIG_SYS_MAX_FLASH_BANKS_DETECT) + break; + + if (mem_is_flash(memory_bank)) { + flash_banks_list[cfi_flash_num_flash_banks] = + memory_bank; + + debug("flash bank found: base = 0x%lx, size = 0x%lx\n", + memory_bank->base, memory_bank->size); + cfi_flash_num_flash_banks++; } -#endif }

- return ret; + debug("number of flash banks: %d\n", cfi_flash_num_flash_banks); +} +#else /* ONFIG_SYS_NO_FLASH */ +void detect_num_flash_banks(void) +{ +}; +#endif /* ONFIG_SYS_NO_FLASH */ + +void support_card_late_init(void) +{ + detect_num_flash_banks(); } -#endif diff --git a/arch/arm/include/asm/arch-uniphier/board.h b/arch/arm/include/asm/arch-uniphier/board.h index e6ba4e4..e3cba5b 100644 --- a/arch/arm/include/asm/arch-uniphier/board.h +++ b/arch/arm/include/asm/arch-uniphier/board.h @@ -12,10 +12,12 @@ defined(CONFIG_DCC_MICRO_SUPPORT_CARD) void support_card_reset(void); void support_card_init(void); +void support_card_late_init(void); int check_support_card(void); #else #define support_card_reset() do {} while (0) #define support_card_init() do {} while (0) +#define support_card_late_init() do {} while (0) static inline int check_support_card(void) { return 0; @@ -32,4 +34,9 @@ static inline void uniphier_board_init(void) support_card_init(); }

+static inline void uniphier_board_late_init(void) +{ + support_card_late_init(); +} + #endif /* ARCH_BOARD_H */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 733e6fa..dd022fb 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -92,6 +92,7 @@

#define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_BOARD_LATE_INIT

#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) @@ -121,17 +122,7 @@

#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */

-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) -# define CONFIG_SYS_MAX_FLASH_BANKS 1 -# define CONFIG_SYS_FLASH_BANKS_LIST {0x00000000} -# define CONFIG_SYS_FLASH_BANKS_SIZES {0x02000000} -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -# define CONFIG_SYS_MAX_FLASH_BANKS 1 -# define CONFIG_SYS_FLASH_BANKS_LIST {0x04000000} -# define CONFIG_SYS_FLASH_BANKS_SIZES {0x04000000} -#endif +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2

/* serial console configuration */ #define CONFIG_BAUDRATE 115200