This patch adds new target which is called as mini configuration with only qspi enabled. This will be used to run in system with small footprint and needs qspi support. One example of such case is that it can run from OCM and programs qspi flash in DDR less systems.

Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-mini-qspi-single.dts | 13 +++++ arch/arm/dts/zynqmp-mini-qspi.dtsi | 96 +++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_mini_qspi_defconfig | 56 ++++++++++++++++++ include/configs/xilinx_zynqmp_mini.h | 45 +++++++++++++++ include/configs/xilinx_zynqmp_mini_qspi.h | 25 ++++++++ 6 files changed, 236 insertions(+) create mode 100644 arch/arm/dts/zynqmp-mini-qspi-single.dts create mode 100644 arch/arm/dts/zynqmp-mini-qspi.dtsi create mode 100644 configs/xilinx_zynqmp_mini_qspi_defconfig create mode 100644 include/configs/xilinx_zynqmp_mini.h create mode 100644 include/configs/xilinx_zynqmp_mini_qspi.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a895c70..5ef942e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-ep108.dtb \ + zynqmp-mini-qspi-single.dtb \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ zynqmp-zcu102-rev1.0.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-qspi-single.dts b/arch/arm/dts/zynqmp-mini-qspi-single.dts new file mode 100644 index 0000000..c87eab3 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi-single.dts @@ -0,0 +1,13 @@ +/* + * Xilinx ZynqMP QSPI single DTS + * + * Copyright (C) 2018 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "zynqmp-mini-qspi.dtsi" + +&qspi { + spi-rx-bus-width = <4>; +}; diff --git a/arch/arm/dts/zynqmp-mini-qspi.dtsi b/arch/arm/dts/zynqmp-mini-qspi.dtsi new file mode 100644 index 0000000..e4e6417 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi.dtsi @@ -0,0 +1,96 @@ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Siva Durga Prasad siva.durga.paladugu@xilinx.com + * Michal Simek michal.simek@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI QSPI"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <1>; + + aliases { + serial0 = &dcc; + spi0 = &qspi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x40000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + qspi: spi@ff0f0000 { + compatible = "xlnx,zynqmp-qspi-1.0"; + status = "disabled"; + clock-names = "ref_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + num-cs = <1>; + reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + misc_clk: misc_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + }; +}; + +&qspi { + status = "okay"; + flash@0 { + compatible = "n25q512a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <10000000>; + partition@qspi-fsbl-uboot { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@qspi-linux { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@qspi-device-tree { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@qspi-rootfs { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; + }; +}; + +&dcc { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig new file mode 100644 index 0000000..9d847ab --- /dev/null +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -0,0 +1,56 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_SYS_MEM_RSVD_FOR_MMU=y +CONFIG_ZYNQMP_QSPI=y +CONFIG_DEFINE_TCM_OCM_MMAP=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi-single" +CONFIG_BOOTDELAY=-1 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_MISC is not set +# CONFIG_PARTITIONS is not set +# CONFIG_DOS_PARTITION is not set +CONFIG_OF_EMBED=y +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h new file mode 100644 index 0000000..268d7b7 --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini.h @@ -0,0 +1,45 @@ +/* + * Configuration for Xilinx ZynqMP Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek michal.simek@xilinx.com + * Siva Durga Prasad Paladugu sivadur@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_MINI_H +#define __CONFIG_ZYNQMP_MINI_H + +#include <configs/xilinx_zynqmp.h> + +/* Undef unneeded configs */ +#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CONFIG_SYS_MALLOC_LEN +#undef CONFIG_ENV_SIZE +#undef CONFIG_CMDLINE_EDITING +#undef CONFIG_AUTO_COMPLETE +#undef CONFIG_ZLIB +#undef CONFIG_GZIP +#undef CONFIG_CMD_ENV +#undef CONFIG_MP +#undef CONFIG_SYS_INIT_SP_ADDR +#undef CONFIG_SYS_LONGHELP +#undef CONFIG_MTD_DEVICE +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_VXWORKS +#undef CONFIG_BOOTM_LINUX +#undef CONFIG_BOARD_LATE_INIT + +/* BOOTP options */ +#undef CONFIG_BOOTP_BOOTFILESIZE +#undef CONFIG_BOOTP_BOOTPATH +#undef CONFIG_BOOTP_GATEWAY +#undef CONFIG_BOOTP_HOSTNAME +#undef CONFIG_BOOTP_MAY_FAIL +#undef CONFIG_BOOTP_PXE +#undef CONFIG_CMD_UNZIP + +#undef CONFIG_NR_DRAM_BANKS + +#endif /* __CONFIG_ZYNQMP_MINI_H */ diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h new file mode 100644 index 0000000..bea3d7a --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -0,0 +1,25 @@ +/* + * Configuration for Xilinx ZynqMP QSPI Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek michal.simek@xilinx.com + * Siva Durga Prasad Paladugu sivadur@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_MINI_QSPI_H +#define __CONFIG_ZYNQMP_MINI_QSPI_H + +#include <configs/xilinx_zynqmp_mini.h> + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_SIZE (256 * 1024) +#define CONFIG_SYS_SDRAM_BASE 0xFFFC0000 +#define CONFIG_ENV_SIZE 1400 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x20000) +#define CONFIG_SYS_MALLOC_LEN 0x2000 +#define CONFIG_MP + +#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */

This patch adds new target which is called as mini configuration with only nand functionality and other required basic features enabled. This will be used to run in system with small footprint and needs nand support.

Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-mini-nand.dts | 109 ++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_mini_nand_defconfig | 44 ++++++++++++ include/configs/xilinx_zynqmp_mini_nand.h | 24 +++++++ 4 files changed, 178 insertions(+) create mode 100644 arch/arm/dts/zynqmp-mini-nand.dts create mode 100644 configs/xilinx_zynqmp_mini_nand_defconfig create mode 100644 include/configs/xilinx_zynqmp_mini_nand.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5ef942e..f702fa1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-ep108.dtb \ + zynqmp-mini-nand.dtb \ zynqmp-mini-qspi-single.dtb \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts new file mode 100644 index 0000000..16e5f55 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -0,0 +1,109 @@ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Siva Durga Prasad siva.durga.paladugu@xilinx.com + * Michal Simek michal.simek@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI NAND"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <1>; + + aliases { + serial0 = &dcc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x40000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + nand0: nand@ff100000 { + compatible = "arasan,nfc-v3p10"; + status = "okay"; + reg = <0x0 0xff100000 0x1000>; + clock-names = "clk_sys", "clk_flash"; + #address-cells = <2>; + #size-cells = <1>; + arasan,has-mdma; + num-cs = <2>; + + partition@0 { /* for testing purpose */ + label = "nand-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand-rootfs"; + reg = <0x0 0x1C00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand-misc"; + reg = <0x0 0x3400000 0xFCC00000>; + }; + partition@6 { /* for testing purpose */ + label = "nand1-fsbl-uboot"; + reg = <0x1 0x0 0x400000>; + }; + partition@7 { /* for testing purpose */ + label = "nand1-linux"; + reg = <0x1 0x400000 0x1400000>; + }; + partition@8 { /* for testing purpose */ + label = "nand1-device-tree"; + reg = <0x1 0x1800000 0x400000>; + }; + partition@9 { /* for testing purpose */ + label = "nand1-rootfs"; + reg = <0x1 0x1C00000 0x1400000>; + }; + partition@10 { /* for testing purpose */ + label = "nand1-bitstream"; + reg = <0x1 0x3000000 0x400000>; + }; + partition@11 { /* for testing purpose */ + label = "nand1-misc"; + reg = <0x1 0x3400000 0xFCC00000>; + }; + }; + }; +}; + +&dcc { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig new file mode 100644 index 0000000..bc455bc --- /dev/null +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +CONFIG_FIT=y +CONFIG_BOOTDELAY=-1 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_PARTITIONS is not set +# CONFIG_DOS_PARTITION is not set +CONFIG_OF_EMBED=y +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_MMC is not set +CONFIG_NAND=y +CONFIG_NAND_ARASAN=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h new file mode 100644 index 0000000..8c13f47 --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -0,0 +1,24 @@ +/* + * Configuration for Xilinx ZynqMP Nand Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek michal.simek@xilinx.com + * Siva Durga Prasad Paladugu sivadur@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_MINI_NAND_H +#define __CONFIG_ZYNQMP_MINI_NAND_H + +#include <configs/xilinx_zynqmp_mini.h> + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_SIZE 0x1000000 +#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000) +#define CONFIG_SYS_MALLOC_LEN 0x800000 + +#endif /* __CONFIG_ZYNQMP_MINI_NAND_H */

This patch adds new target which is called as mini configuration with only emmc functionality and other required basic features enabled. This will be used to run in system with small footprint and needs emmc support.

Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-mini-emmc.dts | 76 +++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_mini_emmc_defconfig | 44 ++++++++++++++++++ include/configs/xilinx_zynqmp_mini_emmc.h | 23 ++++++++++ 4 files changed, 144 insertions(+) create mode 100644 arch/arm/dts/zynqmp-mini-emmc.dts create mode 100644 configs/xilinx_zynqmp_mini_emmc_defconfig create mode 100644 include/configs/xilinx_zynqmp_mini_emmc.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f702fa1..2230190 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-ep108.dtb \ + zynqmp-mini-emmc.dtb \ zynqmp-mini-nand.dtb \ zynqmp-mini-qspi-single.dtb \ zynqmp-zcu102-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-emmc.dts b/arch/arm/dts/zynqmp-mini-emmc.dts new file mode 100644 index 0000000..e659340 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-emmc.dts @@ -0,0 +1,76 @@ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Siva Durga Prasad siva.durga.paladugu@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI EMMC"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &dcc; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + sdhci0: sdhci@ff160000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0x0 0xff160000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0>; + }; + + sdhci1: sdhci@ff170000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0x0 0xff170000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <1>; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_mini_emmc_defconfig b/configs/xilinx_zynqmp_mini_emmc_defconfig new file mode 100644 index 0000000..5d854d9 --- /dev/null +++ b/configs/xilinx_zynqmp_mini_emmc_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc" +CONFIG_FIT=y +CONFIG_BOOTDELAY=-1 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h new file mode 100644 index 0000000..6f56cf6 --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini_emmc.h @@ -0,0 +1,23 @@ +/* + * Configuration for Xilinx ZynqMP eMMC Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek michal.simek@xilinx.com + * Siva Durga Prasad Paladugu sivadur@xilinx.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_MINI_EMMC_H +#define __CONFIG_ZYNQMP_MINI_EMMC_H + +#include <configs/xilinx_zynqmp_mini.h> + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MALLOC_LEN 0x800000 +#define CONFIG_SYS_LONGHELP + +#endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */