[U-Boot] [PATCH 0/2] AT91 rework: fix build errors for at91sam(9261/9g10/9263)ek

Romain Izard

10 Jun 2011 10 Jun '11

5:02 p.m.

This patchset makes it possible to build u-boot for at91sam9261ek and at91sam9263ek evaluation kits. It applies on top of u-boot-atmel. It is directly inspired of Reinhard Meyer's patch for at91sam9260ek.

It has not been tested on a live device, yet. Moreover, the NOR flash support for the at91sam9263ek compiles but does not link due to the CFI timer issue, so it is not mentioned in the boards.cfg file pending the issue's resolution.

Romain Izard (2): at91sam9263ek: fix build errors at91sam9261ek: fix build errors

MAKEALL | 3 - Makefile | 42 ---- arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 32 ++-- arch/arm/include/asm/arch-at91/at91_matrix.h | 15 +- arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + arch/arm/include/asm/arch-at91/at91sam9263.h | 19 ++ arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 2 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 211 +++++++++++--------- board/atmel/at91sam9261ek/config.mk | 1 - board/atmel/at91sam9261ek/led.c | 21 +-- board/atmel/at91sam9263ek/at91sam9263ek.c | 62 ++++--- board/atmel/at91sam9263ek/config.mk | 1 - board/atmel/at91sam9263ek/led.c | 13 +- boards.cfg | 8 + include/configs/at91sam9261ek.h | 101 ++++++---- include/configs/at91sam9263ek.h | 100 ++++++---- 16 files changed, 339 insertions(+), 293 deletions(-) delete mode 100644 board/atmel/at91sam9261ek/config.mk delete mode 100644 board/atmel/at91sam9263ek/config.mk

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Romain Izard

10 Jun 10 Jun

5:02 p.m.

New subject: [U-Boot] [PATCH 1/2] at91sam9263ek: fix build errors

The targets using dataflash and nandflash as storage are available.

Signed-off-by: Romain Izard romain.izard.pro@gmail.com --- MAKEALL | 1 - Makefile | 19 ---- arch/arm/include/asm/arch-at91/at91sam9263.h | 19 ++++ arch/arm/include/asm/arch-at91/at91sam9_sdramc.h | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 62 ++++++++------ board/atmel/at91sam9263ek/config.mk | 1 - board/atmel/at91sam9263ek/led.c | 13 +-- boards.cfg | 2 + include/configs/at91sam9263ek.h | 100 +++++++++++++--------- 9 files changed, 119 insertions(+), 100 deletions(-) delete mode 100644 board/atmel/at91sam9263ek/config.mk

diff --git a/MAKEALL b/MAKEALL index 50c0080..3aac7ca 100755 --- a/MAKEALL +++ b/MAKEALL @@ -449,7 +449,6 @@ LIST_at91="$(boards_by_soc at91)\ $(boards_by_soc at91rm9200)\ at91sam9260ek \ at91sam9261ek \ - at91sam9263ek \ at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ diff --git a/Makefile b/Makefile index 1619c47..c62601a 100644 --- a/Makefile +++ b/Makefile @@ -789,25 +789,6 @@ at91sam9g10ek_config : unconfig fi; @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91

-at91sam9263ek_norflash_config \ -at91sam9263ek_norflash_boot_config \ -at91sam9263ek_nandflash_config \ -at91sam9263ek_dataflash_config \ -at91sam9263ek_dataflash_cs0_config \ -at91sam9263ek_config : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _nandflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ - elif [ "$(findstring norflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \ - fi; - @if [ "$(findstring norflash_boot,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \ - fi; - @$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91 - at91sam9rlek_nandflash_config \ at91sam9rlek_dataflash_config \ at91sam9rlek_dataflash_cs0_config \ diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h index 2a1d6ee..e48c9ff 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263.h @@ -124,11 +124,30 @@ #define ATMEL_BASE_DMAC 0x00800000 /* DMA Controller */ #define ATMEL_BASE_UHP 0x00a00000 /* USB Host controller */

+#define ATMEL_BASE_EBI0_CS0 0x10000000 +#define ATMEL_BASE_EBI0_CS1 0x20000000 +#define ATMEL_BASE_EBI0_CS2 0x30000000 +#define ATMEL_BASE_EBI0_CS3 0x40000000 +#define ATMEL_BASE_EBI0_CS4 0x50000000 +#define ATMEL_BASE_EBI0_CS5 0x60000000 + +#define ATMEL_BASE_EBI1_CS0 0x70000000 +#define ATMEL_BASE_EBI1_CS1 0x80000000 +#define ATMEL_BASE_EBI1_CS2 0x90000000 + +#define ATMEL_BASE_CS0 ATMEL_BASE_EBI0_CS0 +#define ATMEL_BASE_CS1 ATMEL_BASE_EBI0_CS1 +#define ATMEL_BASE_CS2 ATMEL_BASE_EBI0_CS2 +#define ATMEL_BASE_CS3 ATMEL_BASE_EBI0_CS3 +#define ATMEL_BASE_CS4 ATMEL_BASE_EBI0_CS4 +#define ATMEL_BASE_CS5 ATMEL_BASE_EBI0_CS5 + /* * Other misc defines */ #define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */ #define ATMEL_BASE_PIO ATMEL_BASE_PIOA +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP

/* * Cpu Name diff --git a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h index 54159a7..2d4c49e 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h @@ -20,7 +20,7 @@ #ifdef __ASSEMBLY__

#ifndef ATMEL_BASE_SDRAMC -#define ATMEL_BASE_SDRAMC AT91_SDRAMC0_BASE +#define ATMEL_BASE_SDRAMC ATMEL_BASE_SDRAMC0 #endif

#define AT91_ASM_SDRAMC_MR ATMEL_BASE_SDRAMC diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 91efc07..7af7446 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -23,17 +23,15 @@ */

#include <common.h> +#include <asm/io.h> #include <asm/sizes.h> -#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> -#include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/io.h> -#include <asm/arch/hardware.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) @@ -52,15 +50,13 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9263ek_nand_hw_init(void) { unsigned long csa; - at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE; - at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - - /* Enable CS3 */ - csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; - writel(csa, &matrix->csa[0]); + at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0; + at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;

/* Enable CS3 */ + csa = readl(&(matrix->csa[0])); + csa |= AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &(matrix->csa[0]));

/* Configure SMC CS3 for NAND/SmartMedia */ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | @@ -83,9 +79,6 @@ static void at91sam9263ek_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);

- writel(1 << AT91SAM9263_ID_PIOA | 1 << AT91SAM9263_ID_PIOCDE, - &pmc->pcer); - /* Configure RDY/BSY */ at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);

@@ -98,11 +91,11 @@ static void at91sam9263ek_nand_hw_init(void) static void at91sam9263ek_macb_hw_init(void) { unsigned long erstl; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; - at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; + at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; /* Enable clock */ - writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer); + writel(1 << ATMEL_ID_EMAC, &pmc->pcer);

/* * Disable pull-up on: @@ -153,7 +146,7 @@ vidinfo_t panel_info = { vl_vsync_len: 1, vl_upper_margin:1, vl_lower_margin:0, - mmio: AT91SAM9263_LCDC_BASE, + mmio: ATMEL_BASE_LCDC, };

void lcd_enable(void) @@ -168,7 +161,7 @@ void lcd_disable(void)

static void at91sam9263ek_lcd_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ @@ -193,8 +186,8 @@ static void at91sam9263ek_lcd_hw_init(void) at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */

- writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer); - gd->fb_base = AT91SAM9263_SRAM0_BASE; + writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + gd->fb_base = ATMEL_BASE_SRAM0; }

#ifdef CONFIG_LCD_INFO @@ -218,7 +211,7 @@ void lcd_show_board_info(void) lcd_printf ("(C) 2008 ATMEL Corp\n"); lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, + ATMEL_CPU_NAME, strmhz(temp, get_cpu_clk_rate()));

dram_size = 0; @@ -244,6 +237,18 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD_INFO */ #endif

+int board_early_init_f(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable clocks for all PIOs */ + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOCDE), + &pmc->pcer); + + return 0; +} + int board_init(void) { /* Enable Ctrlc */ @@ -252,9 +257,9 @@ int board_init(void) /* arch number of AT91SAM9263EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK; /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

- at91_serial_hw_init(); + at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9263ek_nand_hw_init(); #endif @@ -276,8 +281,9 @@ int board_init(void)

int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; }

@@ -291,7 +297,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x00); + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00); #endif return rc; } diff --git a/board/atmel/at91sam9263ek/config.mk b/board/atmel/at91sam9263ek/config.mk deleted file mode 100644 index e554a45..0000000 --- a/board/atmel/at91sam9263ek/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9263ek/led.c b/board/atmel/at91sam9263ek/led.c index fa1f05b..99f0046 100644 --- a/board/atmel/at91sam9263ek/led.c +++ b/board/atmel/at91sam9263ek/led.c @@ -23,20 +23,13 @@ */

#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_pio.h> +#include <asm/io.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> +#include <asm/arch/at91_pio.h>

void coloured_LED_init(void) { - /* Enable clock */ - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - - writel(1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE, - &pmc->pcer); - + /* Clock enabled in board_early_init_f() */ at91_set_pio_output(CONFIG_RED_LED, 1); at91_set_pio_output(CONFIG_GREEN_LED, 1); at91_set_pio_output(CONFIG_YELLOW_LED, 1); diff --git a/boards.cfg b/boards.cfg index ac20c81..5e2acdb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,6 +83,8 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 +at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_DATAFLASH +at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_NANDFLASH snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20 cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index f6cb406..b063450 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -27,33 +27,52 @@ #ifndef __CONFIG_H #define __CONFIG_H

+/* + * SoC must be defined first, before hardware.h is included. + */ +#define CONFIG_AT91SAM9263 /* Atmel AT91SAM9263 SoC */ +#define CONFIG_AT91SAM9263EK /* It's an Atmel AT91SAM9263 EK board*/ + +#include <asm/hardware.h> + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program. + * Since the linker has to swallow that define, we must use a pure + * hex number here! + */ +#define CONFIG_SYS_TEXT_BASE 0x21f00000 + /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* main clock xtal */ #define CONFIG_SYS_HZ 1000

-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ -#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ + +/* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG

#ifndef CONFIG_SYS_USE_BOOT_NORFLASH #define CONFIG_SKIP_LOWLEVEL_INIT #endif

-/* - * Hardware drivers - */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600}

/* LCD */ #define CONFIG_LCD 1 @@ -62,10 +81,10 @@ #undef LCD_TEST_PATTERN #define CONFIG_LCD_INFO 1 #define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 +#define CONFIG_SYS_WHITE_ON_BLACK 1 #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1

/* LED */ #define CONFIG_AT91_LED @@ -99,10 +118,21 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_CMD_USB 1

-/* SDRAM */ +/* + * SDRAM: 1 bank, min 32, max 128 MB + * Initialized before u-boot gets started. + */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CONFIG_SYS_SDRAM_SIZE 0x04000000 + +/* + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above + * that address while providing maximum stack area below. + */ +# define CONFIG_SYS_INIT_SP_ADDR \ + (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI @@ -156,7 +186,7 @@ (AT91_PMC_PLLAR_29 | \ AT91_PMC_PLLXR_OUT(MASTER_PLL_OUT) | \ AT91_PMC_PLLXR_PLLCOUNT(63) | \ - AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \ + AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \ AT91_PMC_PLLXR_DIV(MASTER_PLL_DIV))

/* PCK/2 = MCK Master Clock from PLLA */ @@ -166,7 +196,7 @@

/* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ + (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2)

/* define PDC[31:16] as DATA[31:16] */ @@ -253,20 +283,13 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -/* -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 -*/ -

#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif @@ -291,7 +314,7 @@

#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */

-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END 0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH @@ -323,9 +346,6 @@

#endif

-#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } - #define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16

-- 1.7.0.4

Romain Izard

5:02 p.m.

New subject: [U-Boot] [PATCH 2/2] at91sam9261ek: fix build errors

The targets using dataflash and nandflash as storage, for both at91sam9261 and at91sam9g10 SoC are available.

Signed-off-by: Romain Izard romain.izard.pro@gmail.com --- MAKEALL | 2 - Makefile | 23 --- arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 32 ++-- arch/arm/include/asm/arch-at91/at91_matrix.h | 15 +- arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + board/atmel/at91sam9261ek/at91sam9261ek.c | 211 +++++++++++--------- board/atmel/at91sam9261ek/config.mk | 1 - board/atmel/at91sam9261ek/led.c | 21 +-- boards.cfg | 6 + include/configs/at91sam9261ek.h | 101 ++++++---- 10 files changed, 220 insertions(+), 193 deletions(-) delete mode 100644 board/atmel/at91sam9261ek/config.mk

diff --git a/MAKEALL b/MAKEALL index 3aac7ca..6e97054 100755 --- a/MAKEALL +++ b/MAKEALL @@ -448,8 +448,6 @@ LIST_ARMV7=" \ LIST_at91="$(boards_by_soc at91)\ $(boards_by_soc at91rm9200)\ at91sam9260ek \ - at91sam9261ek \ - at91sam9g10ek \ at91sam9g20ek \ at91sam9m10g45ek \ at91sam9rlek \ diff --git a/Makefile b/Makefile index c62601a..b0edafb 100644 --- a/Makefile +++ b/Makefile @@ -766,29 +766,6 @@ M5485HFE_config : unconfig ## ARM926EJ-S Systems #########################################################################

-at91sam9261ek_nandflash_config \ -at91sam9261ek_dataflash_cs0_config \ -at91sam9261ek_dataflash_cs3_config \ -at91sam9261ek_config \ -at91sam9g10ek_nandflash_config \ -at91sam9g10ek_dataflash_cs0_config \ -at91sam9g10ek_dataflash_cs3_config \ -at91sam9g10ek_config : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring 9g10,$@)" ] ; then \ - echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \ - fi; - @if [ "$(findstring _nandflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ - elif [ "$(findstring dataflash_cs0,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ - fi; - @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91 - at91sam9rlek_nandflash_config \ at91sam9rlek_dataflash_config \ at91sam9rlek_dataflash_cs0_config \ diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c index b4353ef..0d087b8 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c @@ -23,45 +23,47 @@ */

#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91sam9261.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h>

void at91_serial0_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ - writel(1 << AT91SAM9261_ID_US0, &pmc->pcer); + writel(1 << ATMEL_ID_USART0, &pmc->pcer); }

void at91_serial1_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ - writel(1 << AT91SAM9261_ID_US1, &pmc->pcer); + writel(1 << ATMEL_ID_USART1, &pmc->pcer); }

void at91_serial2_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ - writel(1 << AT91SAM9261_ID_US2, &pmc->pcer); + writel(1 << ATMEL_ID_USART2, &pmc->pcer); }

-void at91_serial3_hw_init(void) +void at91_seriald_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ - writel(1 << AT91_ID_SYS, &pmc->pcer); + writel(1 << ATMEL_ID_SYS, &pmc->pcer); }

void at91_serial_hw_init(void) @@ -79,21 +81,21 @@ void at91_serial_hw_init(void) #endif

#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); + at91_seriald_hw_init(); #endif }

#ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */

/* Enable clock */ - writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer); + writel(1 << ATMEL_ID_SPI0, &pmc->pcer);

if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTA, 3, 1); @@ -123,14 +125,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)

void at91_spi1_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;

at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */

/* Enable clock */ - writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer); + writel(1 << ATMEL_ID_SPI1, &pmc->pcer);

if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 28, 1); diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h index a9ba9e9..4d566e3 100644 --- a/arch/arm/include/asm/arch-at91/at91_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h @@ -27,7 +27,7 @@

#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x11C) -#elif defined(CONFIG_AT91SAM9261) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x30) #elif defined(CONFIG_AT91SAM9263) #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x120) @@ -43,7 +43,7 @@ #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #define AT91_MATRIX_MASTERS 6 #define AT91_MATRIX_SLAVES 5 -#elif defined(CONFIG_AT91SAM9261) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_MASTERS 1 #define AT91_MATRIX_SLAVES 5 #elif defined(CONFIG_AT91SAM9263) @@ -63,7 +63,7 @@ typedef struct at91_priority {

typedef struct at91_matrix { u32 mcfg[AT91_MATRIX_MASTERS]; -#if defined(CONFIG_AT91SAM9261) +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) u32 scfg[AT91_MATRIX_SLAVES]; u32 res61_1[3]; u32 tcr; @@ -113,7 +113,7 @@ typedef struct at91_matrix {

#define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008

-#if defined CONFIG_AT91SAM9261 +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_MCFG_RCB0 (1 << 0) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ @@ -143,7 +143,8 @@ typedef struct at91_matrix { /* Fixed Index of Default Master */ #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) || \ + defined(CONFIG_AT91SAM9260) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) #endif

@@ -151,7 +152,7 @@ typedef struct at91_matrix { #if defined(CONFIG_AT91SAM9G45) #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ - defined(CONFIG_AT91SAM9263) + defined(CONFIG_AT91SAM9G10) || defined(CONFIG_AT91SAM9263) #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) #endif

@@ -235,7 +236,7 @@ typedef struct at91_matrix { #endif

/* USB Pad Pull-Up Control Register */ -#if defined(CONFIG_AT91SAM9261) +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_USBPUCR_PUON 0x40000000 #endif

diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h index c85fd29..4934590 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9261.h +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h @@ -126,6 +126,7 @@ */ #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ #define ATMEL_BASE_PIO ATMEL_BASE_PIOA +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP

/* * SoC specific defines diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index de5cfae..510aa2c 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -23,15 +23,15 @@ */

#include <common.h> +#include <asm/io.h> #include <asm/arch/at91sam9261.h> -#include <asm/arch/at91sam9261_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_matrix.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/gpio.h> -#include <asm/arch/io.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) @@ -50,94 +50,100 @@ DECLARE_GLOBAL_DATA_PTR; static void at91sam9261ek_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC; + at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;

/* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa);

/* Configure SMC CS3 for NAND/SmartMedia */ #ifdef CONFIG_AT91SAM9G10EK - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), + &smc->cs[3].cycle); #else - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); #endif - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | + AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | + AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_TDF_(2)); - - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode);

/* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);

/* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);

- at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ - at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */ } #endif

#ifdef CONFIG_DRIVER_DM9000 static void at91sam9261ek_dm9000_hw_init(void) { + at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC; + /* Configure SMC CS2 for DM9000 */ #ifdef CONFIG_AT91SAM9G10EK - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel(AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + + writel(AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + + writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20), + &smc->cs[2].cycle); #else - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + + writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), + &smc->cs[2].cycle); #endif

+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[2].mode); + /* Configure Reset signal as output */ - at91_set_gpio_output(AT91_PIN_PC10, 0); + at91_set_pio_output(AT91_PIO_PORTC, 10, 0);

/* Configure Interrupt pin as input, no pull-up */ - at91_set_gpio_input(AT91_PIN_PC11, 0); + at91_set_pio_input(AT91_PIO_PORTC, 11, 0); } #endif

@@ -156,50 +162,52 @@ vidinfo_t panel_info = { vl_vsync_len: 1, vl_upper_margin:1, vl_lower_margin:0, - mmio: AT91SAM9261_LCDC_BASE, + mmio: ATMEL_BASE_LCDC, };

void lcd_enable(void) { - at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ + at91_set_pio_value(AT91_PIO_PORTA, 12, 0); /* power up */ }

void lcd_disable(void) { - at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ + at91_set_pio_value(AT91_PIO_PORTA, 12, 1); /* power down */ }

static void at91sam9261ek_lcd_hw_init(void) { - at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ - at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ - at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ - at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ - at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ - at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ - at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ - at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ - at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ - - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ + at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ + at91_set_a_periph(AT91_PIO_PORTB, 4, 0); /* LCDCC */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTB, 10, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTB, 11, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* LCDD7 */ + at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* LCDD12 */ + at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTB, 19, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTB, 20, 0); /* LCDD15 */ + at91_set_b_periph(AT91_PIO_PORTB, 23, 0); /* LCDD18 */ + at91_set_b_periph(AT91_PIO_PORTB, 24, 0); /* LCDD19 */ + at91_set_b_periph(AT91_PIO_PORTB, 25, 0); /* LCDD20 */ + at91_set_b_periph(AT91_PIO_PORTB, 26, 0); /* LCDD21 */ + at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ + at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ + + writel(AT91_PMC_HCK1, &pmc->scer);

#ifdef CONFIG_AT91SAM9G10EK gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE; #else - gd->fb_base = AT91SAM9261_SRAM_BASE; + gd->fb_base = ATMEL_BASE_SRAM; #endif }

@@ -217,7 +225,7 @@ void lcd_show_board_info(void) lcd_printf ("(C) 2008 ATMEL Corp\n"); lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, + ATMEL_CPU_NAME, strmhz(temp, get_cpu_clk_rate()));

dram_size = 0; @@ -233,6 +241,18 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD_INFO */ #endif

+int board_early_init_f(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable clocks for all PIOs */ + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOC), + &pmc->pcer); + + return 0; +} + int board_init(void) { /* Enable Ctrlc */ @@ -246,9 +266,9 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; #endif /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

- at91_serial_hw_init(); + at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9261ek_nand_hw_init(); #endif @@ -273,8 +293,9 @@ int board_eth_init(bd_t *bis)

diff --git a/board/atmel/at91sam9261ek/config.mk b/board/atmel/at91sam9261ek/config.mk deleted file mode 100644 index e554a45..0000000 --- a/board/atmel/at91sam9261ek/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c index 5d1c5f2..99f0046 100644 --- a/board/atmel/at91sam9261ek/led.c +++ b/board/atmel/at91sam9261ek/led.c @@ -23,21 +23,18 @@ */

#include <common.h> -#include <asm/arch/at91sam9261.h> -#include <asm/arch/at91_pmc.h> +#include <asm/io.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> +#include <asm/arch/at91_pio.h>

void coloured_LED_init(void) { - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); + /* Clock enabled in board_early_init_f() */ + at91_set_pio_output(CONFIG_RED_LED, 1); + at91_set_pio_output(CONFIG_GREEN_LED, 1); + at91_set_pio_output(CONFIG_YELLOW_LED, 1);

- at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); - - at91_set_gpio_value(CONFIG_RED_LED, 0); - at91_set_gpio_value(CONFIG_GREEN_LED, 1); - at91_set_gpio_value(CONFIG_YELLOW_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 0); + at91_set_pio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_YELLOW_LED, 1); } diff --git a/boards.cfg b/boards.cfg index 5e2acdb..349fed6 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,6 +83,12 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 +at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 +at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 +at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH +at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 +at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 +at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_DATAFLASH at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:SYS_USE_NANDFLASH snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 401478b..0626294 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -27,36 +27,52 @@ #ifndef __CONFIG_H #define __CONFIG_H

-#define CONFIG_AT91_LEGACY +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. + */ +#include <asm/hardware.h> + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program. + * Since the linker has to swallow that define, we must use a pure + * hex number here! + */ +#define CONFIG_SYS_TEXT_BASE 0x21f00000

/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ -#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ +#define CONFIG_SYS_HZ 1000

-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#ifdef CONFIG_AT91SAM9G10EK -#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ +/* Define actual evaluation board type from used processor type */ +#ifdef CONFIG_AT91SAM9G10 +# define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK */ #else -#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ +# define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK */ #endif -#define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1

+/* Misc CPU related */ +#define CONFIG_ARCH_CPU_INIT +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Hardware drivers - */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }

/* LCD */ #define CONFIG_LCD 1 @@ -65,20 +81,21 @@ #undef LCD_TEST_PATTERN #define CONFIG_LCD_INFO 1 #define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 +#define CONFIG_SYS_WHITE_ON_BLACK 1 #define CONFIG_ATMEL_LCD 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + #ifdef CONFIG_AT91SAM9261EK #define CONFIG_ATMEL_LCD_BGR555 1 #else #define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */ #endif -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1

/* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ -#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ +#define CONFIG_RED_LED AT91_PIO_PORTA, 23 /* the power led */ +#define CONFIG_GREEN_LED AT91_PIO_PORTA, 13 /* the user1 led */ +#define CONFIG_YELLOW_LED AT91_PIO_PORTA, 14 /* the user2 led */

#define CONFIG_BOOTDELAY 3

@@ -106,10 +123,21 @@ #define CONFIG_CMD_NAND 1 #define CONFIG_CMD_USB 1

/* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI @@ -126,14 +154,14 @@ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD22 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) /* our CLE is AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTC, 15

#endif

@@ -168,7 +196,7 @@

#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */

-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END 0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH_CS0 @@ -216,9 +244,6 @@

#endif

-- 1.7.0.4

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Romain Izard