[U-Boot] [Patch V3 0/3] LS1043AQDS SPI related patches
Hi all, The version 3 patchset fixes to: - remove fdt fixup for IFC when booting with QSPI.
Also note that to work well on LS1043AQDS board, this patchset depends on the QSPI bug fixing patchset and QIXIS related patchset that I have already sent out and are still under review.
[Patch V3 1/3] armv8/ls1043aqds: add DSPI support [Patch V3 2/3] armv8/ls1043aqds: add QSPI support in SD boot [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
From: Gong Qianyu Qianyu.Gong@freescale.com
Enable three DSPI flash memories on board.
Commands: => sf probe 1:0 SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB => sf probe 1:1 SF: Detected SST25WF040B with page size 256 Bytes, erase size 4 KiB, total 512 KiB => sf probe 1:2 SF: Detected EN25S64 with page size 256 Bytes, erase size 64 KiB, total 8 MiB
Signed-off-by: Gong Qianyu Qianyu.Gong@freescale.com --- V3: - No change. V2: - Fix blank line issues.
arch/arm/dts/fsl-ls1043a-qds.dts | 32 ++++++++++++++++++++++++++++++++ configs/ls1043aqds_defconfig | 3 +++ configs/ls1043aqds_nand_defconfig | 5 +++++ configs/ls1043aqds_sdcard_ifc_defconfig | 5 +++++ include/configs/ls1043a_common.h | 12 ++++++++++++ include/configs/ls1043ardb.h | 10 ---------- 6 files changed, 57 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts index 7435222..93d73a6 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ b/arch/arm/dts/fsl-ls1043a-qds.dts @@ -15,6 +15,38 @@
/ { model = "LS1043A QDS Board"; + aliases { + spi1 = &dspi0; + }; +}; + +&dspi0 { + bus-num = <0>; + status = "okay"; + + dflash0: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + reg = <0>; + spi-max-frequency = <1000000>; /* input clock */ + }; + + dflash1: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3500000>; + reg = <1>; + }; + + dflash2: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3500000>; + reg = <2>; + }; };
&i2c0 { diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 60fb0ad..5b12632 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -4,3 +4,6 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index e9d5afd..d4f758c 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -3,3 +3,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 6765d3d..25ae9cc 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -3,3 +3,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 677d281..38e5b9b 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -197,6 +197,18 @@ #define CONFIG_DOS_PARTITION #endif
+/* DSPI */ +#define CONFIG_FSL_DSPI +#ifdef CONFIG_FSL_DSPI +#define CONFIG_CMD_SF +#define CONFIG_DM_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ +#define CONFIG_SPI_FLASH_SST /* cs1 */ +#define CONFIG_SPI_FLASH_EON /* cs2 */ +#define CONFIG_SF_DEFAULT_BUS 1 +#define CONFIG_SF_DEFAULT_CS 0 +#endif + /* FMan ucode */ #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 585114f..f768348 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -222,16 +222,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-/* DSPI */ -#define CONFIG_FSL_DSPI -#ifdef CONFIG_FSL_DSPI -#define CONFIG_CMD_SF -#define CONFIG_DM_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SF_DEFAULT_BUS 1 -#define CONFIG_SF_DEFAULT_CS 0 -#endif - /* * Environment */
From: Gong Qianyu Qianyu.Gong@freescale.com
QSPI and IFC are pin-multiplexed on LS1043A. So we use ls1043aqds_sdcard_ifc_defconfig to support IFC in SD boot and ls1043aqds_sdcard_qspi_defconfig to support QSPI in SD boot.
Signed-off-by: Gong Qianyu Qianyu.Gong@freescale.com --- V3: - Remove the fixup for IFC. V2: - Modified rcw file to change core frequency to 1600MHz for SD_BOOT_QSPI.
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 3 +++ arch/arm/dts/fsl-ls1043a-qds.dts | 14 +++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 11 +++++++++++ board/freescale/ls1043aqds/MAINTAINERS | 1 + .../ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg | 8 ++++++++ configs/ls1043aqds_sdcard_qspi_defconfig | 10 ++++++++++ include/configs/ls1043a_common.h | 13 ++++++++++++ include/configs/ls1043aqds.h | 23 ++++++++++++++++++++++ 8 files changed, 83 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 23d6b73..4b1f792 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -219,6 +219,9 @@ void fsl_lsch2_early_init_f(void) init_early_memctl_regs(); /* tighten IFC timing */ #endif
+#ifdef CONFIG_FSL_QSPI + out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); +#endif /* Make SEC reads and writes snoopable */ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP); diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts index 93d73a6..9916f1b 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ b/arch/arm/dts/fsl-ls1043a-qds.dts @@ -16,6 +16,7 @@ / { model = "LS1043A QDS Board"; aliases { + spi0 = &qspi; spi1 = &dspi0; }; }; @@ -49,6 +50,19 @@ }; };
+&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + &i2c0 { status = "okay"; pca9547@77 { diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..f83cc3e 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,16 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; }; + + qspi: quadspi@1550000 { + compatible = "fsl,vf610-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1550000 0x10000>, + <0x40000000 0x4000000>; + num-cs = <2>; + big-endian; + status = "disabled"; + }; }; }; diff --git a/board/freescale/ls1043aqds/MAINTAINERS b/board/freescale/ls1043aqds/MAINTAINERS index 0c7f648..868bb72 100644 --- a/board/freescale/ls1043aqds/MAINTAINERS +++ b/board/freescale/ls1043aqds/MAINTAINERS @@ -7,3 +7,4 @@ F: configs/ls1043aqds_defconfig F: configs/ls1043aqds_nor_ddr3_defconfig F: configs/ls1043aqds_nand_defconfig F: configs/ls1043aqds_sdcard_ifc_defconfig +F: configs/ls1043aqds_sdcard_qspi_defconfig diff --git a/board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg b/board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg new file mode 100644 index 0000000..7783521 --- /dev/null +++ b/board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 +# RCW +# Enable QSPI; disable IFC +08100010 0a000000 00000000 00000000 +14550002 80004012 60040000 c1002000 +00000000 00000000 00000000 00038800 +20124000 00001100 00000096 00000001 diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig new file mode 100644 index 0000000..37e8b3c --- /dev/null +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -0,0 +1,10 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_SYS_NS16550=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 38e5b9b..707405c 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -121,6 +121,7 @@ #endif
/* IFC */ +#ifndef CONFIG_SD_BOOT_QSPI #define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) @@ -139,6 +140,7 @@ #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif +#endif
/* I2C */ #define CONFIG_CMD_I2C @@ -205,18 +207,29 @@ #define CONFIG_SPI_FLASH_STMICRO /* cs0 */ #define CONFIG_SPI_FLASH_SST /* cs1 */ #define CONFIG_SPI_FLASH_EON /* cs2 */ +#ifndef CONFIG_SD_BOOT_QSPI #define CONFIG_SF_DEFAULT_BUS 1 #define CONFIG_SF_DEFAULT_CS 0 #endif +#endif
/* FMan ucode */ #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
+#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_SYS_QE_FW_IN_SPIFLASH +#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 1000000 +#define CONFIG_ENV_SPI_MODE 0x03 +#else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR /* FMan fireware Pre-load address */ #define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 +#endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 43107b0..cb519e1 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -85,8 +85,12 @@ unsigned long get_board_ddr_clk(void); #endif
#ifdef CONFIG_SD_BOOT +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg +#else #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif +#endif
/* SATA */ #define CONFIG_LIBATA @@ -108,6 +112,7 @@ unsigned long get_board_ddr_clk(void); /* * IFC Definitions */ +#ifndef CONFIG_SD_BOOT_QSPI #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ @@ -191,6 +196,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#endif
#ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ @@ -198,6 +204,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif
+#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#endif + /* * QIXIS Definitions */ @@ -214,6 +226,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_ALTBANK 0x04 #define QIXIS_LBMAP_NAND 0x09 #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_SD_QSPI 0xff #define QIXIS_RCW_SRC_NAND 0x106 #define QIXIS_RCW_SRC_SD 0x040 #define QIXIS_RST_CTL_RESET 0x41 @@ -342,6 +355,16 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212
+/* QSPI device */ +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_FSL_QSPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_NUM 2 +#endif +#endif + /* * Miscellaneous configurable options */
Enable the U-Boot Driver Model(DM) to use the Freescale QSPI driver.
Signed-off-by: Gong Qianyu Qianyu.Gong@nxp.com --- V3: - No change. V2: - Fix blank line issues.
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 ++ board/freescale/ls1043aqds/MAINTAINERS | 1 + board/freescale/ls1043aqds/README | 1 + board/freescale/ls1043aqds/ls1043aqds.c | 7 +++++++ configs/ls1043aqds_qspi_defconfig | 9 +++++++++ include/configs/ls1043a_common.h | 6 +++--- include/configs/ls1043aqds.h | 15 ++++++++++++--- 7 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index e030430..f2f1206 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -150,6 +150,8 @@ static const struct sys_mmu_table early_mmu_table[] = { { CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE | PMD_SECT_PXN | PMD_SECT_UXN }, + { CONFIG_SYS_FSL_QSPI_BASE, CONFIG_SYS_FSL_QSPI_BASE, + CONFIG_SYS_FSL_QSPI_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE }, { CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE }, { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1, diff --git a/board/freescale/ls1043aqds/MAINTAINERS b/board/freescale/ls1043aqds/MAINTAINERS index 868bb72..65a0af1 100644 --- a/board/freescale/ls1043aqds/MAINTAINERS +++ b/board/freescale/ls1043aqds/MAINTAINERS @@ -8,3 +8,4 @@ F: configs/ls1043aqds_nor_ddr3_defconfig F: configs/ls1043aqds_nand_defconfig F: configs/ls1043aqds_sdcard_ifc_defconfig F: configs/ls1043aqds_sdcard_qspi_defconfig +F: configs/ls1043aqds_qspi_defconfig diff --git a/board/freescale/ls1043aqds/README b/board/freescale/ls1043aqds/README index 6261a77..a6fd7a3 100644 --- a/board/freescale/ls1043aqds/README +++ b/board/freescale/ls1043aqds/README @@ -94,3 +94,4 @@ a) Promjet Boot b) NOR boot c) NAND boot d) SD boot +e) QSPI boot diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT) + puts("QSPI\n"); #else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12 +72,15 @@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); #endif
+#ifndef CONFIG_QSPI_BOOT + /* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor()); +#endif
return 0; } diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig new file mode 100644 index 0000000..fcbaf31 --- /dev/null +++ b/configs/ls1043aqds_qspi_defconfig @@ -0,0 +1,9 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_SYS_NS16550=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 707405c..afddedc 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -121,7 +121,7 @@ #endif
/* IFC */ -#ifndef CONFIG_SD_BOOT_QSPI +#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) @@ -207,7 +207,7 @@ #define CONFIG_SPI_FLASH_STMICRO /* cs0 */ #define CONFIG_SPI_FLASH_SST /* cs1 */ #define CONFIG_SPI_FLASH_EON /* cs2 */ -#ifndef CONFIG_SD_BOOT_QSPI +#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SF_DEFAULT_BUS 1 #define CONFIG_SF_DEFAULT_CS 0 #endif @@ -218,7 +218,7 @@ #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
-#ifdef CONFIG_SD_BOOT_QSPI +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_QE_FW_IN_SPIFLASH #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 #define CONFIG_ENV_SPI_BUS 0 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index cb519e1..e01f06d 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -14,6 +14,8 @@
#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #define CONFIG_SYS_TEXT_BASE 0x82000000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_SYS_TEXT_BASE 0x40010000 #else #define CONFIG_SYS_TEXT_BASE 0x60100000 #endif @@ -112,7 +114,7 @@ unsigned long get_board_ddr_clk(void); /* * IFC Definitions */ -#ifndef CONFIG_SD_BOOT_QSPI +#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ @@ -204,7 +206,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif
-#ifdef CONFIG_SD_BOOT_QSPI +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_NO_FLASH #undef CONFIG_CMD_IMLS @@ -227,8 +229,10 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_NAND 0x09 #define QIXIS_LBMAP_SD 0x00 #define QIXIS_LBMAP_SD_QSPI 0xff +#define QIXIS_LBMAP_QSPI 0xff #define QIXIS_RCW_SRC_NAND 0x106 #define QIXIS_RCW_SRC_SD 0x040 +#define QIXIS_RCW_SRC_QSPI 0x045 #define QIXIS_RST_CTL_RESET 0x41 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 @@ -356,7 +360,7 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MAX 1212
/* QSPI device */ -#ifdef CONFIG_SD_BOOT_QSPI +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI #ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_SPANSION @@ -415,6 +419,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12 +72,15 @@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); #endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Regards, Qianyu
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Thursday, January 14, 2016 8:21 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
Yes. Only with QSPI it needs I2C to access QIXIS. But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will look really uncomfortable.. So we just comment out the FPGA prints for QSPI boot.
Regards, Qianyu
Hi Qianyu,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Qianyu Gong Sent: Thursday, January 14, 2016 9:57 AM To: Scott Wood oss@buserror.net; u-boot@lists.denx.de Cc: B48286@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Wenbin.Song@freescale.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Thursday, January 14, 2016 8:21 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@
-68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n",
QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
It will be useful, if the above FPGA prints are available for QSPI boot as well.
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
Yes. Only with QSPI it needs I2C to access QIXIS. But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will look really uncomfortable.. So we just comment out the FPGA prints for QSPI boot.
Regards, Qianyu
Thanks Calvin
-----Original Message----- From: Calvin Johnson Sent: Tuesday, January 19, 2016 2:13 PM To: Qianyu Gong qianyu.gong@nxp.com; Scott Wood oss@buserror.net; u- boot@lists.denx.de Cc: B48286@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Wenbin.Song@freescale.com Subject: RE: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
Hi Qianyu,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Qianyu Gong Sent: Thursday, January 14, 2016 9:57 AM To: Scott Wood oss@buserror.net; u-boot@lists.denx.de Cc: B48286@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Wenbin.Song@freescale.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Thursday, January 14, 2016 8:21 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@
-68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n",
QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
It will be useful, if the above FPGA prints are available for QSPI boot as well.
Hi Calvin,
Yes, I know. But it's not easy to adjust the sequence of common code. So I have to leave it alone.
Regards, Qianyu
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
Yes. Only with QSPI it needs I2C to access QIXIS. But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will look really uncomfortable.. So we just comment out the FPGA prints for QSPI
boot.
Regards, Qianyu
Thanks Calvin
On Thu, 2016-01-14 at 04:26 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Thursday, January 14, 2016 8:21 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
Yes. Only with QSPI it needs I2C to access QIXIS. But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will look really uncomfortable.. So we just comment out the FPGA prints for QSPI boot.
Can this info be dumped from a command instead of just removed?
-Scott
Hi Scott,
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Friday, January 22, 2016 6:50 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Thu, 2016-01-14 at 04:26 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Thursday, January 14, 2016 8:21 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
-----Original Message----- From: Scott Wood [mailto:oss@buserror.net] Sent: Tuesday, January 12, 2016 1:47 AM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de Cc: B07421@freescale.com; B48286@freescale.com; Wenbin.Song@freescale.com; Mingkai Hu mingkai.hu@nxp.com Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..770b79f 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -43,15 +43,19 @@ enum {
int checkboard(void) { +#ifndef CONFIG_QSPI_BOOT char buf[64]; #ifndef CONFIG_SD_BOOT u8 sw; #endif +#endif
puts("Board: LS1043AQDS, boot from ");
#ifdef CONFIG_SD_BOOT puts("SD\n"); +#elif defined(CONFIG_QSPI_BOOT)
- puts("QSPI\n");
#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -68,12
+72,15
@@ int checkboard(void) printf("invalid setting of SW%u\n",
QIXIS_LBMAP_SWITCH);
#endif
+#ifndef CONFIG_QSPI_BOOT
/* For QSPI boot, here I2C is not ready yet. */ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch));
printf("FPGA: v%d (%s), build %d\n", (int)QIXIS_READ(scver), qixis_read_tag(buf), (int)qixis_read_minor());
+#endif
Why isn't i2c ready? How is DDR inited without it?
-Scott
Hi Scott,
The calling sequence in U-Boot is : checkboard() -> init_func_i2c() -> dram_init()
So I2C is not ready in checkboard() but is ready for DDR initialization.
Can you move the prints later in the boot sequence?
In any case, the relevant variable is whether qixis uses i2c, not whether you're booting from qspi (even if they are correlated).
-Scott
Yes. Only with QSPI it needs I2C to access QIXIS. But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will look really uncomfortable.. So we just comment out the FPGA prints for QSPI
boot.
Can this info be dumped from a command instead of just removed?
-Scott
We could only dump the registers using ''qixis_reset dump''. Another way is to just make QSPI boot print this info later. The following is the boot log:
U-Boot 2016.01-00289-g946e8fe-dirty (Jan 22 2016 - 12:40:21 +0800)
SoC: unknown (0x87920010) Clock Configuration: CPU0(A53):1500 MHz CPU1(A53):1500 MHz CPU2(A53):1500 MHz CPU3(A53):1500 MHz Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz Reset Configuration Word (RCW): 00000000: 0810000f 0c000000 00000000 00000000 00000010: 14550002 80004012 40025000 61002000 00000020: 00000000 00000000 00000000 00038800 00000030: 20124000 00001100 00000096 00000001 I2C: ready DRAM: Initializing DDR....using SPD Detected UDIMM 9ASF51272AZ-2G1A1 2 GiB (DDR4, 32-bit, CL=11, ECC on) Waking secondary cores to start from ffd42000 All (4) cores are up. Using SERDES1 Protocol: 5205 (0x1455) MMC: FSL_SDHC: 0 SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB PCIe1: disabled PCIe2: Root Complex no link, regs @ 0x3500000 PCIe3: Root Complex no link, regs @ 0x3600000 In: serial Out: serial Err: serial Model: LS1043A QDS Board Board: LS1043AQDS, boot from QSPI Sys ID: 0x36, Sys Ver: 0x11 FPGA: v5 (LS1043QDS_2015_0427_1339), build 5 SATA link 0 timeout. AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst Found 0 device(s). SCSI: Net: SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB Fman1: Uploading microcode version 106.4.15 FM1@DTSEC3, FM1@DTSEC4, FM1@TGEC1 Hit any key to stop autoboot: 0 =>
"Model: LS1043A QDS Board Board: LS1043AQDS, boot from QSPI Sys ID: 0x36, Sys Ver: 0x11 FPGA: v5 (LS1043QDS_2015_0427_1339), build 5"
So the four lines are printed later.
Regards, Qianyu
participants (4)
-
Calvin Johnson -
Gong Qianyu -
Qianyu Gong
-
Scott Wood