Re: Help needed with uboot for CHIP

I figured out the why SPL was not loading U-Boot from NAND.
Apparently the logic to use PIO instead of DMA that was introduced in 6ddbb1e936c78cdef1e7395039fa7020c5c75326 https://github.com/u-boot/u-boot/commit/6ddbb1e936c78cdef1e7395039fa7020c5c75326 may be was not as generic as it was supposed to be. I tried adding hexdump in nand_read_page and found that on CHIP the logic was not reading and real data. Instead all of the bytes were set to 0s.
I have created a patch to provide an option to use the older version of nand_read_page function that was present just before the above mentioned commit.
With the attached patches and some config changes the Upstream U-Boot works fine on CHIP. I have tested the attached patches on CHIP with 8GB Hynix nand along with the following extra configurations.
CONFIG_MTD=y CONFIG_CMD_MTD=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:4m(spl),4m(spl-backup),4m(uboot),4m(env),-(yaffs2)" CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BLOCK_SIZE=0x400000 CONFIG_SYS_NAND_PAGE_SIZE=0x4000 CONFIG_SYS_NAND_OOBSIZE=0x680 CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_SIZE=0x400000 CONFIG_ENV_OFFSET=0xc00000 CONFIG_FASTBOOT_FLASH_NAND=y CONFIG_YAFFS2=y
@Andre will it be possible to get the attached patches merged into the U-Boot?
Thanks & Regards Gunjan Gupta
On Thu, Mar 18, 2021 at 1:25 AM Gunjan Gupta viraniac@gmail.com wrote:
Its not really like uboot is not working. Just spl fails to load it from nand. I tried replacing the 2021.01 spl with the original spl of chip's firmware(based on uboot 2016.01) and it loaded the 2021.01 u-boot correctly.
On Thu, Mar 18, 2021, 1:20 AM Alexandre GRIVEAUX agriveaux@deutnet.info wrote:
Hello, Le 10/03/2021 à 19:58, Gunjan Gupta a écrit :
PFA my dts file. I have added the nfc section there as without that U-Boot was giving a message about nfc being disabled in the dts.
Regarding trying the default config, I can't really do that as that doesn't support booting from NAND and I want to be able to boot from NAND. Also I don't think having different MTDPARTS value should create an issue, as I didn't notice that being used in the SPL code. Please feel free to correct me if I am wrong. Even if it was being used, I am flashing U-Boot to the uboot partition and that is the same location that gets populated in the CONFIG_SYS_NAND_U_BOOT_OFFS variable of the .config file.
I've tried with a CHIP, same problem, the SPL work main u-boot not.
I don't think it's a defconfig limitation, sadly i don't know how this can be corrected.
Thanks.

Hi,
On Sun, Mar 21, 2021 at 08:04:08PM +0530, Gunjan Gupta wrote:
I figured out the why SPL was not loading U-Boot from NAND.
Apparently the logic to use PIO instead of DMA that was introduced in 6ddbb1e936c78cdef1e7395039fa7020c5c75326 https://github.com/u-boot/u-boot/commit/6ddbb1e936c78cdef1e7395039fa7020c5c75326 may be was not as generic as it was supposed to be. I tried adding hexdump in nand_read_page and found that on CHIP the logic was not reading and real data. Instead all of the bytes were set to 0s.
I have created a patch to provide an option to use the older version of nand_read_page function that was present just before the above mentioned commit.
With the attached patches and some config changes the Upstream U-Boot works fine on CHIP. I have tested the attached patches on CHIP with 8GB Hynix nand along with the following extra configurations.
An MLC NAND without proper support will work fine until it won't. I would strongly discourage you to use it.
CONFIG_MTD=y CONFIG_CMD_MTD=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:4m(spl),4m(spl-backup),4m(uboot),4m(env),-(yaffs2)" CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BLOCK_SIZE=0x400000 CONFIG_SYS_NAND_PAGE_SIZE=0x4000 CONFIG_SYS_NAND_OOBSIZE=0x680 CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_SIZE=0x400000 CONFIG_ENV_OFFSET=0xc00000 CONFIG_FASTBOOT_FLASH_NAND=y CONFIG_YAFFS2=y
@Andre will it be possible to get the attached patches merged into the U-Boot?
And we definitely shouldn't make it easy
Maxime

Ok...
What about supporting SLC. I dont have a Chip pro, but are you sure that the current logic works for that too?
Thanks & Regards Gunjan Gupta
On Mon, Mar 22, 2021, 11:58 PM Maxime Ripard maxime@cerno.tech wrote:
Hi,
On Sun, Mar 21, 2021 at 08:04:08PM +0530, Gunjan Gupta wrote:
I figured out the why SPL was not loading U-Boot from NAND.
Apparently the logic to use PIO instead of DMA that was introduced in 6ddbb1e936c78cdef1e7395039fa7020c5c75326 <
https://github.com/u-boot/u-boot/commit/6ddbb1e936c78cdef1e7395039fa7020c5c7...
may be was not as generic as it was supposed to be. I tried adding hexdump in nand_read_page and found that on CHIP the logic was not reading and real data. Instead all of the bytes were set to 0s.
I have created a patch to provide an option to use the older version of nand_read_page function that was present just before the above mentioned commit.
With the attached patches and some config changes the Upstream U-Boot
works
fine on CHIP. I have tested the attached patches on CHIP with 8GB Hynix nand along with the following extra configurations.
An MLC NAND without proper support will work fine until it won't. I would strongly discourage you to use it.
CONFIG_MTD=y CONFIG_CMD_MTD=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:4m(spl),4m(spl-backup),4m(uboot),4m(env),-(yaffs2)"
CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BLOCK_SIZE=0x400000 CONFIG_SYS_NAND_PAGE_SIZE=0x4000 CONFIG_SYS_NAND_OOBSIZE=0x680 CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_SIZE=0x400000 CONFIG_ENV_OFFSET=0xc00000 CONFIG_FASTBOOT_FLASH_NAND=y CONFIG_YAFFS2=y
@Andre will it be possible to get the attached patches merged into the U-Boot?
And we definitely shouldn't make it easy
Maxime

On Tue, Mar 23, 2021 at 12:01:36AM +0530, Gunjan Gupta wrote:
Ok...
What about supporting SLC. I dont have a Chip pro, but are you sure that the current logic works for that too?
The CHIP Pro has support for the NAND enabled, and if there's an issue then it should be fixed indeed.
Maxime
participants (2)
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Gunjan Gupta
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Maxime Ripard