[U-Boot] [PATCH v1 0/3] rockchip: rk3399: add RK3399-Q7 (Puma) SoM support
The RK3399-Q7 is a system-on-module featuring a Rockchip RK3399 SoC in a Qseven-compatible form-factor.
This changeset adds basic support for the following features (validated against the Hainan baseboard): * Gigabit Ethernet (incl. the KSZ9031 GbE PHY) * SPI on SPI1 (on-module) and SPI5 (edge-connector) * SPL loading the next stage from SPI, eMMC or SD card * Console on the external UART w/ configurable baudrate
Philipp Tomsich (3): arm64: rockchip: rk3399-puma: add DDR3-1333 timings dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM defconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3399-puma.dts | 189 ++++ arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++++++++++++++++++++++++++++++ configs/evb-rk3399_defconfig | 3 + configs/puma-rk3399_defconfig | 73 ++ include/configs/rk3399_common.h | 2 - 6 files changed, 1804 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3399-puma.dts create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi create mode 100644 configs/puma-rk3399_defconfig
For the initial validation of the RK3399-Q7 (Puma), the DDR3 has been clocked at 666MHz (i.e. DDR3-1333) using the same (safe) settings as used in Rockchip's MiniLoader.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++++++++++++++++++++++++++++++ 1 file changed, 1537 insertions(+) create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi new file mode 100644 index 0000000..bed236d --- /dev/null +++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi @@ -0,0 +1,1537 @@ +/* + * (C) 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&dmc { + rockchip,sdram-params = < + 0x1 + 0xa + 0x3 + 0x2 + 0x1 + 0x0 + 0xf + 0xf + 1 + 0x80120e12 + 0x11030802 + 0x00000002 + 0x00006246 + 0x0000004c + 0x00000000 + 0x1 + 0xa + 0x3 + 0x2 + 0x1 + 0x0 + 0xf + 0xf + 1 + 0x80120e12 + 0x11030802 + 0x00000002 + 0x00006246 + 0x0000004c + 0x00000000 + 666 + 3 + 2 +/* 13 */ 9 + 1 + 0x00000600 + 0x00000000 + 0x00000000 + 0x00000000 + 0x00000000 +/* 0xaae60 */ 7 + 0x00000000 + 0x00000000 + 0x00000000 +/* 0xaae60 */ 7 + 0x00000000 + 0x00000000 + 0x00000000 +/* 0xaae60 */ 7 + 0x00000000 + 0x00000000 + 0x01000000 + 0x00000000 + 0x00000101 + 0x00020100 + 0x000208d6 + 0x00051616 + 0x02000200 + 0x07140200 + 0x00071400 + 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0x00000000 + 0x01010000 + 0x00000000 + >; +}; +
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
For the initial validation of the RK3399-Q7 (Puma), the DDR3 has been clocked at 666MHz (i.e. DDR3-1333) using the same (safe) settings as used in Rockchip's MiniLoader.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++++++++++++++++++++++++++++++ 1 file changed, 1537 insertions(+) create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
Acked-by: Simon Glass sjg@chromium.org
On 31 March 2017 at 22:23, Simon Glass sjg@chromium.org wrote:
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
For the initial validation of the RK3399-Q7 (Puma), the DDR3 has been clocked at 666MHz (i.e. DDR3-1333) using the same (safe) settings as used in Rockchip's MiniLoader.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++++++++++++++++++++++++++++++ 1 file changed, 1537 insertions(+) create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399 in a Qseven-compatible form-factor.
These changes add a device-tree describing the board and its interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).
This includes the following changes from the original development:
* dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile * dts: rk3399-puma: add gmac for the RK3399-Q7
This change enables the Gigabit Ethernet support on the RK3399-Q7.
* dts: rk3399-puma: use serial0 for stdout * dts: rk3399-puma: prepare the sdmmc node for SPL booting * dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash
The RK3399-Q7 (Puma) unsually (this is a build-time option for customised boards) has an on-module SPI-flash connected to SPI1. As of today, this is a Winbond W25Q32DW (32MBit) device.
The SPI5 controller is routed to the Q7 edge connector and provides general-purpose SPI connectivity for customer base-boards.
With some minor improvements on integration into our outbound tree - explicitly modelled the SPI flash as 'spiflash' under spi0 [dts: rk3399-puma: explicitly model spi-flash under spi1] - renamed the aliases to spi0 and spi1 to allow easier use of commands and legacy (SPL) infrastructure... i.e. the controllers will be 0 and 1 for 'sf probe', 'sspi', etc. [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]
* dts: rk3399-puma: include SPI in the spl-boot-order property
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com ---
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3399-puma.dts | 189 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 191 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3399-puma.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0fbbb9b..a30b73d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -39,7 +39,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-tinker.dtb \ rk3288-popmetal.dtb \ rk3328-evb.dtb \ - rk3399-evb.dtb + rk3399-evb.dtb \ + rk3399-puma.dtb dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-odroidc2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts new file mode 100644 index 0000000..917df1e --- /dev/null +++ b/arch/arm/dts/rk3399-puma.dts @@ -0,0 +1,189 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include <dt-bindings/pwm/pwm.h> +#include "rk3399.dtsi" +#include "rk3399-sdram-ddr3-1333.dtsi" + +/ { + model = "Theobroma Systems RK3399-Q7 SoM"; + compatible = "tsd,puma", "rockchip,rk3399"; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc; + }; + + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + + vdd_center: vdd-center { + compatible = "pwm-regulator"; + pwms = <&pwm3 0 25000 0>; + regulator-name = "vdd_center"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-init-microvolt = <950000>; + regulator-always-on; + regulator-boot-on; + status = "okay"; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_host: vcc5v0-host-en { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; +}; + +&emmc_phy { + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&sdmmc { + u-boot,dm-pre-reloc; + bus-width = <4>; + fifo-mode; /* until we fix DMA in SPL */ + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&dwc3_typec0 { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&dwc3_typec1 { + status = "okay"; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <1 21 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + pmic_dvs2: pmic-dvs2 { + rockchip,pins = + <1 18 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x10>; + rx_delay = <0x10>; + status = "okay"; +}; + +&spi1 { + u-boot,dm-pre-reloc; + + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + spiflash: w25q32dw@0 { + u-boot,dm-pre-reloc; + + compatible = "spi-flash"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpol; + spi-cpha; + }; +}; + +&spi5 { + status = "okay"; +};
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399 in a Qseven-compatible form-factor.
These changes add a device-tree describing the board and its interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).
This includes the following changes from the original development:
- dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
- dts: rk3399-puma: add gmac for the RK3399-Q7
This change enables the Gigabit Ethernet support on the RK3399-Q7.
- dts: rk3399-puma: use serial0 for stdout
- dts: rk3399-puma: prepare the sdmmc node for SPL booting
- dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash
The RK3399-Q7 (Puma) unsually (this is a build-time option for customised boards) has an on-module SPI-flash connected to SPI1. As of today, this is a Winbond W25Q32DW (32MBit) device.
The SPI5 controller is routed to the Q7 edge connector and provides general-purpose SPI connectivity for customer base-boards.
With some minor improvements on integration into our outbound tree
- explicitly modelled the SPI flash as 'spiflash' under spi0 [dts: rk3399-puma: explicitly model spi-flash under spi1]
- renamed the aliases to spi0 and spi1 to allow easier use of commands and legacy (SPL) infrastructure... i.e. the controllers will be 0 and 1 for 'sf probe', 'sspi', etc. [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]
- dts: rk3399-puma: include SPI in the spl-boot-order property
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3399-puma.dts | 189 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 191 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3399-puma.dts
Acked-by: Simon Glass sjg@chromium.org
On 31 March 2017 at 22:23, Simon Glass sjg@chromium.org wrote:
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399 in a Qseven-compatible form-factor.
These changes add a device-tree describing the board and its interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).
This includes the following changes from the original development:
- dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
- dts: rk3399-puma: add gmac for the RK3399-Q7
This change enables the Gigabit Ethernet support on the RK3399-Q7.
- dts: rk3399-puma: use serial0 for stdout
- dts: rk3399-puma: prepare the sdmmc node for SPL booting
- dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash
The RK3399-Q7 (Puma) unsually (this is a build-time option for customised boards) has an on-module SPI-flash connected to SPI1. As of today, this is a Winbond W25Q32DW (32MBit) device.
The SPI5 controller is routed to the Q7 edge connector and provides general-purpose SPI connectivity for customer base-boards.
With some minor improvements on integration into our outbound tree
- explicitly modelled the SPI flash as 'spiflash' under spi0 [dts: rk3399-puma: explicitly model spi-flash under spi1]
- renamed the aliases to spi0 and spi1 to allow easier use of commands and legacy (SPL) infrastructure... i.e. the controllers will be 0 and 1 for 'sf probe', 'sspi', etc. [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]
- dts: rk3399-puma: include SPI in the spl-boot-order property
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3399-puma.dts | 189 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 191 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3399-puma.dts
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM (under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399 in a Qseven compatible module.
This subsumes the following changes: * defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA * defconfig: rk3399-puma: don't USE_TINY_PRINTF * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card * defconfig: rk3399-puma: enable GMAC support * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash * defconfig: rk3399-puma: enable SPI as a boot-source in SPL * defconfig: rk3399-puma: disallow non-FIT images from being loaded * defconfig: rk3399-puma: rename to puma-rk3399 * rockchip: config: rk3399: update defconfigs and rk3399_common
For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD. This both follows how the BootROM probes devices and is a sane default for customers in device-personalisation (e.g. it allows for quick and easy factory programming of unpersonalised devices using an SD card) and field usage (with customer devices expected to have their firmware either in SPI or MMC).
However, when probing multiple interfaces (according to the result from the board_boot_order function), we need to ensure that only valid FIT images are considered and disable the fallback to assuming that a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from jumping to random content loaded from devices that are probed, but don't contain valid image content).
By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT options, we ensure that raw images (indistinguishable from random data) are not considered for booting.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
---
configs/evb-rk3399_defconfig | 3 ++ configs/puma-rk3399_defconfig | 73 +++++++++++++++++++++++++++++++++++++++++ include/configs/rk3399_common.h | 2 -- 3 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 configs/puma-rk3399_defconfig
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index bedc1fd..a13e1f7 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_ATF_TEXT_BASE=0x00010000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set @@ -45,6 +47,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig new file mode 100644 index 0000000..2c7b9b1 --- /dev/null +++ b/configs/puma-rk3399_defconfig @@ -0,0 +1,73 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_ROCKCHIP_RK3399=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma" +CONFIG_FIT=y +CONFIG_SPL_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its" +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ9031=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_ROCKCHIP_RK3399_PINCTRL=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=115200 +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xFF180000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 629318f..c409d95 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -17,8 +17,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_DRIVERS_MISC_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #if defined(CONFIG_SPL_SPI_SUPPORT) #define CONFIG_SPL_SPI_LOAD
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM (under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399 in a Qseven compatible module.
This subsumes the following changes:
- defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT
- defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP
- defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA
- defconfig: rk3399-puma: don't USE_TINY_PRINTF
- defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7
- defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT
- defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card
- defconfig: rk3399-puma: enable GMAC support
- defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash
- defconfig: rk3399-puma: enable SPI as a boot-source in SPL
- defconfig: rk3399-puma: disallow non-FIT images from being loaded
- defconfig: rk3399-puma: rename to puma-rk3399
- rockchip: config: rk3399: update defconfigs and rk3399_common
For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD. This both follows how the BootROM probes devices and is a sane default for customers in device-personalisation (e.g. it allows for quick and easy factory programming of unpersonalised devices using an SD card) and field usage (with customer devices expected to have their firmware either in SPI or MMC).
However, when probing multiple interfaces (according to the result from the board_boot_order function), we need to ensure that only valid FIT images are considered and disable the fallback to assuming that a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from jumping to random content loaded from devices that are probed, but don't contain valid image content).
By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT options, we ensure that raw images (indistinguishable from random data) are not considered for booting.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
configs/evb-rk3399_defconfig | 3 ++ configs/puma-rk3399_defconfig | 73 +++++++++++++++++++++++++++++++++++++++++ include/configs/rk3399_common.h | 2 -- 3 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 configs/puma-rk3399_defconfig
Acked-by: Simon Glass sjg@chromium.org
On 31 March 2017 at 22:24, Simon Glass sjg@chromium.org wrote:
On 28 March 2017 at 10:48, Philipp Tomsich philipp.tomsich@theobroma-systems.com wrote:
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM (under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399 in a Qseven compatible module.
This subsumes the following changes:
- defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT
- defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP
- defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA
- defconfig: rk3399-puma: don't USE_TINY_PRINTF
- defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7
- defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT
- defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card
- defconfig: rk3399-puma: enable GMAC support
- defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash
- defconfig: rk3399-puma: enable SPI as a boot-source in SPL
- defconfig: rk3399-puma: disallow non-FIT images from being loaded
- defconfig: rk3399-puma: rename to puma-rk3399
- rockchip: config: rk3399: update defconfigs and rk3399_common
For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD. This both follows how the BootROM probes devices and is a sane default for customers in device-personalisation (e.g. it allows for quick and easy factory programming of unpersonalised devices using an SD card) and field usage (with customer devices expected to have their firmware either in SPI or MMC).
However, when probing multiple interfaces (according to the result from the board_boot_order function), we need to ensure that only valid FIT images are considered and disable the fallback to assuming that a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from jumping to random content loaded from devices that are probed, but don't contain valid image content).
By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT options, we ensure that raw images (indistinguishable from random data) are not considered for booting.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
configs/evb-rk3399_defconfig | 3 ++ configs/puma-rk3399_defconfig | 73 +++++++++++++++++++++++++++++++++++++++++ include/configs/rk3399_common.h | 2 -- 3 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 configs/puma-rk3399_defconfig
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
participants (2)
-
Philipp Tomsich -
Simon Glass