[U-Boot] [PATCH 1/4] x86: Drop weak version board_get_usable_ram_top()
Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/lib/init_helpers.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 5e19f13..4774a9b 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -10,12 +10,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Get the top of usable RAM */ -__weak ulong board_get_usable_ram_top(ulong total_size) -{ - return gd->ram_size; -} - int init_cache_f_r(void) { #if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \
This extracts getting memory size logic in dram_init() to a separate routine qemu_get_low_memory_size(). No functional changes.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/cpu/qemu/dram.c | 9 +++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 7 +++++++ 2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 736c4c3..c29b073 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -9,7 +9,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void) +u32 qemu_get_low_memory_size(void) { u32 ram;
@@ -19,7 +19,12 @@ int dram_init(void) ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; ram += 16 * 1024;
- gd->ram_size = ram * 1024; + return ram * 1024; +} + +int dram_init(void) +{ + gd->ram_size = qemu_get_low_memory_size(); post_code(POST_DRAM);
return 0; diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index 100eb8e..c98deb2 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -37,4 +37,11 @@ #define PMREGMISC 0x80 #define PMIOSE (1 << 0)
+/** + * qemu_get_low_memory_size() - Get low memory size + * + * @return: size of memory below 4GiB + */ +u32 qemu_get_low_memory_size(void); + #endif /* _ARCH_QEMU_H_ */
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 2/4] x86: qemu: Extract getting memory size to a separate routine
This extracts getting memory size logic in dram_init() to a separate routine qemu_get_low_memory_size(). No functional changes.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/dram.c | 9 +++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 7 +++++++ 2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 736c4c3..c29b073 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -9,7 +9,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void) +u32 qemu_get_low_memory_size(void) { u32 ram;
@@ -19,7 +19,12 @@ int dram_init(void) ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; ram += 16 * 1024;
- gd->ram_size = ram * 1024;
- return ram * 1024;
+}
+int dram_init(void) +{
gd->ram_size = qemu_get_low_memory_size(); post_code(POST_DRAM);
return 0;
diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index 100eb8e..c98deb2 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -37,4 +37,11 @@ #define PMREGMISC 0x80 #define PMIOSE (1 << 0)
+/**
- qemu_get_low_memory_size() - Get low memory size
- @return: size of memory below 4GiB
- */
+u32 qemu_get_low_memory_size(void);
#endif /* _ARCH_QEMU_H_ */
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
On Wed, Sep 4, 2019 at 12:54 AM Park, Aiden aiden.park@intel.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 2/4] x86: qemu: Extract getting memory size to a separate routine
This extracts getting memory size logic in dram_init() to a separate routine qemu_get_low_memory_size(). No functional changes.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/dram.c | 9 +++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 7 +++++++ 2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 736c4c3..c29b073 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -9,7 +9,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void) +u32 qemu_get_low_memory_size(void) { u32 ram;
@@ -19,7 +19,12 @@ int dram_init(void) ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; ram += 16 * 1024;
gd->ram_size = ram * 1024;
return ram * 1024;+}
+int dram_init(void) +{
gd->ram_size = qemu_get_low_memory_size(); post_code(POST_DRAM); return 0;diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index 100eb8e..c98deb2 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -37,4 +37,11 @@ #define PMREGMISC 0x80 #define PMIOSE (1 << 0)
+/**
- qemu_get_low_memory_size() - Get low memory size
- @return: size of memory below 4GiB
- */
+u32 qemu_get_low_memory_size(void);
#endif /* _ARCH_QEMU_H_ */
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
applied to u-boot-x86, thanks!
At present only size of memory that is below 4GiB is retrieved from QEMU. Add a function that gets size of memory that is above 4GiB.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/cpu/qemu/dram.c | 27 +++++++++++++++++++++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 11 +++++++++++ 2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index c29b073..6707b7b 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -22,9 +22,24 @@ u32 qemu_get_low_memory_size(void) return ram * 1024; }
+u64 qemu_get_high_memory_size(void) +{ + u64 ram; + + outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT); + ram = ((u64)inb(CMOS_DATA_PORT)) << 22; + outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT); + ram |= ((u64)inb(CMOS_DATA_PORT)) << 14; + outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT); + ram |= ((u64)inb(CMOS_DATA_PORT)) << 6; + + return ram * 1024; +} + int dram_init(void) { gd->ram_size = qemu_get_low_memory_size(); + gd->ram_size += qemu_get_high_memory_size(); post_code(POST_DRAM);
return 0; @@ -32,8 +47,16 @@ int dram_init(void)
int dram_init_banksize(void) { + u64 high_mem_size; + gd->bd->bi_dram[0].start = 0; - gd->bd->bi_dram[0].size = gd->ram_size; + gd->bd->bi_dram[0].size = qemu_get_low_memory_size(); + + high_mem_size = qemu_get_high_memory_size(); + if (high_mem_size) { + gd->bd->bi_dram[1].start = SZ_4G; + gd->bd->bi_dram[1].size = high_mem_size; + }
return 0; } @@ -48,5 +71,5 @@ int dram_init_banksize(void) */ ulong board_get_usable_ram_top(ulong total_size) { - return gd->ram_size; + return qemu_get_low_memory_size(); } diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index c98deb2..061735b 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -32,6 +32,10 @@ #define LOW_RAM_ADDR 0x34 #define HIGH_RAM_ADDR 0x35
+#define LOW_HIGHRAM_ADDR 0x5b +#define MID_HIGHRAM_ADDR 0x5c +#define HIGH_HIGHRAM_ADDR 0x5d + /* PM registers */ #define PMBA 0x40 #define PMREGMISC 0x80 @@ -44,4 +48,11 @@ */ u32 qemu_get_low_memory_size(void);
+/** + * qemu_get_high_memory_size() - Get high memory size + * + * @return: size of memory above 4GiB + */ +u64 qemu_get_high_memory_size(void); + #endif /* _ARCH_QEMU_H_ */
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 3/4] x86: qemu: Support getting high memory size
At present only size of memory that is below 4GiB is retrieved from QEMU. Add a function that gets size of memory that is above 4GiB.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/dram.c | 27 +++++++++++++++++++++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 11 +++++++++++ 2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index c29b073..6707b7b 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -22,9 +22,24 @@ u32 qemu_get_low_memory_size(void) return ram * 1024; }
+u64 qemu_get_high_memory_size(void) +{
- u64 ram;
- outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- ram = ((u64)inb(CMOS_DATA_PORT)) << 22;
- outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- ram |= ((u64)inb(CMOS_DATA_PORT)) << 14;
- outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- ram |= ((u64)inb(CMOS_DATA_PORT)) << 6;
- return ram * 1024;
+}
int dram_init(void) { gd->ram_size = qemu_get_low_memory_size();
gd->ram_size += qemu_get_high_memory_size(); post_code(POST_DRAM);
return 0;
@@ -32,8 +47,16 @@ int dram_init(void)
int dram_init_banksize(void) {
- u64 high_mem_size;
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = gd->ram_size;
gd->bd->bi_dram[0].size = qemu_get_low_memory_size();
high_mem_size = qemu_get_high_memory_size();
if (high_mem_size) {
gd->bd->bi_dram[1].start = SZ_4G;gd->bd->bi_dram[1].size = high_mem_size;}
return 0;
} @@ -48,5 +71,5 @@ int dram_init_banksize(void) */ ulong board_get_usable_ram_top(ulong total_size) {
- return gd->ram_size;
- return qemu_get_low_memory_size();
} diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index c98deb2..061735b 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -32,6 +32,10 @@ #define LOW_RAM_ADDR 0x34 #define HIGH_RAM_ADDR 0x35
+#define LOW_HIGHRAM_ADDR 0x5b +#define MID_HIGHRAM_ADDR 0x5c +#define HIGH_HIGHRAM_ADDR 0x5d
/* PM registers */ #define PMBA 0x40 #define PMREGMISC 0x80 @@ -44,4 +48,11 @@ */ u32 qemu_get_low_memory_size(void);
+/**
- qemu_get_high_memory_size() - Get high memory size
- @return: size of memory above 4GiB
- */
+u64 qemu_get_high_memory_size(void);
#endif /* _ARCH_QEMU_H_ */
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
On Wed, Sep 4, 2019 at 12:55 AM Park, Aiden aiden.park@intel.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 3/4] x86: qemu: Support getting high memory size
At present only size of memory that is below 4GiB is retrieved from QEMU. Add a function that gets size of memory that is above 4GiB.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/dram.c | 27 +++++++++++++++++++++++++-- arch/x86/include/asm/arch-qemu/qemu.h | 11 +++++++++++ 2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index c29b073..6707b7b 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -22,9 +22,24 @@ u32 qemu_get_low_memory_size(void) return ram * 1024; }
+u64 qemu_get_high_memory_size(void) +{
u64 ram;outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);ram = ((u64)inb(CMOS_DATA_PORT)) << 22;outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);ram |= ((u64)inb(CMOS_DATA_PORT)) << 14;outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);ram |= ((u64)inb(CMOS_DATA_PORT)) << 6;return ram * 1024;+}
int dram_init(void) { gd->ram_size = qemu_get_low_memory_size();
gd->ram_size += qemu_get_high_memory_size(); post_code(POST_DRAM); return 0;@@ -32,8 +47,16 @@ int dram_init(void)
int dram_init_banksize(void) {
u64 high_mem_size;gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = gd->ram_size;
gd->bd->bi_dram[0].size = qemu_get_low_memory_size();high_mem_size = qemu_get_high_memory_size();if (high_mem_size) {gd->bd->bi_dram[1].start = SZ_4G;gd->bd->bi_dram[1].size = high_mem_size;} return 0;} @@ -48,5 +71,5 @@ int dram_init_banksize(void) */ ulong board_get_usable_ram_top(ulong total_size) {
return gd->ram_size;
return qemu_get_low_memory_size();} diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h index c98deb2..061735b 100644 --- a/arch/x86/include/asm/arch-qemu/qemu.h +++ b/arch/x86/include/asm/arch-qemu/qemu.h @@ -32,6 +32,10 @@ #define LOW_RAM_ADDR 0x34 #define HIGH_RAM_ADDR 0x35
+#define LOW_HIGHRAM_ADDR 0x5b +#define MID_HIGHRAM_ADDR 0x5c +#define HIGH_HIGHRAM_ADDR 0x5d
/* PM registers */ #define PMBA 0x40 #define PMREGMISC 0x80 @@ -44,4 +48,11 @@ */ u32 qemu_get_low_memory_size(void);
+/**
- qemu_get_high_memory_size() - Get high memory size
- @return: size of memory above 4GiB
- */
+u64 qemu_get_high_memory_size(void);
#endif /* _ARCH_QEMU_H_ */
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
applied to u-boot-x86, thanks!
Now that we are able to get the size of high memory from QEMU, report its memory range as usable ram.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/cpu/qemu/e820.c | 59 ++++++++++++++++++++++++++++++++---------------- 1 file changed, 40 insertions(+), 19 deletions(-)
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index e682486..a4136eb 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -1,46 +1,67 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * QEMU x86 specific E820 table generation + * * (C) Copyright 2015 Miao Yan yanmiaobest@gmail.com + * (C) Copyright 2019 Bin Meng bmeng.cn@gmail.com */
#include <common.h> #include <env_internal.h> #include <asm/e820.h> +#include <asm/arch/qemu.h>
DECLARE_GLOBAL_DATA_PTR;
unsigned int install_e820_map(unsigned int max_entries, struct e820_entry *entries) { - entries[0].addr = 0; - entries[0].size = ISA_START_ADDRESS; - entries[0].type = E820_RAM; + u64 high_mem_size; + int n = 0;
- entries[1].addr = ISA_START_ADDRESS; - entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS; - entries[1].type = E820_RESERVED; + entries[n].addr = 0; + entries[n].size = ISA_START_ADDRESS; + entries[n].type = E820_RAM; + n++; + + entries[n].addr = ISA_START_ADDRESS; + entries[n].size = ISA_END_ADDRESS - ISA_START_ADDRESS; + entries[n].type = E820_RESERVED; + n++;
/* * since we use memalign(malloc) to allocate high memory for * storing ACPI tables, we need to reserve them in e820 tables, * otherwise kernel will reclaim them and data will be corrupted */ - entries[2].addr = ISA_END_ADDRESS; - entries[2].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS; - entries[2].type = E820_RAM; + entries[n].addr = ISA_END_ADDRESS; + entries[n].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS; + entries[n].type = E820_RAM; + n++;
/* for simplicity, reserve entire malloc space */ - entries[3].addr = gd->relocaddr - TOTAL_MALLOC_LEN; - entries[3].size = TOTAL_MALLOC_LEN; - entries[3].type = E820_RESERVED; + entries[n].addr = gd->relocaddr - TOTAL_MALLOC_LEN; + entries[n].size = TOTAL_MALLOC_LEN; + entries[n].type = E820_RESERVED; + n++; + + entries[n].addr = gd->relocaddr; + entries[n].size = qemu_get_low_memory_size() - gd->relocaddr; + entries[n].type = E820_RESERVED; + n++;
- entries[4].addr = gd->relocaddr; - entries[4].size = gd->ram_size - gd->relocaddr; - entries[4].type = E820_RESERVED; + entries[n].addr = CONFIG_PCIE_ECAM_BASE; + entries[n].size = CONFIG_PCIE_ECAM_SIZE; + entries[n].type = E820_RESERVED; + n++;
- entries[5].addr = CONFIG_PCIE_ECAM_BASE; - entries[5].size = CONFIG_PCIE_ECAM_SIZE; - entries[5].type = E820_RESERVED; + high_mem_size = qemu_get_high_memory_size(); + if (high_mem_size) { + entries[n].addr = SZ_4G; + entries[n].size = high_mem_size; + entries[n].type = E820_RAM; + n++; + }
- return 6; + return n; }
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 4/4] x86: qemu: Report high memory in the E820 table
Now that we are able to get the size of high memory from QEMU, report its memory range as usable ram.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/e820.c | 59 ++++++++++++++++++++++++++++++++--
1 file changed, 40 insertions(+), 19 deletions(-)
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index e682486..a4136eb 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -1,46 +1,67 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- QEMU x86 specific E820 table generation
- (C) Copyright 2015 Miao Yan yanmiaobest@gmail.com
*/
- (C) Copyright 2019 Bin Meng bmeng.cn@gmail.com
#include <common.h> #include <env_internal.h> #include <asm/e820.h> +#include <asm/arch/qemu.h>
DECLARE_GLOBAL_DATA_PTR;
unsigned int install_e820_map(unsigned int max_entries, struct e820_entry *entries) {
- entries[0].addr = 0;
- entries[0].size = ISA_START_ADDRESS;
- entries[0].type = E820_RAM;
- u64 high_mem_size;
- int n = 0;
- entries[1].addr = ISA_START_ADDRESS;
- entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
- entries[1].type = E820_RESERVED;
entries[n].addr = 0;
entries[n].size = ISA_START_ADDRESS;
entries[n].type = E820_RAM;
n++;
entries[n].addr = ISA_START_ADDRESS;
entries[n].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
entries[n].type = E820_RESERVED;
n++;
/*
- since we use memalign(malloc) to allocate high memory for
- storing ACPI tables, we need to reserve them in e820 tables,
- otherwise kernel will reclaim them and data will be corrupted
*/
- entries[2].addr = ISA_END_ADDRESS;
- entries[2].size = gd->relocaddr - TOTAL_MALLOC_LEN -
ISA_END_ADDRESS;
- entries[2].type = E820_RAM;
- entries[n].addr = ISA_END_ADDRESS;
- entries[n].size = gd->relocaddr - TOTAL_MALLOC_LEN -
ISA_END_ADDRESS;
entries[n].type = E820_RAM;
n++;
/* for simplicity, reserve entire malloc space */
- entries[3].addr = gd->relocaddr - TOTAL_MALLOC_LEN;
- entries[3].size = TOTAL_MALLOC_LEN;
- entries[3].type = E820_RESERVED;
- entries[n].addr = gd->relocaddr - TOTAL_MALLOC_LEN;
- entries[n].size = TOTAL_MALLOC_LEN;
- entries[n].type = E820_RESERVED;
- n++;
- entries[n].addr = gd->relocaddr;
- entries[n].size = qemu_get_low_memory_size() - gd->relocaddr;
- entries[n].type = E820_RESERVED;
- n++;
- entries[4].addr = gd->relocaddr;
- entries[4].size = gd->ram_size - gd->relocaddr;
- entries[4].type = E820_RESERVED;
- entries[n].addr = CONFIG_PCIE_ECAM_BASE;
- entries[n].size = CONFIG_PCIE_ECAM_SIZE;
- entries[n].type = E820_RESERVED;
- n++;
- entries[5].addr = CONFIG_PCIE_ECAM_BASE;
- entries[5].size = CONFIG_PCIE_ECAM_SIZE;
- entries[5].type = E820_RESERVED;
- high_mem_size = qemu_get_high_memory_size();
- if (high_mem_size) {
entries[n].addr = SZ_4G;entries[n].size = high_mem_size;entries[n].type = E820_RAM;n++;- }
- return 6;
- return n;
}
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
On Wed, Sep 4, 2019 at 12:56 AM Park, Aiden aiden.park@intel.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Thursday, August 29, 2019 2:53 AM To: Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Cc: Heinrich Schuchardt xypron.glpk@gmx.de Subject: [PATCH 4/4] x86: qemu: Report high memory in the E820 table
Now that we are able to get the size of high memory from QEMU, report its memory range as usable ram.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/qemu/e820.c | 59 ++++++++++++++++++++++++++++++++--
1 file changed, 40 insertions(+), 19 deletions(-)
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index e682486..a4136eb 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -1,46 +1,67 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- QEMU x86 specific E820 table generation
- (C) Copyright 2015 Miao Yan yanmiaobest@gmail.com
*/
- (C) Copyright 2019 Bin Meng bmeng.cn@gmail.com
#include <common.h> #include <env_internal.h> #include <asm/e820.h> +#include <asm/arch/qemu.h>
DECLARE_GLOBAL_DATA_PTR;
unsigned int install_e820_map(unsigned int max_entries, struct e820_entry *entries) {
entries[0].addr = 0;entries[0].size = ISA_START_ADDRESS;entries[0].type = E820_RAM;
u64 high_mem_size;int n = 0;
entries[1].addr = ISA_START_ADDRESS;entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS;entries[1].type = E820_RESERVED;
entries[n].addr = 0;entries[n].size = ISA_START_ADDRESS;entries[n].type = E820_RAM;n++;entries[n].addr = ISA_START_ADDRESS;entries[n].size = ISA_END_ADDRESS - ISA_START_ADDRESS;entries[n].type = E820_RESERVED;n++; /* * since we use memalign(malloc) to allocate high memory for * storing ACPI tables, we need to reserve them in e820 tables, * otherwise kernel will reclaim them and data will be corrupted */
entries[2].addr = ISA_END_ADDRESS;entries[2].size = gd->relocaddr - TOTAL_MALLOC_LEN -ISA_END_ADDRESS;
entries[2].type = E820_RAM;
entries[n].addr = ISA_END_ADDRESS;entries[n].size = gd->relocaddr - TOTAL_MALLOC_LEN -ISA_END_ADDRESS;
entries[n].type = E820_RAM;n++; /* for simplicity, reserve entire malloc space */
entries[3].addr = gd->relocaddr - TOTAL_MALLOC_LEN;entries[3].size = TOTAL_MALLOC_LEN;entries[3].type = E820_RESERVED;
entries[n].addr = gd->relocaddr - TOTAL_MALLOC_LEN;entries[n].size = TOTAL_MALLOC_LEN;entries[n].type = E820_RESERVED;n++;entries[n].addr = gd->relocaddr;entries[n].size = qemu_get_low_memory_size() - gd->relocaddr;entries[n].type = E820_RESERVED;n++;
entries[4].addr = gd->relocaddr;entries[4].size = gd->ram_size - gd->relocaddr;entries[4].type = E820_RESERVED;
entries[n].addr = CONFIG_PCIE_ECAM_BASE;entries[n].size = CONFIG_PCIE_ECAM_SIZE;entries[n].type = E820_RESERVED;n++;
entries[5].addr = CONFIG_PCIE_ECAM_BASE;entries[5].size = CONFIG_PCIE_ECAM_SIZE;entries[5].type = E820_RESERVED;
high_mem_size = qemu_get_high_memory_size();if (high_mem_size) {entries[n].addr = SZ_4G;entries[n].size = high_mem_size;entries[n].type = E820_RAM;n++;}
return 6;
return n;}
2.7.4
Reviewed-by: Aiden Park aiden.park@intel.com
applied to u-boot-x86, thanks!
On 8/29/19 11:53 AM, Bin Meng wrote:
Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt xypron.glpk@gmx.de
arch/x86/lib/init_helpers.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 5e19f13..4774a9b 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -10,12 +10,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Get the top of usable RAM */ -__weak ulong board_get_usable_ram_top(ulong total_size) -{
- return gd->ram_size;
-}
- int init_cache_f_r(void) { #if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \
-----Original Message----- From: Heinrich Schuchardt [mailto:xypron.glpk@gmx.de] Sent: Thursday, August 29, 2019 12:27 PM To: Bin Meng bmeng.cn@gmail.com; Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Subject: Re: [PATCH 1/4] x86: Drop weak version board_get_usable_ram_top()
On 8/29/19 11:53 AM, Bin Meng wrote:
Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt xypron.glpk@gmx.de
Reviewed-by: Aiden Park aiden.park@intel.com
arch/x86/lib/init_helpers.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 5e19f13..4774a9b 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -10,12 +10,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Get the top of usable RAM */ -__weak ulong board_get_usable_ram_top(ulong total_size) -{
- return gd->ram_size;
-}
- int init_cache_f_r(void) { #if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP)
&& \
On Fri, Aug 30, 2019 at 4:46 AM Park, Aiden aiden.park@intel.com wrote:
-----Original Message----- From: Heinrich Schuchardt [mailto:xypron.glpk@gmx.de] Sent: Thursday, August 29, 2019 12:27 PM To: Bin Meng bmeng.cn@gmail.com; Simon Glass sjg@chromium.org; Park, Aiden aiden.park@intel.com; U-Boot Mailing List u-boot@lists.denx.de Subject: Re: [PATCH 1/4] x86: Drop weak version board_get_usable_ram_top()
On 8/29/19 11:53 AM, Bin Meng wrote:
Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt xypron.glpk@gmx.de
Reviewed-by: Aiden Park aiden.park@intel.com
applied to u-boot-x86, thanks!
participants (3)
-
Bin Meng -
Heinrich Schuchardt -
Park, Aiden