[U-Boot] [PATCH 0/8] rockchip: enable TPL/SPL for rk3328
TPL do the ddr sdram init and then return to bootrom; SPL load trust/ATF and U-Boot from storage and boot into trust.
SDRAM driver is out of this patch set because it suppose to come after there is a common code for sdram driver, so I send that as separate RFC patch set.
The link file and the atf script generate file should able to re-use for all Rockchip armv8 SoCs. Comments are welcome.
Kever Yang (8): rockchip: rk3328: add tpl board file support rockchip: rk3328: add spl board file support rockchip: rk3328: add a link file for tpl rockchip: rk3328-evb: add script for atf fit rockchip: dts: rk3328: enable the drivers need by tpl/spl rockchip: Kconfig: enable TPL/SPL support for rk3328 rockchip: evb-rk3328: enable defconfig options for TPL/SPL rockchip: rk3328: add config option for TPL/SPL
arch/arm/dts/rk3328-evb.dts | 2 + arch/arm/dts/rk3328.dtsi | 1 + arch/arm/mach-rockchip/Kconfig | 14 +++- arch/arm/mach-rockchip/Makefile | 2 + arch/arm/mach-rockchip/rk3328-board-spl.c | 64 +++++++++++++++ arch/arm/mach-rockchip/rk3328-board-tpl.c | 114 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds | 91 +++++++++++++++++++++ board/rockchip/evb_rk3328/mk_fit_atf.sh | 108 +++++++++++++++++++++++++ configs/evb-rk3328_defconfig | 47 ++++++++++- include/configs/rk3328_common.h | 10 ++- 10 files changed, 448 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3328-board-spl.c create mode 100644 arch/arm/mach-rockchip/rk3328-board-tpl.c create mode 100644 arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds create mode 100755 board/rockchip/evb_rk3328/mk_fit_atf.sh
rk3328 tpl suppose to init ddr sdram and then back to bootrom.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-tpl.c | 114 ++++++++++++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-tpl.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index cc3a63e..49bdd36 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -14,6 +14,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o +obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c new file mode 100644 index 0000000..1c74ff2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c @@ -0,0 +1,114 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <fdtdec.h> +#include <led.h> +#include <malloc.h> +#include <mmc.h> +#include <ram.h> +#include <spl.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/clock.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/sdram.h> +#include <asm/arch/timer.h> +#include <dm/pinctrl.h> +#include <dm/root.h> +#include <dm/test.h> +#include <dm/util.h> +#include <power/regulator.h> +#include <asm/arch/grf_rk3328.h> +#include <asm/arch/uart.h> + +#define CRU_BASE 0xFF440000 +#define GRF_BASE 0xFF100000 +#define UART2_BASE 0xFF130000 +#define STIMER_BASE_ADDR 0xFF1d0000 +#define CPU_TIMER_BASE (STIMER_BASE_ADDR + 0x20) + +void board_timer_init(void) +{ + /* Initialize CNTFRQ */ + __asm__ volatile ("LDR x0,=24000000"); + __asm__ volatile ("MSR CNTFRQ_EL0, x0"); + + /* Enable STimer1 for core */ + writel(0x0, CPU_TIMER_BASE + 0x0010); + writel(0xffffffff, CPU_TIMER_BASE + 0x0000); + writel(0xffffffff, CPU_TIMER_BASE + 0x0004); + writel(0x1, CPU_TIMER_BASE + 0x0010); +} + +void board_debug_uart_init(void) +{ + struct rk3328_grf_regs * const grf = (void *)GRF_BASE; + struct rk_uart * const uart = (void *)UART2_BASE; + + /* uart_sel_clk default select 24MHz */ + writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148); + + /* init uart baud rate 1500000 */ + writel(0x83, &uart->lcr); + writel(0x1, &uart->rbr); + writel(0x3, &uart->lcr); + + /* Enable early UART2 */ + rk_clrsetreg(&grf->com_iomux, + IOMUX_SEL_UART2_MASK, + IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT); + rk_clrsetreg(&grf->gpio2a_iomux, + GPIO2A0_SEL_MASK, + GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT); + rk_clrsetreg(&grf->gpio2a_iomux, + GPIO2A1_SEL_MASK, + GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT); + + /* enable FIFO */ + writel(0x1, &uart->sfe); +} + +void board_return_to_bootrom(void) +{ + back_to_bootrom(); +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_BOOTROM; +} + + +void board_init_f(ulong dummy) +{ + struct udevice *dev; + int ret; + +#define EARLY_UART +#ifdef EARLY_UART + debug_uart_init(); + printascii("U-Boot TPL board init\n"); +#endif + + board_timer_init(); + + ret = spl_early_init(); + if (ret) { + printf("spl_early_init() failed: %d\n", ret); + hang(); + } + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + printf("DRAM init failed: %d\n", ret); + return; + } +}
rk3328 tpl suppose to init ddr sdram and then back to bootrom.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-tpl.c | 114 ++++++++++++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-tpl.c
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
On Thu, 26 Oct 2017, Kever Yang wrote:
rk3328 tpl suppose to init ddr sdram and then back to bootrom.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-tpl.c | 114 ++++++++++++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-tpl.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index cc3a63e..49bdd36 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -14,6 +14,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o +obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c new file mode 100644 index 0000000..1c74ff2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c @@ -0,0 +1,114 @@ +/*
- (C) Copyright 2016 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <fdtdec.h> +#include <led.h> +#include <malloc.h> +#include <mmc.h> +#include <ram.h> +#include <spl.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/clock.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/sdram.h> +#include <asm/arch/timer.h> +#include <dm/pinctrl.h> +#include <dm/root.h> +#include <dm/test.h> +#include <dm/util.h> +#include <power/regulator.h> +#include <asm/arch/grf_rk3328.h> +#include <asm/arch/uart.h>
+#define CRU_BASE 0xFF440000 +#define GRF_BASE 0xFF100000 +#define UART2_BASE 0xFF130000 +#define STIMER_BASE_ADDR 0xFF1d0000 +#define CPU_TIMER_BASE (STIMER_BASE_ADDR + 0x20)
+void board_timer_init(void) +{
- /* Initialize CNTFRQ */
- __asm__ volatile ("LDR x0,=24000000");
- __asm__ volatile ("MSR CNTFRQ_EL0, x0");
This should be done by setting COUNTER_FREQUENCY and having start.s take care of this...
- /* Enable STimer1 for core */
- writel(0x0, CPU_TIMER_BASE + 0x0010);
- writel(0xffffffff, CPU_TIMER_BASE + 0x0000);
- writel(0xffffffff, CPU_TIMER_BASE + 0x0004);
- writel(0x1, CPU_TIMER_BASE + 0x0010);
Can we use the DM timer (same as for the RK3368) and not initialise the secure timer here? We should keep U-Boot and this initialisation separate, as ATF will take care of this (and U-Boot can just use a regular tick timer).
+}
+void board_debug_uart_init(void) +{
- struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
- struct rk_uart * const uart = (void *)UART2_BASE;
- /* uart_sel_clk default select 24MHz */
- writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
- /* init uart baud rate 1500000 */
- writel(0x83, &uart->lcr);
- writel(0x1, &uart->rbr);
- writel(0x3, &uart->lcr);
- /* Enable early UART2 */
- rk_clrsetreg(&grf->com_iomux,
IOMUX_SEL_UART2_MASK,IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);- rk_clrsetreg(&grf->gpio2a_iomux,
GPIO2A0_SEL_MASK,GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);- rk_clrsetreg(&grf->gpio2a_iomux,
GPIO2A1_SEL_MASK,GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);- /* enable FIFO */
- writel(0x1, &uart->sfe);
+}
+void board_return_to_bootrom(void) +{
- back_to_bootrom();
+}
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_BOOTROM;
+}
+void board_init_f(ulong dummy) +{
- struct udevice *dev;
- int ret;
+#define EARLY_UART +#ifdef EARLY_UART
- debug_uart_init();
- printascii("U-Boot TPL board init\n");
+#endif
- board_timer_init();
If we use the DM timer, we don't have to do this any longer (see the RK3368 TPL support code).
- ret = spl_early_init();
- if (ret) {
printf("spl_early_init() failed: %d\n", ret);hang();- }
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
printf("DRAM init failed: %d\n", ret);return;- }
+}
rk3328 spl is locate at dram, so do not have strict size limit, suppose to enable storage media controller driver, load ATF and U-Boot, then boot into ATF.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-spl.c | 64 +++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-spl.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 49bdd36..56ba760 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -20,6 +20,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o +obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c new file mode 100644 index 0000000..1f7274a --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328-board-spl.c @@ -0,0 +1,64 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <dm/pinctrl.h> +#include <ram.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/arch/cru_rk3328.h> +#include <asm/arch/grf_rk3328.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/timer.h> + +DECLARE_GLOBAL_DATA_PTR; + +void board_debug_uart_init(void) +{ +} + +void board_init_f(ulong dummy) +{ + struct udevice *dev; + int ret; + + ret = spl_early_init(); + if (ret) { + debug("spl_early_init() failed: %d\n", ret); + hang(); + } + + preloader_console_init(); + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return; + } +} + +u32 spl_boot_mode(const u32 boot_device) +{ + return MMCSD_MODE_RAW; +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_MMC1; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif
rk3328 spl is locate at dram, so do not have strict size limit, suppose to enable storage media controller driver, load ATF and U-Boot, then boot into ATF.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-spl.c | 64 +++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-spl.c
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
On Thu, 26 Oct 2017, Kever Yang wrote:
rk3328 spl is locate at dram, so do not have strict size limit, suppose to enable storage media controller driver, load ATF and U-Boot, then boot into ATF.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3328-board-spl.c | 64 +++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328-board-spl.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 49bdd36..56ba760 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -20,6 +20,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o +obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c new file mode 100644 index 0000000..1f7274a --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328-board-spl.c @@ -0,0 +1,64 @@ +/*
- (C) Copyright 2016 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <dm/pinctrl.h> +#include <ram.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/arch/cru_rk3328.h> +#include <asm/arch/grf_rk3328.h> +#include <asm/arch/hardware.h> +#include <asm/arch/periph.h> +#include <asm/arch/timer.h>
+DECLARE_GLOBAL_DATA_PTR;
+void board_debug_uart_init(void) +{ +}
+void board_init_f(ulong dummy) +{
- struct udevice *dev;
- int ret;
- ret = spl_early_init();
- if (ret) {
debug("spl_early_init() failed: %d\n", ret);hang();- }
- preloader_console_init();
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
debug("DRAM init failed: %d\n", ret);return;- }
+}
+u32 spl_boot_mode(const u32 boot_device) +{
- return MMCSD_MODE_RAW;
+}
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_MMC1;
+}
+#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{
- /* Just empty function now - can't decide what to choose */
- debug("%s: %s\n", __func__, name);
- return 0;
+} +#endif
This file is identical to rk3368-board-spl.c ... can we merge these two into a common file that is then used for both devices?
Rockchip TPL is not going to use both sram and dram, so we will use a separate link file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds | 91 ++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds new file mode 100644 index 0000000..3fd50fd --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2013 + * David Feng fenghua@phytium.com.cn + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * Aneesh V aneesh@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + .text : { + . = ALIGN(8); + *(.__image_copy_start) + CPUDIR/start.o (.text*) + *(.text*) + } + + .rodata : { + . = ALIGN(8); + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + .data : { + . = ALIGN(8); + *(.data*) + } + + .u_boot_list : { + . = ALIGN(8); + KEEP(*(SORT(.u_boot_list*))); + } + + .image_copy_end : { + . = ALIGN(8); + *(.__image_copy_end) + } + + .end : { + . = ALIGN(8); + *(.__end) + } + + _image_binary_end = .; + + .bss_start (NOLOAD) : { + . = ALIGN(8); + KEEP(*(.__bss_start)); + } + + .bss (NOLOAD) : { + *(.bss*) + . = ALIGN(8); + } + + .bss_end (NOLOAD) : { + KEEP(*(.__bss_end)); + } + + /DISCARD/ : { *(.dynsym) } + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } +} + +#if defined(CONFIG_TPL_MAX_SIZE) +ASSERT(__image_copy_end - __image_copy_start < (CONFIG_TPL_MAX_SIZE), \ + "TPL image too big"); +#endif + +#if defined(CONFIG_TPL_BSS_MAX_SIZE) +ASSERT(__bss_end - __bss_start < (CONFIG_TPL_BSS_MAX_SIZE), \ + "TPL image BSS too big"); +#endif + +#if defined(CONFIG_TPL_MAX_FOOTPRINT) +ASSERT(__bss_end - _start < (CONFIG_TPL_MAX_FOOTPRINT), \ + "TPL image plus BSS too big"); +#endif
Rockchip TPL is not going to use both sram and dram, so we will use a separate link file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds | 91 ++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
On Thu, 26 Oct 2017, Kever Yang wrote:
Rockchip TPL is not going to use both sram and dram, so we will use a separate link file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds | 91 ++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds new file mode 100644 index 0000000..3fd50fd --- /dev/null +++ b/arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds @@ -0,0 +1,91 @@ +/*
- (C) Copyright 2013
- David Feng fenghua@phytium.com.cn
- (C) Copyright 2002
- Gary Jennejohn, DENX Software Engineering, garyj@denx.de
- (C) Copyright 2010
- Texas Instruments, <www.ti.com>
- Aneesh V aneesh@ti.com
- SPDX-License-Identifier: GPL-2.0+
- */
+OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +ENTRY(_start) +SECTIONS +{
- . = 0x00000000;
- .text : {
. = ALIGN(8);*(.__image_copy_start)CPUDIR/start.o (.text*)*(.text*)- }
- .rodata : {
. = ALIGN(8);*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))- }
- .data : {
. = ALIGN(8);*(.data*)- }
- .u_boot_list : {
. = ALIGN(8);KEEP(*(SORT(.u_boot_list*)));- }
- .image_copy_end : {
. = ALIGN(8);*(.__image_copy_end)- }
- .end : {
. = ALIGN(8);*(.__end)- }
- _image_binary_end = .;
- .bss_start (NOLOAD) : {
. = ALIGN(8);KEEP(*(.__bss_start));- }
- .bss (NOLOAD) : {
*(.bss*). = ALIGN(8);- }
- .bss_end (NOLOAD) : {
KEEP(*(.__bss_end));- }
- /DISCARD/ : { *(.dynsym) }
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
+}
+#if defined(CONFIG_TPL_MAX_SIZE) +ASSERT(__image_copy_end - __image_copy_start < (CONFIG_TPL_MAX_SIZE), \
- "TPL image too big");
+#endif
+#if defined(CONFIG_TPL_BSS_MAX_SIZE) +ASSERT(__bss_end - __bss_start < (CONFIG_TPL_BSS_MAX_SIZE), \
- "TPL image BSS too big");
+#endif
+#if defined(CONFIG_TPL_MAX_FOOTPRINT) +ASSERT(__bss_end - _start < (CONFIG_TPL_MAX_FOOTPRINT), \
- "TPL image plus BSS too big");
+#endif
Could this simply be merged with rk3368/boot-tpl.lds and could we use a common file for both (and any future devices that follow the same boot model)?
Add a script to generate binaries from bl31.elf, and generate u-boot.its file for FIT image including u-boot, dtb and atf binaries.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
board/rockchip/evb_rk3328/mk_fit_atf.sh | 108 ++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100755 board/rockchip/evb_rk3328/mk_fit_atf.sh
diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh new file mode 100755 index 0000000..192c303 --- /dev/null +++ b/board/rockchip/evb_rk3328/mk_fit_atf.sh @@ -0,0 +1,108 @@ +#!/bin/sh +# +# script to generate FIT image source for rk3399 boards with +# ARM Trusted Firmware and multiple device trees (given on the command line) +# +# usage: $0 <dt_name> [<dt_name> [<dt_name] ...] + +[ -z "$BL31" ] && BL31="bl31.elf" + +if [ ! -f $BL31 ]; then + echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 + BL31=/dev/null +fi + +cat << __HEADER_EOF +/dts-v1/; + +/ { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + + images { + uboot@1 { + description = "U-Boot (64-bit)"; + data = /incbin/("u-boot-nodtb.bin"); + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <0x00200000>; + }; +__HEADER_EOF + +atf_cnt=1 + +for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \ + '{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'` +do + offset=${l%%:*} + ll=${l#*:} + phy_offset=${ll%:*} + filesz=${ll##*:} + + #echo "$offset/$phy_offset/$filesz" + + of=bl31_${phy_offset}.bin + dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz + + out_string="${out_string}:${phy_offset}" + + cat << __ATF1_EOF + atf@$atf_cnt { + description = "ARM Trusted Firmware"; + data = /incbin/("$of"); + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <$phy_offset>; +__ATF1_EOF + if [ "$atf_cnt" -eq 1 ]; then + cat << __ATF2_EOF + entry = <$phy_offset>; +__ATF2_EOF + fi + cat << __ATF3_EOF + }; +__ATF3_EOF + atf_cnt=$((atf_cnt + 1)) +done + +cnt=1 +for dtname in $* +do + cat << __FDT_IMAGE_EOF + fdt@$cnt { + description = "$(basename $dtname .dtb)"; + data = /incbin/("$dtname"); + type = "flat_dt"; + compression = "none"; + }; +__FDT_IMAGE_EOF + cnt=$((cnt+1)) +done + +cat << __CONF_HEADER_EOF + }; + configurations { + default = "config@1"; + +__CONF_HEADER_EOF + +cnt=1 +for dtname in $* +do + cat << __CONF_SECTION_EOF + config@$cnt { + description = "$(basename $dtname .dtb)"; + firmware = "uboot@1"; + loadables = "atf@1","atf@2"; + fdt = "fdt@1"; + }; +__CONF_SECTION_EOF + cnt=$((cnt+1)) +done + +cat << __ITS_EOF + }; +}; +__ITS_EOF
Add a script to generate binaries from bl31.elf, and generate u-boot.its file for FIT image including u-boot, dtb and atf binaries.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
board/rockchip/evb_rk3328/mk_fit_atf.sh | 108 ++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100755 board/rockchip/evb_rk3328/mk_fit_atf.sh
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
On Thu, 26 Oct 2017, Kever Yang wrote:
Add a script to generate binaries from bl31.elf, and generate u-boot.its file for FIT image including u-boot, dtb and atf binaries.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
board/rockchip/evb_rk3328/mk_fit_atf.sh | 108 ++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100755 board/rockchip/evb_rk3328/mk_fit_atf.sh
diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh new file mode 100755 index 0000000..192c303 --- /dev/null +++ b/board/rockchip/evb_rk3328/mk_fit_atf.sh @@ -0,0 +1,108 @@ +#!/bin/sh +# +# script to generate FIT image source for rk3399 boards with
Why the RK3399 here (no answer needed ... I know it's copied from the rk3399 file)?
+# ARM Trusted Firmware and multiple device trees (given on the command line) +# +# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+[ -z "$BL31" ] && BL31="bl31.elf"
+if [ ! -f $BL31 ]; then
- echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
- BL31=/dev/null
+fi
+cat << __HEADER_EOF +/dts-v1/;
+/ {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- images {
uboot@1 {description = "U-Boot (64-bit)";data = /incbin/("u-boot-nodtb.bin");type = "standalone";arch = "arm64";compression = "none";load = <0x00200000>;};+__HEADER_EOF
+atf_cnt=1
+for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
- '{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
+do
- offset=${l%%:*}
- ll=${l#*:}
- phy_offset=${ll%:*}
- filesz=${ll##*:}
- #echo "$offset/$phy_offset/$filesz"
- of=bl31_${phy_offset}.bin
- dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
- out_string="${out_string}:${phy_offset}"
- cat << __ATF1_EOF
atf@$atf_cnt {description = "ARM Trusted Firmware";data = /incbin/("$of");type = "firmware";arch = "arm64";compression = "none";load = <$phy_offset>;+__ATF1_EOF
- if [ "$atf_cnt" -eq 1 ]; then
cat << __ATF2_EOFentry = <$phy_offset>;+__ATF2_EOF
fi- cat << __ATF3_EOF
};+__ATF3_EOF
- atf_cnt=$((atf_cnt + 1))
+done
+cnt=1 +for dtname in $* +do
- cat << __FDT_IMAGE_EOF
fdt@$cnt {description = "$(basename $dtname .dtb)";data = /incbin/("$dtname");type = "flat_dt";compression = "none";};+__FDT_IMAGE_EOF
- cnt=$((cnt+1))
+done
+cat << __CONF_HEADER_EOF
- };
- configurations {
default = "config@1";+__CONF_HEADER_EOF
+cnt=1 +for dtname in $* +do
- cat << __CONF_SECTION_EOF
config@$cnt {description = "$(basename $dtname .dtb)";firmware = "uboot@1";loadables = "atf@1","atf@2";fdt = "fdt@1";};+__CONF_SECTION_EOF
- cnt=$((cnt+1))
+done
+cat << __ITS_EOF
- };
+}; +__ITS_EOF
Given that this is copied verbatim from the evb_rk3399/mk_fit_atf.sh file: please merge this and use a common file.
Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/dts/rk3328-evb.dts | 2 ++ arch/arm/dts/rk3328.dtsi | 1 + 2 files changed, 3 insertions(+)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index 7ab8c42..a944697 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -44,6 +44,7 @@ };
&uart2 { + u-boot,dm-pre-reloc; status = "okay"; };
@@ -60,6 +61,7 @@ };
&emmc { + u-boot,dm-pre-reloc; bus-width = <8>; cap-mmc-highspeed; supports-emmc; diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi index b821c4c..2a4c492 100644 --- a/arch/arm/dts/rk3328.dtsi +++ b/arch/arm/dts/rk3328.dtsi @@ -366,6 +366,7 @@ };
cru: clock-controller@ff440000 { + u-boot,dm-pre-reloc; compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; reg = <0x0 0xff440000 0x0 0x1000>; rockchip,grf = <&grf>;
Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/dts/rk3328-evb.dts | 2 ++ arch/arm/dts/rk3328.dtsi | 1 + 2 files changed, 3 insertions(+)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
On Thu, 26 Oct 2017, Kever Yang wrote:
Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/dts/rk3328-evb.dts | 2 ++ arch/arm/dts/rk3328.dtsi | 1 + 2 files changed, 3 insertions(+)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index 7ab8c42..a944697 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -44,6 +44,7 @@ };
&uart2 {
- u-boot,dm-pre-reloc; status = "okay";
};
@@ -60,6 +61,7 @@ };
&emmc {
- u-boot,dm-pre-reloc; bus-width = <8>; cap-mmc-highspeed; supports-emmc;
These should go into a "...-u-boot.dtsi" (for an example, please refer to arch/arm/dts/rk3368-lion-u-boot.dtsi). Thanks.
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi index b821c4c..2a4c492 100644 --- a/arch/arm/dts/rk3328.dtsi +++ b/arch/arm/dts/rk3328.dtsi @@ -366,6 +366,7 @@ };
cru: clock-controller@ff440000 {
u-boot,dm-pre-reloc;
Same as above.
Enable TPL/SPL support and some related option in Kconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/Kconfig | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 397f58a..4f6e222 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -75,6 +75,18 @@ config ROCKCHIP_RK3288 config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select TPL + select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL + select TPL_NEEDS_SEPARATE_STACK if TPL + imply SPL_SERIAL_SUPPORT + imply TPL_SERIAL_SUPPORT + imply SPL_SEPARATE_BSS + select ENABLE_ARM_SOC_BOOT0_HOOK + select DEBUG_UART_BOARD_INIT + select SYS_NS16550 help The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two @@ -159,7 +171,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" - default y if ROCKCHIP_RK3368 + default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328 select ROCKCHIP_BROM_HELPER depends on TPL help
Enable TPL/SPL support and some related option in Kconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Kconfig | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable TPL/SPL support and some related option in Kconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/Kconfig | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable driver options for TPL/SPL in evb-rk3328_defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
configs/evb-rk3328_defconfig | 47 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-)
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index ddcc868..c0b8d0b 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -1,11 +1,38 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_ROCKCHIP_RK3328=y +CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds" +CONFIG_TPL_TEXT_BASE=0xff091000 +CONFIG_TPL_STACK=0xff098000 +CONFIG_TPL_MAX_SIZE=28672 +CONFIG_TPL_SERIAL_PRESENT=y +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh" # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_TPL=y +CONFIG_TPL_BOOTROM_SUPPORT=y +CONFIG_TPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TPL_SERIAL_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_TPL_SERIAL_PRESENT=y CONFIG_FASTBOOT_BUF_ADDR=0x800800 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 @@ -13,14 +40,23 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_TPL_DM=y CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -28,21 +64,25 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3328=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y @@ -59,4 +99,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip" CONFIG_G_DNL_VENDOR_NUM=0x2207 CONFIG_G_DNL_PRODUCT_NUM=0x330a CONFIG_USE_TINY_PRINTF=y +CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y
Enable driver options for TPL/SPL in evb-rk3328_defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
configs/evb-rk3328_defconfig | 47 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable driver options for TPL/SPL in evb-rk3328_defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
configs/evb-rk3328_defconfig | 47 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
include/configs/rk3328_common.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 9819b22..7040948 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -14,12 +14,20 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SPL_FRAMEWORK + #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_TEXT_BASE 0x00200000 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 - +#define CONFIG_SPL_STACK 0x00400000 +#define CONFIG_SPL_TEXT_BASE 0x00000000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_BSS_START_ADDR 0x2000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 +#define CONFIG_TPL_STACK 0xff098000 +#define CONFIG_TPL_TEXT_BASE 0xff091000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* MMC/SD IP block */
Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
include/configs/rk3328_common.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
include/configs/rk3328_common.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
participants (2)
-
Kever Yang -
Philipp Tomsich