[PATCH v2 0/4] fix/add npcm845 serial and board error
1. Fix serial error and add bypass serial setting. 2. Fix/Add dts node node. 3. Add full function defconfig
Jim Liu (4): arm: dts: npcm845-evb: fix/add node and aliases configs: arbel: Enable full functions serial: npcm: support skip uart clock setting board: nuvoton: update console environment variable
arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 11 ++- arch/arm/dts/nuvoton-npcm845-evb.dts | 29 ++++++-- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 2 +- board/nuvoton/arbel_evb/Kconfig | 1 + board/nuvoton/arbel_evb/arbel_evb.c | 7 ++ board/nuvoton/common/Kconfig | 9 +++ board/nuvoton/common/Makefile | 1 + board/nuvoton/common/uart.c | 71 +++++++++++++++++++ board/nuvoton/common/uart.h | 11 +++ board/nuvoton/poleg_evb/Kconfig | 1 + board/nuvoton/poleg_evb/poleg_evb.c | 8 +++ configs/arbel_evb_defconfig | 16 ++++- drivers/serial/serial_npcm.c | 39 ++++++---- include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 ++++ 14 files changed, 194 insertions(+), 26 deletions(-) create mode 100644 board/nuvoton/common/Kconfig create mode 100644 board/nuvoton/common/Makefile create mode 100644 board/nuvoton/common/uart.c create mode 100644 board/nuvoton/common/uart.h create mode 100644 include/dt-bindings/phy/nuvoton,npcm-usbphy.h
Modify spi and usb aliases name. Add dt-binding for usb phy define and fix usb phy reset error. Add tpm/otpee and host_intf node.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- Changes for v2: - add espi node --- arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 11 ++++++- arch/arm/dts/nuvoton-npcm845-evb.dts | 29 ++++++++++++++----- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 2 +- include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 +++++++++ 4 files changed, 47 insertions(+), 9 deletions(-) create mode 100644 include/dt-bindings/phy/nuvoton,npcm-usbphy.h
diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index fabe5925b7..1694ef8849 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -133,7 +133,16 @@ ranges = <0x0 0x0 0xf0000000 0x00300000>, <0xfff00000 0x0 0xfff00000 0x00016000>;
- spi1: spi@201000 { + host_intf: host_intf@9f000 { + compatible = "nuvoton,npcm845-host-intf"; + reg = <0x9f000 0x1000>; + type = "espi"; + ioaddr = <0x4e>; + channel-support = <0xf>; + syscon = <&gcr>; + }; + + pspi: spi@201000 { compatible = "nuvoton,npcm845-pspi"; reg = <0x201000 0x1000>; pinctrl-names = "default"; diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts index a93666cb41..0d3aaa0fff 100644 --- a/arch/arm/dts/nuvoton-npcm845-evb.dts +++ b/arch/arm/dts/nuvoton-npcm845-evb.dts @@ -2,6 +2,8 @@ // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
/dts-v1/; + +#include <dt-bindings/phy/nuvoton,npcm-usbphy.h> #include "nuvoton-npcm845.dtsi" #include "nuvoton-npcm845-pincfg.dtsi"
@@ -46,10 +48,10 @@ spi1 = &fiu1; spi3 = &fiu3; spi4 = &fiux; - spi5 = &spi1; + spi5 = &pspi; usb0 = &udc0; usb1 = &ehci1; - usb2 = &ehci2; + usb2 = &udc8; };
chosen { @@ -60,6 +62,17 @@ reg = <0x0 0x0 0x0 0x40000000>; };
+ tpm@0 { + compatible = "microsoft,ftpm"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + vsbr2: vsbr2 { compatible = "regulator-npcm845"; regulator-name = "vr2"; @@ -149,6 +162,8 @@ snps,reset-active-low; snps,reset-delays-us = <0 10000 1000000>; snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */ + phy-supply = <&vsbr2>; + phy-supply-microvolt = <1800000>; status = "okay"; };
@@ -179,7 +194,7 @@ status = "okay"; };
-&spi1 { +&pspi { status = "okay"; };
@@ -197,7 +212,7 @@
&udc0 { status = "okay"; - phys = <&usbphy1 0>; + phys = <&usbphy1 NPCM_UDC0_7>; };
&sdhci0 { @@ -207,12 +222,12 @@
&ehci1 { status = "okay"; - phys = <&usbphy2 3>; + phys = <&usbphy2 NPCM_USBH1>; };
-&ehci2 { +&udc8 { status = "okay"; - phys = <&usbphy3 4>; + phys = <&usbphy3 NPCM_UDC8>; };
&rng { diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi index e49e564b79..4c6d5bed44 100644 --- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi +++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi @@ -174,7 +174,7 @@ compatible = "nuvoton,npcm845-usb-phy"; #phy-cells = <1>; reg = <3>; - resets = <&rstc3 NPCM8XX_RESET_USBPHY3>; + resets = <&rstc4 NPCM8XX_RESET_USBPHY3>; status = "disabled"; }; }; diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h new file mode 100644 index 0000000000..46946d377d --- /dev/null +++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (c) 2023 Nuvoton Technology corporation. + +#ifndef _DT_BINDINGS_NPCM_USBPHY_H +#define _DT_BINDINGS_NPCM_USBPHY_H + +#define NPCM_UDC0_7 0 +#define NPCM_UDC8 1 +#define NPCM_UDC9 2 +#define NPCM_USBH1 3 +#define NPCM_USBH2 4 +#define NPCM_MAX_USB_CTRL_ID 4 + +#endif
On Tue, Nov 14, 2023 at 04:51:56PM +0800, Jim Liu wrote:
Modify spi and usb aliases name. Add dt-binding for usb phy define and fix usb phy reset error. Add tpm/otpee and host_intf node.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
For the series, applied to u-boot/next, thanks!
Enable more functions/commands for arbel evb.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- Changes for v2: --- no change --- configs/arbel_evb_defconfig | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 6cfb5a7d32..e2714d1e1a 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x06208000 CONFIG_SYS_MALLOC_LEN=0x240000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x06208000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -19,10 +21,12 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" +CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_BOOTM_LEN=0x1400000 +CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -31,6 +35,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -39,6 +44,7 @@ CONFIG_CMD_RNG=y CONFIG_CMD_UUID=y CONFIG_CMD_HASH=y CONFIG_CMD_TPM=y +CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -49,6 +55,7 @@ CONFIG_NPCM_AES=y CONFIG_NPCM_SHA=y CONFIG_NPCM_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_NPCM=y # CONFIG_INPUT is not set CONFIG_MISC=y CONFIG_NPCM_HOST=y @@ -87,12 +94,17 @@ CONFIG_TPM2_FTPM_TEE=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_NPCM=y -CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_OHCI_NPCM=y CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Nuvoton" +CONFIG_USB_GADGET_VENDOR_NUM=0x0416 +CONFIG_USB_GADGET_PRODUCT_NUM=0xffff +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_LIB_HW_RAND=y CONFIG_TPM=y CONFIG_SHA_HW_ACCEL=y # CONFIG_EFI_LOADER is not set +CONFIG_SYS_SKIP_UART_INIT=y
Skip the uart clock setting if CONFIG_SYS_SKIP_UART_INIT is enabled. Fix divisor error.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- Changes for v2: - no change --- drivers/serial/serial_npcm.c | 39 ++++++++++++++++++++++-------------- 1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/drivers/serial/serial_npcm.c b/drivers/serial/serial_npcm.c index 76ac7cb80d..6bf3a943a2 100644 --- a/drivers/serial/serial_npcm.c +++ b/drivers/serial/serial_npcm.c @@ -83,8 +83,11 @@ static int npcm_serial_setbrg(struct udevice *dev, int baudrate) struct npcm_uart *uart = plat->reg; u16 divisor;
+ if (IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)) + return 0; + /* BaudOut = UART Clock / (16 * [Divisor + 2]) */ - divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate + 2) - 2; + divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate) - 2;
setbits_8(&uart->lcr, LCR_DLAB); writeb(divisor & 0xff, &uart->dll); @@ -97,29 +100,35 @@ static int npcm_serial_setbrg(struct udevice *dev, int baudrate) static int npcm_serial_probe(struct udevice *dev) { struct npcm_serial_plat *plat = dev_get_plat(dev); - struct npcm_uart *uart = plat->reg; + struct npcm_uart *uart; struct clk clk, parent; u32 freq; int ret;
plat->reg = dev_read_addr_ptr(dev); - freq = dev_read_u32_default(dev, "clock-frequency", 0); + uart = plat->reg;
- ret = clk_get_by_index(dev, 0, &clk); - if (ret < 0) - return ret; + if (!IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)) { + freq = dev_read_u32_default(dev, "clock-frequency", 24000000);
- ret = clk_get_by_index(dev, 1, &parent); - if (!ret) { - ret = clk_set_parent(&clk, &parent); - if (ret) + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) return ret; - }
- ret = clk_set_rate(&clk, freq); - if (ret < 0) - return ret; - plat->uart_clk = ret; + ret = clk_get_by_index(dev, 1, &parent); + if (!ret) { + ret = clk_set_parent(&clk, &parent); + if (ret) + return ret; + } + + if (freq) { + ret = clk_set_rate(&clk, freq); + if (ret < 0) + return ret; + } + plat->uart_clk = clk_get_rate(&clk); + }
/* Disable all interrupt */ writeb(0, &uart->ier);
If CONFIG_SYS_SKIP_UART_INIT is enabled, calculate the current baud rate and update the "console" environment variable.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- Changes for v2: --- rename file --- modify board_set_console to void function --- board/nuvoton/arbel_evb/Kconfig | 1 + board/nuvoton/arbel_evb/arbel_evb.c | 7 +++ board/nuvoton/common/Kconfig | 9 ++++ board/nuvoton/common/Makefile | 1 + board/nuvoton/common/uart.c | 71 +++++++++++++++++++++++++++++ board/nuvoton/common/uart.h | 11 +++++ board/nuvoton/poleg_evb/Kconfig | 1 + board/nuvoton/poleg_evb/poleg_evb.c | 8 ++++ 8 files changed, 109 insertions(+) create mode 100644 board/nuvoton/common/Kconfig create mode 100644 board/nuvoton/common/Makefile create mode 100644 board/nuvoton/common/uart.c create mode 100644 board/nuvoton/common/uart.h
diff --git a/board/nuvoton/arbel_evb/Kconfig b/board/nuvoton/arbel_evb/Kconfig index 33c589f1fb..ed1c1ad8ee 100644 --- a/board/nuvoton/arbel_evb/Kconfig +++ b/board/nuvoton/arbel_evb/Kconfig @@ -15,4 +15,5 @@ config SYS_MEM_TOP_HIDE help Reserve memory for ECC/GFX/OPTEE/TIP/CP.
+source "board/nuvoton/common/Kconfig" endif diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 59e1a42564..8fc56c1839 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -7,6 +7,7 @@ #include <dm.h> #include <asm/io.h> #include <asm/arch/gcr.h> +#include "../common/uart.h"
#define SR_MII_CTRL_SWR_BIT15 15
@@ -90,3 +91,9 @@ int dram_init_banksize(void) return 0; }
+int last_stage_init(void) +{ + board_set_console(); + + return 0; +} diff --git a/board/nuvoton/common/Kconfig b/board/nuvoton/common/Kconfig new file mode 100644 index 0000000000..61de7bc5f8 --- /dev/null +++ b/board/nuvoton/common/Kconfig @@ -0,0 +1,9 @@ +if ARCH_NPCM + +config SYS_SKIP_UART_INIT + bool "Skip UART initialization" + depends on NPCM_SERIAL + help + Select this if the UART you want to use is already + initialized by the time U-Boot starts its execution. +endif diff --git a/board/nuvoton/common/Makefile b/board/nuvoton/common/Makefile new file mode 100644 index 0000000000..8fd83b229b --- /dev/null +++ b/board/nuvoton/common/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_SYS_SKIP_UART_INIT) += uart.o diff --git a/board/nuvoton/common/uart.c b/board/nuvoton/common/uart.c new file mode 100644 index 0000000000..3b8badd67a --- /dev/null +++ b/board/nuvoton/common/uart.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Nuvoton Technology Corp. + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <env.h> +#include <serial.h> +#include <linux/delay.h> + +#define UART_DLL 0x0 +#define UART_DLM 0x4 +#define UART_LCR 0xc +#define LCR_DLAB BIT(7) + +void board_set_console(void) +{ + const unsigned long baudrate_table[] = CFG_SYS_BAUDRATE_TABLE; + struct udevice *dev = gd->cur_serial_dev; + unsigned int baudrate, max_delta; + void __iomem *uart_reg; + struct clk clk; + char string[32]; + u32 uart_clk; + u8 dll, dlm; + u16 divisor; + int ret, i; + + if (!dev) + return; + + uart_reg = dev_read_addr_ptr(dev); + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return; + + uart_clk = clk_get_rate(&clk); + setbits_8(uart_reg + UART_LCR, LCR_DLAB); + dll = readb(uart_reg + UART_DLL); + dlm = readb(uart_reg + UART_DLM); + clrbits_8(uart_reg + UART_LCR, LCR_DLAB); + divisor = dll | (dlm << 8); + baudrate = uart_clk / ((16 * (divisor + 2))); + for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) { + max_delta = baudrate_table[i] / 20; + if (abs(baudrate - baudrate_table[i]) < max_delta) { + /* The baudrate is supported */ + gd->baudrate = baudrate_table[i]; + break; + } + } + + if (i == ARRAY_SIZE(baudrate_table)) { + /* current baudrate is not suitable, set to default */ + divisor = DIV_ROUND_CLOSEST(uart_clk, 16 * gd->baudrate) - 2; + setbits_8(uart_reg + UART_LCR, LCR_DLAB); + writeb(divisor & 0xff, uart_reg + UART_DLL); + writeb(divisor >> 8, uart_reg + UART_DLM); + clrbits_8(uart_reg + UART_LCR, LCR_DLAB); + udelay(100); + printf("\r\nUART(source %u): change baudrate from %u to %u\n", + uart_clk, baudrate, uart_clk / ((16 * (divisor + 2)))); + } + + debug("Set env baudrate=%u\n", gd->baudrate); + snprintf(string, sizeof(string), "ttyS0,%un8", gd->baudrate); + env_set("console", string); + +} diff --git a/board/nuvoton/common/uart.h b/board/nuvoton/common/uart.h new file mode 100644 index 0000000000..9cc895251b --- /dev/null +++ b/board/nuvoton/common/uart.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 Nuvoton Technology Corp. + */ + +#ifndef _NUVOTON_UART_H +#define _NUVOTON_UART_H + +void board_set_console(void); + +#endif /* _NUVOTON_COMMON_H */ diff --git a/board/nuvoton/poleg_evb/Kconfig b/board/nuvoton/poleg_evb/Kconfig index d3f4c1dd81..6f7f1ef157 100644 --- a/board/nuvoton/poleg_evb/Kconfig +++ b/board/nuvoton/poleg_evb/Kconfig @@ -22,4 +22,5 @@ config TARGET_POLEG_EVB
endchoice
+source "board/nuvoton/common/Kconfig" endif diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c index 2052af6649..7421911a41 100644 --- a/board/nuvoton/poleg_evb/poleg_evb.c +++ b/board/nuvoton/poleg_evb/poleg_evb.c @@ -10,6 +10,7 @@ #include <asm/io.h> #include <asm/arch/gcr.h> #include <asm/mach-types.h> +#include "../common/uart.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -53,3 +54,10 @@ int dram_init(void)
return 0; } + +int last_stage_init(void) +{ + board_set_console(); + + return 0; +}
On Tue, Nov 14, 2023 at 04:51:55PM +0800, Jim Liu wrote:
- Fix serial error and add bypass serial setting.
- Fix/Add dts node node.
- Add full function defconfig
Jim Liu (4): arm: dts: npcm845-evb: fix/add node and aliases configs: arbel: Enable full functions serial: npcm: support skip uart clock setting board: nuvoton: update console environment variable
arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 11 ++- arch/arm/dts/nuvoton-npcm845-evb.dts | 29 ++++++-- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 2 +- board/nuvoton/arbel_evb/Kconfig | 1 + board/nuvoton/arbel_evb/arbel_evb.c | 7 ++ board/nuvoton/common/Kconfig | 9 +++ board/nuvoton/common/Makefile | 1 + board/nuvoton/common/uart.c | 71 +++++++++++++++++++ board/nuvoton/common/uart.h | 11 +++ board/nuvoton/poleg_evb/Kconfig | 1 + board/nuvoton/poleg_evb/poleg_evb.c | 8 +++ configs/arbel_evb_defconfig | 16 ++++- drivers/serial/serial_npcm.c | 39 ++++++---- include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 ++++ 14 files changed, 194 insertions(+), 26 deletions(-) create mode 100644 board/nuvoton/common/Kconfig create mode 100644 board/nuvoton/common/Makefile create mode 100644 board/nuvoton/common/uart.c create mode 100644 board/nuvoton/common/uart.h create mode 100644 include/dt-bindings/phy/nuvoton,npcm-usbphy.h
I just want to make sure now that you've given this series a compile and boot test on some platform, yes? Thanks.
Hi Tom
Thanks for your check. These patches I have checked and tested on npcm845 evb. The compile log and boot log is as blow:
https://drive.google.com/file/d/1v3PFArKiqpFc0l9i0fy1xj0AauKlKS0k/view?usp=s...
If you have any confusion or you can't see the log please let me know.
Best regards, Jim
On Wed, Nov 15, 2023 at 12:23 AM Tom Rini trini@konsulko.com wrote:
On Tue, Nov 14, 2023 at 04:51:55PM +0800, Jim Liu wrote:
- Fix serial error and add bypass serial setting.
- Fix/Add dts node node.
- Add full function defconfig
Jim Liu (4): arm: dts: npcm845-evb: fix/add node and aliases configs: arbel: Enable full functions serial: npcm: support skip uart clock setting board: nuvoton: update console environment variable
arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 11 ++- arch/arm/dts/nuvoton-npcm845-evb.dts | 29 ++++++-- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 2 +- board/nuvoton/arbel_evb/Kconfig | 1 + board/nuvoton/arbel_evb/arbel_evb.c | 7 ++ board/nuvoton/common/Kconfig | 9 +++ board/nuvoton/common/Makefile | 1 + board/nuvoton/common/uart.c | 71 +++++++++++++++++++ board/nuvoton/common/uart.h | 11 +++ board/nuvoton/poleg_evb/Kconfig | 1 + board/nuvoton/poleg_evb/poleg_evb.c | 8 +++ configs/arbel_evb_defconfig | 16 ++++- drivers/serial/serial_npcm.c | 39 ++++++---- include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 ++++ 14 files changed, 194 insertions(+), 26 deletions(-) create mode 100644 board/nuvoton/common/Kconfig create mode 100644 board/nuvoton/common/Makefile create mode 100644 board/nuvoton/common/uart.c create mode 100644 board/nuvoton/common/uart.h create mode 100644 include/dt-bindings/phy/nuvoton,npcm-usbphy.h
I just want to make sure now that you've given this series a compile and boot test on some platform, yes? Thanks.
-- Tom
participants (2)
-
Jim Liu -
Tom Rini