[U-Boot] [PATCH 1/2] rtl8169: fix cache misalignment message on transmit.
The call to flush cache on the transmit buffer was misplaced (for very short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded to minimum length (so the padding is flushed too), and round the size up to a cacheline.
Signed-off-by: Peter Chubb peter.chubb@data61.csiro.au --- drivers/net/rtl8169.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index 1cc0b40..a3f4423 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -629,11 +629,12 @@ static int rtl_send_common(pci_dev_t dev, unsigned long dev_iobase, /* point to the current txb incase multiple tx_rings are used */ ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE]; memcpy(ptxb, (char *)packet, (int)length); - rtl_flush_buffer(ptxb, length);
while (len < ETH_ZLEN) ptxb[len++] = '\0';
+ rtl_flush_buffer(ptxb, ALIGN(len, RTL8169_ALIGN)); + tpc->TxDescArray[entry].buf_Haddr = 0; #ifdef CONFIG_DM_ETH tpc->TxDescArray[entry].buf_addr = cpu_to_le32(
After any operation that downloads a file (e.g., pxe get, or dhcp), the buffer containing the downloaded data is flushed. This patch rounds up the flushed size to a cacheline boundary, preventing a cache misalignment message from u-boot.
Signed-off-by: Peter Chubb peter.chubb@data61.csiro.au --- cmd/net.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/net.c b/cmd/net.c index b2f3c7b..540daeb 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -244,7 +244,7 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, }
/* flush cache */ - flush_cache(load_addr, size); + flush_cache(load_addr, ALIGN(size, CONFIG_SYS_CACHELINE_SIZE));
bootstage_mark(BOOTSTAGE_ID_NET_LOADED);
Hi Peter,
On Mon, Aug 29, 2016 at 8:15 PM, Peter.Chubb@data61.csiro.au wrote:
After any operation that downloads a file (e.g., pxe get, or dhcp), the buffer containing the downloaded data is flushed. This patch rounds up the flushed size to a cacheline boundary, preventing a cache misalignment message from u-boot.
Signed-off-by: Peter Chubb peter.chubb@data61.csiro.au
cmd/net.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/net.c b/cmd/net.c index b2f3c7b..540daeb 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -244,7 +244,7 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, }
/* flush cache */
flush_cache(load_addr, size);
flush_cache(load_addr, ALIGN(size, CONFIG_SYS_CACHELINE_SIZE));
I think we would be better off just removing the flush.
Thanks, -Joe
On Mon, Aug 29, 2016 at 8:15 PM, Peter.Chubb@data61.csiro.au wrote:
The call to flush cache on the transmit buffer was misplaced (for very short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded to minimum length (so the padding is flushed too), and round the size up to a cacheline.
Signed-off-by: Peter Chubb peter.chubb@data61.csiro.au
Acked-by: Joe Hershberger joe.hershberger@ni.com
participants (2)
-
Joe Hershberger -
Peter.Chubb＠data61.csiro.au