After OneNAND IPL updated, apollon boot code exceeds 1KiB size,

This patch reduces the apollon boot code

Signed-off-by: Kyungmin Park kyungmin.park@samsung.com --- diff --git a/onenand_ipl/board/apollon/apollon.c b/onenand_ipl/board/apollon/apollon.c index 4936e00..4d4564c 100644 --- a/onenand_ipl/board/apollon/apollon.c +++ b/onenand_ipl/board/apollon/apollon.c @@ -54,7 +54,6 @@ static void muxSetupUART1(void) /* UART1_RX pin configuration, PIN = T21 */ write_config_reg(CONTROL_PADCONF_UART1_RX, 0); } -#endif

/********************************************************** * Routine: s_init @@ -63,8 +62,7 @@ static void muxSetupUART1(void) **********************************************************/ int s_init(int skip) { -#ifdef CONFIG_SYS_PRINTF muxSetupUART1(); -#endif return 0; } +#endif diff --git a/onenand_ipl/board/apollon/low_levelinit.S b/onenand_ipl/board/apollon/low_levelinit.S index 205170f..1eb116e 100644 --- a/onenand_ipl/board/apollon/low_levelinit.S +++ b/onenand_ipl/board/apollon/low_levelinit.S @@ -64,6 +64,10 @@ #error "Please configure PRCM schecm" #endif

+/* + * r5 has zero always + */ + _TEXT_BASE: .word TEXT_BASE /* sdram load addr from config.mk */

@@ -87,15 +91,11 @@ lowlevel_init: #endif

/* Pin muxing for SDRC */ - mov r1, #0x00 - ldr r0, =0x480000A1 /* ball C12, mode 0 */ - strb r1, [r0] - - ldr r0, =0x48000032 /* ball D11, mode 0 */ - strb r1, [r0] - - ldr r0, =0x480000A3 /* ball B13, mode 0 */ - strb r1, [r0] + mov r5, #0x00 + ldr r0, =0x48000000 + strb r5, [r0, #0xA1] /* ball C12, mode 0 */ + strb r5, [r0, #0x32] /* ball D11, mode 0 */ + strb r5, [r0, #0xA3] /* ball B13, mode 0 */

/* SDRC setting */ ldr r0, =OMAP2420_SDRC_BASE @@ -129,8 +129,7 @@ lowlevel_init: ldr r1, =0x00000007 str r1, [r0, #0xA8]

- ldr r1, =0x00000000 - str r1, [r0, #0xA8] + str r5, [r0, #0xA8]

ldr r1, =0x00000001 str r1, [r0, #0xA8] @@ -150,9 +149,8 @@ lowlevel_init:

/* Note: You MUST set EMR values */ /* EMR1 & EMR2 */ - ldr r1, =0x00000000 - str r1, [r0, #0x88] - str r1, [r0, #0x8C] + str r5, [r0, #0x88] + str r5, [r0, #0x8C]

#ifdef OLD_SDRC_DLLA_CTRL /* SDRC_DLLA_CTRL */ @@ -185,6 +183,7 @@ lowlevel_init: subs r2, r2, #0x1 bne 1b

+#ifdef CONFIG_PRINTF ldr sp, SRAM_STACK str ip, [sp] /* stash old link register */ mov ip, lr /* save link reg across call */ @@ -194,6 +193,7 @@ lowlevel_init:

ldr ip, [sp] /* restore save ip */ mov lr, ip /* restore link reg */ +#endif

/* back to arch calling code */ mov pc, lr