čt 5. 5. 2022 v 10:56 odesílatel Michal Simek monstr@monstr.eu napsal:

From: Neal Frager neal.frager@amd.com

This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu102-revA evaluation board.

The Linux DP driver expects the DP to be using the following PLL config:

• DP video PLL should use the VPLL (0x0)
• DP audio PLL should use the RPLL (0x3)

Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL.

Signed-off-by: Neal Frager neal.frager@amd.com Signed-off-by: Michal Simek michal.simek@amd.com

---

board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c index 8ecd9ee90b5a..f99e06acf6ee 100644 --- a/board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c @@ -85,8 +85,8 @@ static unsigned long psu_clock_init_data(void) psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);

•   psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010303U);
  

•   psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01012700U);
  

•   psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010500U);
  

•   psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01013C03U);
    psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011103U);
    psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
    psu_mask_write(0xFD1A0064, 0x01003F07U, 0x01000200U);
  

-- 2.36.0

Applied. M