[U-Boot] [PATCH 00/21] beagle_x15/omap5: Add dwc3 peripheral support
Patch series performs the following: *) Add dwc3 peripheral support for beagle_x15 and omap5 *) Add RNDIS boot support for AM43xx *) Cleanups and Fixes
Kishon Vijay Abraham I (20): usb: dwc3: dwc3-omap: Use the clear register inorder to clear the interrupts usb: gadget: ether: Perform board initialization from ethernet gadget driver ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2 TI PHY: Add support to control 2nd USB PHY in DRA7xx/AM57xx board: ti: beagle_x15: added USB initializtion code board: ti: OMAP5: added USB initializtion code include: configs: Enable DWC3 and DFU in ti_omap5_common ARM: OMAP5: Add support for disabling clocks in uboot ARM: OMAP5: Add functions to enable and disable USB clocks ARM: AM43xx: Add support for disabling clocks in uboot ARM: AM43xx: Add functions to enable and disable USB clocks board: ti: invoke clock API to enable and disable clocks ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks() board: ti: remove duplicate initialization of vbus_id_status usb: host: xhci-omap: invoke board_usb_cleanup in xhci_hcd_stop include: configs: am43xx_evm: add 'usb stop' in usbboot env usb: gadget: ether: populate _reset_ callback spl: Fix USB boot device values for am43xx spl: Add USB peripheral boot device value for am43xx configs: am43xx: Add am43xx_evm_usbspl_defconfig
Tom Rini (1): am43xx: Add USB device boot support to SPL
arch/arm/cpu/armv7/am33xx/clock.c | 53 +++++++++++ arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 82 ++++++++++++++--- arch/arm/cpu/armv7/omap-common/clocks-common.c | 53 +++++++++++ arch/arm/cpu/armv7/omap5/hw_data.c | 111 ++++++++++++++++++++--- arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 + arch/arm/include/asm/arch-am33xx/clock.h | 1 + arch/arm/include/asm/arch-am33xx/spl.h | 3 +- arch/arm/include/asm/arch-am33xx/sys_proto.h | 5 ++ arch/arm/include/asm/arch-omap5/clock.h | 3 + arch/arm/include/asm/arch-omap5/omap.h | 8 +- arch/arm/include/asm/omap_common.h | 12 +++ board/ti/am43xx/MAINTAINERS | 1 + board/ti/am43xx/board.c | 43 +++++++-- board/ti/beagle_x15/board.c | 115 ++++++++++++++++++++++++ board/ti/dra7xx/evm.c | 4 +- board/ti/omap5_uevm/evm.c | 77 ++++++++++++++++ configs/am43xx_evm_usbspl_defconfig | 9 ++ drivers/usb/dwc3/dwc3-omap.c | 46 ++++++---- drivers/usb/dwc3/ti_usb_phy.c | 15 +++- drivers/usb/gadget/ether.c | 5 ++ drivers/usb/gadget/gadget_chips.h | 2 + drivers/usb/host/xhci-omap.c | 1 + include/configs/am43xx_evm.h | 11 +++ include/configs/dra7xx_evm.h | 63 ------------- include/configs/ti_omap5_common.h | 67 +++++++++++++- scripts/Makefile.spl | 2 + 26 files changed, 671 insertions(+), 123 deletions(-) create mode 100644 configs/am43xx_evm_usbspl_defconfig
Writing "0x00" to the USBOTGSS_IRQENABLE_SET_MISC and USBOTGSS_IRQENABLE_SET_0 doesn't disable the interrupts. Used USBOTGSS_IRQENABLE_CLR_MISC and USBOTGSS_IRQENABLE_CLR_0 instead.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- drivers/usb/dwc3/dwc3-omap.c | 46 +++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 18 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index 46af109..ac9a856 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -91,6 +91,16 @@ #define USBOTGSS_IRQMISC_DISCHRGVBUS_FALL (1 << 3) #define USBOTGSS_IRQMISC_IDPULLUP_FALL (1 << 0)
+#define USBOTGSS_INTERRUPTS (USBOTGSS_IRQMISC_OEVT | \ + USBOTGSS_IRQMISC_DRVVBUS_RISE | \ + USBOTGSS_IRQMISC_CHRGVBUS_RISE | \ + USBOTGSS_IRQMISC_DISCHRGVBUS_RISE | \ + USBOTGSS_IRQMISC_IDPULLUP_RISE | \ + USBOTGSS_IRQMISC_DRVVBUS_FALL | \ + USBOTGSS_IRQMISC_CHRGVBUS_FALL | \ + USBOTGSS_IRQMISC_DISCHRGVBUS_FALL | \ + USBOTGSS_IRQMISC_IDPULLUP_FALL) + /* UTMI_OTG_CTRL REGISTER */ #define USBOTGSS_UTMI_OTG_CTRL_DRVVBUS (1 << 5) #define USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS (1 << 4) @@ -187,6 +197,18 @@ static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value) omap->irq0_offset, value); }
+static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value) +{ + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_MISC + + omap->irqmisc_offset, value); +} + +static void dwc3_omap_write_irq0_clr(struct dwc3_omap *omap, u32 value) +{ + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_0 - + omap->irq0_offset, value); +} + static void dwc3_omap_set_mailbox(struct dwc3_omap *omap, enum omap_dwc3_vbus_id_status status) { @@ -285,30 +307,18 @@ static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
static void dwc3_omap_enable_irqs(struct dwc3_omap *omap) { - u32 reg; - /* enable all IRQs */ - reg = USBOTGSS_IRQO_COREIRQ_ST; - dwc3_omap_write_irq0_set(omap, reg); - - reg = (USBOTGSS_IRQMISC_OEVT | - USBOTGSS_IRQMISC_DRVVBUS_RISE | - USBOTGSS_IRQMISC_CHRGVBUS_RISE | - USBOTGSS_IRQMISC_DISCHRGVBUS_RISE | - USBOTGSS_IRQMISC_IDPULLUP_RISE | - USBOTGSS_IRQMISC_DRVVBUS_FALL | - USBOTGSS_IRQMISC_CHRGVBUS_FALL | - USBOTGSS_IRQMISC_DISCHRGVBUS_FALL | - USBOTGSS_IRQMISC_IDPULLUP_FALL); - - dwc3_omap_write_irqmisc_set(omap, reg); + dwc3_omap_write_irq0_set(omap, USBOTGSS_IRQO_COREIRQ_ST); + + dwc3_omap_write_irqmisc_set(omap, USBOTGSS_INTERRUPTS); }
static void dwc3_omap_disable_irqs(struct dwc3_omap *omap) { /* disable all IRQs */ - dwc3_omap_write_irqmisc_set(omap, 0x00); - dwc3_omap_write_irq0_set(omap, 0x00); + dwc3_omap_write_irq0_clr(omap, USBOTGSS_IRQO_COREIRQ_ST); + + dwc3_omap_write_irqmisc_clr(omap, USBOTGSS_INTERRUPTS); }
static void dwc3_omap_map_offset(struct dwc3_omap *omap)
On Thursday, August 06, 2015 at 06:15:51 PM, Kishon Vijay Abraham I wrote:
Writing "0x00" to the USBOTGSS_IRQENABLE_SET_MISC and USBOTGSS_IRQENABLE_SET_0 doesn't disable the interrupts. Used USBOTGSS_IRQENABLE_CLR_MISC and USBOTGSS_IRQENABLE_CLR_0 instead.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
Ethernet gadget driver can be used both by both SPL and u-boot. Since usb_eth_init() is the entry point for ethernet gadget driver, perform board initialization there. Also perform the cleanup in usb_eth_halt.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- drivers/usb/gadget/ether.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 141ff8b..850ba02 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -15,6 +15,7 @@ #include <linux/usb/cdc.h> #include <linux/usb/gadget.h> #include <net.h> +#include <usb.h> #include <malloc.h> #include <linux/ctype.h>
@@ -2312,6 +2313,8 @@ static int usb_eth_init(struct eth_device *netdev, bd_t *bd) goto fail; }
+ board_usb_init(0, USB_INIT_DEVICE); + /* Configure default mac-addresses for the USB ethernet device */ #ifdef CONFIG_USBNET_DEV_ADDR strlcpy(dev_addr, CONFIG_USBNET_DEV_ADDR, sizeof(dev_addr)); @@ -2492,6 +2495,7 @@ void usb_eth_halt(struct eth_device *netdev) }
usb_gadget_unregister_driver(ð_driver); + board_usb_cleanup(0, USB_INIT_DEVICE); }
static struct usb_gadget_driver eth_driver = {
On Thursday, August 06, 2015 at 06:15:52 PM, Kishon Vijay Abraham I wrote:
Ethernet gadget driver can be used both by both SPL and u-boot. Since usb_eth_init() is the entry point for ethernet gadget driver, perform board initialization there. Also perform the cleanup in usb_eth_halt.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
Enabled clocks for the second dwc3 controller and second USB PHY present in DRA7.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/omap5/hw_data.c | 16 ++++++++++++++++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 ++ arch/arm/include/asm/arch-omap5/clock.h | 3 +++ arch/arm/include/asm/omap_common.h | 2 ++ 4 files changed, 23 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 3a723ca..11440ac 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -463,6 +463,9 @@ void enable_basic_clocks(void) #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) (*prcm)->cm_l3init_ocp2scp1_clkctrl, (*prcm)->cm_l3init_usb_otg_ss1_clkctrl, +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + (*prcm)->cm_l3init_usb_otg_ss2_clkctrl, +#endif #endif 0 }; @@ -503,6 +506,19 @@ void enable_basic_clocks(void) /* Enable 32 KHz clock for dwc3 */ setbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + /* Enable 960 MHz clock for dwc3 */ + setbits_le32((*prcm)->cm_l3init_usb_otg_ss2_clkctrl, + OPTFCLKEN_REFCLK960M); + + /* Enable 32 KHz clock for dwc3 */ + setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, + USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); + + /* Enable 60 MHz clock for USB2PHY2 */ + setbits_le32((*prcm)->cm_coreaon_l3init_60m_gfclk_clkctrl, + L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK); +#endif #endif
/* Set the correct clock dividers for mmc */ diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index cd51fe7..99f847b 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -809,6 +809,7 @@ struct prcm_regs const dra7xx_prcm = { .cm_clkmode_dpll_gmac = 0x4a0052a8, .cm_coreaon_usb_phy1_core_clkctrl = 0x4a008640, .cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688, + .cm_coreaon_l3init_60m_gfclk_clkctrl = 0x4a0086c0,
/* cm1.mpu */ .cm_mpu_mpu_clkctrl = 0x4a005320, @@ -919,6 +920,7 @@ struct prcm_regs const dra7xx_prcm = { .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, .cm_l3init_ocp2scp3_clkctrl = 0x4a0093e8, .cm_l3init_usb_otg_ss1_clkctrl = 0x4a0093f0, + .cm_l3init_usb_otg_ss2_clkctrl = 0x4a009340,
/* cm2.l4per */ .cm_l4per_clkstctrl = 0x4a009700, diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index f8e5630..38d50d6 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -172,6 +172,9 @@ /* CM_COREAON_USB_PHY_CORE_CLKCTRL */ #define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8)
+/* CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL */ +#define L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK (1 << 8) + /* CM_L3INIT_USB_OTG_SS_CLKCTRL */ #define OTG_SS_CLKCTRL_MODULEMODE_HW (1 << 0) #define OPTFCLKEN_REFCLK960M (1 << 8) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 056affc..462a9ee 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -145,6 +145,7 @@ struct prcm_regs { u32 cm_ssc_modfreqdiv_dpll_unipro; u32 cm_coreaon_usb_phy1_core_clkctrl; u32 cm_coreaon_usb_phy2_core_clkctrl; + u32 cm_coreaon_l3init_60m_gfclk_clkctrl;
/* cm2.core */ u32 cm_coreaon_bandgap_clkctrl; @@ -231,6 +232,7 @@ struct prcm_regs { u32 cm_l3init_ocp2scp1_clkctrl; u32 cm_l3init_ocp2scp3_clkctrl; u32 cm_l3init_usb_otg_ss1_clkctrl; + u32 cm_l3init_usb_otg_ss2_clkctrl;
u32 prm_irqstatus_mpu_2;
Added support to power on/power off the second USB PHY present in DRA7xx and AM57xx.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- drivers/usb/dwc3/ti_usb_phy.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c index e6048eb..4159e5a 100644 --- a/drivers/usb/dwc3/ti_usb_phy.c +++ b/drivers/usb/dwc3/ti_usb_phy.c @@ -193,8 +193,11 @@ void ti_usb2_phy_power(struct ti_usb_phy *phy, int on) val = readl(phy->usb2_phy_power);
if (on) { -#ifdef CONFIG_DRA7XX - val &= ~OMAP_CTRL_DEV_PHY_PD; +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + if (phy->index == 1) + val &= ~OMAP_CTRL_USB2_PHY_PD; + else + val &= ~OMAP_CTRL_DEV_PHY_PD; #elif defined(CONFIG_AM43XX) val &= ~(AM437X_CTRL_USB2_PHY_PD | AM437X_CTRL_USB2_OTG_PD); @@ -202,8 +205,12 @@ void ti_usb2_phy_power(struct ti_usb_phy *phy, int on) AM437X_CTRL_USB2_OTGSESSEND_EN); #endif } else { -#ifdef CONFIG_DRA7XX - val |= OMAP_CTRL_DEV_PHY_PD; +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + if (phy->index == 1) + val |= OMAP_CTRL_USB2_PHY_PD; + else + val |= OMAP_CTRL_DEV_PHY_PD; + #elif defined(CONFIG_AM43XX) val &= ~(AM437X_CTRL_USB2_OTGVDET_EN | AM437X_CTRL_USB2_OTGSESSEND_EN);
On Thursday, August 06, 2015 at 06:15:54 PM, Kishon Vijay Abraham I wrote:
Added support to power on/power off the second USB PHY present in DRA7xx and AM57xx.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in beagle_x15 board file that can be invoked by various gadget drivers.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/include/asm/arch-omap5/omap.h | 2 +- board/ti/beagle_x15/board.c | 111 ++++++++++++++++++++++++++++++++ 2 files changed, 112 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 524fae4..9b66877 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -33,7 +33,7 @@ #define CONTROL_ID_CODE CONTROL_CORE_ID_CODE #endif
-#ifdef CONFIG_DRA7XX +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) #define DRA7_USB_OTG_SS1_BASE 0x48890000 #define DRA7_USB_OTG_SS1_GLUE_BASE 0x48880000 #define DRA7_USB3_PHY1_PLL_CTRL 0x4A084C00 diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c index c7f19c7..b0c5ccd 100644 --- a/board/ti/beagle_x15/board.c +++ b/board/ti/beagle_x15/board.c @@ -22,7 +22,13 @@ #include <asm/arch/mmc_host_def.h> #include <asm/arch/sata.h> #include <asm/arch/gpio.h> +#include <asm/arch/omap.h> #include <environment.h> +#include <usb.h> +#include <linux/usb/gadget.h> +#include <dwc3-uboot.h> +#include <dwc3-omap-uboot.h> +#include <ti-usb-phy-uboot.h>
#include "mux_data.h"
@@ -309,6 +315,111 @@ int spl_start_uboot(void) } #endif
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device usb_otg_ss1 = { + .maximum_speed = USB_SPEED_SUPER, + .base = DRA7_USB_OTG_SS1_BASE, + .tx_fifo_resize = false, + .index = 0, +}; + +static struct dwc3_omap_device usb_otg_ss1_glue = { + .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .index = 0, +}; + +static struct ti_usb_phy_device usb_phy1_device = { + .pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL, + .usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER, + .usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER, + .index = 0, +}; + +static struct dwc3_device usb_otg_ss2 = { + .maximum_speed = USB_SPEED_HIGH, + .base = DRA7_USB_OTG_SS2_BASE, + .tx_fifo_resize = false, + .index = 1, +}; + +static struct dwc3_omap_device usb_otg_ss2_glue = { + .base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .index = 1, +}; + +static struct ti_usb_phy_device usb_phy2_device = { + .usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER, + .index = 1, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + switch (index) { + case 0: + if (init == USB_INIT_DEVICE) { + printf("port %d can't be used as device\n", index); + return -EINVAL; + } else { + usb_otg_ss1.dr_mode = USB_DR_MODE_HOST; + usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; + setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl, + OTG_SS_CLKCTRL_MODULEMODE_HW | + OPTFCLKEN_REFCLK960M); + } + + ti_usb_phy_uboot_init(&usb_phy1_device); + dwc3_omap_uboot_init(&usb_otg_ss1_glue); + dwc3_uboot_init(&usb_otg_ss1); + break; + case 1: + if (init == USB_INIT_DEVICE) { + usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL; + usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; + } else { + printf("port %d can't be used as host\n", index); + return -EINVAL; + } + + ti_usb_phy_uboot_init(&usb_phy2_device); + dwc3_omap_uboot_init(&usb_otg_ss2_glue); + dwc3_uboot_init(&usb_otg_ss2); + break; + default: + printf("Invalid Controller Index\n"); + } + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + switch (index) { + case 0: + case 1: + ti_usb_phy_uboot_exit(index); + dwc3_uboot_exit(index); + dwc3_omap_uboot_exit(index); + break; + default: + printf("Invalid Controller Index\n"); + } + return 0; +} + +int usb_gadget_handle_interrupts(int index) +{ + u32 status; + + status = dwc3_omap_uboot_interrupt_status(index); + if (status) + dwc3_uboot_handle_interrupt(index); + + return 0; +} +#endif + #ifdef CONFIG_DRIVER_TI_CPSW
/* Delay value to add to calibrated value */
Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in omap5 board file that can be invoked by various gadget drivers.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/include/asm/arch-omap5/omap.h | 6 +++ board/ti/omap5_uevm/evm.c | 75 ++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 9b66877..bf5afbd 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -43,6 +43,12 @@ #define DRA7_USB_OTG_SS2_BASE 0x488D0000 #define DRA7_USB_OTG_SS2_GLUE_BASE 0x488C0000 #define DRA7_USB2_PHY2_POWER 0x4A002E74 +#else +#define OMAP5XX_USB_OTG_SS_BASE 0x4A030000 +#define OMAP5XX_USB_OTG_SS_GLUE_BASE 0x4A020000 +#define OMAP5XX_USB3_PHY_PLL_CTRL 0x4A084C00 +#define OMAP5XX_USB3_PHY_POWER 0x4A002370 +#define OMAP5XX_USB2_PHY_POWER 0x4A002300 #endif
/* To be verified */ diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index 833ffe9..d0d0e0e 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -8,9 +8,15 @@ */ #include <common.h> #include <palmas.h> +#include <asm/arch/omap.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> #include <tca642x.h> +#include <usb.h> +#include <linux/usb/gadget.h> +#include <dwc3-uboot.h> +#include <dwc3-omap-uboot.h> +#include <ti-usb-phy-uboot.h>
#include "mux_data.h"
@@ -53,6 +59,75 @@ struct tca642x_bank_info tca642x_init[] = { .configuration_reg = 0x40 }, };
+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device usb_otg_ss = { + .maximum_speed = USB_SPEED_SUPER, + .base = OMAP5XX_USB_OTG_SS_BASE, + .tx_fifo_resize = false, + .index = 0, +}; + +static struct dwc3_omap_device usb_otg_ss_glue = { + .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .index = 0, +}; + +static struct ti_usb_phy_device usb_phy_device = { + .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL, + .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER, + .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER, + .index = 0, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + if (index) { + printf("Invalid Controller Index\n"); + return -EINVAL; + } + + if (init == USB_INIT_DEVICE) { + usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL; + usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; + } else { + usb_otg_ss.dr_mode = USB_DR_MODE_HOST; + usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; + } + + ti_usb_phy_uboot_init(&usb_phy_device); + dwc3_omap_uboot_init(&usb_otg_ss_glue); + dwc3_uboot_init(&usb_otg_ss); + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + if (index) { + printf("Invalid Controller Index\n"); + return -EINVAL; + } + + ti_usb_phy_uboot_exit(index); + dwc3_uboot_exit(index); + dwc3_omap_uboot_exit(index); + + return 0; +} + +int usb_gadget_handle_interrupts(int index) +{ + u32 status; + + status = dwc3_omap_uboot_interrupt_status(index); + if (status) + dwc3_uboot_handle_interrupt(index); + + return 0; +} +#endif + /** * @brief board_init *
Enabled configs for dwc3, dwc3-omap and PHY for dwc3 in ti_omap5_common. Also enabled support for DFU.
Since ti_omap5_common is used by dra7 too, removed these configs from dra7xx_evm config file.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- include/configs/dra7xx_evm.h | 63 ---------------------------------- include/configs/ti_omap5_common.h | 67 +++++++++++++++++++++++++++++++++++-- 2 files changed, 64 insertions(+), 66 deletions(-)
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 7499447..78a2c25 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -47,47 +47,6 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
-#define DFU_ALT_INFO_MMC \ - "dfu_alt_info_mmc=" \ - "boot part 0 1;" \ - "rootfs part 0 2;" \ - "MLO fat 0 1;" \ - "MLO.raw raw 0x100 0x100;" \ - "u-boot.img.raw raw 0x300 0x400;" \ - "spl-os-args.raw raw 0x80 0x80;" \ - "spl-os-image.raw raw 0x900 0x2000;" \ - "spl-os-args fat 0 1;" \ - "spl-os-image fat 0 1;" \ - "u-boot.img fat 0 1;" \ - "uEnv.txt fat 0 1\0" - -#define DFU_ALT_INFO_EMMC \ - "dfu_alt_info_emmc=" \ - "rawemmc raw 0 3751936;" \ - "boot part 1 1;" \ - "rootfs part 1 2;" \ - "MLO fat 1 1;" \ - "MLO.raw raw 0x100 0x100;" \ - "u-boot.img.raw raw 0x300 0x400;" \ - "spl-os-args.raw raw 0x80 0x80;" \ - "spl-os-image.raw raw 0x900 0x2000;" \ - "spl-os-args fat 1 1;" \ - "spl-os-image fat 1 1;" \ - "u-boot.img fat 1 1;" \ - "uEnv.txt fat 1 1\0" - -#define DFU_ALT_INFO_RAM \ - "dfu_alt_info_ram=" \ - "kernel ram 0x80200000 0x4000000;" \ - "fdt ram 0x80f80000 0x80000;" \ - "ramdisk ram 0x81000000 0x4000000\0" - -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_MMC \ - DFU_ALT_INFO_EMMC \ - DFU_ALT_INFO_RAM - /* Fastboot */ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT @@ -184,28 +143,6 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_OMAP_USB2PHY2_HOST
-/* USB GADGET */ -#define CONFIG_USB_DWC3_PHY_OMAP -#define CONFIG_USB_DWC3_OMAP -#define CONFIG_USB_DWC3 -#define CONFIG_USB_DWC3_GADGET - -#define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_DOWNLOAD -#define CONFIG_USB_GADGET_VBUS_DRAW 2 -#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" -#define CONFIG_G_DNL_VENDOR_NUM 0x0451 -#define CONFIG_G_DNL_PRODUCT_NUM 0xd022 -#define CONFIG_USB_GADGET_DUALSPEED - -/* USB Device Firmware Update support */ -#define CONFIG_USB_FUNCTION_DFU -#define CONFIG_DFU_RAM -#define CONFIG_CMD_DFU - -#define CONFIG_DFU_MMC -#define CONFIG_DFU_RAM - /* SATA */ #define CONFIG_BOARD_LATE_INIT #define CONFIG_CMD_SCSI diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index fe04692..6126ee9 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -47,6 +47,29 @@
#include <configs/ti_armv7_omap.h>
+#ifndef CONFIG_CM_T54 +/* USB GADGET */ +#define CONFIG_USB_DWC3_PHY_OMAP +#define CONFIG_USB_DWC3_OMAP +#define CONFIG_USB_DWC3 +#define CONFIG_USB_DWC3_GADGET + +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" +#define CONFIG_G_DNL_VENDOR_NUM 0x0403 +#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 +#define CONFIG_USB_GADGET_DUALSPEED + +/* USB Device Firmware Update support */ +#define CONFIG_USB_FUNCTION_DFU +#define CONFIG_DFU_RAM +#define CONFIG_CMD_DFU + +#define CONFIG_DFU_MMC +#endif + /* * Hardware drivers */ @@ -62,10 +85,48 @@ #define PARTS_DEFAULT #endif
-#ifndef DFUARGS -#define DFUARGS -#endif
+#define DFU_ALT_INFO_MMC \ + "dfu_alt_info_mmc=" \ + "boot part 0 1;" \ + "rootfs part 0 2;" \ + "MLO fat 0 1;" \ + "MLO.raw raw 0x100 0x100;" \ + "u-boot.img.raw raw 0x300 0x400;" \ + "spl-os-args.raw raw 0x80 0x80;" \ + "spl-os-image.raw raw 0x900 0x2000;" \ + "spl-os-args fat 0 1;" \ + "spl-os-image fat 0 1;" \ + "u-boot.img fat 0 1;" \ + "uEnv.txt fat 0 1\0" + +#define DFU_ALT_INFO_EMMC \ + "dfu_alt_info_emmc=" \ + "rawemmc raw 0 3751936;" \ + "boot part 1 1;" \ + "rootfs part 1 2;" \ + "MLO fat 1 1;" \ + "MLO.raw raw 0x100 0x100;" \ + "u-boot.img.raw raw 0x300 0x400;" \ + "spl-os-args.raw raw 0x80 0x80;" \ + "spl-os-image.raw raw 0x900 0x2000;" \ + "spl-os-args fat 1 1;" \ + "spl-os-image fat 1 1;" \ + "u-boot.img fat 1 1;" \ + "uEnv.txt fat 1 1\0" + +#define DFU_ALT_INFO_RAM \ + "dfu_alt_info_ram=" \ + "kernel ram 0x80200000 0x4000000;" \ + "fdt ram 0x80f80000 0x80000;" \ + "ramdisk ram 0x81000000 0x4000000\0" + +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_MMC \ + DFU_ALT_INFO_EMMC \ + DFU_ALT_INFO_RAM + #ifndef CONFIG_SPL_BUILD #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \
Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks().
Cc: Roger Quadros rogerq@ti.com Cc: Tero Kristo t-kristo@ti.com Cc: Nishanth Menon nm@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/omap-common/clocks-common.c | 53 ++++++++++++++++++++++++ arch/arm/include/asm/omap_common.h | 4 ++ 2 files changed, 57 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index c94a807..e28b795 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -648,6 +648,14 @@ static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) debug("Enable clock domain - %x\n", clkctrl_reg); }
+static inline void disable_clock_domain(u32 const clkctrl_reg) +{ + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); + debug("Disable clock domain - %x\n", clkctrl_reg); +} + static inline void wait_for_clk_enable(u32 clkctrl_addr) { u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED; @@ -677,6 +685,34 @@ static inline void enable_clock_module(u32 const clkctrl_addr, u32 enable_mode, wait_for_clk_enable(clkctrl_addr); }
+static inline void wait_for_clk_disable(u32 clkctrl_addr) +{ + u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; + u32 bound = LDELAY; + + while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) { + clkctrl = readl(clkctrl_addr); + idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> + MODULE_CLKCTRL_IDLEST_SHIFT; + if (--bound == 0) { + printf("Clock disable failed for 0x%x idlest 0x%x\n", + clkctrl_addr, clkctrl); + return; + } + } +} + +static inline void disable_clock_module(u32 const clkctrl_addr, + u32 wait_for_disable) +{ + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + debug("Disable clock module - %x\n", clkctrl_addr); + if (wait_for_disable) + wait_for_clk_disable(clkctrl_addr); +} + void freq_update_core(void) { u32 freq_config1 = 0; @@ -800,6 +836,23 @@ void do_enable_clocks(u32 const *clk_domains, } }
+void do_disable_clocks(u32 const *clk_domains, + u32 const *clk_modules_disable, + u8 wait_for_disable) +{ + u32 i, max = 100; + + + /* Clock modules that need to be put in SW_DISABLE */ + for (i = 0; (i < max) && clk_modules_disable[i]; i++) + disable_clock_module(clk_modules_disable[i], + wait_for_disable); + + /* Put the clock domains in SW_SLEEP mode */ + for (i = 0; (i < max) && clk_domains[i]; i++) + disable_clock_domain(clk_domains[i]); +} + void prcm_init(void) { switch (omap_hw_init_context()) { diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 462a9ee..224fbf0 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -577,6 +577,10 @@ void do_enable_clocks(u32 const *clk_domains, u32 const *clk_modules_explicit_en, u8 wait_for_enable);
+void do_disable_clocks(u32 const *clk_domains, + u32 const *clk_modules_disable, + u8 wait_for_disable); + void setup_post_dividers(u32 const base, const struct dpll_params *params); u32 omap_ddr_clk(void);
Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively.
Cc: Roger Quadros rogerq@ti.com Cc: Tero Kristo t-kristo@ti.com Cc: Nishanth Menon nm@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/omap5/hw_data.c | 97 ++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/omap_common.h | 6 +++ 2 files changed, 103 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 11440ac..1085bb3 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -581,6 +581,103 @@ void enable_basic_uboot_clocks(void) 1); }
+#ifdef CONFIG_USB_DWC3 +void enable_usb_clocks(int index) +{ + u32 cm_l3init_usb_otg_ss_clkctrl = 0; + + if (index == 0) { + cm_l3init_usb_otg_ss_clkctrl = + (*prcm)->cm_l3init_usb_otg_ss1_clkctrl; + /* Enable 960 MHz clock for dwc3 */ + setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl, + OPTFCLKEN_REFCLK960M); + + /* Enable 32 KHz clock for dwc3 */ + setbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, + USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + cm_l3init_usb_otg_ss_clkctrl = + (*prcm)->cm_l3init_usb_otg_ss2_clkctrl; + /* Enable 960 MHz clock for dwc3 */ + setbits_le32((*prcm)->cm_l3init_usb_otg_ss2_clkctrl, + OPTFCLKEN_REFCLK960M); + + /* Enable 32 KHz clock for dwc3 */ + setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, + USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); + + /* Enable 60 MHz clock for USB2PHY2 */ + setbits_le32((*prcm)->cm_coreaon_l3init_60m_gfclk_clkctrl, + L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK); + } + + u32 const clk_domains_usb[] = { + 0 + }; + + u32 const clk_modules_hw_auto_usb[] = { + (*prcm)->cm_l3init_ocp2scp1_clkctrl, + cm_l3init_usb_otg_ss_clkctrl, + 0 + }; + + u32 const clk_modules_explicit_en_usb[] = { + 0 + }; + + do_enable_clocks(clk_domains_usb, + clk_modules_hw_auto_usb, + clk_modules_explicit_en_usb, + 1); +} + +void disable_usb_clocks(int index) +{ + u32 cm_l3init_usb_otg_ss_clkctrl = 0; + + if (index == 0) { + cm_l3init_usb_otg_ss_clkctrl = + (*prcm)->cm_l3init_usb_otg_ss1_clkctrl; + /* Disable 960 MHz clock for dwc3 */ + clrbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl, + OPTFCLKEN_REFCLK960M); + + /* Disable 32 KHz clock for dwc3 */ + clrbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, + USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + cm_l3init_usb_otg_ss_clkctrl = + (*prcm)->cm_l3init_usb_otg_ss2_clkctrl; + /* Disable 960 MHz clock for dwc3 */ + clrbits_le32((*prcm)->cm_l3init_usb_otg_ss2_clkctrl, + OPTFCLKEN_REFCLK960M); + + /* Disable 32 KHz clock for dwc3 */ + clrbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, + USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); + + /* Disable 60 MHz clock for USB2PHY2 */ + clrbits_le32((*prcm)->cm_coreaon_l3init_60m_gfclk_clkctrl, + L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK); + } + + u32 const clk_domains_usb[] = { + 0 + }; + + u32 const clk_modules_disable[] = { + (*prcm)->cm_l3init_ocp2scp1_clkctrl, + cm_l3init_usb_otg_ss_clkctrl, + 0 + }; + + do_disable_clocks(clk_domains_usb, + clk_modules_disable, + 1); +} +#endif + const struct ctrl_ioregs ioregs_omap5430 = { .ctrl_ddrch = DDR_IO_I_34OHM_SR_FASTEST_WD_DQ_NO_PULL_DQS_PULL_DOWN, .ctrl_lpddr2ch = DDR_IO_I_34OHM_SR_FASTEST_WD_CK_CKE_NCS_CA_PULL_DOWN, diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 224fbf0..527e143 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -587,6 +587,12 @@ u32 omap_ddr_clk(void); u32 get_sys_clk_index(void); void enable_basic_clocks(void); void enable_basic_uboot_clocks(void); + +#ifdef CONFIG_USB_DWC3 +void enable_usb_clocks(int index); +void disable_usb_clocks(int index); +#endif + void scale_vcores(struct vcores_data const *); u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic); void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
Add do_disable_clocks() to disable clock domains and module clocks. These clocks are enabled using do_enable_clocks().
Cc: Roger Quadros rogerq@ti.com Cc: Tero Kristo t-kristo@ti.com Cc: Nishanth Menon nm@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/am33xx/clock.c | 53 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/clock.h | 1 + 2 files changed, 54 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index ec7d468..f6a4cee 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -144,6 +144,34 @@ static inline void enable_clock_module(u32 *const clkctrl_addr, u32 enable_mode, wait_for_clk_enable(clkctrl_addr); }
+static inline void wait_for_clk_disable(u32 *clkctrl_addr) +{ + u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL; + u32 bound = LDELAY; + + while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) { + clkctrl = readl(clkctrl_addr); + idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> + MODULE_CLKCTRL_IDLEST_SHIFT; + if (--bound == 0) { + printf("Clock disable failed for 0x%p idlest 0x%x\n", + clkctrl_addr, clkctrl); + return; + } + } +} + +static inline void disable_clock_module(u32 *const clkctrl_addr, + u32 wait_for_disable) +{ + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + debug("Disable clock module - %p\n", clkctrl_addr); + if (wait_for_disable) + wait_for_clk_disable(clkctrl_addr); +} + static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode) { clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, @@ -151,6 +179,14 @@ static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode) debug("Enable clock domain - %p\n", clkctrl_reg); }
+static inline void disable_clock_domain(u32 *const clkctrl_reg) +{ + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); + debug("Disable clock domain - %p\n", clkctrl_reg); +} + void do_enable_clocks(u32 *const *clk_domains, u32 *const *clk_modules_explicit_en, u8 wait_for_enable) { @@ -170,6 +206,23 @@ void do_enable_clocks(u32 *const *clk_domains, }; }
+void do_disable_clocks(u32 *const *clk_domains, + u32 *const *clk_modules_disable, + u8 wait_for_disable) +{ + u32 i, max = 100; + + + /* Clock modules that need to be put in SW_DISABLE */ + for (i = 0; (i < max) && clk_modules_disable[i]; i++) + disable_clock_module(clk_modules_disable[i], + wait_for_disable); + + /* Put the clock domains in SW_SLEEP mode */ + for (i = 0; (i < max) && clk_domains[i]; i++) + disable_clock_domain(clk_domains[i]); +} + /* * Before scaling up the clocks we need to have the PMIC scale up the * voltages first. This will be dependent on which PMIC is in use diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index 4af6b57..a6d2419 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -112,5 +112,6 @@ void do_setup_dpll(const struct dpll_regs *, const struct dpll_params *); void prcm_init(void); void enable_basic_clocks(void); void do_enable_clocks(u32 *const *, u32 *const *, u8); +void do_disable_clocks(u32 *const *, u32 *const *, u8);
#endif
Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively.
Cc: Roger Quadros rogerq@ti.com Cc: Tero Kristo t-kristo@ti.com Cc: Nishanth Menon nm@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 70 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 5 ++ 2 files changed, 75 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index b1c0025..cd8931e 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -134,3 +134,73 @@ void enable_basic_clocks(void) /* For OPP100 the mac clock should be /5. */ writel(0x4, &cmdpll->clkselmacclk); } + +#ifdef CONFIG_USB_DWC3 +void enable_usb_clocks(int index) +{ + u32 *usbclkctrl = 0; + u32 *usbphyocp2scpclkctrl = 0; + + if (index == 0) { + usbclkctrl = &cmper->usb0clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp0clkctrl; + setbits_le32(&cmper->usb0clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy0clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + usbclkctrl = &cmper->usb1clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp1clkctrl; + setbits_le32(&cmper->usb1clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy1clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } + + u32 *const clk_domains_usb[] = { + 0 + }; + + u32 *const clk_modules_explicit_en_usb[] = { + usbclkctrl, + usbphyocp2scpclkctrl, + 0 + }; + + do_enable_clocks(clk_domains_usb, clk_modules_explicit_en_usb, 1); +} + +void disable_usb_clocks(int index) +{ + u32 *usbclkctrl = 0; + u32 *usbphyocp2scpclkctrl = 0; + + if (index == 0) { + usbclkctrl = &cmper->usb0clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp0clkctrl; + clrbits_le32(&cmper->usb0clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + clrbits_le32(&cmwkup->usbphy0clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + usbclkctrl = &cmper->usb1clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp1clkctrl; + clrbits_le32(&cmper->usb1clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + clrbits_le32(&cmwkup->usbphy1clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } + + u32 *const clk_domains_usb[] = { + 0 + }; + + u32 *const clk_modules_disable_usb[] = { + usbclkctrl, + usbphyocp2scpclkctrl, + 0 + }; + + do_disable_clocks(clk_domains_usb, clk_modules_disable_usb, 1); +} +#endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 91b614a..275cf7b 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -42,3 +42,8 @@ void am33xx_spl_board_init(void); int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); #endif + +#ifdef CONFIG_USB_DWC3 +void enable_usb_clocks(int index); +void disable_usb_clocks(int index); +#endif
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- board/ti/am43xx/board.c | 2 ++ board/ti/beagle_x15/board.c | 4 ++++ board/ti/dra7xx/evm.c | 2 ++ board/ti/omap5_uevm/evm.c | 2 ++ 4 files changed, 10 insertions(+)
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index d7b9e5a..54f250a 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -715,6 +715,7 @@ static struct ti_usb_phy_device usb_phy2_device = {
int board_usb_init(int index, enum usb_init_type init) { + enable_usb_clocks(index); switch (index) { case 0: if (init == USB_INIT_DEVICE) { @@ -761,6 +762,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) default: printf("Invalid Controller Index\n"); } + disable_usb_clocks(index);
return 0; } diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c index b0c5ccd..c9a48bc 100644 --- a/board/ti/beagle_x15/board.c +++ b/board/ti/beagle_x15/board.c @@ -356,10 +356,12 @@ static struct ti_usb_phy_device usb_phy2_device = {
int board_usb_init(int index, enum usb_init_type init) { + enable_usb_clocks(index); switch (index) { case 0: if (init == USB_INIT_DEVICE) { printf("port %d can't be used as device\n", index); + disable_usb_clocks(index); return -EINVAL; } else { usb_otg_ss1.dr_mode = USB_DR_MODE_HOST; @@ -379,6 +381,7 @@ int board_usb_init(int index, enum usb_init_type init) usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; } else { printf("port %d can't be used as host\n", index); + disable_usb_clocks(index); return -EINVAL; }
@@ -405,6 +408,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) default: printf("Invalid Controller Index\n"); } + disable_usb_clocks(index); return 0; }
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 94a1a8c..30ef34b 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -146,6 +146,7 @@ static struct ti_usb_phy_device usb_phy2_device = {
int board_usb_init(int index, enum usb_init_type init) { + enable_usb_clocks(index); switch (index) { case 0: if (init == USB_INIT_DEVICE) { @@ -192,6 +193,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) default: printf("Invalid Controller Index\n"); } + disable_usb_clocks(index); return 0; }
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index d0d0e0e..659877c 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -95,6 +95,7 @@ int board_usb_init(int index, enum usb_init_type init) usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; }
+ enable_usb_clocks(index); ti_usb_phy_uboot_init(&usb_phy_device); dwc3_omap_uboot_init(&usb_otg_ss_glue); dwc3_uboot_init(&usb_otg_ss); @@ -112,6 +113,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) ti_usb_phy_uboot_exit(index); dwc3_uboot_exit(index); dwc3_omap_uboot_exit(index); + disable_usb_clocks(index);
return 0; }
Now that we have separate function to enable USB clocks, remove enabling USB clocks from enable_basic_clocks(). Now board_usb_init() should take care to invoke enable_usb_clocks() for enabling USB clocks.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 ------------ arch/arm/cpu/armv7/omap5/hw_data.c | 30 ------------------------------ 2 files changed, 42 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index cd8931e..30b4867 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -111,21 +111,9 @@ void enable_basic_clocks(void) &cmper->emifclkctrl, &cmper->otfaemifclkctrl, &cmper->qspiclkctrl, - &cmper->usb0clkctrl, - &cmper->usbphyocp2scp0clkctrl, - &cmper->usb1clkctrl, - &cmper->usbphyocp2scp1clkctrl, 0 };
- setbits_le32(&cmper->usb0clkctrl, - USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); - setbits_le32(&cmwkup->usbphy0clkctrl, - USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); - setbits_le32(&cmper->usb1clkctrl, - USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); - setbits_le32(&cmwkup->usbphy1clkctrl, - USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
/* Select the Master osc clk as Timer2 clock source */ diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 1085bb3..19f2c43 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -460,13 +460,6 @@ void enable_basic_clocks(void) (*prcm)->cm_l4per_gpio6_clkctrl, (*prcm)->cm_l4per_gpio7_clkctrl, (*prcm)->cm_l4per_gpio8_clkctrl, -#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) - (*prcm)->cm_l3init_ocp2scp1_clkctrl, - (*prcm)->cm_l3init_usb_otg_ss1_clkctrl, -#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) - (*prcm)->cm_l3init_usb_otg_ss2_clkctrl, -#endif -#endif 0 };
@@ -498,29 +491,6 @@ void enable_basic_clocks(void) setbits_le32((*prcm)->cm_l3init_hsmmc2_clkctrl, HSMMC_CLKCTRL_CLKSEL_MASK);
-#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) - /* Enable 960 MHz clock for dwc3 */ - setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl, - OPTFCLKEN_REFCLK960M); - - /* Enable 32 KHz clock for dwc3 */ - setbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, - USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); -#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) - /* Enable 960 MHz clock for dwc3 */ - setbits_le32((*prcm)->cm_l3init_usb_otg_ss2_clkctrl, - OPTFCLKEN_REFCLK960M); - - /* Enable 32 KHz clock for dwc3 */ - setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl, - USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K); - - /* Enable 60 MHz clock for USB2PHY2 */ - setbits_le32((*prcm)->cm_coreaon_l3init_60m_gfclk_clkctrl, - L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK); -#endif -#endif - /* Set the correct clock dividers for mmc */ setbits_le32((*prcm)->cm_l3init_hsmmc1_clkctrl, HSMMC_CLKCTRL_CLKSEL_DIV_MASK);
vbus_id_status is initialized in board_usb_init. So remove it while creating dwc3_device objects.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- board/ti/am43xx/board.c | 2 -- board/ti/dra7xx/evm.c | 2 -- 2 files changed, 4 deletions(-)
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 54f250a..770726c 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -685,7 +685,6 @@ static struct dwc3_device usb_otg_ss1 = { static struct dwc3_omap_device usb_otg_ss1_glue = { .base = (void *)USB_OTG_SS1_GLUE_BASE, .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .vbus_id_status = OMAP_DWC3_VBUS_VALID, .index = 0, };
@@ -704,7 +703,6 @@ static struct dwc3_device usb_otg_ss2 = { static struct dwc3_omap_device usb_otg_ss2_glue = { .base = (void *)USB_OTG_SS2_GLUE_BASE, .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .vbus_id_status = OMAP_DWC3_VBUS_VALID, .index = 1, };
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 30ef34b..04fc8ed 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -114,7 +114,6 @@ static struct dwc3_device usb_otg_ss1 = { static struct dwc3_omap_device usb_otg_ss1_glue = { .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE, .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .vbus_id_status = OMAP_DWC3_VBUS_VALID, .index = 0, };
@@ -135,7 +134,6 @@ static struct dwc3_device usb_otg_ss2 = { static struct dwc3_omap_device usb_otg_ss2_glue = { .base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE, .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .vbus_id_status = OMAP_DWC3_VBUS_VALID, .index = 1, };
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index 3a55208..104e7a7 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -96,4 +96,5 @@ void xhci_hcd_stop(int index) struct omap_xhci *ctx = &omap;
omap_xhci_core_exit(ctx); + board_usb_cleanup(index, USB_INIT_HOST); }
On Thursday, August 06, 2015 at 06:16:05 PM, Kishon Vijay Abraham I wrote:
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
It's be really cool if you could at least place the additions to drivers/usb/* at the beginning of the series, so you're not just doing patching at random places throughout the series ;-)
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
Hi,
On Friday 07 August 2015 03:58 AM, Marek Vasut wrote:
On Thursday, August 06, 2015 at 06:16:05 PM, Kishon Vijay Abraham I wrote:
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
It's be really cool if you could at least place the additions to drivers/usb/* at the beginning of the series, so you're not just doing patching at random places throughout the series ;-)
yeah, I just consolidated all the fixes in my working tree and sent it. I'll split them into separate series and send them again.
Thanks Kishon
On Monday, August 10, 2015 at 08:00:25 AM, Kishon Vijay Abraham I wrote:
Hi,
On Friday 07 August 2015 03:58 AM, Marek Vasut wrote:
On Thursday, August 06, 2015 at 06:16:05 PM, Kishon Vijay Abraham I wrote:
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
It's be really cool if you could at least place the additions to drivers/usb/* at the beginning of the series, so you're not just doing patching at random places throughout the series ;-)
yeah, I just consolidated all the fixes in my working tree and sent it. I'll split them into separate series and send them again.
Cool, thanks!
Best regards, Marek Vasut
The usbboot environment variable has 'usb start' command but doesn't have the corresponding 'usb stop' command. This breaks usb peripheral mode if tried after 'run usbboot' fails to load the images in usb host mode.
Fix it here by adding 'usb stop' command in usbboot env.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- include/configs/am43xx_evm.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index d148169..15fa3e3 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -292,6 +292,8 @@ "bootz ${loadaddr} - ${fdtaddr}; " \ "fi;" \ "fi\0" \ + "fi;" \ + "usb stop ${usbdev};\0" \ "findfdt="\ "if test $board_name = AM43EPOS; then " \ "setenv fdtfile am43x-epos-evm.dtb; fi; " \
From: Tom Rini trini@ti.com
Add in code to initialize the DWC3 gadget controller so that we can do RNDIS in SPL on these platforms.
Signed-off-by: Tom Rini trini@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- board/ti/am43xx/board.c | 39 ++++++++++++++++++++++++++++++++++--- drivers/usb/gadget/gadget_chips.h | 2 ++ include/configs/am43xx_evm.h | 9 +++++++++ scripts/Makefile.spl | 2 ++ 4 files changed, 49 insertions(+), 3 deletions(-)
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 770726c..8125c9f 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -777,8 +777,8 @@ int usb_gadget_handle_interrupts(int index) } #endif
-#ifdef CONFIG_DRIVER_TI_CPSW - +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) static void cpsw_control(int enabled) { /* Additional controls can be added here */ @@ -816,7 +816,24 @@ static struct cpsw_platform_data cpsw_data = { .host_port_num = 0, .version = CPSW_CTRL_VERSION_2, }; +#endif
+/* + * This function will: + * Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr + * in the environment + * Perform fixups to the PHY present on certain boards. We only need this + * function in: + * - SPL with either CPSW or USB ethernet support + * - Full U-Boot, with either CPSW or USB ethernet + * Build in only these cases to avoid warnings about unused variables + * when we build an SPL that has neither option but full U-Boot will. + */ +#if ((defined(CONFIG_SPL_ETH_SUPPORT) || \ + defined(CONFIG_SPL_USBETH_SUPPORT)) && \ + defined(CONFIG_SPL_BUILD)) || \ + ((defined(CONFIG_DRIVER_TI_CPSW) || \ + defined(CONFIG_USB_ETHER)) && !defined(CONFIG_SPL_BUILD)) int board_eth_init(bd_t *bis) { int rv; @@ -833,12 +850,15 @@ int board_eth_init(bd_t *bis) mac_addr[4] = mac_lo & 0xFF; mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) if (!getenv("ethaddr")) { puts("<ethaddr> not set. Validating first E-fuse MAC\n"); if (is_valid_ethaddr(mac_addr)) eth_setenv_enetaddr("ethaddr", mac_addr); }
+#ifndef CONFIG_SPL_BUILD mac_lo = readl(&cdev->macid1l); mac_hi = readl(&cdev->macid1h); mac_addr[0] = mac_hi & 0xFF; @@ -852,6 +872,7 @@ int board_eth_init(bd_t *bis) if (is_valid_ethaddr(mac_addr)) eth_setenv_enetaddr("eth1addr", mac_addr); } +#endif
if (board_is_eposevm()) { writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); @@ -873,8 +894,20 @@ int board_eth_init(bd_t *bis) }
rv = cpsw_register(&cpsw_data); - if (rv < 0) + if (rv < 0) { printf("Error %d registering CPSW switch\n", rv); + return rv; + } +#endif +#if defined(CONFIG_USB_ETHER) && \ + (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT)) + if (is_valid_ethaddr(mac_addr)) + eth_setenv_enetaddr("usbnet_devaddr", mac_addr); + + rv = usb_eth_initialize(bis); + if (rv < 0) + printf("Error %d registering USB_ETHER\n", rv); +#endif
return rv; } diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index e9811c3..9c2232e 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -231,5 +231,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x21; else if (gadget_is_fotg210(gadget)) return 0x22; + else if (gadget_is_dwc3(gadget)) + return 0x23; return -ENOENT; } diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 15fa3e3..f0040e8 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -122,12 +122,17 @@ /* USB GADGET */ #if !defined(CONFIG_SPL_BUILD) || \ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)) +#undef CONFIG_ENV_IS_IN_FAT +#define CONFIG_ENV_IS_NOWHERE #define CONFIG_USB_DWC3_PHY_OMAP #define CONFIG_USB_DWC3_OMAP #define CONFIG_USB_DWC3 #define CONFIG_USB_DWC3_GADGET
#define CONFIG_USB_GADGET +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" #define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" @@ -136,6 +141,10 @@ #define CONFIG_USB_GADGET_DUALSPEED #endif
+#if defined(CONFIG_SPL_USBETH_SUPPORT) || defined(CONFIG_SPL_ETH_SUPPORT) +#define CONFIG_SPL_NET_SUPPORT +#endif + #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ #define CONFIG_USB_FUNCTION_DFU diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index b1047b5..5a7c92e 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -82,6 +82,8 @@ libs-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/ libs-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/net/phy/ libs-$(CONFIG_SPL_RAM_SUPPORT) += drivers/ram/ libs-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/ +libs-$(CONFIG_USB_DWC3_GADGET) += drivers/usb/dwc3/ +libs-$(CONFIG_USB_DWC3_GADGET) += drivers/usb/gadget/udc/ libs-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/ libs-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/ libs-$(CONFIG_SPL_USB_HOST_SUPPORT) += drivers/usb/host/
populate _reset_ callback to the USB ethernet gadget since UDC core expects every gadget driver to have the reset callback. This shouldn't be needed once the ethernet gadget driver is adapted to use the composite driver.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- drivers/usb/gadget/ether.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 850ba02..53f4672 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -2505,6 +2505,7 @@ static struct usb_gadget_driver eth_driver = { .unbind = eth_unbind,
.setup = eth_setup, + .reset = eth_disconnect, .disconnect = eth_disconnect,
.suspend = eth_suspend,
commit 62c5674ea136 ("omap: SPL boot devices cleanup and completion") while doing the cleanups changed the value of BOOT_DEVICE_USB from 13 to 0x45. Fix it here.
Fixes: commit <62c5674ea136a> ("omap: SPL boot devices cleanup and completion").
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/include/asm/arch-am33xx/spl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 4ed8597..f8fdace 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -56,8 +56,8 @@ #define BOOT_DEVICE_MMC1 0x07 #define BOOT_DEVICE_MMC2 0x08 #define BOOT_DEVICE_SPI 0x0A +#define BOOT_DEVICE_USB 0x0D #define BOOT_DEVICE_UART 0x41 -#define BOOT_DEVICE_USB 0x45 #define BOOT_DEVICE_CPGMAC 0x47
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
Add USB peripheral boot device value for am43xx here.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/include/asm/arch-am33xx/spl.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index f8fdace..edf589e 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -58,6 +58,7 @@ #define BOOT_DEVICE_SPI 0x0A #define BOOT_DEVICE_USB 0x0D #define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x45 #define BOOT_DEVICE_CPGMAC 0x47
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
Add a new config to support usb rndis boot for am43xx.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- board/ti/am43xx/MAINTAINERS | 1 + configs/am43xx_evm_usbspl_defconfig | 9 +++++++++ 2 files changed, 10 insertions(+) create mode 100644 configs/am43xx_evm_usbspl_defconfig
diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS index 3d40b17..59e4acb 100644 --- a/board/ti/am43xx/MAINTAINERS +++ b/board/ti/am43xx/MAINTAINERS @@ -7,3 +7,4 @@ F: configs/am43xx_evm_defconfig F: configs/am43xx_evm_qspiboot_defconfig F: configs/am43xx_evm_ethboot_defconfig F: configs/am43xx_evm_usbhost_boot_defconfig +F: configs/am43xx_evm_usbspl_defconfig diff --git a/configs/am43xx_evm_usbspl_defconfig b/configs/am43xx_evm_usbspl_defconfig new file mode 100644 index 0000000..d83a4da --- /dev/null +++ b/configs/am43xx_evm_usbspl_defconfig @@ -0,0 +1,9 @@ +CONFIG_ARM=y +CONFIG_TARGET_AM43XX_EVM=y +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH=y
participants (2)
-
Kishon Vijay Abraham I -
Marek Vasut