[PATCH 0/3] Misc fixes for Tegra
From: Tom Warren twarren@nvidia.com
These fixes originated on our downstream L4T U-Boot, and include fdt, pll and code relocation changes.
Stephen Warren (1): ARM: tegra: p2371-2180: add I2C nodes to DT
Tom Warren (1): fdt: Fix 'system' command
Vishruth (1): ARM: tegra: p2771-0000: enable PIE relocation
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ cmd/fdt.c | 2 +- configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + 4 files changed, 21 insertions(+), 1 deletion(-)
From: Vishruth vishruthj@nvidia.com
U-Boot is configured to build as position independent executable. Enable relocation of RELA section required to work with different load addresses.
Signed-off-by: Vishruth vishruthj@nvidia.com Signed-off-by: Tom Warren twarren@nvidia.com --- configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + 2 files changed, 2 insertions(+)
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 06f12e2..e347a77 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_POSITION_INDEPENDENT=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 1a14a92..0803b26 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_POSITION_INDEPENDENT=y
From: Vishruth vishruthj@nvidia.com
U-Boot is configured to build as position independent executable. Enable relocation of RELA section required to work with different load addresses.
Signed-off-by: Vishruth vishruthj@nvidia.com Signed-off-by: Tom Warren twarren@nvidia.com
Tested-by: Peter Robinson pbrobinson@gmail.com
Tested on TX1
configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + 2 files changed, 2 insertions(+)
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 06f12e2..e347a77 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_POSITION_INDEPENDENT=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 1a14a92..0803b26 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -36,3 +36,4 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y
+CONFIG_POSITION_INDEPENDENT=y
1.8.2.1.610.g562af5b
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From: Tom Warren twarren@nvidia.com
'fdt systemsetup' wasn't working, due to the fact that the 'set' command was being parsed in do_fdt() by only testing for the leading 's' instead of "se", which kept the "sys" test further down from executing. Changed to test for "se" instead, now 'fdt systemsetup' works (to test the ft_system_setup proc w/o having to boot a kernel).
Signed-off-by: Tom Warren twarren@nvidia.com --- cmd/fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/fdt.c b/cmd/fdt.c index 25a6ed4..36cc726 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -286,7 +286,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* * Set the value of a property in the working_fdt. */ - } else if (argv[1][0] == 's') { + } else if (strncmp(argv[1], "se", 2) == 0) { char *pathp; /* path */ char *prop; /* property */ int nodeoffset; /* node offset from libfdt */
From: Tom Warren twarren@nvidia.com
'fdt systemsetup' wasn't working, due to the fact that the 'set' command was being parsed in do_fdt() by only testing for the leading 's' instead of "se", which kept the "sys" test further down from executing. Changed to test for "se" instead, now 'fdt systemsetup' works (to test the ft_system_setup proc w/o having to boot a kernel).
Signed-off-by: Tom Warren twarren@nvidia.com --- cmd/fdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!
From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com --- arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c5 = "/i2c@546c0c00"; mmc0 = "/sdhci@700b0600"; mmc1 = "/sdhci@700b0000"; usb0 = "/usb@7d000000"; @@ -33,6 +36,11 @@ }; };
+ i2c@546c0c00 { + status = "okay"; + clock-frequency = <400000>; + }; + padctl@7009f000 { pinctrl-0 = <&padctl_default>; pinctrl-names = "default"; @@ -85,6 +93,16 @@ non-removable; };
+ i2c@7000c400 { + status = "okay"; + clock-frequency = <400000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <400000>; + }; + i2c@7000d000 { status = "okay"; clock-frequency = <400000>;
From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000";
i2c2 = "/i2c@7000c400";i2c3 = "/i2c@7000c500";i2c5 = "/i2c@546c0c00";
I don't think this is correct, it doesn't show up in U-Boot with the "i2c bus" command where the others do, looking in the tegra210.dtsi it looks like it should be i2c@546c0000?
mmc0 = "/sdhci@700b0600"; mmc1 = "/sdhci@700b0000"; usb0 = "/usb@7d000000";@@ -33,6 +36,11 @@ }; };
i2c@546c0c00 {status = "okay";clock-frequency = <400000>;};padctl@7009f000 { pinctrl-0 = <&padctl_default>; pinctrl-names = "default";@@ -85,6 +93,16 @@ non-removable; };
i2c@7000c400 {status = "okay";clock-frequency = <400000>;};i2c@7000c500 {status = "okay";clock-frequency = <400000>;};i2c@7000d000 { status = "okay"; clock-frequency = <400000>;-- 1.8.2.1.610.g562af5b
This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message.
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Tuesday, March 31, 2020 3:54 AM To: tomcwarren3959@gmail.com Cc: u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Tom Warren TWarren@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
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From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000";
i2c2 = "/i2c@7000c400";i2c3 = "/i2c@7000c500";i2c5 = "/i2c@546c0c00";
I don't think this is correct, it doesn't show up in U-Boot with the "i2c bus" command where the others do, looking in the tegra210.dtsi it looks like it should be i2c@546c0000? [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The VI_I2C controller is a little weird, it's normal I2C registers are offset from base by 0xC00. A different driver is needed, but I haven't posted it yet upstream. I should probably drop if from the DTS for now until I post the VI_I2C driver.
--nvpublic
mmc0 = "/sdhci@700b0600"; mmc1 = "/sdhci@700b0000"; usb0 = "/usb@7d000000"; @@ -33,6 +36,11 @@ }; };
i2c@546c0c00 {status = "okay";clock-frequency = <400000>;};padctl@7009f000 { pinctrl-0 = <&padctl_default>; pinctrl-names = "default"; @@ -85,6 +93,16 @@ non-removable; };i2c@7000c400 {status = "okay";clock-frequency = <400000>;};i2c@7000c500 {status = "okay";clock-frequency = <400000>;};i2c@7000d000 { status = "okay"; clock-frequency = <400000>;-- 1.8.2.1.610.g562af5b
------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message.
On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Tuesday, March 31, 2020 3:54 AM To: tomcwarren3959@gmail.com Cc: u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Tom Warren TWarren@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
External email: Use caution opening links or attachments
From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000";
i2c2 = "/i2c@7000c400";i2c3 = "/i2c@7000c500";i2c5 = "/i2c@546c0c00";I don't think this is correct, it doesn't show up in U-Boot with the "i2c bus" command where the others do, looking in the tegra210.dtsi it looks like it should be i2c@546c0000? [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The VI_I2C controller is a little weird, it's normal I2C registers are offset from base by 0xC00. A different driver is needed, but I haven't posted it yet upstream. I should probably drop if from the DTS for now until I post the VI_I2C driver.
I think the problem here is that the upstream U-Boot device tree doesn't contain an i2c@546c0c00 node. Instead it has i2c@546c0000, which we also have in the upstream kernel. My recollection is that that's also the address listed in the Tegra210 system address map of the TRM and there are some registers before the regular I2C interface at offset 0xc00.
I've been carrying a patch against the upstream Linux I2C controller driver to special-case the VI/I2C to always add that 0xc00 offset when accessing registers, which allows us to reuse the existing driver and at the same time keeps all registers mapped so we can also access the VI/I2C specific registers.
My recollection is that the U-Boot driver is fairly similar to the Linux driver, so I suspect something similar could be done.
Thierry
-----Original Message----- From: Thierry Reding treding@nvidia.com Sent: Wednesday, April 1, 2020 8:20 AM To: Tom Warren TWarren@nvidia.com Cc: Peter Robinson pbrobinson@gmail.com; tomcwarren3959@gmail.com; u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Tuesday, March 31, 2020 3:54 AM To: tomcwarren3959@gmail.com Cc: u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Tom Warren TWarren@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
External email: Use caution opening links or attachments
From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000";
i2c2 = "/i2c@7000c400";i2c3 = "/i2c@7000c500";i2c5 = "/i2c@546c0c00";I don't think this is correct, it doesn't show up in U-Boot with the "i2c bus" command where the others do, looking in the tegra210.dtsi it looks like it should be i2c@546c0000? [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The VI_I2C controller is a little weird, it's normal I2C registers are offset from base by 0xC00. A different driver is needed, but I haven't posted it yet upstream. I should probably drop if from the DTS for now until I post the VI_I2C driver.
I think the problem here is that the upstream U-Boot device tree doesn't contain an i2c@546c0c00 node. Instead it has i2c@546c0000, which we also have in the upstream kernel. My recollection is that that's also the address listed in the Tegra210 system address map of the TRM and there are some registers before the regular I2C interface at offset 0xc00.
I've been carrying a patch against the upstream Linux I2C controller driver to special-case the VI/I2C to always add that 0xc00 offset when accessing registers, which allows us to reuse the existing driver and at the same time keeps all registers mapped so we can also access the VI/I2C specific registers.
My recollection is that the U-Boot driver is fairly similar to the Linux driver, so I suspect something similar could be done.
Thierry [Tom] Thanks, Thierry. That's my recollection, too, about the VI_I2C 0xC00 offset. I'll take a look at what we have in L4T U-Boot for T210 and address it in a set of patches for upstream soon. That I2C controller isn't used for anything on any Jetson board except on TX1, I believe, where it allows U-Boot to talk to the camera add-in board to read the board ID. But we've moved all that out to CBoot (board ID EEPROM reading), so there isn't a pressing need for it in U-Boot anymore, IIRC.
--nvpublic
On Wed, Apr 01, 2020 at 10:35:23PM +0200, Tom Warren wrote:
-----Original Message----- From: Thierry Reding treding@nvidia.com Sent: Wednesday, April 1, 2020 8:20 AM To: Tom Warren TWarren@nvidia.com Cc: Peter Robinson pbrobinson@gmail.com; tomcwarren3959@gmail.com; u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Tuesday, March 31, 2020 3:54 AM To: tomcwarren3959@gmail.com Cc: u-boot@lists.denx.de; Stephen Warren swarren@nvidia.com; Thierry Reding treding@nvidia.com; Jonathan Hunter jonathanh@nvidia.com; Tom Warren TWarren@nvidia.com; Vishruth Jain vishruthj@nvidia.com Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
External email: Use caution opening links or attachments
From: Stephen Warren swarren@nvidia.com
This adds to the DT the I2C controllers that connect to the board ID EEPROM, camera board EEPROM, etc. With this change, you can now probe all I2C devices on a TX1 board.
Signed-off-by: Tom Warren twarren@nvidia.com
arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts index c2f497c..d982b5f 100644 --- a/arch/arm/dts/tegra210-p2371-2180.dts +++ b/arch/arm/dts/tegra210-p2371-2180.dts @@ -12,6 +12,9 @@
aliases { i2c0 = "/i2c@7000d000";
i2c2 = "/i2c@7000c400";i2c3 = "/i2c@7000c500";i2c5 = "/i2c@546c0c00";I don't think this is correct, it doesn't show up in U-Boot with the "i2c bus" command where the others do, looking in the tegra210.dtsi it looks like it should be i2c@546c0000? [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The VI_I2C controller is a little weird, it's normal I2C registers are offset from base by 0xC00. A different driver is needed, but I haven't posted it yet upstream. I should probably drop if from the DTS for now until I post the VI_I2C driver.
I think the problem here is that the upstream U-Boot device tree doesn't contain an i2c@546c0c00 node. Instead it has i2c@546c0000, which we also have in the upstream kernel. My recollection is that that's also the address listed in the Tegra210 system address map of the TRM and there are some registers before the regular I2C interface at offset 0xc00.
I've been carrying a patch against the upstream Linux I2C controller driver to special-case the VI/I2C to always add that 0xc00 offset when accessing registers, which allows us to reuse the existing driver and at the same time keeps all registers mapped so we can also access the VI/I2C specific registers.
My recollection is that the U-Boot driver is fairly similar to the Linux driver, so I suspect something similar could be done.
Thierry [Tom] Thanks, Thierry. That's my recollection, too, about the VI_I2C 0xC00 offset. I'll take a look at what we have in L4T U-Boot for T210 and address it in a set of patches for upstream soon. That I2C controller isn't used for anything on any Jetson board except on TX1, I believe, where it allows U-Boot to talk to the camera add-in board to read the board ID. But we've moved all that out to CBoot (board ID EEPROM reading), so there isn't a pressing need for it in U-Boot anymore, IIRC.
We've had internal discussions about potentially using the ID EEPROMs to dynamically modify the kernel DTB at runtime (possibly from U-Boot) in order to support things like different add-in boards.
For example, we currently enable the DSI output in Linux for Jetson TX1. However, the Jetson TX1 developer kits don't actually ship with that DSI display (I don't think they even come with the display add-in card), so this can lead to confusion. The idea was to have U-Boot probe ID EEPROMs from several sources to determine what to add to the device tree, so that the kernel DT *source* would only contain the standard developer kit hardware, but U-Boot (or something else perhaps) could add in extra nodes for a display module, or camera add-in board, etc.
Note that this is just a vague idea at this time and nothing concrete has been done to implement this, yet.
Thierry
participants (5)
-
Peter Robinson -
sjg＠google.com -
Thierry Reding -
Tom Warren -
tomcwarren3959＠gmail.com