[PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers
added gigadevice in the defconfig file and ID in the ids.c file
Signed-off-by: Victor Lim vlim@gigadevice.com --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++------- 3 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 7d66f9ef36..7cb183c1a3 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -87,51 +87,98 @@ const struct flash_info spi_nor_ids[] = { { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - /* GigaDevice */ - { - INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25lq32", 0xc86016, 0, 64 * 1024, 64, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256, - SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25lq256d", 0xc86019, 0, 64 * 1024, 512, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, - { - INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512, - SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) - }, +/* GigaDevice - GD25Q or B series */ + {INFO("gd25q16", 0xc84015, 0, 64 * 1024, 32, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)}, + {INFO("gd25q32", 0xc84016, 0, 64 * 1024, 64, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)}, + {INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)}, + {INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)}, + {INFO("gd25b series 256Mbit", 0xc84019, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES) }, + {INFO("gd25b series 512Mbit", 0xc8471A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55b series 1Gbit", 0xc8471B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55b series 2Gbit", 0xc8471C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25F series */ + {INFO("gd25f series 64Mbit", 0xc84317, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25f series 128Mbit", 0xc84318, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25f series 256Mbit", 0xc84319, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55f series 512Mbit", 0xc8431A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25T series */ + {INFO("gd25t series 512Mbit", 0xc8461A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55t series 1Gbit", 0xc8461B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55t02ge", 0xc8461C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25X series */ + {INFO("gd25x series 512Mbit", 0xc8481A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55x series 1Gbit", 0xc8481B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55x series 2Gbit", 0xc8481C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25LB series */ + {INFO("gd25lb series 16Mbit", 0xc86015, 0, 64 * 1024, 32, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lb series 32Mbit", 0xc86016, 0, 64 * 1024, 64, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lb series 64Mbit", 0xc86017, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lb series 128Mbit", 0xc86018, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lb series 256Mbit", 0xc86019, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lb series 256Mbit", 0xc86719, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lb series 512Mbit", 0xc8671A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lb series 1Gbit", 0xc8671B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lb series 2Gbit", 0xc8671C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25LF series */ + {INFO("gd25lf series 8Mbit", 0xc86314, 0, 64 * 1024, 16, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lf series 16Mbit", 0xc86315, 0, 64 * 1024, 32, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lf series 32Mbit", 0xc86316, 0, 64 * 1024, 64, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf series 64Mbit", 0xc86317, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf series 128Mbit", 0xc86318, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf series 256Mbit", 0xc86319, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lf series 512Mbit", 0xc8631A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25LT series */ + {INFO("gd25lt256e", 0xc86619, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lt512me", 0xc8661A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lt01ge", 0xc8661B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lt02ge", 0xc8661C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, +/* GigaDevice - GD25LX series */ + {INFO("gd25lx series 256Mbit", 0xc86819, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lx series 512Mbit", 0xc8681A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx series 1Gbit", 0xc8681B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx series 2Gbit", 0xc8681C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */
On 11/17/22 01:56, Victor lim wrote:
added gigadevice in the defconfig file and ID in the ids.c file
Signed-off-by: Victor Lim vlim@gigadevice.com
configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 +
This should be done in separate patch.
drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++------- 3 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
ditto. I am also fine with enabling these memories for zynqmp_virt/zynq_virt and versal_virt and versal_net_virt platforms.
Hard to guess what you have changed below. But if you want to change style it is one patch. If you want to add new devices it is another patch.
Thanks, Michal
Hi, Michal,
Regarding the following item,
drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++------- 3 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
I have the following script for uboot compilation, should I add the following lines to my script? make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
This is my script, source /tools/Xilinx/Vivado/2022.2/settings64.sh export CROSS_COMPILE=aarch64-linux-gnu- export ARCH=aarch64 make distclean make xilinx_zynqmp_mini_qspi_defconfig make -j8 DEVICE_TREE=zynqmp-mini-qspi-single cp u-boot.elf zynqmp_qspi_x4_single.bin
Regards,
Victor
________________________________ From: Michal Simek michal.simek@amd.com Sent: Monday, November 21, 2022 02:34 To: Victor lim victorswlim@gmail.com; u-boot@lists.denx.de u-boot@lists.denx.de; michal.simek@xilinx.com michal.simek@xilinx.com; jagan@amarulasolutions.com jagan@amarulasolutions.com; vigneshr@ti.com vigneshr@ti.com Cc: vikhyat.goyal@amd.com vikhyat.goyal@amd.com; ashok.reddy.soma@amd.com ashok.reddy.soma@amd.com; Vlim vlim@gigadevice.com Subject: Re: [PATCH] Subject: [patch]SPI: GD SPI: Add Gigadevice SPI NOR part numbers
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On 11/17/22 01:56, Victor lim wrote:
added gigadevice in the defconfig file and ID in the ids.c file
Signed-off-by: Victor Lim vlim@gigadevice.com
configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 +
This should be done in separate patch.
drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++------- 3 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..cd245906ab 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -76,3 +76,4 @@ CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
ditto. I am also fine with enabling these memories for zynqmp_virt/zynq_virt and versal_virt and versal_net_virt platforms.
Hard to guess what you have changed below. But if you want to change style it is one patch. If you want to add new devices it is another patch.
Thanks, Michal
Hi,
On 11/21/22 23:11, Vlim wrote:
Hi, Michal,
Regarding the following item,
drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++------- 3 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..75014117f1 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -78,3 +78,4 @@ CONFIG_ZYNQMP_GQSPI=y CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set +CONFIG_SPI_FLASH_GIGADEVICE=y
This is likely just appended and doesn't reflect Kconfig layout. Run make xilinx_zynqmp_mini_qspi_defconfig; make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
I have the following script for uboot compilation, should I add the following lines to my script? make savedefconfig; cp defconfig configs/xilinx_zynqmp_mini_qspi_defconfig
up2you but symbol position should be correct when you add it based on current Kconfig layout.
Thanks, Michal
participants (3)
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Michal Simek -
Victor lim -
Vlim