[U-Boot-Users] Little Endian on 750GX

Hi all
I'm working on Marvell boards DB64460 with 750GX, Big Endian. We are trying to check whether we can work with the 750FX in Little Endian mode. as I saw in the 750GX UM the default settings in the MSR is that the CPU is in BE, How can I change it?? if I'll will try to change it in the code , the code should be in BE, but I want to run in LE?? does any one have any idea?? besides for this issue what are the changes required for working with the U-Boot in LE, I already add a gcc flag -mlittle_endian and an ld flag -EL.
Thanks a lot

In message 402A133A.8030701@il.marvell.com you wrote:
I'm working on Marvell boards DB64460 with 750GX, Big Endian. We are trying to check whether we can work with the 750FX in Little Endian mode.
Don't.
How can I change it?? if I'll will try to change it in the code , the code should be in BE, but I want to run in LE??
What do you mean - code in BE, running in LE???
Which specific problem are you trying to solve? In general it is considered to be easier to stichk with the "native" byteorder (BE) and fix any existing software (drivers) where needed.
Best regards,
Wolfgang Denk

Hi
I know it is better to work with LE, but the we want to be able to check our MV64460 LE capabilities, In 750GX PPC the LE/BE configuration is set in the MSR and isn't sampled at reset, so we have to set it to LE in the first asm commands of the U-Boot. I got a recommendation on how to do it:
Little endian is selected by settin the LE bit in the MSR. It's done first thing in the code using the following:
start: #if defined(LENDIAN) /*
- If target is little endian, switch CPU to LE mode.
- Pair each instruction with a nop so bus swapping
- does not kill us wrt instruction order.
*/ isync nop li r1, LO(PSL_ILE|PSL_LE) nop mtspr srr1, r1 nop lis r1, HI(0xfff00000) nop ori r1, r1, LO(_in_le) nop mtspr srr0, r1 nop sync nop rfi nop _in_le: #else
/* Clear MSR to disable interrupts and checks */
isync li r1, 0x0 sync mtmsr r1 /* Clear MSR, turns off any translation etc */ isync
#endif
Using a rfi to set the MSR may be a little overkill but it does not give you any pipeline suprises! Little endian mode in PowerPC is not a "clean" little endian. Instructions are still stored in big endian mode. The NOPS in the code assures that the instruction order is correct since the CPU reads 64 bits at a time and the address bits are "munged".
I tried it but it didn't work, any way I'll work on this issue later on, and I'll update you in case it will work for me.
Thanks Ronen
Wolfgang Denk wrote:
In message 402A133A.8030701@il.marvell.com you wrote:
I'm working on Marvell boards DB64460 with 750GX, Big Endian. We are trying to check whether we can work with the 750FX in Little Endian mode.
Don't.
How can I change it?? if I'll will try to change it in the code , the code should be in BE, but I want to run in LE??
What do you mean - code in BE, running in LE???
Which specific problem are you trying to solve? In general it is considered to be easier to stichk with the "native" byteorder (BE) and fix any existing software (drivers) where needed.
Best regards,
Wolfgang Denk
participants (2)
-
Ronen Shitrit
-
Wolfgang Denk