[U-Boot-Users] NAND access via custom interface
Dear All, I'm porting U-Boot to our hardware based on Virtex-II FGPA. We have NAND device which cannot be accessed directly but only via our interface which takes care of all the control lines and sends the address/command/data bytes automatically. I understand, low-level macros like NAND_CLRCLE can be skipped.
Will it be OK if I implemet only NAND_WAIT_READY, WRITE_NAND_xxx and READ_NAND macros? Or anything else is required.
Do I need to set any structures manually? I couldn't find who populates struct nand_chip with info, at which stages it occurs.
Thanks.
Hi Jack,
On Thursday 19 October 2006 14:56, Jack Hab wrote:
I'm porting U-Boot to our hardware based on Virtex-II FGPA. We have NAND device which cannot be accessed directly but only via our interface which takes care of all the control lines and sends the address/command/data bytes automatically.
So you have a NAND flash controller on your board, right?
I understand, low-level macros like NAND_CLRCLE can be skipped.
Will it be OK if I implemet only NAND_WAIT_READY, WRITE_NAND_xxx and READ_NAND macros? Or anything else is required.
Seems you are looking at the "old" legacy NAND driver which should _not_ be used anymore. Please use the "new" NAND driver which makes it also quite easy to support NAND flash controllers. As an example implementation please take a look at the cpu/ppc4xx/ndfc.c driver. It's used in the AMCC "sequoia" (440EPx) board. Another boardspecific example is the board/prodrive/pdnb3/nand.c driver used by the pdnb3 board.
Best regards, Stefan
participants (2)
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Jack Hab -
Stefan Roese