[PATCH v2 00/23] rockchip: rk35xx: Miscellaneous fixes and updates
This series include miscellaneous fixes and updates for RK356x and RK3588 boards.
Patch 1-2 adds support for reference clocks used by USB driver.
Patch 3-5 drops unnecessary Kconfig options.
Patch 6-9 sort and imply RNG, PHY_GIGE and BOOTSTD_FULL Kconfig options.
Patch 10-12 sort and update use of bootph properties.
Patch 13-16 fixes minor issues observed with newly added boards.
Patch 17 enables options on rk3588-edgeble-neu6 boards to closer match other RK35xx boards.
Patch 18-22 adds SPI flash and USB OTG support to the rk35xx-generic boards.
Patch 23 fixes use of HS200 mode on a few RK3588 boards.
Changes in v2: - Add patch to fix use of HS200 mode on a few RK3588 boards - Follow kernel sort order for DT props - Fix Makefile entry from .dts to .dtb - Split rk35xx-generic related patches - Collect r-b tags
Jonas Karlman (23): clk: rockchip: rk356x: Add CLK_USB3OTGx_REF support clk: rockchip: rk3588: Add REF_CLK_USB3OTGx support rockchip: rk35xx: Drop USB_GADGET_PRODUCT_NUM Kconfig option rockchip: rk3588: Drop REGULATOR_PWM Kconfig option rockchip: rk3566-anbernic-rgxx3: Remove SPL_ROCKCHIP_BACK_TO_BROM option rockchip: rk35xx: Sort imply statements alphabetically rockchip: rk35xx: Enable random generator rockchip: rk35xx: Imply support for GbE PHY rockchip: rk356x: Imply enhanced features for standard boot rockchip: rk35xx: Sort soc u-boot.dtsi alphabetically rockchip: rk356x: Update bootph props rockchip: rk3588: Update bootph props rockchip: rk3566-pinetab2: Fix reading FIT from SPI flash rockchip: rk3588-coolpi: Add boards to documentation rockchip: rk3588-toybrick: Add missing Kconfig options rockchip: rk3588-turing-rk1: Use dwc3-generic driver rockchip: rk3588-edgeble-neu6: Enable FIT checksum validation rockchip: rk356x-generic: Fix eMMC and SD-card pinctrl rockchip: rk356x-generic: Add support for SPI flash rockchip: rk356x-generic: Add support for USB OTG rockchip: rk3588-generic: Add support for USB OTG rockchip: rk35xx-generic: Disable unused features rockchip: rk3588: Enable use of eMMC HS200 mode on a few missed boards
arch/arm/dts/Makefile | 5 +- .../arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 6 - arch/arm/dts/rk3566-pinetab2-u-boot.dtsi | 25 ++-- arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi | 8 +- arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi | 4 +- arch/arm/dts/rk3568-generic-u-boot.dtsi | 7 + arch/arm/dts/rk3568-generic.dts | 37 ++++- arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi | 7 +- arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 5 +- arch/arm/dts/rk356x-u-boot.dtsi | 136 ++++++++++-------- .../arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi | 8 +- .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 5 + .../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 5 + arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 5 + arch/arm/dts/rk3588-generic-u-boot.dtsi | 22 +++ arch/arm/dts/rk3588-generic.dts | 3 +- arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 17 ++- .../dts/rk3588-orangepi-5-plus-u-boot.dtsi | 7 +- arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 5 + arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 8 +- arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi | 5 + arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 6 +- arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 8 +- arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi | 9 +- arch/arm/dts/rk3588s-u-boot.dtsi | 104 ++++++++------ arch/arm/mach-rockchip/Kconfig | 31 ++-- configs/anbernic-rgxx3-rk3566_defconfig | 4 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/evb-rk3568_defconfig | 3 +- configs/evb-rk3588_defconfig | 5 +- configs/generic-rk3568_defconfig | 30 ++++ configs/generic-rk3588_defconfig | 16 +++ configs/neu6a-io-rk3588_defconfig | 8 +- configs/neu6b-io-rk3588_defconfig | 8 +- configs/pinetab2-rk3566_defconfig | 2 +- configs/quartzpro64-rk3588_defconfig | 1 - configs/rock5b-rk3588_defconfig | 2 - configs/toybrick-rk3588_defconfig | 6 +- configs/turing-rk1-rk3588_defconfig | 3 - doc/board/rockchip/rockchip.rst | 2 + drivers/clk/rockchip/clk_rk3568.c | 4 + drivers/clk/rockchip/clk_rk3588.c | 6 + 42 files changed, 391 insertions(+), 198 deletions(-)
The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix reference clock period configuration.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- drivers/clk/rockchip/clk_rk3568.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 57ef27dda893..999f48ea4b4e 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2417,6 +2417,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case BCLK_EMMC: rate = rk3568_emmc_get_bclk(priv); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: rate = OSC_HZ; break; @@ -2596,6 +2598,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case BCLK_EMMC: ret = rk3568_emmc_set_bclk(priv, rate); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: ret = OSC_HZ; break;
On 4/13/24 14:13, Jonas Karlman wrote:
The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix reference clock period configuration.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: No change
drivers/clk/rockchip/clk_rk3568.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 57ef27dda893..999f48ea4b4e 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2417,6 +2417,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case BCLK_EMMC: rate = rk3568_emmc_get_bclk(priv); break;
- case CLK_USB3OTG0_REF:
- case CLK_USB3OTG1_REF: case TCLK_EMMC: rate = OSC_HZ; break;
@@ -2596,6 +2598,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case BCLK_EMMC: ret = rk3568_emmc_set_bclk(priv, rate); break;
- case CLK_USB3OTG0_REF:
- case CLK_USB3OTG1_REF: case TCLK_EMMC: ret = OSC_HZ; break;
Acked-by: Sean Anderson seanga2@gmail.com
The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block.
Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix reference clock period configuration.
Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- v2: Collect r-b tag --- drivers/clk/rockchip/clk_rk3588.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 8f33843179b0..4c611a390499 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1569,6 +1569,9 @@ static ulong rk3588_clk_get_rate(struct clk *clk) case DCLK_DECOM: rate = rk3588_mmc_get_clk(priv, clk->id); break; + case REF_CLK_USB3OTG0: + case REF_CLK_USB3OTG1: + case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: rate = OSC_HZ; @@ -1734,6 +1737,9 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) case DCLK_DECOM: ret = rk3588_mmc_set_clk(priv, clk->id, rate); break; + case REF_CLK_USB3OTG0: + case REF_CLK_USB3OTG1: + case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: ret = OSC_HZ;
On 4/13/24 14:13, Jonas Karlman wrote:
The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block.
Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix reference clock period configuration.
Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
v2: Collect r-b tag
drivers/clk/rockchip/clk_rk3588.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 8f33843179b0..4c611a390499 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1569,6 +1569,9 @@ static ulong rk3588_clk_get_rate(struct clk *clk) case DCLK_DECOM: rate = rk3588_mmc_get_clk(priv, clk->id); break;
- case REF_CLK_USB3OTG0:
- case REF_CLK_USB3OTG1:
- case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: rate = OSC_HZ;
@@ -1734,6 +1737,9 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) case DCLK_DECOM: ret = rk3588_mmc_set_clk(priv, clk->id, rate); break;
- case REF_CLK_USB3OTG0:
- case REF_CLK_USB3OTG1:
- case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: ret = OSC_HZ;
Acked-by: Sean Anderson seanga2@gmail.com
The commit 8c19275fdb13 ("rockchip: Update the default USB Product ID value") added default product id for all supported Rockchip SoCs.
Remove USB_GADGET_PRODUCT_NUM options that match default value from RK35xx boards.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- configs/pinetab2-rk3566_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - 3 files changed, 3 deletions(-)
diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index bc7a77aa52fd..edeb1d89b993 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -99,7 +99,6 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350a CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 58c7c44fb4f7..ac4f1ebb4c13 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -102,7 +102,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index 07f7b848529e..e18ced721789 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -109,7 +109,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y
On 2024-04-13 20:13, Jonas Karlman wrote:
The commit 8c19275fdb13 ("rockchip: Update the default USB Product ID value") added default product id for all supported Rockchip SoCs.
Remove USB_GADGET_PRODUCT_NUM options that match default value from RK35xx boards.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: No change
configs/pinetab2-rk3566_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - 3 files changed, 3 deletions(-)
diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index bc7a77aa52fd..edeb1d89b993 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -99,7 +99,6 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350a CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 58c7c44fb4f7..ac4f1ebb4c13 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -102,7 +102,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index 07f7b848529e..e18ced721789 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -109,7 +109,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y
RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop the superfluous REGULATOR_PWM Kconfig options.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- configs/evb-rk3588_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/toybrick-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - 7 files changed, 7 deletions(-)
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index c8db04c076ef..68ecbc54b807 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -52,7 +52,6 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 307a540f4249..bc2d70421ee9 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 9ef2bb21fffa..8bc75a5f0dd9 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index b2a66d3f2db0..ee2521f87ae5 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -64,7 +64,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index ac4f1ebb4c13..8af56baf04d7 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -75,7 +75,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 6ee92e943138..38fc7906eef2 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -53,7 +53,6 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index e18ced721789..77aacbc64b6c 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -81,7 +81,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y
On 2024-04-13 20:13, Jonas Karlman wrote:
RK3588 boards do not have any pwm-regulator compatible nodes in DT, drop the superfluous REGULATOR_PWM Kconfig options.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: No change
configs/evb-rk3588_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 1 - configs/rock5b-rk3588_defconfig | 1 - configs/toybrick-rk3588_defconfig | 1 - configs/turing-rk1-rk3588_defconfig | 1 - 7 files changed, 7 deletions(-)
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index c8db04c076ef..68ecbc54b807 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -52,7 +52,6 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 307a540f4249..bc2d70421ee9 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 9ef2bb21fffa..8bc75a5f0dd9 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index b2a66d3f2db0..ee2521f87ae5 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -64,7 +64,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index ac4f1ebb4c13..8af56baf04d7 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -75,7 +75,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 6ee92e943138..38fc7906eef2 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -53,7 +53,6 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index e18ced721789..77aacbc64b6c 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -81,7 +81,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y
SPL_ROCKCHIP_BACK_TO_BROM should normally only be enabled when BROM should load U-Boot binary. SPL on Anbernic RGxx3 devices load TF-A and U-Boot proper from FIT images and does never jump back to BROM from SPL.
Remove the superfluous Kconfig option from defconfig to align with other RK356x boards.
This patch have no intended change in boot behavior.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- configs/anbernic-rgxx3-rk3566_defconfig | 2 -- 1 file changed, 2 deletions(-)
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index c8c9238f96fc..24b050c59b53 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -6,9 +6,7 @@ CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y -CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y CONFIG_DEBUG_UART_BASE=0xFE660000
Sort imply statements under ROCKCHIP_RK3568 and ROCKCHIP_RK3588 alphabetically.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- arch/arm/mach-rockchip/Kconfig | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index fee463e6d92f..649c22618f36 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,12 +305,12 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET - imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD - imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP + imply OF_LIBFDT_OVERLAY + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, @@ -332,16 +332,16 @@ config ROCKCHIP_RK3588 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET - imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD - imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP - imply MISC_INIT_R - imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP - imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT + imply BOOTSTD_FULL imply CLK_SCMI + imply MISC_INIT_R + imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP + imply OF_LIBFDT_OVERLAY + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP imply SCMI_FIRMWARE - imply BOOTSTD_FULL + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF + imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4,
On 2024-04-13 20:13, Jonas Karlman wrote:
Sort imply statements under ROCKCHIP_RK3568 and ROCKCHIP_RK3588 alphabetically.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: No change
arch/arm/mach-rockchip/Kconfig | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index fee463e6d92f..649c22618f36 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,12 +305,12 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
- imply ROCKCHIP_COMMON_BOARD
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_OTP imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_COMMON_BOARD
- imply ROCKCHIP_OTP
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
@@ -332,16 +332,16 @@ config ROCKCHIP_RK3588 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
- imply ROCKCHIP_COMMON_BOARD
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_OTP
- imply MISC_INIT_R
- imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
- imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
- imply BOOTSTD_FULL imply CLK_SCMI
- imply MISC_INIT_R
- imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_COMMON_BOARD
- imply ROCKCHIP_OTP imply SCMI_FIRMWARE
- imply BOOTSTD_FULL
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
- imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76
and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4,
The RK35xx SoCs contain a crypto engine block that can generate random numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 6 ------ arch/arm/dts/rk356x-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588s-u-boot.dtsi | 1 - arch/arm/mach-rockchip/Kconfig | 4 ++++ configs/anbernic-rgxx3-rk3566_defconfig | 2 -- 5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index 791f16b206f2..793ed4ae8ae0 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -6,12 +6,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; }; - - rng: rng@fe388000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x0 0xfe388000 0x0 0x2000>; - status = "okay"; - }; };
&dsi_dphy0 { diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d347080577d9..05367216e118 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -21,6 +21,11 @@ bootph-all; };
+ rng: rng@fe388000 { + compatible = "rockchip,cryptov2-rng"; + reg = <0x0 0xfe388000 0x0 0x2000>; + }; + otp: nvmem@fe38c000 { compatible = "rockchip,rk3568-otp"; reg = <0x0 0xfe38c000 0x0 0x4000>; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ac67c777adea..233eb79d9ba2 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -91,7 +91,6 @@ rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>; - status = "disabled"; };
usbdp_phy0: phy@fed80000 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 649c22618f36..247b9a3146c2 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,9 +305,11 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET + imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY + imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF @@ -334,9 +336,11 @@ config ROCKCHIP_RK3588 select DM_RESET imply BOOTSTD_FULL imply CLK_SCMI + imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY + imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SCMI_FIRMWARE diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index 24b050c59b53..110237e798f9 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -68,8 +68,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_SMCCC_TRNG is not set CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2
Hello Jonas,
Please see a couple of comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
The RK35xx SoCs contain a crypto engine block that can generate random numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: No change
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 6 ------ arch/arm/dts/rk356x-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588s-u-boot.dtsi | 1 - arch/arm/mach-rockchip/Kconfig | 4 ++++ configs/anbernic-rgxx3-rk3566_defconfig | 2 -- 5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index 791f16b206f2..793ed4ae8ae0 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -6,12 +6,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;status = "okay";- };
};
&dsi_dphy0 { diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d347080577d9..05367216e118 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -21,6 +21,11 @@ bootph-all; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;
Shouldn't
+ status = "okay";
also be specified here?
- };
- otp: nvmem@fe38c000 { compatible = "rockchip,rk3568-otp"; reg = <0x0 0xfe38c000 0x0 0x4000>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ac67c777adea..233eb79d9ba2 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -91,7 +91,6 @@ rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>;
status = "disabled";
Shouldn't it be enabled instead?
};
usbdp_phy0: phy@fed80000 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 649c22618f36..247b9a3146c2 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,9 +305,11 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
@@ -334,9 +336,11 @@ config ROCKCHIP_RK3588 select DM_RESET imply BOOTSTD_FULL imply CLK_SCMI
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SCMI_FIRMWARE
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index 24b050c59b53..110237e798f9 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -68,8 +68,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_SMCCC_TRNG is not set CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2
Hi Dragan,
On 2024-04-15 08:37, Dragan Simic wrote:
Hello Jonas,
Please see a couple of comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
The RK35xx SoCs contain a crypto engine block that can generate random numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: No change
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 6 ------ arch/arm/dts/rk356x-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588s-u-boot.dtsi | 1 - arch/arm/mach-rockchip/Kconfig | 4 ++++ configs/anbernic-rgxx3-rk3566_defconfig | 2 -- 5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index 791f16b206f2..793ed4ae8ae0 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -6,12 +6,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;status = "okay";- };
};
&dsi_dphy0 { diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d347080577d9..05367216e118 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -21,6 +21,11 @@ bootph-all; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;Shouldn't
status = "okay";also be specified here?
It is not needed as "okay" is the implied status when status prop is undefined, and my understanding is that DT maintainers prefer not to include status = "okay" where the initial node is defined.
More correctly if status prop is defined it must explicitly have "okay" anything else result in a disabled node, removing the status prop entirely has the same effect as status = "okay" in a board file.
- };
- otp: nvmem@fe38c000 { compatible = "rockchip,rk3568-otp"; reg = <0x0 0xfe38c000 0x0 0x4000>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ac67c777adea..233eb79d9ba2 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -91,7 +91,6 @@ rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>;
status = "disabled";Shouldn't it be enabled instead?
Same as above, not defining any status prop result in node being enabled.
Board u-boot.dtsi-files could disable the node with status = "disabled" if they absolutely do not want to have the rng node in U-Boot.
Regards, Jonas
};
usbdp_phy0: phy@fed80000 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 649c22618f36..247b9a3146c2 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,9 +305,11 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
@@ -334,9 +336,11 @@ config ROCKCHIP_RK3588 select DM_RESET imply BOOTSTD_FULL imply CLK_SCMI
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SCMI_FIRMWARE
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index 24b050c59b53..110237e798f9 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -68,8 +68,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_SMCCC_TRNG is not set CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2
On 2024-04-15 10:03, Jonas Karlman wrote:
On 2024-04-15 08:37, Dragan Simic wrote:
Please see a couple of comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
The RK35xx SoCs contain a crypto engine block that can generate random numbers.
Enable rng node in soc u-boot.dtsi and enable Kconfig options to take advantage of the random generator.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: No change
arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 6 ------ arch/arm/dts/rk356x-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588s-u-boot.dtsi | 1 - arch/arm/mach-rockchip/Kconfig | 4 ++++ configs/anbernic-rgxx3-rk3566_defconfig | 2 -- 5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index 791f16b206f2..793ed4ae8ae0 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -6,12 +6,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;status = "okay";- };
};
&dsi_dphy0 { diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d347080577d9..05367216e118 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -21,6 +21,11 @@ bootph-all; };
- rng: rng@fe388000 {
compatible = "rockchip,cryptov2-rng";reg = <0x0 0xfe388000 0x0 0x2000>;Shouldn't
status = "okay";also be specified here?
It is not needed as "okay" is the implied status when status prop is undefined, and my understanding is that DT maintainers prefer not to include status = "okay" where the initial node is defined.
More correctly if status prop is defined it must explicitly have "okay" anything else result in a disabled node, removing the status prop entirely has the same effect as status = "okay" in a board file.
I see, thanks for the clarification. In that case, there seem to be a few redundant instances of 'status = "okay";' in various U-Boot dtsi files, which should probably be deleted.
- };
- otp: nvmem@fe38c000 { compatible = "rockchip,rk3568-otp"; reg = <0x0 0xfe38c000 0x0 0x4000>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ac67c777adea..233eb79d9ba2 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -91,7 +91,6 @@ rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>;
status = "disabled";Shouldn't it be enabled instead?
Same as above, not defining any status prop result in node being enabled.
Board u-boot.dtsi-files could disable the node with status = "disabled" if they absolutely do not want to have the rng node in U-Boot.
Thanks once again for the clarification. Please include this tag:
Reviewed-by: Dragan Simic dsimic@manjaro.org
};
usbdp_phy0: phy@fed80000 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 649c22618f36..247b9a3146c2 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,9 +305,11 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
@@ -334,9 +336,11 @@ config ROCKCHIP_RK3588 select DM_RESET imply BOOTSTD_FULL imply CLK_SCMI
- imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP imply SCMI_FIRMWARE
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index 24b050c59b53..110237e798f9 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -68,8 +68,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_SMCCC_TRNG is not set CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2
Imply support for GbE PHY status parsing and configuration when support for onboard ethernet is enabled.
Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- v2: Collect r-b tag --- arch/arm/mach-rockchip/Kconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 247b9a3146c2..88bab9c7b3bf 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -309,6 +309,7 @@ config ROCKCHIP_RK3568 imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP @@ -340,6 +341,7 @@ config ROCKCHIP_RK3588 imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP
On 2024-04-13 20:13, Jonas Karlman wrote:
Imply support for GbE PHY status parsing and configuration when support for onboard ethernet is enabled.
s/ethernet/Ethernet/ -- only if there will be v3
Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: Collect r-b tag
arch/arm/mach-rockchip/Kconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 247b9a3146c2..88bab9c7b3bf 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -309,6 +309,7 @@ config ROCKCHIP_RK3568 imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP
@@ -340,6 +341,7 @@ config ROCKCHIP_RK3588 imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP imply OF_LIBFDT_OVERLAY
- imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_OTP
Imply BOOTSTD_FULL for all RK356x boards to more closely follow RK3588.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- arch/arm/mach-rockchip/Kconfig | 1 + configs/bpi-r2-pro-rk3568_defconfig | 1 - 2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 88bab9c7b3bf..22eccaaf5cb1 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,6 +305,7 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET + imply BOOTSTD_FULL imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig index 5cc95241ba43..70837574462b 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -15,7 +15,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -CONFIG_BOOTSTD_FULL=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2-pro.dtb" # CONFIG_DISPLAY_CPUINFO is not set
On 2024-04-13 20:13, Jonas Karlman wrote:
Imply BOOTSTD_FULL for all RK356x boards to more closely follow RK3588.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: No change
arch/arm/mach-rockchip/Kconfig | 1 + configs/bpi-r2-pro-rk3568_defconfig | 1 - 2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 88bab9c7b3bf..22eccaaf5cb1 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -305,6 +305,7 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET
- imply BOOTSTD_FULL imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig index 5cc95241ba43..70837574462b 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -15,7 +15,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -CONFIG_BOOTSTD_FULL=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2-pro.dtb" # CONFIG_DISPLAY_CPUINFO is not set
Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes is sorted by reg addr then by alphabetical order.
This has no intended change beside sorting existing nodes and removing a duplicated usbdpphy0_grf node.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Follow kernel sort order (Quentin)
[1] https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.... --- arch/arm/dts/rk356x-u-boot.dtsi | 98 ++++++++++++++++---------------- arch/arm/dts/rk3588s-u-boot.dtsi | 69 +++++++++++----------- 2 files changed, 81 insertions(+), 86 deletions(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 05367216e118..1ecf719202e9 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -38,46 +38,10 @@ }; };
-&xin24m { - bootph-all; -}; - &cru { bootph-all; };
-&pmucru { - bootph-all; -}; - -&grf { - bootph-all; -}; - -&pmugrf { - bootph-all; -}; - -&pinctrl { - bootph-all; -}; - -&pcfg_pull_none_smt { - bootph-all; -}; - -&pcfg_pull_none { - bootph-all; -}; - -&pcfg_pull_up_drv_level_2 { - bootph-all; -}; - -&pcfg_pull_up { - bootph-all; -}; - &emmc_bus8 { bootph-all; }; @@ -102,10 +66,51 @@ bootph-all; };
+&grf { + bootph-all; +}; + &i2c0_xfer { bootph-all; };
+&pcfg_pull_none { + bootph-all; +}; + +&pcfg_pull_none_smt { + bootph-all; +}; + +&pcfg_pull_up { + bootph-all; +}; + +&pcfg_pull_up_drv_level_2 { + bootph-all; +}; + +&pinctrl { + bootph-all; +}; + +&pmucru { + bootph-all; +}; + +&pmugrf { + bootph-all; +}; + +&sdhci { + bootph-pre-ram; + max-frequency = <200000000>; +}; + +&sdmmc0 { + bootph-pre-ram; +}; + &sdmmc0_bus4 { bootph-all; }; @@ -126,24 +131,19 @@ bootph-all; };
-&uart2m0_xfer { - bootph-all; -}; - -&sdhci { - bootph-pre-ram; - max-frequency = <200000000>; -}; - -&sdmmc0 { - bootph-pre-ram; -}; - &uart2 { bootph-pre-ram; clock-frequency = <24000000>; };
+&uart2m0_xfer { + bootph-all; +}; + +&xin24m { + bootph-all; +}; + #ifdef CONFIG_ROCKCHIP_SPI_IMAGE &binman { simple-bin-spi { diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 233eb79d9ba2..543327954b1a 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -41,6 +41,17 @@ status = "disabled"; };
+ vo0_grf: syscon@fd5a6000 { + compatible = "rockchip,rk3588-vo-grf", "syscon"; + reg = <0x0 0xfd5a6000 0x0 0x2000>; + clocks = <&cru PCLK_VO0GRF>; + }; + + usb_grf: syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf", "syscon"; + reg = <0x0 0xfd5ac000 0x0 0x4000>; + }; + usbdpphy0_grf: syscon@fd5c8000 { compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; reg = <0x0 0xfd5c8000 0x0 0x4000>; @@ -72,22 +83,6 @@ }; };
- vo0_grf: syscon@fd5a6000 { - compatible = "rockchip,rk3588-vo-grf", "syscon"; - reg = <0x0 0xfd5a6000 0x0 0x2000>; - clocks = <&cru PCLK_VO0GRF>; - }; - - usb_grf: syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf", "syscon"; - reg = <0x0 0xfd5ac000 0x0 0x4000>; - }; - - usbdpphy0_grf: syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; - reg = <0x0 0xfd5c8000 0x0 0x4000>; - }; - rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>; @@ -125,6 +120,10 @@ }; };
+&cru { + bootph-pre-ram; +}; + &emmc_bus8 { bootph-all; }; @@ -145,32 +144,24 @@ bootph-all; };
-&pinctrl { - bootph-all; +&ioc { + bootph-pre-ram; };
&pcfg_pull_none { bootph-all; };
-&pcfg_pull_up_drv_level_2 { - bootph-all; -}; - &pcfg_pull_up { bootph-all; };
-&xin24m { +&pcfg_pull_up_drv_level_2 { bootph-all; };
-&cru { - bootph-pre-ram; -}; - -&sys_grf { - bootph-pre-ram; +&pinctrl { + bootph-all; };
&pmu1grf { @@ -185,18 +176,18 @@ bootph-pre-ram; };
-&sdmmc { - bootph-pre-ram; - bootph-some-ram; - u-boot,spl-fifo-mode; -}; - &sdhci { bootph-pre-ram; bootph-some-ram; u-boot,spl-fifo-mode; };
+&sdmmc { + bootph-pre-ram; + bootph-some-ram; + u-boot,spl-fifo-mode; +}; + &sdmmc_bus4 { bootph-all; }; @@ -213,6 +204,10 @@ bootph-all; };
+&sys_grf { + bootph-pre-ram; +}; + &uart2 { bootph-pre-ram; clock-frequency = <24000000>; @@ -222,8 +217,8 @@ bootph-all; };
-&ioc { - bootph-pre-ram; +&xin24m { + bootph-all; };
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes is sorted by reg addr then by alphabetical order.
This has no intended change beside sorting existing nodes and removing a duplicated usbdpphy0_grf node.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: Follow kernel sort order (Quentin)
[1] https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style....
arch/arm/dts/rk356x-u-boot.dtsi | 98 ++++++++++++++++---------------- arch/arm/dts/rk3588s-u-boot.dtsi | 69 +++++++++++----------- 2 files changed, 81 insertions(+), 86 deletions(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 05367216e118..1ecf719202e9 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -38,46 +38,10 @@
[...]
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE &binman { simple-bin-spi {
We could also alphabetically sort the binman node if we wanted.
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 233eb79d9ba2..543327954b1a 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -41,6 +41,17 @@ status = "disabled"; };
- vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";reg = <0x0 0xfd5a6000 0x0 0x2000>;clocks = <&cru PCLK_VO0GRF>;- };
- usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";reg = <0x0 0xfd5ac000 0x0 0x4000>;- };
- usbdpphy0_grf: syscon@fd5c8000 { compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,22 +83,6 @@ }; };
- vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";reg = <0x0 0xfd5a6000 0x0 0x2000>;clocks = <&cru PCLK_VO0GRF>;- };
- usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";reg = <0x0 0xfd5ac000 0x0 0x4000>;- };
- usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";reg = <0x0 0xfd5c8000 0x0 0x4000>;- };
Would have been nice to at least mention this node is removed because it is duplicated (or have it removed in a different commit to make it more explicit).
[...]
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
What's below this git context is &binman, which we could also alphabetically sort if we wanted.
Did the change manually and it matches, so:
Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Thanks! Quentin
Hi Quentin,
On 2024-04-15 10:46, Quentin Schulz wrote:
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes is sorted by reg addr then by alphabetical order.
This has no intended change beside sorting existing nodes and removing a duplicated usbdpphy0_grf node.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: Follow kernel sort order (Quentin)
[1] https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style....
arch/arm/dts/rk356x-u-boot.dtsi | 98 ++++++++++++++++---------------- arch/arm/dts/rk3588s-u-boot.dtsi | 69 +++++++++++----------- 2 files changed, 81 insertions(+), 86 deletions(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 05367216e118..1ecf719202e9 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -38,46 +38,10 @@
[...]
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE &binman { simple-bin-spi {
We could also alphabetically sort the binman node if we wanted.
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 233eb79d9ba2..543327954b1a 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -41,6 +41,17 @@ status = "disabled"; };
- vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";reg = <0x0 0xfd5a6000 0x0 0x2000>;clocks = <&cru PCLK_VO0GRF>;- };
- usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";reg = <0x0 0xfd5ac000 0x0 0x4000>;- };
- usbdpphy0_grf: syscon@fd5c8000 { compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,22 +83,6 @@ }; };
- vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";reg = <0x0 0xfd5a6000 0x0 0x2000>;clocks = <&cru PCLK_VO0GRF>;- };
- usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";reg = <0x0 0xfd5ac000 0x0 0x4000>;- };
- usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";reg = <0x0 0xfd5c8000 0x0 0x4000>;- };
Would have been nice to at least mention this node is removed because it is duplicated (or have it removed in a different commit to make it more explicit).
I did mention the removal in the commit message :-)
"This has no intended change beside sorting existing nodes and removing a duplicated usbdpphy0_grf node."
[...]
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
What's below this git context is &binman, which we could also alphabetically sort if we wanted.
Was unsure about the binman node, ideally we should not be need it in the <soc>-u-boot.dtsi file, so I decided not to touch it at all, will move it in v3.
Regards, Jonas
Did the change manually and it matches, so:
Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Thanks! Quentin
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Add bootph-some-ram props and follow kernel sort order
Following bootph props have been applied:
CRU, GRF and UART nodes: - bootph-all - needed at all or most stages
SD-card regulator related nodes: - bootph-pre-ram (SPL) - regulator pinctrl may be needed to read FIT from SD-card on some boards
eMMC/SD-card/SPI flash related nodes: - bootph-pre-ram (SPL) - bootph-some-ram (U-Boot proper pre-reloc) --- arch/arm/dts/rk3566-pinetab2-u-boot.dtsi | 25 +++++++---- arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi | 8 ++-- arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi | 4 +- arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi | 7 ++- arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 5 +-- arch/arm/dts/rk356x-u-boot.dtsi | 51 ++++++++++++++-------- configs/evb-rk3568_defconfig | 3 +- 7 files changed, 61 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi index 4aa6ab1c848c..eb18008f2fe3 100644 --- a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi +++ b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi @@ -3,20 +3,31 @@ #include "rk356x-u-boot.dtsi"
&fspi_dual_io_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&gpio0 { - bootph-all; + bootph-pre-ram; };
&i2c0 { bootph-pre-ram; };
+&i2c0_xfer { + bootph-pre-ram; +}; + +&i2s1m0_mclk { + bootph-pre-ram; +}; + +&pmic_int_l { + bootph-pre-ram; +}; + &rk817 { - bootph-pre-ram; - regulators { bootph-pre-ram; }; @@ -27,15 +38,13 @@ };
&sdmmc_pwren_l { - bootph-all; + bootph-pre-ram; };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; };
diff --git a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi index 930d660868bb..0e25b7e108fc 100644 --- a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi +++ b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi @@ -3,7 +3,7 @@ #include "rk356x-u-boot.dtsi"
&gpio0 { - bootph-all; + bootph-pre-ram; };
&sdhci { @@ -13,11 +13,9 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; };
@@ -34,5 +32,5 @@ };
&vcc_sd_h { - bootph-all; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi index c235b4357f7d..f2c9d8e167d5 100644 --- a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi +++ b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi @@ -9,11 +9,9 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; };
diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi index 1fc71faa9e07..d8a6dd87510f 100644 --- a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi +++ b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk356x-u-boot.dtsi"
&fspi_dual_io_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdhci { @@ -15,10 +16,8 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi index 5b823fcca5fb..9d18f5d0b364 100644 --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi @@ -26,16 +26,15 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; #address-cells = <1>; #size-cells = <0>; status = "okay";
flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 1ecf719202e9..ffac4a9def51 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -43,43 +43,46 @@ };
&emmc_bus8 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_datastrobe { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_rstnout { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&fspi_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&grf { bootph-all; };
-&i2c0_xfer { - bootph-all; -}; - &pcfg_pull_none { bootph-all; };
&pcfg_pull_none_smt { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&pcfg_pull_up { @@ -87,7 +90,8 @@ };
&pcfg_pull_up_drv_level_2 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&pinctrl { @@ -104,35 +108,46 @@
&sdhci { bootph-pre-ram; + bootph-some-ram; max-frequency = <200000000>; };
&sdmmc0 { bootph-pre-ram; + bootph-some-ram; };
&sdmmc0_bus4 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc0_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc0_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc0_det { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc0_pwren { - bootph-all; + bootph-pre-ram; + bootph-some-ram; +}; + +&sfc { + u-boot,spl-sfc-no-dma; };
&uart2 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; };
diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 6e8061f5f487..37b4c5955994 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_RK8XX=y
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Add bootph-some-ram props and follow kernel sort order
Following bootph props have been applied:
CRU, GRF and UART nodes: - bootph-all - needed at all or most stages
SD-card regulator related nodes: - bootph-pre-ram (SPL) - regulator pinctrl may be needed to read FIT from SD-card on some boards
eMMC/SD-card/SPI flash related nodes: - bootph-pre-ram (SPL) - bootph-some-ram (U-Boot proper pre-reloc) --- .../arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-generic.dts | 1 + arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 12 ++--- .../dts/rk3588-orangepi-5-plus-u-boot.dtsi | 7 ++- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 6 ++- arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi | 9 ++-- arch/arm/dts/rk3588s-u-boot.dtsi | 50 ++++++++++++++----- configs/evb-rk3588_defconfig | 4 +- 10 files changed, 71 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi index ed15b14ea0ee..f0ef0164664e 100644 --- a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi"
&fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdhci { @@ -12,16 +13,15 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay";
flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index e4721d97a87d..baafe7463f1b 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -40,5 +40,6 @@ };
&uart2 { + pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 60494bb8485f..968385622fa5 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -7,12 +7,11 @@ #include "rk3588-u-boot.dtsi"
&fspim1_pins { - bootph-all; -}; - -&sfc { bootph-pre-ram; - u-boot,spl-sfc-no-dma; + bootph-some-ram; +}; + +&sfc { pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; #address-cells = <1>; @@ -20,9 +19,10 @@ status = "okay";
flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi index 5d5fa6ffb214..1ab31a4ec5ab 100644 --- a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi"
&fspim1_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdhci { @@ -12,10 +13,8 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 9ee9dd051e32..d6020ca790f6 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -18,7 +18,8 @@ };
&fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&pinctrl { @@ -35,16 +36,15 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay";
flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi index ca2a684f3541..a50bcc45f216 100644 --- a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi +++ b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi @@ -12,6 +12,10 @@ };
&uart9 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; }; + +&uart9m0_xfer { + bootph-all; +}; diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi index 6e4b97028d7c..f51d7f30d787 100644 --- a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588s-u-boot.dtsi"
&fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdhci { @@ -12,16 +13,15 @@ };
&sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay";
flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi index 888d1b9c12d7..12a92c0cba10 100644 --- a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi @@ -9,14 +9,13 @@ };
&fspim0_pins { - bootph-all; -}; - -&sfc { bootph-pre-ram; - u-boot,spl-sfc-no-dma; + bootph-some-ram; +};
+&sfc { flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 543327954b1a..f837239d2747 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -121,31 +121,40 @@ };
&cru { - bootph-pre-ram; + bootph-all; };
&emmc_bus8 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_data_strobe { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&emmc_rstnout { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&ioc { - bootph-pre-ram; + bootph-all; +}; + +&pcfg_pull_down { + bootph-all; };
&pcfg_pull_none { @@ -157,6 +166,11 @@ };
&pcfg_pull_up_drv_level_2 { + bootph-pre-ram; + bootph-some-ram; +}; + +&php_grf { bootph-all; };
@@ -170,10 +184,12 @@
&scmi { bootph-pre-ram; + bootph-some-ram; };
&scmi_clk { bootph-pre-ram; + bootph-some-ram; };
&sdhci { @@ -189,27 +205,35 @@ };
&sdmmc_bus4 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; };
&sdmmc_det { - bootph-all; + bootph-pre-ram; + bootph-some-ram; +}; + +&sfc { + u-boot,spl-sfc-no-dma; };
&sys_grf { - bootph-pre-ram; + bootph-all; };
&uart2 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; };
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index 68ecbc54b807..610a8d740fbb 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -33,7 +33,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -52,6 +53,7 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: Add bootph-some-ram props and follow kernel sort order
Following bootph props have been applied:
CRU, GRF and UART nodes:
- bootph-all - needed at all or most stages
SD-card regulator related nodes:
- bootph-pre-ram (SPL) - regulator pinctrl may be needed to read FIT from SD-card on some boards
eMMC/SD-card/SPI flash related nodes:
- bootph-pre-ram (SPL)
- bootph-some-ram (U-Boot proper pre-reloc)
.../arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-generic.dts | 1 + arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 12 ++--- .../dts/rk3588-orangepi-5-plus-u-boot.dtsi | 7 ++- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 6 ++- arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi | 9 ++-- arch/arm/dts/rk3588s-u-boot.dtsi | 50 ++++++++++++++----- configs/evb-rk3588_defconfig | 4 +- 10 files changed, 71 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi index ed15b14ea0ee..f0ef0164664e 100644 --- a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi"
&fspim2_pins {
- bootph-all;
bootph-pre-ram;
bootph-some-ram; };
&sdhci {
@@ -12,16 +13,15 @@ };
&sfc {
bootph-pre-ram;
u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay";
flash@0 {
bootph-pre-ram;compatible = "jedec,spi-nor"; reg = <0>;
bootph-pre-ram;bootph-some-ram;diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index e4721d97a87d..baafe7463f1b 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -40,5 +40,6 @@ };
&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
I think this should be its own patch.
[...]
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index 68ecbc54b807..610a8d740fbb 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -33,7 +33,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -52,6 +53,7 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y
I have a feeling the changes to the defconfig aren't entirely related to this patch? Specifically, I think at least CONFIG_SPL_DM_SEQ_ALIAS isn't related?
Otherwise,
Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Thanks, Quentin
Hi Quentin,
On 2024-04-15 10:55, Quentin Schulz wrote:
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
After the commit aca95282c1b7 ("Makefile: Use the fdtgrep -u flag") bootph props is propagating to parent nodes.
Update bootph props to ensure eMMC, SD-card and SPI flash is available in SPL and U-Boot proper pre-reloc phase also remove unneeded bootph props that automatically is propagated to parent nodes.
Also adjust pinctrl nodes to only be included in boot phases where they are needed and add any missing pinctrl node needed in SPL.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: Add bootph-some-ram props and follow kernel sort order
Following bootph props have been applied:
CRU, GRF and UART nodes:
- bootph-all - needed at all or most stages
SD-card regulator related nodes:
- bootph-pre-ram (SPL) - regulator pinctrl may be needed to read FIT from SD-card on some boards
eMMC/SD-card/SPI flash related nodes:
- bootph-pre-ram (SPL)
- bootph-some-ram (U-Boot proper pre-reloc)
.../arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-generic.dts | 1 + arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 12 ++--- .../dts/rk3588-orangepi-5-plus-u-boot.dtsi | 7 ++- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 6 ++- arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi | 8 +-- arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi | 9 ++-- arch/arm/dts/rk3588s-u-boot.dtsi | 50 ++++++++++++++----- configs/evb-rk3588_defconfig | 4 +- 10 files changed, 71 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi index ed15b14ea0ee..f0ef0164664e 100644 --- a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi"
&fspim2_pins {
- bootph-all;
bootph-pre-ram;
bootph-some-ram; };
&sdhci {
@@ -12,16 +13,15 @@ };
&sfc {
bootph-pre-ram;
u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay";
flash@0 {
bootph-pre-ram;compatible = "jedec,spi-nor"; reg = <0>;
bootph-pre-ram;bootph-some-ram;diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index e4721d97a87d..baafe7463f1b 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -40,5 +40,6 @@ };
&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
I think this should be its own patch.
Sure, will move this to its own patch in v3.
[...]
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index 68ecbc54b807..610a8d740fbb 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -33,7 +33,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -52,6 +53,7 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y
I have a feeling the changes to the defconfig aren't entirely related to this patch? Specifically, I think at least CONFIG_SPL_DM_SEQ_ALIAS isn't related?
My original intent of this entire series was to fix/align bootph props and pinctrl use across boards, but after more and more testing it has grown a little bit out of control ;-)
For proper handling in SPL we also need the SPL_DM_SEQ_ALIAS enabled.
In the future I would like to see a ROCKCHIP_COMMON_OPTIONS or similar that imply all these common options, for now this and my other series just tries to get more boards to using all these common options.
Will split out to a evb specific patch in v3.
Regards, Jonas
Otherwise,
Reviewed-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Thanks, Quentin
The SF_DEFAULT_SPEED Kconfig option got lost during merge and this prevent reading FIT from SPI flash.
Restore the SF_DEFAULT_SPEED option to fix this.
Fixes: 8a94c376f6cb ("rockchip: Use common bss and stack addresses on RK356x") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- configs/pinetab2-rk3566_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index edeb1d89b993..525a002a21b8 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -4,6 +4,7 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2-v2.0" CONFIG_ROCKCHIP_RK3568=y
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Also fix .dtb-file entries in Makefile.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- arch/arm/dts/Makefile | 4 ++-- doc/board/rockchip/rockchip.rst | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 08dfbdd557b7..38d259a7035c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -167,8 +167,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \ - rk3588s-coolpi-4b.dts \ - rk3588-coolpi-cm5-evb.dts \ + rk3588s-coolpi-4b.dtb \ + rk3588-coolpi-cm5-evb.dtb \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \ diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 5dd5ea7f1e29..9a726e9cde63 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -131,6 +131,8 @@ List of mainline supported Rockchip boards: - Turing Machines RK1 (turing-rk1-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s) - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588) + - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s) + - Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588)
* rv1108 - Rockchip Evb-rv1108 (evb-rv1108)
On 2024-04-13 20:13, Jonas Karlman wrote:
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Also fix .dtb-file entries in Makefile.
Perhaps the patch subject could be improved a bit to also mention fixing of the Makefile, but only if there will be v3.
Fixes: 3e15dee38d45 ("board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB") Signed-off-by: Jonas Karlman jonas@kwiboo.se
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
v2: No change
arch/arm/dts/Makefile | 4 ++-- doc/board/rockchip/rockchip.rst | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 08dfbdd557b7..38d259a7035c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -167,8 +167,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
- rk3588s-coolpi-4b.dts \
- rk3588-coolpi-cm5-evb.dts \
- rk3588s-coolpi-4b.dtb \
- rk3588-coolpi-cm5-evb.dtb \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 5dd5ea7f1e29..9a726e9cde63 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -131,6 +131,8 @@ List of mainline supported Rockchip boards: - Turing Machines RK1 (turing-rk1-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s) - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
- Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s)- Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588)
- rv1108
- Rockchip Evb-rv1108 (evb-rv1108)
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Also fix .dtb-file entries in Makefile.
When one needs to use a list or say "also", "moreover", etc... it usually is a tell the commit should be split.
Here the changes are not related, so please have two separate patches.
The sum of changes is fine though, thanks.
Cheers, Quentin
Hello Quentin,
On 2024-04-15 10:56, Quentin Schulz wrote:
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Also fix .dtb-file entries in Makefile.
When one needs to use a list or say "also", "moreover", etc... it usually is a tell the commit should be split.
Here the changes are not related, so please have two separate patches.
Agreed.
The sum of changes is fine though, thanks.
Hi Quentin and Dragan,
On 2024-04-15 10:58, Dragan Simic wrote:
Hello Quentin,
On 2024-04-15 10:56, Quentin Schulz wrote:
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Add the CoolPi 4 Model B and CoolPi CM5 EVB board to the documentation. Also fix .dtb-file entries in Makefile.
When one needs to use a list or say "also", "moreover", etc... it usually is a tell the commit should be split.
Here the changes are not related, so please have two separate patches.
Agreed.
I will split this patch for v3.
Regards, Jonas
The sum of changes is fine though, thanks.
Add .dtb-file entry to Makefile and enable Kconfig options required to configure pinctrl in SPL. Also add missing PHY_ROCKCHIP_NANENG_COMBOPHY.
Fixes: 9fdd9a546986 ("board: rockchip: add Rockchip Toybrick TB-RK3588X board") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Fix Makefile entry from .dts to .dtb (Quentin) --- arch/arm/dts/Makefile | 1 + configs/toybrick-rk3588_defconfig | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 38d259a7035c..d5393429f6c5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -180,6 +180,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-quartzpro64.dtb \ rk3588s-rock-5a.dtb \ rk3588-rock-5b.dtb \ + rk3588-toybrick-x0.dtb \ rk3588-turing-rk1.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \ diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 38fc7906eef2..0168e014103e 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -33,8 +33,9 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -53,6 +54,8 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
Add .dtb-file entry to Makefile and enable Kconfig options required to configure pinctrl in SPL. Also add missing PHY_ROCKCHIP_NANENG_COMBOPHY.
Separate commits please.
Sum of changes is fine though (but a bit more verbose commit log would be welcome, why SPL_DM_SEQ_ALIAS for example).
Cheers, Quentin
On 2024-04-15 10:58, Quentin Schulz wrote:
On 4/13/24 20:13, Jonas Karlman wrote:
Add .dtb-file entry to Makefile and enable Kconfig options required to configure pinctrl in SPL. Also add missing PHY_ROCKCHIP_NANENG_COMBOPHY.
Separate commits please.
Perhaps the Makefile changes from a couple of different patches could be put together into another, separate patch. Those are all related changes, and it would result in one less patch in the v3 of this series.
Sum of changes is fine though (but a bit more verbose commit log would be welcome, why SPL_DM_SEQ_ALIAS for example).
Hi Dragan,
On 4/15/24 11:04, Dragan Simic wrote:
On 2024-04-15 10:58, Quentin Schulz wrote:
On 4/13/24 20:13, Jonas Karlman wrote:
Add .dtb-file entry to Makefile and enable Kconfig options required to configure pinctrl in SPL. Also add missing PHY_ROCKCHIP_NANENG_COMBOPHY.
Separate commits please.
Perhaps the Makefile changes from a couple of different patches could be put together into another, separate patch. Those are all related changes, and it would result in one less patch in the v3 of this series.
That would be fine with me.
But always better have too many patches than too few, it's easier to later squash than separate them :)
Cheers, Quentin
Hi Quentin and Dragan,
On 2024-04-15 11:10, Quentin Schulz wrote:
Hi Dragan,
On 4/15/24 11:04, Dragan Simic wrote:
On 2024-04-15 10:58, Quentin Schulz wrote:
On 4/13/24 20:13, Jonas Karlman wrote:
Add .dtb-file entry to Makefile and enable Kconfig options required to configure pinctrl in SPL. Also add missing PHY_ROCKCHIP_NANENG_COMBOPHY.
Separate commits please.
Perhaps the Makefile changes from a couple of different patches could be put together into another, separate patch. Those are all related changes, and it would result in one less patch in the v3 of this series.
That would be fine with me.
But always better have too many patches than too few, it's easier to later squash than separate them :)
Sure, I will split these patches into smaller single purpose patches in v3.
Regards, Jonas
Cheers, Quentin
RK35xx boards are expected to use the dwc3-generic driver and not the xhci-dwc3 driver.
Remove the USB_XHCI_DWC3 option to ensure that the dwc3-generic driver is used.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Drop change to enable the DWC_AHCI option --- configs/turing-rk1-rk3588_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index 77aacbc64b6c..5a86c7eacc8d 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -90,7 +90,6 @@ CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_PCI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y
Enable SPL_FIT_SIGNATURE=y and LEGACY_IMAGE_FORMAT=y to validate FIT images checksum in SPL.
Change to SPL_MAX_SIZE=0x40000 to allow SPL up to 256 KiB in size.
Enable SPL_DM_SEQ_ALIAS=y and SPL_PINCTRL=y to ensure eMMC and SD-card pinctrl is configured in SPL.
Enable SYS_NS16550_MEM32=y to use readl/writel in serial driver.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: No change --- configs/neu6a-io-rk3588_defconfig | 7 ++++++- configs/neu6b-io-rk3588_defconfig | 7 ++++++- 2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index bc2d70421ee9..050f1e5700b1 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -13,11 +13,13 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6a-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y @@ -28,6 +30,7 @@ CONFIG_CMD_MMC=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -40,9 +43,11 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 8bc75a5f0dd9..dabb59afe687 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -13,11 +13,13 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6b-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y @@ -28,6 +30,7 @@ CONFIG_CMD_MMC=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -40,9 +43,11 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y
Add missing emmc_datastrobe and sdmmc0_det pinctrl to fix possible issue reading from eMMC or SD-card. Also use correct node for mmc1 alias.
Fixes: 683f61a13f16 ("rockchip: board: Add minimal generic RK3566/RK3568 board") Fixes: 363cbd578169 ("rockchip: rk3568-generic: Enable eMMC HS200 mode") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Split patch --- arch/arm/dts/rk3568-generic.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts index 88eb1bfd2aab..3b9bf8052046 100644 --- a/arch/arm/dts/rk3568-generic.dts +++ b/arch/arm/dts/rk3568-generic.dts @@ -12,7 +12,7 @@
aliases { mmc0 = &sdhci; - mmc1 = &sdmmc; + mmc1 = &sdmmc0; };
chosen { @@ -28,7 +28,7 @@ no-sdio; non-removable; pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; status = "okay"; };
@@ -39,7 +39,7 @@ no-mmc; no-sdio; pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; status = "okay"; };
Add support for booting from SPI flash using the generic RK3566/RK3568 target.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Split patch --- arch/arm/dts/rk3568-generic-u-boot.dtsi | 7 +++++++ arch/arm/dts/rk3568-generic.dts | 14 +++++++++++++- configs/generic-rk3568_defconfig | 15 +++++++++++++++ 3 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3568-generic-u-boot.dtsi b/arch/arm/dts/rk3568-generic-u-boot.dtsi index 6e8307e3bdf6..fd7f5367b759 100644 --- a/arch/arm/dts/rk3568-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3568-generic-u-boot.dtsi @@ -1,3 +1,10 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi" + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts index 3b9bf8052046..87c3aff26589 100644 --- a/arch/arm/dts/rk3568-generic.dts +++ b/arch/arm/dts/rk3568-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3566/RK3568 with eMMC and SD-card enabled + * Minimal generic DT for RK3566/RK3568 with eMMC, SD-card and SPI flash enabled */
/dts-v1/; @@ -43,6 +43,18 @@ status = "okay"; };
+&sfc { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + &uart2 { status = "okay"; }; diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index e7d5e55bbfd8..9276eae63ee3 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -3,11 +3,15 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_SPL_SERIAL=y CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y @@ -21,6 +25,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -43,10 +49,19 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=4 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SILICONKAISER=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_XTX=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y
Add support for USB OTG, RockUSB and UMS to the generic RK3566/RK3568 target.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Split patch --- arch/arm/dts/rk3568-generic.dts | 19 ++++++++++++++++++- configs/generic-rk3568_defconfig | 10 ++++++++++ 2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts index 87c3aff26589..085a09268e8a 100644 --- a/arch/arm/dts/rk3568-generic.dts +++ b/arch/arm/dts/rk3568-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3566/RK3568 with eMMC, SD-card and SPI flash enabled + * Minimal generic DT for RK3566/RK3568 with eMMC, SD-card, SPI flash and USB OTG enabled */
/dts-v1/; @@ -58,3 +58,20 @@ &uart2 { status = "okay"; }; + +&usb_host0_xhci { + dr_mode = "peripheral"; + extcon = <&usb2phy0>; + maximum-speed = "high-speed"; + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index 9276eae63ee3..26114f9cb2a5 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y @@ -40,6 +42,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_MISC=y # CONFIG_ROCKCHIP_IODOMAIN is not set @@ -57,6 +60,7 @@ CONFIG_SPI_FLASH_SILICONKAISER=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_XMC=y CONFIG_SPI_FLASH_XTX=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 @@ -64,4 +68,10 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y
Add support for USB OTG, RockUSB and UMS to the generic RK3588S/RK3588 target.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Split patch --- arch/arm/dts/rk3588-generic-u-boot.dtsi | 22 ++++++++++++++++++++++ arch/arm/dts/rk3588-generic.dts | 2 +- configs/generic-rk3588_defconfig | 11 +++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi index 853ed58cfe58..225dfa0b682a 100644 --- a/arch/arm/dts/rk3588-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi @@ -1,3 +1,25 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3588s-u-boot.dtsi" + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdp_phy0 { + status = "okay"; +}; + +&usbdp_phy0_u3 { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index baafe7463f1b..95d757676f12 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3588S/RK3588 with eMMC and SD-card enabled + * Minimal generic DT for RK3588S/RK3588 with eMMC, SD-card and USB OTG enabled */
/dts-v1/; diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index b50f4f8b8008..e96df619b59d 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -27,6 +27,8 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y @@ -36,6 +38,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y @@ -44,10 +47,18 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y
The generic RK35xx board targets are intended to be used as a bare minimum target that can be used to e.g. boot boards that mostly follow reference hw design before a board spefic target has been added or flashing and recovery purposes.
Disable BOOTMETH_VBE, NET and ADC as these features are not intended to ever be used by these minimal generic board targets.
Enable SYSRESET_PSCI to let TF-A handle sysreset from U-Boot proper.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: Split patch and skip enable of SUPPORT_EMMC_BOOT option --- configs/generic-rk3568_defconfig | 5 +++++ configs/generic-rk3588_defconfig | 5 +++++ 2 files changed, 10 insertions(+)
diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index 26114f9cb2a5..76c15ca27cc5 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +# CONFIG_BOOTMETH_VBE is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-generic.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -38,9 +39,12 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y +# CONFIG_ADC is not set CONFIG_SPL_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y @@ -68,6 +72,7 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index e96df619b59d..897456111215 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +# CONFIG_BOOTMETH_VBE is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb" @@ -34,9 +35,12 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y +# CONFIG_ADC is not set CONFIG_SPL_CLK=y # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y @@ -55,6 +59,7 @@ CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y
A few RK3588 boards are missing a mmc-hs200 prop to signal that HS200 mode is supported in addition to HS400, this lead to bad performance reading FIT in SPL and broken MMC write.
Add cap-mmc-highspeed and mmc-hs200-1_8v to affected boards to enable use of eMMC HS200 mode.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v2: New patch
All these mmc-hs200 prop overrides may not be needed if the patch "mmc: Imply HS200 cap with mmc-hs400 prop to match linux" [1] gets applied, until such time this matches what has been done for all other RK35xx boards.
[1] https://patchwork.ozlabs.org/patch/1921039/ --- arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi | 5 +++++ 6 files changed, 30 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi index dd0058262b7f..fc4b13628b30 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi @@ -15,6 +15,11 @@ }; };
+&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; + &sdmmc { bus-width = <4>; status = "okay"; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi index a45b3f5e86ad..a0c62072c34e 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi @@ -14,3 +14,8 @@ u-boot,spl-boot-order = &sdmmc; }; }; + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; diff --git a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi index e8566785e965..354e4a8d39e3 100644 --- a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi +++ b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; }; + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 968385622fa5..7948464ac85f 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -11,6 +11,11 @@ bootph-some-ram; };
+&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; + &sfc { pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi index 7b937943a53c..d764135ab661 100644 --- a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi @@ -4,3 +4,8 @@ */
#include "rk3588-u-boot.dtsi" + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; diff --git a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi index 1aeb5410e43e..c5c94b421d1e 100644 --- a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi +++ b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; }; + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +};
Hello Jonas,
Please see my comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
A few RK3588 boards are missing a mmc-hs200 prop to signal that HS200 mode is supported in addition to HS400, this lead to bad performance reading FIT in SPL and broken MMC write.
Add cap-mmc-highspeed and mmc-hs200-1_8v to affected boards to enable use of eMMC HS200 mode.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Shouldn't it be better to follow the Linux kernel's logic in the MMC driver, and enable the HS200 mode when the DT indicates that the HS400 mode is suported? In other words, exactly what you already submitted to the mailing list. [1]
That would allow a significant cleanup of the U-Boot dtsi files to be performed.
Until that's resolved, the patch is looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
[1] https://lore.kernel.org/u-boot/20240408210619.3749231-1-jonas@kwiboo.se/
v2: New patch
All these mmc-hs200 prop overrides may not be needed if the patch "mmc: Imply HS200 cap with mmc-hs400 prop to match linux" [1] gets applied, until such time this matches what has been done for all other RK35xx boards.
[1] https://patchwork.ozlabs.org/patch/1921039/
arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi | 5 +++++ 6 files changed, 30 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi index dd0058262b7f..fc4b13628b30 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi @@ -15,6 +15,11 @@ }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sdmmc { bus-width = <4>; status = "okay"; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi index a45b3f5e86ad..a0c62072c34e 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi @@ -14,3 +14,8 @@ u-boot,spl-boot-order = &sdmmc; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi index e8566785e965..354e4a8d39e3 100644 --- a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi +++ b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 968385622fa5..7948464ac85f 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -11,6 +11,11 @@ bootph-some-ram; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sfc { pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi index 7b937943a53c..d764135ab661 100644 --- a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi @@ -4,3 +4,8 @@ */
#include "rk3588-u-boot.dtsi"
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi index 1aeb5410e43e..c5c94b421d1e 100644 --- a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi +++ b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
Hi Dragan,
On 2024-04-15 09:00, Dragan Simic wrote:
Hello Jonas,
Please see my comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
A few RK3588 boards are missing a mmc-hs200 prop to signal that HS200 mode is supported in addition to HS400, this lead to bad performance reading FIT in SPL and broken MMC write.
Add cap-mmc-highspeed and mmc-hs200-1_8v to affected boards to enable use of eMMC HS200 mode.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Shouldn't it be better to follow the Linux kernel's logic in the MMC driver, and enable the HS200 mode when the DT indicates that the HS400 mode is suported? In other words, exactly what you already submitted to the mailing list. [1]
Yes, this is somewhat what I tried to make aware of with the note and link under "v2: New patch" :-)
That would allow a significant cleanup of the U-Boot dtsi files to be performed.
Until that's resolved, the patch is looking good to me.
Fully agree, this will fix the bad performance in SPL and fix MMC write for existing boards making them work same as other RK3588 boards until the MMC maintainer can weigh in on the linked patch.
Reviewed-by: Dragan Simic dsimic@manjaro.org
Thanks!
Regards, Jonas
[1] https://lore.kernel.org/u-boot/20240408210619.3749231-1-jonas@kwiboo.se/
v2: New patch
All these mmc-hs200 prop overrides may not be needed if the patch "mmc: Imply HS200 cap with mmc-hs400 prop to match linux" [1] gets applied, until such time this matches what has been done for all other RK35xx boards.
[1] https://patchwork.ozlabs.org/patch/1921039/
arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi | 5 +++++ 6 files changed, 30 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi index dd0058262b7f..fc4b13628b30 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi @@ -15,6 +15,11 @@ }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sdmmc { bus-width = <4>; status = "okay"; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi index a45b3f5e86ad..a0c62072c34e 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi @@ -14,3 +14,8 @@ u-boot,spl-boot-order = &sdmmc; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi index e8566785e965..354e4a8d39e3 100644 --- a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi +++ b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 968385622fa5..7948464ac85f 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -11,6 +11,11 @@ bootph-some-ram; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sfc { pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi index 7b937943a53c..d764135ab661 100644 --- a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi @@ -4,3 +4,8 @@ */
#include "rk3588-u-boot.dtsi"
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi index 1aeb5410e43e..c5c94b421d1e 100644 --- a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi +++ b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
On 2024-04-15 10:23, Jonas Karlman wrote:
On 2024-04-15 09:00, Dragan Simic wrote:
Please see my comments below.
On 2024-04-13 20:13, Jonas Karlman wrote:
A few RK3588 boards are missing a mmc-hs200 prop to signal that HS200 mode is supported in addition to HS400, this lead to bad performance reading FIT in SPL and broken MMC write.
Add cap-mmc-highspeed and mmc-hs200-1_8v to affected boards to enable use of eMMC HS200 mode.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Shouldn't it be better to follow the Linux kernel's logic in the MMC driver, and enable the HS200 mode when the DT indicates that the HS400 mode is suported? In other words, exactly what you already submitted to the mailing list. [1]
Yes, this is somewhat what I tried to make aware of with the note and link under "v2: New patch" :-)
Wow, I totally missed that paragraph. :) Though, that also means that we're on the same page. :)
That would allow a significant cleanup of the U-Boot dtsi files to be performed.
Until that's resolved, the patch is looking good to me.
Fully agree, this will fix the bad performance in SPL and fix MMC write for existing boards making them work same as other RK3588 boards until the MMC maintainer can weigh in on the linked patch.
That will be nice.
Reviewed-by: Dragan Simic dsimic@manjaro.org
Thanks!
Thank you for all these nice cleanup patches!
[1] https://lore.kernel.org/u-boot/20240408210619.3749231-1-jonas@kwiboo.se/
v2: New patch
All these mmc-hs200 prop overrides may not be needed if the patch "mmc: Imply HS200 cap with mmc-hs400 prop to match linux" [1] gets applied, until such time this matches what has been done for all other RK35xx boards.
[1] https://patchwork.ozlabs.org/patch/1921039/
arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 5 +++++ arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi | 5 +++++ 6 files changed, 30 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi index dd0058262b7f..fc4b13628b30 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi @@ -15,6 +15,11 @@ }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sdmmc { bus-width = <4>; status = "okay"; diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi index a45b3f5e86ad..a0c62072c34e 100644 --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi @@ -14,3 +14,8 @@ u-boot,spl-boot-order = &sdmmc; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi index e8566785e965..354e4a8d39e3 100644 --- a/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi +++ b/arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 968385622fa5..7948464ac85f 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -11,6 +11,11 @@ bootph-some-ram; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
&sfc { pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi index 7b937943a53c..d764135ab661 100644 --- a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi @@ -4,3 +4,8 @@ */
#include "rk3588-u-boot.dtsi"
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+}; diff --git a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi index 1aeb5410e43e..c5c94b421d1e 100644 --- a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi +++ b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi @@ -10,3 +10,8 @@ u-boot,spl-boot-order = "same-as-spl", &sdhci; }; };
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
Hi Jonas,
On 4/13/24 20:13, Jonas Karlman wrote:
A few RK3588 boards are missing a mmc-hs200 prop to signal that HS200 mode is supported in addition to HS400, this lead to bad performance reading FIT in SPL and broken MMC write.
Add cap-mmc-highspeed and mmc-hs200-1_8v to affected boards to enable use of eMMC HS200 mode.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
v2: New patch
All these mmc-hs200 prop overrides may not be needed if the patch "mmc: Imply HS200 cap with mmc-hs400 prop to match linux" [1] gets applied, until such time this matches what has been done for all other RK35xx boards.
I think this is an acceptable change until we agree on what to do with that other patch :)
I'll abstain from giving my Rb here though as I do not own any of those boards and therefore cannot check this is actually valid.
Cheers, Quentin
participants (4)
-
Dragan Simic -
Jonas Karlman -
Quentin Schulz -
Sean Anderson