This is used for the volume keys on some SM8150/SM8250 devices.

Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- drivers/gpio/qcom_pmic_gpio.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 362d98dbf8cb..0dd3434e9e04 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -364,8 +364,9 @@ static const struct udevice_id qcom_gpio_ids[] = { { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ { .compatible = "qcom,pm8998-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, { .compatible = "qcom,pms405-gpio" }, { .compatible = "qcom,pm6125-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, + { .compatible = "qcom,pm8150-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, { .compatible = "qcom,pm8550-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, { } };

There is a clock associated with this phy, but it's always from the rpmhcc and isn't actually needed for the hardware to work.

Drop all the clock handling from the driver.

Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- drivers/phy/qcom/phy-qcom-snps-femto-v2.c | 14 -------------- 1 file changed, 14 deletions(-)

diff --git a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c index a1675b664e46..04f0f0e7817d 100644 --- a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c @@ -5,10 +5,8 @@ * * Based on Linux driver */

-#include <clk.h> -#include <clk-uclass.h> #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> #include <generic-phy.h> @@ -16,9 +14,8 @@ #include <reset.h>

#include <asm/io.h> #include <linux/bitops.h> -#include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/iopoll.h>

#define USB2_PHY_USB_PHY_UTMI_CTRL0 (0x3c) @@ -61,9 +58,8 @@ #define REFCLK_SEL_DEFAULT (0x2 << 0)

struct qcom_snps_hsphy { void __iomem *base; - struct clk_bulk clks; struct reset_ctl_bulk resets; };

/* @@ -142,10 +138,8 @@ static int qcom_snps_hsphy_power_on(struct phy *phy) { struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev); int ret;

- clk_enable_bulk(&priv->clks); - ret = reset_deassert_bulk(&priv->resets); if (ret) return ret;

@@ -160,9 +154,8 @@ static int qcom_snps_hsphy_power_off(struct phy *phy) { struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);

reset_assert_bulk(&priv->resets); - clk_disable_bulk(&priv->clks);

return 0; }

@@ -174,21 +167,14 @@ static int qcom_snps_hsphy_phy_probe(struct udevice *dev) priv->base = dev_read_addr_ptr(dev); if (IS_ERR(priv->base)) return PTR_ERR(priv->base);

- ret = clk_get_bulk(dev, &priv->clks); - if (ret < 0 && ret != -ENOENT) { - printf("%s: Failed to get clocks %d\n", __func__, ret); - return ret; - } - ret = reset_get_bulk(dev, &priv->resets); if (ret < 0) { printf("failed to get resets, ret = %d\n", ret); return ret; }

- clk_enable_bulk(&priv->clks); reset_deassert_bulk(&priv->resets);

return 0; }

Some Qualcomm boards have only one USB controller which is muxed between the type-c port and an internal USB hub for type-A and ethernet. We modify the DT for these to force them to host mode in U-Boot. However in Linux DRD role switching is supported (required, even). Use ft_board_setup() to adjust the dr_mode property for these boards.

While we're here, define pr_fmt for this file so we can more easily identify log messages.

Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- arch/arm/mach-snapdragon/of_fixup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)

diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c index 3f7ac227bd09..55368dd43b66 100644 --- a/arch/arm/mach-snapdragon/of_fixup.c +++ b/arch/arm/mach-snapdragon/of_fixup.c @@ -16,8 +16,10 @@ * Copyright (c) 2024 Linaro Ltd. * Author: Caleb Connolly caleb.connolly@linaro.org */

+#define pr_fmt(fmt) "of_fixup: " fmt + #include <dt-bindings/input/linux-event-codes.h> #include <dm/of_access.h> #include <dm/of.h> #include <fdt_support.h> @@ -152,4 +154,22 @@ void qcom_of_fixup_nodes(void) { time_call(fixup_usb_nodes); time_call(fixup_power_domains); } + +int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd) +{ + struct fdt_header *fdt = blob; + int node; + + /* We only want to do this fix-up for the RB1 board, quick return for all others */ + if (!fdt_node_check_compatible(fdt, 0, "qcom,qrb4210-rb2")) + return 0; + + fdt_for_each_node_by_compatible(node, blob, 0, "snps,dwc3") { + log_debug("%s: Setting 'dr_mode' to OTG\n", fdt_get_name(blob, node, NULL)); + fdt_setprop_string(fdt, node, "dr_mode", "otg"); + break; + } + + return 0; +}

Use our new ft_board_setup().

Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- configs/qcom_defconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 7b589f0bf7a7..209a7ba324d0 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -33,8 +33,9 @@ CONFIG_CMD_USB=y CONFIG_CMD_CAT=y CONFIG_CMD_BMP=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y +CONFIG_OF_BOARD_SETUP=y CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y

EFI initialisation fails without this, and with proper SMBIOS v3 support in (and automatic generation of useful tables) there's no reason for us not to do this on qcom platforms.

Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- configs/qcom_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 41545fd72fcc..7919aeb9755d 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -104,6 +104,6 @@ CONFIG_VIDEO_FONT_16X32=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y CONFIG_VIDEO_SIMPLE=y CONFIG_HEXDUMP=y -# CONFIG_GENERATE_SMBIOS_TABLE is not set +CONFIG_GENERATE_SMBIOS_TABLE=y CONFIG_LMB_MAX_REGIONS=64