From: "Ying-Chun Liu (PaulLiu)" paul.liu@linaro.org

add the following overlays: - IED extension board - CAN/TPM/ADC extension board on IED board.

Signed-off-by: Uri Mashiach uri.mashiach@compulab.co.il Signed-off-by: Ying-Chun Liu (PaulLiu) paul.liu@linaro.org Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/dts/Makefile | 20 ++++- arch/arm/dts/imx8mm-cl-iot-gate-ied-adc0.dts | 30 +++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied-adc1.dts | 30 +++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied-can0.dts | 53 ++++++++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied-can1.dts | 53 ++++++++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dts | 45 +++++++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm1.dts | 45 +++++++++++ arch/arm/dts/imx8mm-cl-iot-gate-ied.dts | 85 ++++++++++++++++++++ 8 files changed, 358 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-adc0.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-adc1.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-can0.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-can1.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm1.dts create mode 100644 arch/arm/dts/imx8mm-cl-iot-gate-ied.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a88aecc5bd..c59a2f43ec 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1147,9 +1147,23 @@ dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb

dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb

-dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb - -dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb +dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \ + imx8mm-cl-iot-gate-ied.dtbo \ + imx8mm-cl-iot-gate-ied-adc0.dtbo \ + imx8mm-cl-iot-gate-ied-adc1.dtbo \ + imx8mm-cl-iot-gate-ied-can0.dtbo \ + imx8mm-cl-iot-gate-ied-can1.dtbo \ + imx8mm-cl-iot-gate-ied-tpm0.dtbo \ + imx8mm-cl-iot-gate-ied-tpm1.dtbo + +dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb \ + imx8mm-cl-iot-gate-ied.dtbo \ + imx8mm-cl-iot-gate-ied-adc0.dtbo \ + imx8mm-cl-iot-gate-ied-adc1.dtbo \ + imx8mm-cl-iot-gate-ied-can0.dtbo \ + imx8mm-cl-iot-gate-ied-can1.dtbo \ + imx8mm-cl-iot-gate-ied-tpm0.dtbo \ + imx8mm-cl-iot-gate-ied-tpm1.dtbo

dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb

diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc0.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc0.dts new file mode 100644 index 0000000000..3f2201e4ee --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc0.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +&{/} { + vref_adc: regulator-vref-adc { + compatible = "regulator-fixed"; + regulator-name = "vref_adc"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <2400000>; + regulator-always-on; + }; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + + adc0: adc@0 { + compatible = "maxim,max11108"; + reg = <0>; + vref-supply = <&vref_adc>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc1.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc1.dts new file mode 100644 index 0000000000..bb0f848718 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-adc1.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +&{/} { + vref_adc: regulator-vref-adc { + compatible = "regulator-fixed"; + regulator-name = "vref_adc"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <2400000>; + regulator-always-on; + }; +}; + +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + + adc1: adc@0 { + compatible = "maxim,max11108"; + reg = <0>; + vref-supply = <&vref_adc>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-can0.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-can0.dts new file mode 100644 index 0000000000..0e46300142 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-can0.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +#include "imx8mm-pinfunc.h" + +&{/} { + clocks { + #address-cells = <1>; + #size-cells = <0>; + clk40m: clk@1 { + compatible = "fixed-clock"; + reg = <1>; + #clock-cells = <0>; + clock-frequency = <40000000>; + clock-output-names = "clk40m"; + }; + }; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + + can0: can@0 { + compatible = "microchip,mcp2518fd"; + reg = <0>; + microchip,rx-int = <&gpio4 31 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <20000000>; + clocks = <&clk40m>; + status = "okay"; + }; +}; + +&iomuxc { + pinctrl_can0: can0grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x00 + MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x00 + >; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-can1.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-can1.dts new file mode 100644 index 0000000000..fd7274eb7a --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-can1.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +#include "imx8mm-pinfunc.h" + +&{/} { + clocks { + #address-cells = <1>; + #size-cells = <0>; + clk40m: clk@1 { + compatible = "fixed-clock"; + reg = <1>; + #clock-cells = <0>; + clock-frequency = <40000000>; + clock-output-names = "clk40m"; + }; + }; +}; + +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + + can1: can@0 { + compatible = "microchip,mcp2518fd"; + reg = <0>; + microchip,rx-int = <&gpio5 28 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + interrupt-parent = <&gpio5>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <20000000>; + clocks = <&clk40m>; + status = "okay"; + }; +}; + +&iomuxc { + pinctrl_can1: can1grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x00 + MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x00 + >; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dts new file mode 100644 index 0000000000..06fa77c0e8 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm0.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +#include "imx8mm-pinfunc.h" + +&{/} { + regulatot-tpm0-rst { + compatible = "regulator-fixed"; + regulator-name = "tpm0-rst"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; + regulator-always-on; + enable-active-high; + }; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + + tpm0: tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm0>; + spi-max-frequency = <5000000>; + status = "okay"; + }; +}; + +&iomuxc { + pinctrl_tpm0: tpm0grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x0 + >; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm1.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm1.dts new file mode 100644 index 0000000000..c9676a3a00 --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied-tpm1.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +#include "imx8mm-pinfunc.h" + +&{/} { + regulator-tpm1-rst { + compatible = "regulator-fixed"; + regulator-name = "tpm1-rst"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; + regulator-always-on; + enable-active-high; + }; +}; + +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + + tpm1: tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm1>; + spi-max-frequency = <5000000>; + status = "disabled"; + }; +}; + +&iomuxc { + pinctrl_tpm1: tpm1grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x0 + >; + }; +}; diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-ied.dts b/arch/arm/dts/imx8mm-cl-iot-gate-ied.dts new file mode 100644 index 0000000000..b85485126e --- /dev/null +++ b/arch/arm/dts/imx8mm-cl-iot-gate-ied.dts @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Linaro + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +#include "imx8mm-pinfunc.h" + +&ecspi1 { + #address-cells = <1>; + #size-cells = <0>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; + cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 + MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 + MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 + >; + }; + + pinctrl_ecspi1_cs: ecspi1cs { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x02 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x02 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x102 + >; + }; + + pinctrl_ecspi2_cs: ecspi2_csgrp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x02 + MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x02 + MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x102 + >; + }; + + pinctrl_ecspi3_cs: ecspi3_csgrp { + fsl,pins = < + MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x40000 + >; + }; +};

From: "Ying-Chun Liu (PaulLiu)" paul.liu@linaro.org

Extension boards can be added to Compulab's iot-gate-imx8mm. We implement extension board manager for detecting the extension boards.

Signed-off-by: Uri Mashiach uri.mashiach@compulab.co.il Signed-off-by: Ying-Chun Liu (PaulLiu) paul.liu@linaro.org Cc: uboot-imx uboot-imx@nxp.com --- arch/arm/mach-imx/imx8m/Kconfig | 2 + .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 333 ++++++++++++++++++ 2 files changed, 335 insertions(+)

diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 276b8bd974..bd2a7d6820 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -147,6 +147,7 @@ config TARGET_IMX8MM_CL_IOT_GATE select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 + select SUPPORT_EXTENSION_SCAN

config TARGET_IMX8MM_CL_IOT_GATE_OPTEE bool "CompuLab iot-gate-imx8 with optee support" @@ -154,6 +155,7 @@ config TARGET_IMX8MM_CL_IOT_GATE_OPTEE select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 + select SUPPORT_EXTENSION_SCAN endchoice

source "board/beacon/imx8mm/Kconfig" diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c index cd15410978..7e2d88f449 100644 --- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c +++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c @@ -6,14 +6,21 @@

#include <common.h> #include <env.h> +#include <extension_board.h> #include <hang.h> +#include <i2c.h> #include <init.h> #include <miiphy.h> #include <netdev.h>

#include <asm/arch/clock.h> +#include <asm/arch/imx8mm_pins.h> #include <asm/arch/sys_proto.h> +#include <asm/global_data.h> #include <asm/io.h> +#include <asm/mach-imx/gpio.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/sections.h>

#include "ddr/ddr.h"

@@ -41,6 +48,25 @@ int board_phys_sdram_size(phys_size_t *size) return 0; }

+/* IOT_GATE-iMX8 extension boards ID */ +typedef enum { + IOT_GATE_EXT_EMPTY, /* No extension */ + IOT_GATE_EXT_CAN, /* CAN bus */ + IOT_GATE_EXT_IED, /* Bridge */ + IOT_GATE_EXT_POE, /* POE */ + IOT_GATE_EXT_POEV2, /* POEv2 */ +} iot_gate_imx8_ext; + +typedef enum { + IOT_GATE_IMX8_CARD_ID_EMPTY = 0, /* card id - uninhabited */ + IOT_GATE_IMX8_CARD_ID_DI4O4 = 1, /* Card ID - IED-DI4O4 */ + IOT_GATE_IMX8_CARD_ID_RS_485 = 2, /* Card ID - IED-RS485 */ + IOT_GATE_IMX8_CARD_ID_TPM = 3, /* Card ID - IED-TPM */ + IOT_GATE_IMX8_CARD_ID_CAN = 4, /* Card ID - IED-CAN */ + IOT_GATE_IMX8_CARD_ID_CL420 = 5, /* Card ID - IED-CL420 */ + IOT_GATE_IMX8_CARD_ID_RS_232 = 6, /* Card ID - IED-RS232 */ +} iot_gate_imx8_ied_ext; + static int setup_fec(void) { if (IS_ENABLED(CONFIG_FEC_MXC)) { @@ -85,6 +111,313 @@ int board_mmc_get_env_dev(int devno) return devno; }

+#define IOT_GATE_IMX8_EXT_I2C 3 /* I2C ID of the extension board */ +#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM 0x54 /* I2C address of the EEPROM */ + +/* I2C address of the EEPROM in the POE extension */ +#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE 0x50 +#define IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POEV2 0x51 +#define IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO 0x22 /* I2C address of the GPIO + extender */ + +static int iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; /* Extension board ID */ +static int iot_gate_imx8_ext_ied_id [3] = { + IOT_GATE_IMX8_CARD_ID_EMPTY, + IOT_GATE_IMX8_CARD_ID_EMPTY, + IOT_GATE_IMX8_CARD_ID_EMPTY }; + +/* + * iot_gate_imx8_detect_ext() - extended board detection + * The detection is done according to the detected I2C devices. + */ +static void iot_gate_imx8_detect_ext(void) +{ + int ret; + struct udevice *i2c_bus, *i2c_dev; + + ret = uclass_get_device_by_seq(UCLASS_I2C, IOT_GATE_IMX8_EXT_I2C, + &i2c_bus); + if (ret) { + printf("%s: Failed getting i2c device\n", __func__); + return; + } + + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POE, 0, + &i2c_dev); + if (!ret) { + iot_gate_imx8_ext_id = IOT_GATE_EXT_POE; + return; + } + + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM_POEV2, 0, + &i2c_dev); + if (!ret) { + iot_gate_imx8_ext_id = IOT_GATE_EXT_POEV2; + return; + } + + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_EEPROM, 0, + &i2c_dev); + if (ret){ + iot_gate_imx8_ext_id = IOT_GATE_EXT_EMPTY; + return; + } + /* Only the bridge extension includes the GPIO extender */ + ret = dm_i2c_probe(i2c_bus, IOT_GATE_IMX8_EXT_I2C_ADDR_GPIO, 0, + &i2c_dev); + if (ret) /* GPIO extender not detected */ + iot_gate_imx8_ext_id = IOT_GATE_EXT_CAN; + else /* GPIO extender detected */ + iot_gate_imx8_ext_id = IOT_GATE_EXT_IED; +} + +static iomux_v3_cfg_t const iot_gate_imx8_ext_ied_pads[] = { + IMX8MM_PAD_NAND_ALE_GPIO3_IO0 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_CE0_B_GPIO3_IO1 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_DATA00_GPIO3_IO6 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_DATA01_GPIO3_IO7 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_DATA02_GPIO3_IO8 | MUX_PAD_CTRL(PAD_CTL_PE), + IMX8MM_PAD_NAND_DATA03_GPIO3_IO9 | MUX_PAD_CTRL(PAD_CTL_PE), +}; + +static iomux_v3_cfg_t const iot_gate_imx8_ext_poev2_pads[] = { + IMX8MM_PAD_SAI3_TXD_GPIO5_IO1 | MUX_PAD_CTRL(PAD_CTL_PE | + PAD_CTL_PUE), +}; + +/* Extension board bridge GPIOs */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_I0 IMX_GPIO_NR(3, 0) /* IN 0 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_I1 IMX_GPIO_NR(3, 1) /* IN 1 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_I2 IMX_GPIO_NR(3, 6) /* IN 2 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_I3 IMX_GPIO_NR(3, 7) /* IN 3 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_O0 IMX_GPIO_NR(3, 8) /* OUT 0 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_O1 IMX_GPIO_NR(3, 9) /* OUT 1 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_O2 IMX_GPIO_NR(6, 9) /* OUT 2 */ +#define IOT_GATE_IMX8_GPIO_EXT_IED_O3 IMX_GPIO_NR(6, 10)/* OUT 3 */ + +/* Extension board POE GPIOs */ +#define IOT_GATE_IMX8_GPIO_EXT_POE_MUX IMX_GPIO_NR(5, 1)/* USB_MUX */ + +/* + * iot_gate_imx8_update_pinmux() - update the pinmux + * Update the pinmux according to the detected extended board. + */ +static void iot_gate_imx8_update_pinmux(void) +{ + if (iot_gate_imx8_ext_id == IOT_GATE_EXT_POEV2) { + imx_iomux_v3_setup_multiple_pads(iot_gate_imx8_ext_poev2_pads, + ARRAY_SIZE(iot_gate_imx8_ext_poev2_pads)); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_POE_MUX, "poev2_usb-mux"); + /* Update USB MUX state */ + gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_POE_MUX, 1); + + return; + } + if (iot_gate_imx8_ext_id != IOT_GATE_EXT_IED) + return; + + imx_iomux_v3_setup_multiple_pads(iot_gate_imx8_ext_ied_pads, + ARRAY_SIZE(iot_gate_imx8_ext_ied_pads)); + + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I0, "ied-di4o4_i0"); + gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I0); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I1, "ied-di4o4_i1"); + gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I1); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I2, "ied-di4o4_i2"); + gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I2); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_I3, "ied-di4o4_i3"); + gpio_direction_input(IOT_GATE_IMX8_GPIO_EXT_IED_I3); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O0, "ied-di4o4_o0"); + gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O0, 0); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O1, "ied-di4o4_o1"); + gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O1, 0); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O2, "ied-di4o4_o2"); + gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O2, 0); + gpio_request(IOT_GATE_IMX8_GPIO_EXT_IED_O3, "ied-di4o4_o3"); + gpio_direction_output(IOT_GATE_IMX8_GPIO_EXT_IED_O3, 0); +} + +#define IOT_GATE_IMX8_GPIO_S0B0 IMX_GPIO_NR(6, 0) /* Slot ID slot 0 bit 0 */ +#define IOT_GATE_IMX8_GPIO_S0B1 IMX_GPIO_NR(6, 1) /* Slot ID slot 0 bit 1 */ +#define IOT_GATE_IMX8_GPIO_S0B2 IMX_GPIO_NR(6, 2) /* Slot ID slot 0 bit 2 */ +#define IOT_GATE_IMX8_GPIO_S1B0 IMX_GPIO_NR(6, 3) /* Slot ID slot 1 bit 0 */ +#define IOT_GATE_IMX8_GPIO_S1B1 IMX_GPIO_NR(6, 4) /* Slot ID slot 1 bit 1 */ +#define IOT_GATE_IMX8_GPIO_S1B2 IMX_GPIO_NR(6, 5) /* Slot ID slot 1 bit 2 */ +#define IOT_GATE_IMX8_GPIO_S2B0 IMX_GPIO_NR(6, 6) /* Slot ID slot 2 bit 0 */ +#define IOT_GATE_IMX8_GPIO_S2B1 IMX_GPIO_NR(6, 7) /* Slot ID slot 2 bit 1 */ +#define IOT_GATE_IMX8_GPIO_S2B2 IMX_GPIO_NR(6, 8) /* Slot ID slot 2 bit 2 */ + +/* + * iot_gate_imx8_update_ext_ied() + * Update device tree of the extended board IED-BASE. + * The device tree is updated according to the detected sub modules. + * + * Return 0 for success, 1 for failure. + */ +static int iot_gate_imx8_update_ext_ied(void) +{ + int revision; + + if (iot_gate_imx8_ext_id != IOT_GATE_EXT_IED) + return 0; + + /* ID GPIO initializations */ + if (gpio_request(IOT_GATE_IMX8_GPIO_S0B0, "id_s0b0") || + gpio_request(IOT_GATE_IMX8_GPIO_S0B1, "id_s0b1") || + gpio_request(IOT_GATE_IMX8_GPIO_S0B2, "id_s0b2") || + gpio_request(IOT_GATE_IMX8_GPIO_S1B0, "id_s1b0") || + gpio_request(IOT_GATE_IMX8_GPIO_S1B1, "id_s1b1") || + gpio_request(IOT_GATE_IMX8_GPIO_S1B2, "id_s1b2") || + gpio_request(IOT_GATE_IMX8_GPIO_S2B0, "id_s2b0") || + gpio_request(IOT_GATE_IMX8_GPIO_S2B1, "id_s2b1") || + gpio_request(IOT_GATE_IMX8_GPIO_S2B2, "id_s2b2")) { + printf("%s: ID GPIO request failure\n", __func__); + return 1; + } + gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B0); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B1); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S0B2); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B0); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B1); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S1B2); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B0); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B1); + gpio_direction_input(IOT_GATE_IMX8_GPIO_S2B2); + + /* Get slot 0 card ID */ + revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S0B0) | + gpio_get_value(IOT_GATE_IMX8_GPIO_S0B1) << 1 | + gpio_get_value(IOT_GATE_IMX8_GPIO_S0B2) << 2; + iot_gate_imx8_ext_ied_id[0] = revision; + + /* Get slot 1 card ID */ + revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S1B0) | + gpio_get_value(IOT_GATE_IMX8_GPIO_S1B1) << 1 | + gpio_get_value(IOT_GATE_IMX8_GPIO_S1B2) << 2; + iot_gate_imx8_ext_ied_id[1] = revision; + + /* Get slot 2 card ID */ + revision = gpio_get_value(IOT_GATE_IMX8_GPIO_S2B0) | + gpio_get_value(IOT_GATE_IMX8_GPIO_S2B1) << 1 | + gpio_get_value(IOT_GATE_IMX8_GPIO_S2B2) << 2; + iot_gate_imx8_ext_ied_id[2] = revision; + + return 0; +} + +int board_fix_fdt(void *rw_fdt_blob) +{ + return 0; +} + +int extension_board_scan(struct list_head *extension_list) +{ + struct extension *extension = NULL; + int i; + int ret = 0; + + iot_gate_imx8_detect_ext(); /* Extended board detection */ + + switch(iot_gate_imx8_ext_id) { + case IOT_GATE_EXT_EMPTY: + break; + case IOT_GATE_EXT_CAN: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_EXT_CAN"); + break; + case IOT_GATE_EXT_IED: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_EXT_IED"); + snprintf(extension->overlay, sizeof(extension->overlay), + "imx8mm-cl-iot-gate-ied.dtbo"); + break; + case IOT_GATE_EXT_POE: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_EXT_POE"); + break; + case IOT_GATE_EXT_POEV2: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_EXT_POEV2"); + break; + default: + printf("IOT_GATE-iMX8 extension board: unknown\n"); + break; + } + + if (extension) { + snprintf(extension->owner, sizeof(extension->owner), + "Compulab"); + list_add_tail(&extension->list, extension_list); + ret = 1; + } else + return ret; + + iot_gate_imx8_update_pinmux(); + + iot_gate_imx8_update_ext_ied(); + for (i=0; i<ARRAY_SIZE(iot_gate_imx8_ext_ied_id); i++) { + extension = NULL; + switch (iot_gate_imx8_ext_ied_id[i]) { + case IOT_GATE_IMX8_CARD_ID_EMPTY: + break; + case IOT_GATE_IMX8_CARD_ID_RS_485: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_RS_485"); + break; + case IOT_GATE_IMX8_CARD_ID_RS_232: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_RS_232"); + break; + case IOT_GATE_IMX8_CARD_ID_CAN: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_CAN"); + snprintf(extension->overlay, sizeof(extension->overlay), + "imx8mm-cl-iot-gate-ied-can%d.dtbo", i); + break; + case IOT_GATE_IMX8_CARD_ID_TPM: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_TPM"); + snprintf(extension->overlay, sizeof(extension->overlay), + "imx8mm-cl-iot-gate-ied-tpm%d.dtbo", i); + break; + case IOT_GATE_IMX8_CARD_ID_CL420: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_CL420"); + snprintf(extension->overlay, sizeof(extension->overlay), + "imx8mm-cl-iot-gate-ied-can%d.dtbo", i); + break; + case IOT_GATE_IMX8_CARD_ID_DI4O4: + extension = calloc(1, sizeof(struct extension)); + snprintf(extension->name, sizeof(extension->name), + "IOT_GATE_IMX8_CARD_ID_DI4O4"); + break; + default: + printf("%s: invalid slot %d card ID: %d\n", + __func__, i, iot_gate_imx8_ext_ied_id[i]); + break; + } + if (extension) { + snprintf(extension->owner, sizeof(extension->owner), + "Compulab"); + snprintf(extension->other, sizeof(extension->other), + "On slot %d", i); + list_add_tail(&extension->list, extension_list); + ret = ret + 1; + } + } + + return ret; +} + int board_late_init(void) { if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {