[U-Boot] [PATCH v2] OMAP5: I2C: Enable i2c5 clocks
V2 fixes line wrap issue of the patch itself.
I2C5 is used on all known OMAP5 hardware platforms, therefore enable.
Signed-off-by: Lubomir Popov lpopov@mm-sol.com
--- arch/arm/cpu/armv7/omap5/hw_data.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, + (*prcm)->cm_l4per_i2c5_clkctrl, (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0
On Thursday 04 April 2013 09:22 PM, Lubomir Popov wrote:
V2 fixes line wrap issue of the patch itself.
I2C5 is used on all known OMAP5 hardware platforms, therefore enable.
Signed-off-by: Lubomir Popov lpopov@mm-sol.com
arch/arm/cpu/armv7/omap5/hw_data.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl,
(*prcm)->cm_l4per_i2c5_clkctrl,
This is fine. Can you also mention what device is connected on them ? and how you are using it ?
Also can you add these in a series.
Regards, Sricharan
Hi Sricharan,
On 08/04/13 09:09, Sricharan R wrote:
On Thursday 04 April 2013 09:22 PM, Lubomir Popov wrote:
V2 fixes line wrap issue of the patch itself.
I2C5 is used on all known OMAP5 hardware platforms, therefore enable.
Signed-off-by: Lubomir Popov lpopov@mm-sol.com
arch/arm/cpu/armv7/omap5/hw_data.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl,
(*prcm)->cm_l4per_i2c5_clkctrl,This is fine. Can you also mention what device is connected on them ? and how you are using it ?
Also can you add these in a series.
Regards, Sricharan
On our board we have an I/O expander on I2C5 - the same chip that is used on the TI sEVM (the handset) and uEVM (the PandaBoard5) platforms (on both of which it is also connected to I2C5). Therefore it seems reasonable to have I2C5 enabled in the mainline. This requires that the base address is defined, and that I2C_BUS_MAX is set to 5 (please see related patches).
I shall do make a new series on I2C5 support.
One more thing I would like to clarify to myself: in your patch series of Apr. 1 you rename the omap5_evm to omap5_uevm. On the other hand, uEVM was the TI-internal name for the PandaBoard5, and the evm was known as sEVM. Doesn't this cause confusion? After all, these are two quite different hardware platforms.
Thanks and regards, Lubomir
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On 04/08/2013 05:35 AM, Lubomir Popov wrote:
One more thing I would like to clarify to myself: in your patch series of Apr. 1 you rename the omap5_evm to omap5_uevm. On the other hand, uEVM was the TI-internal name for the PandaBoard5, and the evm was known as sEVM. Doesn't this cause confusion? After all, these are two quite different hardware platforms.
Moving forward, there is only uEVM and sEVM doesn't exist.
- -- Tom
Hi Lubomir,
On Monday 08 April 2013 03:05 PM, Lubomir Popov wrote:
Hi Sricharan,
On 08/04/13 09:09, Sricharan R wrote:
On Thursday 04 April 2013 09:22 PM, Lubomir Popov wrote:
V2 fixes line wrap issue of the patch itself.
I2C5 is used on all known OMAP5 hardware platforms, therefore enable.
Signed-off-by: Lubomir Popov lpopov@mm-sol.com
arch/arm/cpu/armv7/omap5/hw_data.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index e5e41fd..5698876 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -412,6 +412,7 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl,
(*prcm)->cm_l4per_i2c5_clkctrl,This is fine. Can you also mention what device is connected on them ? and how you are using it ?
Also can you add these in a series.
Regards, Sricharan
On our board we have an I/O expander on I2C5 - the same chip that is used on the TI sEVM (the handset) and uEVM (the PandaBoard5) platforms (on both of which it is also connected to I2C5). Therefore it seems reasonable to have I2C5 enabled in the mainline. This requires that the base address is defined, and that I2C_BUS_MAX is set to 5 (please see related patches).
I shall do make a new series on I2C5 support.
One more thing I would like to clarify to myself: in your patch series of Apr. 1 you rename the omap5_evm to omap5_uevm. On the other hand, uEVM was the TI-internal name for the PandaBoard5, and the evm was known as sEVM. Doesn't this cause confusion? After all, these are two quite different hardware platforms.
Thanks for the explanation. It would good to have the reasoning in the original commit log.
For the next one,Tom already answered this. So uEVM is the and also the only official.
Regards, Sricharan
participants (3)
-
Lubomir Popov -
Sricharan R -
Tom Rini