I have been able to build a working (on my orangepi zero3 1G) u-boot for the orangepi zero3 with the following defconfig. Would it be possible to add this config to the working boards. I would test it again with an official build. The dtb/dts is in linux and in u-boot.
The H618 processor is software compatible with the H616 and the zero3 board is very similar to the zero2 with the exception of DDR3 replaced with LPDDR4 and the Realtek phy with Motorcomm.
CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3" CONFIG_SPL=y CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee CONFIG_DRAM_SUN50I_H616_TPR0=0x0 CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 CONFIG_DRAM_SUN50I_H616_TPR10=0x402f0663 CONFIG_DRAM_SUN50I_H616_TPR11=0x24242323 CONFIG_DRAM_SUN50I_H616_TPR12=0x0e0e0e0e CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR4=y CONFIG_DRAM_CLK=792 CONFIG_R_I2C_ENABLE=y CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHY_MOTORCOMM=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_AXP313_POWER=y CONFIG_AXP_DCDC3_VOLT=1100 CONFIG_CMD_BOOTZ=y
On Tue, 21 Nov 2023 21:52:12 -0800 Stephen Graf s_graf@telus.net wrote:
Hi Stephen,
I have been able to build a working (on my orangepi zero3 1G) u-boot for the orangepi zero3 with the following defconfig. Would it be possible to
thanks for your interest in contributing and for reaching out! As Peter already mentioned, you would need to send a patch, as generated by "git format-patch". "git send-email" would help you with sending this out.
But actually I sent a small series already last week: https://lore.kernel.org/u-boot/20231114013106.31336-1-andre.przywara@arm.com...
If you could apply these patches and test it on your board, I'd be grateful. If it works for you and you are happy, please reply to patch 3/3 and add a "Tested-by: Your Name your@email.com" line. For instructions how to reply, check "Reply instructions" at the end of that mailing list archive web page above.
I was just waiting for confirmations by other people before merging it.
Cheers, Andre
add this config to the working boards. I would test it again with an official build. The dtb/dts is in linux and in u-boot.
The H618 processor is software compatible with the H616 and the zero3 board is very similar to the zero2 with the exception of DDR3 replaced with LPDDR4 and the Realtek phy with Motorcomm.
CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3" CONFIG_SPL=y CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee CONFIG_DRAM_SUN50I_H616_TPR0=0x0 CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 CONFIG_DRAM_SUN50I_H616_TPR10=0x402f0663 CONFIG_DRAM_SUN50I_H616_TPR11=0x24242323 CONFIG_DRAM_SUN50I_H616_TPR12=0x0e0e0e0e CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR4=y CONFIG_DRAM_CLK=792 CONFIG_R_I2C_ENABLE=y CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHY_MOTORCOMM=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_AXP313_POWER=y CONFIG_AXP_DCDC3_VOLT=1100 CONFIG_CMD_BOOTZ=y
participants (2)
-
Andre Przywara -
Stephen Graf